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EC - 1 - Labmanual PDF
EC - 1 - Labmanual PDF
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EINSTEIN
COLLEGE OF ENGINEERING
Sir.C.V.Raman Nagar, Tirunelveli-12
Name
Reg No
Branch
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Sub Code: EC38 EC-I Lab
INDEX
Exp.
No.
DATE
TITLE OF EXPERIMENT
BOOTSTRAPPED SOURCE
FOLLOWER
DIFFERENTIAL AMPLIFIER
10
PAGE
NO.
MARKS
STAFF
INITIAL
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LOAD LINE:
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Sub Code: EC38 EC-I Lab
Ex.No : 1
Date :
FIXED BIAS AMPLIFIER
AIM:
To design a fixed bias amplifier using BJT and to determine the gain
bandwidth product from its frequency response curve.
APPARATUS REQUIRED:
1. Resistor (2)
2. Transistor (1) BC 107
3. Capacitor (2)
4. RPS (1) (0-30)V
5. AFO(1)
6. CRO
7. Bread board
8. Connecting wires
DESIGN:
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MODEL GRAPH:
TABULATION:
Vin =
Frequency (HZ) Output voltage ( Volt)
Gain=Vo/Vin
Gain in
dB=20log(Vo/Vi)
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THEORY:
To use a transistor in any application, it is necessary to provide external DC
voltages to operate it in the active region. This process is known as Biasing.
The biasing circuit should be designed to fix the operating point at the center
of the active region. The circuit design should provide a degree of temperature
stability.
In this fixed bias amplifier a high resistance RB is connected between the base
and positive end of supply. The value of RB can be directly found by applying KVL
to the input and output loop. For this reason, this method is called fixed bias method.
This fixed biasing circuit is very simple and biasing conditions can easily be
set and also the calculations are very simple. But it provides very poor stabilization.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the input and apply the input signal from the FG and observe the
output.
3. Vary the input frequency from 10Hz to 1MHz and the output amplitude is
noted.
4. Calculate the gain and draw the frequency response curve.
5. Note the gain bandwidth product.
RESULT:
Thus the fixed bias amplifier was designed and the gain bandwidth product
was determined from the frequency response curve.
Gain =
Bandwidth=
Gain Bandwidth product =
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Ex.No : 2
Date :
COMMON EMITTER AMPLIFIER WITH AND WITHOUT FEEDBACK
AIM:
To design a CE amplifier under voltage divider bias with and without
feedback and to determine the gain bandwidth product from its frequency response
curve.
APPARATUS REQUIRED:
Sl.No
1.
Apparatus
Resistor
2.
3.
4.
5.
6.
7.
8.
Transistor
capacitor
RPS
AFO
CRO
Bread board
Connecting wires
Range
BC 547
(0-30)V
Quantity
1
1
1
1
1
2
1
1
1
1
few
DESIGN:
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LOAD LINE:
MODEL GRAPH:
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THEORY:
A CE amplifier is a circuit it can be used to increase the magnitude of the
input voltage at the output by means of energy drawn from an external source.
The CE amplifier construct with voltage divider biasing circuit. Biasing circuit
sets the proper operating point for the CE amplifier. The input coupling capacitor
couples the input signal to the base of the transistor. It blocks any dc component
present in the signal and passes only ac signal. Because of this, biasing conditions are
maintained constant. The output coupling capacitor couples the output of the amplifier
to the load. It blocks dc and passes only ac part of the amplified signal. An emitter
bypass capacitor is connected in parallel with the emitter resistance, to provide a low
reactance path to the amplified ac signal.
The input signal is applied to the base of the transistor through the coupling
capacitor .During the positive half cycle of the input signal, the transistor is forward
biased, and hence the collector current increases and collector voltage goes in
negative direction. During the negative half cycle, transistor becomes reverse biased;
it reduces the collector current and increases the collector voltage. Therefore, we can
say that there is an 180o phase shift between input and output voltages for a CE
amplifier. A CE amplifier with unbypassed resistance RE (with feedback) gives higher
bandwidth than the CE amplifier without feedback.
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TABULATION(With feedback):
Vin =
Output voltage (
Frequency (HZ)
Volt)
Vi=
Gain=Vo/Vin
Gain in
dB=20log(Vo/Vi)
TABULATION(Without feedback):
Vin =
Output voltage (
Frequency (HZ)
Volt)
Gain=Vo/Vin
Gain in
dB=20log(Vo/Vi)
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RESULT:
Thus the CE amplifier with voltage divider biasing circuit with and without
feedback was designed and Bandwidth was determined from the frequency response
curve.
With feedback
Without feedback
Gain =
Gain =
Bandwidth=
Bandwidth=
Gain Bandwidth product =
Gain Bandwidth product =
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MODEL GRAPH:
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Ex.No : 3
Date :
COMMON COLLECTOR AMPLIFIER
AIM:
To design a CC amplifier and to determine the gain bandwidth product from
its frequency response curve.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
1.
Resistor
2.
3.
4.
5.
6.
7.
8.
Transistor
capacitor
RPS
AFO
CRO
Bread board
Connecting wires
1
1
1
1
1
2
1
1
1
1
few
BC 547
(0-30)V
DESIGN:
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TABULATION:
Vin =
Frequency (HZ)
Output voltage (
Volt)
Gain=Vo/Vin
Vi=
Gain in
dB=20log(Vo/Vi)
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THEORY:
In common collector amplifier, input is given to the base terminal and
output is taken from emitter, collector terminal is common to both the input and
output.
During the positive half cycle of the input, the transistor is forward biased
and hence the emitter current (o/p current) increases (1+) times the base current.
[IE=IB (1+)] .Hence the output voltage VE is also increases. VE=VB-VBE From this
equation we understand that increase in VB , increases the output voltage as VBE
constant. Thus the output of a common collector amplifier is as its input voltage.
The voltage gain of CC amplifier is unity, thus it is used as a buffer
amplifier and also it is used for impedance matching.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the input and apply the input signal from the FG and observe the output.
3. Vary the input frequency from 10Hz to 1MHz and the output amplitude is
noted.
4. Calculate the gain and draw the frequency response curve.
5. Note the gain bandwidth product.
RESULT:
Thus the CC amplifier with voltage divider biasing circuit was constructed and
the frequency response curve was plotted.
Gain =
Bandwidth=
Gain Bandwidth product =
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WITHOUT BOOTSTRAPPED:
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Ex.No : 4
Date :
BOOTSTRAPPED SOURCE FOLLOWER
AIM:
To construct a source follower and to find its input & output resistance with and
without bootstrapping gate resistance.
APPARATUS REQUIRED:
S.No
Apparatus
Range
Quantity
10K
100K
2.2M
150K
1
1
1
1
1.
Resistor
2.
Transistor
BFW 10
3.
Capacitor
4.
5.
6.
7.
8.
9.
RPS
AFO
Multimeter
CRO
Bread board
Connecting wires
10 nf
10 pf
(0-30)V
1
1
1
1
1
1
1
few
THEORY:
It is similar to Common emitter amplifier. Here Rg is used to bias the FET
.The Capacitors C1and C2 are used to couple the ac input voltage source and the
output voltage respectively, these are known as coupling capacitors. The Capacitor Cs
keeps the source of the FET effectively at a.c ground and is known as by-pass
capacitors.
The operation of the circuit may be understood from the assumption that when
a small ac signal is applied to the gate, it produces variations in the drain current. As
the gate to source voltage increases, the drain current also increases .As a result of this
the voltage across the resistor (RD) also increases. This causes the drain voltage to
decreases.
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CALCULATION:
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It means that the positive half cycle of the input voltages produces the
negative half cycle of the output voltages. In other words, the output voltages are 180
degree out of phase with the input voltage. This phenomenon of phase inversion is
similar to common emitter amplifier.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the input and apply the input signal from the FG and observe the output.
3. Connect the ammeter in the circuit as shown and note the current value.
4. Calculate the gain and draw the frequency response curve.
5. Calculate the input & output impedance.
6. Note the gain bandwidth product.
RESULT:
Thus the source follower with Bootstrapped gate resistance was constructed.
Input & Output impedance with bootstrapped
= ---------Input & Output impedance without bootstrapped = ----------
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DIFFERENTIAL AMPLIFIER
CIRCUIT DIAGRAM:
Common mode:
Differential mode:
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Ex.No : 5
Date :
DIFFERENTIAL AMPLIFIER
AIM:
To construct a differential amplifier using BJT and to measure CMRR.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
4.7K
7.7K
5.6K
1.
Resistor
2.
3.
4.
5.
6.
Transistor
RPS
Bread board
Multimeter
Connecting wires
2
2
1
SL 100
(0-30)V
2
2
1
1
few
FORMULA USED:
1. CMRR
= Ad/Ac
2. Ad
= Vo / (V1-V2)
3. Ac
= 2V0 / (V1+V2)
Where, Ad ----- Differential mode gain.
Ac ------ Common mode gain.
THEORY:
The differential amplifier amplifies the difference between two input voltage
signals. It uses the emitter biased circuit. The two transistors have exactly matched
characteristics. The two collector resistances RC1 and RC2 are equal and the magnitude
of +VCC and VEE are also same. There are two modes of operation in differential
amplifier. In common mode operation, same voltage with same polarity is applied to
the base of the transistors by using RPS. The output is taken across the collector
terminals of the two transistors which is zero. In difference mode operation, same
voltage with opposite polarity is applied to the base of the transistors by using
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TABULATION:
V1(V)
V1(V)
COMMON MODE
V2(V)
V0(V)
DIFFERENTIAL MODE
V2(V)
V0(V)
AC=2V0/(V1+V2)
AD= V0/(V1-V2)
CALCULATION:
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RPS. The output is taken across the collector terminals of the two transistors. The
difference output is twice as large as the input signal voltage.
APPLICATION:
1. Used in operational amplifier.
2. Used in integrated circuits.
3. Used in instrumentation system waveform generators & A/D converters
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. For differential mode operation, apply two different voltages at the
inputs
V1 & V2 and the measure the output voltage.
3. For common mode operation, apply same voltage at the inputs
V1 & V2 and the measure the output voltage.
4 . Calculate the difference mode gain (Ad), common mode gain (Ac) using
their formula.
5. Determine the CMRR.
RESULT:
Thus the differential amplifier using BJT was constructed and CMRR was
calculated.
CMRR in dB =
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MODEL GRAPH:
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Ex.No : 6
Date :
CLASS A POWER AMPLIFIER
AIM:
To construct a class A power amplifier and to determine the efficiency from its
output wave form.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
1.
Resistor
100
10
560
2
1
1
2.
Capacitor
3.
4.
5.
6.
7.
8.
9.
Ammeter
Transistor
RPS
Multimeter
CRO
FG
Bread board
Connecting wires
2.2f
5 f
(0-50)mA
SL 100
(0-30)V
1
1
1
1
2
1
1
1
1
few
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TABULATION:
Voltage(V)
Time(ms)
Current(mA)
Input waveform
Output waveform
CALCULATION:
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THEORY:
Transistor power amplifiers handle large signals. If the current flows at all
times during the full cycle of the signal, the power amplifier is known as class A
amplifier.
Obviously, for this to happen the power amplifier must be biased in such a way that
no part of the signal is cut off. The efficiency of class A amplifier is only 50%. But it
provides less power dissipation. Also there is no distortion in class A power amplifier.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the input and apply the input signal from the FG and observe the
output.
3. Note down the collector current using ammeter.
4. Draw the input and output waveform.
5. By using specified formula, AC output power, DC input power and
efficiency are calculated.
RESULT:
Thus the class A amplifier was designed and constructed also its efficiency was
calculated.
Efficiency =
Einstein College of Engineering
Page 28 of 51
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Sub Code: EC38 EC-I Lab
COMPLEMENTARY SYMMETRY CLASS B PUSH PULL
AMPLIFIER
CIRCUIT DIAGRAM:
MODEL GRAPH:
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Ex.No : 7
Date :
COMPLEMENTARY SYMMETRY CLASS B PUSH PULL
AMPLIFIER
AIM:
To construct a complementary symmetry push pull power amplifier to observe
the output waveform with crossover distortion and to determine its maximum power
output & efficiency.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
1
1
1.
Resistor
100
1k
2.
Capacitor
5 f
3.
4.
5.
6.
7.
8.
Transistor
RPS
CRO
FG
Bread board
Connecting wires
SL 100
(0-30V)
2
2
1
1
1
few
THEORY:
In a complementary symmetry class B amplifier, a pnp-npn transistor pair
is used. When common emitter configuration is used in push pull amplifier, it
becomes difficult to match the output impedance for maximum power transfer
without an output transformer. Hence a matched pair of complementary transistors is
used in common collector configuration in this arrangement. The common collector
configuration has the lowest output impedance and hence impedance matching is
possible.
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CALCULATION:
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PROCEDURE:
1. Connect the circuit as per the circuit diagram.
1. Sinusoidal input is given to the amplifier and output of an amplifier with
and without crossover distortion is noted
2. By using specified formula, AC output power, DC input power and
efficiency are calculated.
RESULT:
Thus the complementary symmetry push pull amplifier was constructed and
the output waveforms are drawn.
efficiency =
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MODEL GRAPH:
Vin
(Volts)
t (ms)
Vo
(Volts)
Without Filter
t (ms)
Vo
(Volts)
With Filter
t (ms)
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Ex.No : 8
Date :
HALF WAVE RECTIFIER
AIM:
To construct a half wave rectifier with simple capacitor filter and to measure its
ripple factor from the output waveforms.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
1.
2.
3.
4.
5.
6.
7.
Resistor
Capacitor
Diode
Stepdown
Transformer
Bread board
Connecting wires
CRO
1K
470 f
IN 4001
2
1
1
1
1
Few
1
THEORY:
A Half wave rectifier is a device which converts ac voltage to pulsating dc
voltage using one PN junction diode.
The ac voltage (230 V, 50 HZ) is connected to the primary of the transformer. The
transformer steps down the ac voltage. Thus, with suitable turns ratio we get desired ac
secondary voltage. The rectifier circuit converts this ac voltage in to a pulsating dc
voltage. Half wave rectifier conducts during positive half cycle and gives output in the
form of positive sinusoidal pulses. Hence the output is called pulsating dc. A pulsating
dc voltage containing large varying component called ripple in it.
The capacitor filter is used after rectifier circuit, which reduces the ripple content in
the pulsating dc. Thus filter converts pulsating dc in to pure dc.
Ripple Factor:
The output of the rectifier is of pulsating dc type. The amount of ac content in the
output can be mathematically expressed by a factor called ripple factor.
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TABULATION:
Parameter
Vm (V)
Vrms(V)
CALCULATION:
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Ripple Factor = R.M.S Value of ac component
Average dc component
= Vrms/Vdc) 2
Where, Vrms = Vm/2 ; Vdc = Vm/
PROCEDURE:
1. The circuit connections are made as per the circuit diagram.
2. First without connecting the capacitive filter, note down the amplitude and time
period of the rectified waveform.
3. Now connect the capacitive filter and note down the amplitude and time
period of the rectified waveform.
4. Connect the CRO across the load and measure the full load voltage then remove
the
load and measure the no load voltage.
5. Plot the graph and calculate the efficiency.
RESULT:
Thus the half wave rectifier was constructed and input, output waveforms were
drawn.
Ripple Factor r =
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FULL WAVE RECTIFIER
CIRCUIT DIAGRAM:
Full wave rectifier with filter:
MODEL GRAPH:
Vin (Volts)
t (ms)
Vo
(Volts)
Without Filter
t (ms)
Vo
(Volts)
With Filter
t (ms)
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Ex.No : 9
Date :
FULL WAVE RECTIFIER
AIM:
To construct a full wave rectifier with simple capacitor filter and to measure its ripple
factor from the output waveforms.
APPARATUS REQUIRED:
Sl.No
Apparatus
Range
Quantity
1.
2.
3.
4.
Resistor
Capacitor
Diode
Stepdown
Transformer
Bread board
Connecting wires
CRO
1K
100 f
IN 4001
2
1
2
5.
6.
7.
1
1
Few
1
THEORY:
A full wave rectifier is a device which converts ac voltage to pulsating dc
voltage using two PN junction diode.
The ac voltage (230 V, 50 HZ) is connected to the primary of the transformer.
The transformer steps down the ac voltage. Thus, with suitable turns ratio we get desired
ac secondary voltage. The rectifier circuit converts this ac voltage in to a pulsating dc
voltage. Full wave rectifier conducts during both positive and negative half cycle of
input ac supply. Because two diodes are used in this cir circuit .It gives output in the
form of positive sinusoidal pulses. Hence the output is called pulsating dc. A pulsating
dc voltage containing large varying component called ripple in it.
The capacitor filter is used after rectifier circuit, which reduces the ripple
content in the pulsating dc. Thus filter converts pulsating dc in to pure dc.
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TABULATION:
Parameter
Vm (V)
Vrms(V)
CALCULATION:
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Ripple Factor:
The output of the rectifier is of pulsating dc type. The amount of ac content in the
output can be mathematically expressed by a factor called ripple factor.
Ripple Factor = R.M.S Value of ac component
Average dc component
= Vrms/Vdc) 2
Where,
PROCEDURE:
1. The circuit connections are made as per the circuit diagram.
2. First without connecting the capacitive filter, note down the amplitude and time
period of the rectified waveform.
3. Now connect the capacitive filter and note down the amplitude and time
period of the rectified waveform.
4. Connect the CRO across the load and measure the full load voltage then remove
the
load and measure the no load voltage.
5. Plot the graph and calculate the efficiency.
RESULT:
Thus the full wave rectifier was constructed and input, output waveforms were drawn.
Ripple Factor with filter =
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MODEL GRAPH:
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Ex.No : 10
Date :
DARLINGTON EMITTER FOLLOWER
AIM:
To construct a BJT Darlington Emitter follower and plot the frequency response
curve and also to determine the gain, input & output impedances.
APPARATUS REQUIRED:
Apparatus
Resistor
Range
Quantity
100
1k
1
1
Capacitor
5 f
Transistor
RPS
CRO
FG
Mulimeter
Bread board
Connecting wires
BC 107
(0-30V)
2
2
1
1
1
1
Few
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TABULATION:
Frequency(Hz)
Voltage(mV)
Gain=V0/Vin
Gain in
dB=20log(gain)
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THEORY:
Darlington connection is used to achieve larger input impedances. This circuit
consists of two cascaded emitter followers. The main feature of this connection is that
the composite transistor acts a single unit with a current gain that is the product of the
current gains of the individual transistors. The voltage gain of Darlington circuit is
close to unity, but its deviation from unity is slightly greater than that of the emitter
follower.
The first draw back of the Darlington transistor pair is that the quiescent
current of the first stage is much smaller than that of the second. The second draw
back is that the leakage current of the first transistor is amplified buy the second, and
hence the overall leakage current may be high.
For these two reasons, a Darlington connection of three or more transistor is
usually impractical.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set Vi= 1V, using the signal generator.
3. Keeping the input voltage constant, vary the frequency from 0Hz to 1Mhzin regular
steps of 10 and note down corresponding output voltage.
4. Plot the frequency response: Gain(dB) Vs Frequency(Hz).
5. Find the input and output impedances.
6. Calculate the Bandwidth from the graph.
RESULT:
Thus the Darlington emitter follower was constructed and the frequency response curve
was plotted.
Gain =
Input impedance =
Output impedance =
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6. When does a transistor act as a switch?
7. What is biasing?
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18.What is an amplifier?
20. What are the two techniques used to increase the input impedance?
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