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Analog System Lab Kit PRO - Texas Instrument PDF
Analog System Lab Kit PRO - Texas Instrument PDF
System
Lab Kit PRO
MANUAL
Table of contents
Introduction
10
11
Lab Setup
12
13
Hardware
13
Software
13
14
16
Experiment 1:
17
2.1.1
24
2.1.2
Astable Multivibrator
24
2.1.3
25
2.2
Exercise Set 2
Experiment 3:
3.1
28
3.1.1
Integrators
28
3.1.2
Differentiators
28
3.2
Specifications
28
3.3
Measurements to be taken
28
3.4
29
18
1.1.1
18
1.1.2
Non-inverting Amplifier
19
1.1.3
Inverting Amplifier
19
1.2
Exercise Set 1
20
1.3
Measurements to be taken
20
Experiment 4:
1.4
21
1.5
21
Experiment 2:
23
24
27
1.1
26
30
31
4.1
32
4.2
Specification
33
4.3
Measurements to be taken
33
4.4
33
4.5
Exercise Set 4
34
page 3
Table of contents
Experiment 5:
35
5.1
36
5.1.1
36
5.2
Specification
37
5.3
Measurements to be taken
37
5.3.1
37
5.4
37
5.4.1
38
Transient response
Exercise Set 5
39
40
6.2
Specifications
40
6.3
Measurements to be taken
40
6.4
41
6.5
Exercise Set 6
41
Experiment 7:
43
48
8.2
Specifications
48
8.3
Measurements to be taken
48
8.4
48
8.5
Exercise Set 8
49
51
DC-DC Converter
9.1
52
9.2
Specification
52
9.3
Measurements to be taken
52
9.3.1
Time response
52
9.3.2
Transfer function
52
9.4
53
9.5
Exercise Set 9
53
Experiment 10:
55
7.1
44
10.1
56
7.2
Specifications
44
10.2
Specifications
56
7.3
Measurements to be taken
45
10.3
Measurements to be taken
56
7.4
45
10.4
57
7.5
Exercise Set 7
45
10.5
57
page 4
8.1
Experiment 9:
Experiment 6:
47
Experiment 8:
Table of contents
Experiment 11:
59
60
11.2
Specifications
60
11.3
Measurements to be taken
60
11.4
61
Experiment 12:
63
14.2
Specifications
72
14.3
Measurements to be taken
72
14.4
72
14.5
73
75
A.1
76
A.1.1
Features
76
A.1.2
Applications
76
12.1
64
A.1.3
Description
76
12.2
Specifications
65
A.1.4
Download Datasheet
76
12.3
Measurements to be taken
65
A.2
77
65
A.2.1
Features
77
A.2.2
Applications
77
A.2.3
Description
77
A.2.4
Download Datasheet
77
A.3
78
12.4
Experiment 13:
67
68
A.3.1
Features
78
13.2
Specifications
68
A.3.2
Applications
78
13.3
Measurements to be taken
68
A.3.3
Description
78
13.4
68
A.3.4
Download Datasheet
78
13.5
69
Experiment 14:
71
72
DC/DC Controller
79
A.4.1
Features
79
A.4.2
Applications
79
A.4.3
Description
79
A.4.4
Download Datasheet
79
page 5
Table of contents
List of figures
10
A.5.1
Features
80
13
A.5.2
Applications
80
15
A.5.3
Description
80
A.5.4
Download Datasheet
80
A.6
81
A.6.1
A.6.3
A.6.5
A.7
82
A.7.1
Features
82
A.7.2
Download Datasheet
82
B Introduction to Macromodels
characteristic
18
1.2
18
1.3
1.4
81
83
B.1
Micromodels
84
B.2
Macromodels
84
19
19
1.6
19
1.7
20
20
Introduction
88
C.2
Limitations
88
87
89
99
2.2
24
24
24
2.4
25
2.5
Trigger waveform
25
2.6
25
3.1
Integrator
28
3.2
Differentiator
28
3.3
29
3.4
30
List of figures
3.5
30
4.1
32
65
13.1
68
69
32
13.2
Analog Multiplier
36
69
72
based on simulation
37
14.2
73
6.1
Function Generator
40
14.3
Simulation Results
73
6.2
40
A.1
76
6.3
41
A.2
77
7.1
44
A.3
78
A.4
79
44
45
A.6
81
A.7
81
48
A.8
81
8.2
48
A.9
82
8.3
49
C.1
9.1
52
9.2
53
10.1
56
Oscilloscope
88
D.1
90
D.2
90
56
60
61
61
12.1
64
D.5
91
91
92
page 7
introduction
List of figures
D.6
3.1
92
D.7
92
D.8
93
3.2
-~20Q
3.3 Variation of Peak to Peak value of output
w.r.t. Peak value of Input
93
4.1
94
4.2
95
4.3
D.9
~~
0 0
~
H00 Q
~
~00
~H
0 0Q
29
H~
0Q
0 = 1 kHz
Transfer Functions of Active Filters~
0 =
H00 Q
=11kHz32
= 1 kHz ~Q
1 10 kHz
33
Frequency Response of a BPF with Q
~0=
=11 kHz , Q~=0 =
kHz
10
~
0
=
Q0 =
Frequency Response of a BSF with ~
= 110 kHz , Q = 10 33
kHz Q f==10
10
~
1 kHz37
0=
=10
Variation of output amplitude with Q
input
frequency
f
kHzkHz
1
=
Q
10
f
=
= 10
f=
1 kHz Voltage
6.1
Change in frequency as a function of
Control
41
f =410
1 kHz
$ VpkHz
f
kHz
10
=
7.1
Output Phase as a function of Input Frequency r $ H $ Q 45
0
f=
4 $ 10
Vp kHz 4 $ Vp
V
7.2
Control Voltage as a function of Input
Frequency
pH0 $ Q 45
$
r
$ H$ 0V$p Q
r4
Vp~0 = 2 $ r48
$ 10 4 rad/s
Vrp $ H0 $ Q
8.1
Transfer characteristic of the AGC circuit
2/s10
$ r $ 10 4 rad/s
0 rad
=
Vp0 = 2 $ r
0 =
~
$ 10~4H
9.1 Variation of output voltage with reference
voltage
s sin _100rt i + 0.1 sin
2 $ r $ 10Hy40 rad
/=
~
H00 = 10
_=t i10
in a DC-DC converter
53
H
10
_
i
t
t i +r0.1
y
_100
0
=
=+sin
_
i
t
t
t i sin _
sin
100
0.1
sin _r200
y
r
_
i
=
9.2 Variation of duty cycle with reference voltage
y _ t i = sin _100rt i + 0.1 sin _200rt i
in a DC-DC converter
53
5.1
=
a- HsV0i $ 0 kbs12 + s 2+ s l
VV02i
2
+ 2 l ~0 Qs ~
b1 + ~0 Q ~
0
=
2 l $ H0
Vi
s V204 ~s 02 b1 + ~
+=~ 21l s 2 0 $ H 2
b1 + ~0sQ
+ ~s2 l 0s
b1 + V~04V022il $ H00b1 +
0
+~
b
V04
2l
=
s
~
0Q
=
Vi 2 l $ Hs 02
s
s2 0
b1 + s~
V
i
+
0 + b1 +
l
V04 b1 +
2
10 Q ~0
2l ~
~0sQ
1s 02~0 ~
Vi =
2Q 2
+
b1 +1~~
2l 1
0Q
1~
0
-0
~0 1 H
0 Q 2Q 2
2
2Q
1
~0 H1
H
1 0-Q 1 2
0 Q 2Q 2
4
1Q
1
1H
d1z- 4Q 2
-0 Q
2
4Q
1
d~
dz1 - 4Q 2 dz
~ = ~0
d~
dd~
z
~-=2Q
~0 29
Plot of Magnitude and Phase w.r.t. ~
Input
0
d~= ~Frequency
~
0
- 2Q
~
0
Plot of Magnitude and Phase w.r.t. Input
29
2=Q~Frequency
96
MOSFET socket
97
D.15
97
D.16
Diode sockets
98
D.17
Trimmer-potentiometers
98
D.18
98
D.19
List of tables
21
21
page 8
in an LDO
57
11.1
Line regulation
61
11.2
Load regulation
61
56
21
25
66
12.2
Line regulation
66
12.3
Load regulation
66
13.1
68
14.1
72
B.1
Introduction
What you need to know before you get started
page 9
introduction
he output of the DAC has to be amplified before the analog signal can
T
drive an external actuator.
introduction
Part-II concentrates on building analog systems using the blocks mentioned above.
The OP-amp TL082, a general purpose JFETinput operational amplifier, made by Texas
Instruments.
Wide-bandwidth, precision analog multiplier
MPY634 from Texas Instruments.
Using these components, the student will build
gain stages, buffers, instrumentation amplifiers and
voltage regulators. These experiments bring out
several important issues, such as measurement of
gain- bandwidth product, slew-rate, and saturation
limits of the operational amplifiers.
First, we introduce integrators and differentiators which are essential for implementing filters that can bandlimit a signal prior to the sampling process to avoid aliasing errors.
We then introduce the analog comparator, which is a mixed-mode device - its input is analog and output is digital.
In a comparator, the rise time, fall time, and delay time are important apart from input offset.
A function generator is also a mixed-mode system that uses an integrator and a regenerative comparator as
building blocks. The function generator is capable of producing a triangular waveform and square waveform as
outputs. It is also useful in Pulse Width Modulation in DC-to-DC converters, switched-mode power supplies, and
Class-D power amplifiers.
The analog multiplier, which is a voltage or current controlled amplifier, finds applications in communication
circuits in the form of mixer, modulator, demodulator and phase detector. We use the multiplier in building Voltage
Controlled Oscillators, Frequency Modulated waveform generators, or Frequency Shift Key waveform generators
in modems, Automatic Gain Controllers, Amplitude Stabilized Oscillators, Self-tuned Filters and Frequency Locked
Loop using voltage controlled phase generators and VCOs and multiplier as phase detector are built and their lock
range and capture range.
In the Analog System Lab, the frequency range of all applications has been restricted to 1-10 kHz, with the
following in mind - (a) The macromodels for the ideal device can be used in simulation, (b) A PC can be used
in place of an oscilloscope. We have also included an experiment that can help the student use a PC as an
oscilloscope. We also suggest an experiment on the development of macromodels for an OP-Amp.
At the end of Analog System Lab, we believe you will have the following knowhow about analog system design.
1. You will learn about the characteristics and specification of analog ICs used in
electronic systems.
2. You will learn how to develop a macromodel for an IC based on its terminal
characteristics, I/O characteristics, DC-transfer characteristics, frequency
response, stability characteristic and sensitivity characteristic.
3. You will be able to make the right choice for an IC for a given application.
4. You will be able to perform basic fault diagnosis of an electronic system.
page 11
introduction
Lab Setup
The setup for the Analog System Lab is very simple and requires the following.
In all the experiments of Analog System Lab, please note the following.
ASLK PRO and the associated Lab Manual from Texas Instruments India - the
lab kit comes with required connectors. Refer to Chapter 1.4 for an overview of
the kit.
When we do not explicitly mention the magnitude and frequency of the input
waveform, please use 0 to 1V as the amplitude of the input and 1 kHz as the
frequency.
Always use sinusoidal input when you plot the frequency response and use
square wave input when you plot the transient response.
Function generators which can operate in the range on 1 to 10 MHz and capable
of generating sine, square and triangular waves.
Precaution! Please note that TL082 is a dual OP-Amp. This means that the IC
has two OP-Amp circuits. If your experiment requires only one of the two ICs, do
not leave the inputs and output of the other OP- Amp open; instead, place the
second OP-Amp in unity-gain mode and ground the inputs.
page 12
introduction
The kit has a provision to connect 10V DC power supply. The kit comes with the
necessary short and long connectors.
This comprehensive user manual included with the kit gives complete insight of how
to use ASLK PRO. The manual covers exercises of analog system design along with
brief theory and simulation results.
Refer to Appendix A for the details of the integrated circuits that are included in ASLK
PRO. Refer to Appendix D for additional details of ASLK PRO.
Software
The following software is necessary to carry out the experiments suggested in this
manual.
1. TINA or PSpice or any powerful simulator based on the SPICE Simulation Engine
2. FilterPro - A software program for designing analog filters
3. SwitcherPro - A software program for designing power supplies
We will assume that you are familiar with the concept of simulation and are able to
simulate a given circuit.
ASLK PRO comes with three general-purpose operational amplifiers (TL082) and three
wide-bandwidth precision analog multipliers (MPY634) from Texas Instruments. We
have also included two 12-bit parallel-input multiplying digital-to-analog converters
DAC7821, a wide-input non-synchronous buck-type DC/DC controller TPS40200, and
a low dropout regulator TPS7250 from Texas Instruments. A portion of ASLK PRO is
left for general-purpose prototyping which can be used for carrying out mini-projects.
FilterPro is a program for designing active filters. At the time of writing this manual,
FilterPro Version 3.1 is the latest. It supports the design of different types of filters,
namely Bessel, Butterworth, Chebychev, Gaussian, and linear-phase filters. The
software can be used to design low-pass filters, high-pass filters, band-stop filters,
and band-pass filters with up to 10 poles. The software can be downloaded from [9].
page 13
introduction
LDO or DC/DC converter located on the board. Using Tri-state switches you
can set 12-bits of input data for each DAC to desired value. Click the Latch
Data button to trigger Digital-to-analog conversion.
There are three TL082 OP-Amp ICs labelled 1, 2, 3 on ASLK PRO. Each of these
ICs has two amplifiers, which are labelled A and B. Thus 1A and 1B are the two
OP-AMps on OP-AMP IC 1, etc. The six OP-amps are categorized as below.
OP-Amp
Type
Purpose
1A
TYPE I
1B
TYPE I
2A
TYPE II
Full Configuration
2B
TYPE II
Full Configuration
3A
TYPE III
Basic Configuration
3B
TYPE III
Basic Configuration
Thus, the OP-amps are marked TYPE I, TYPE II and TYPE III on the board. The
OP-Amps marked TYPE I can be connected in the inverting configuration only.
With the help of connectors, either resistors or capacitors can be used in the
feedback loop of the amplifier. There are two such TYPE I amplifiers. There
are two TYPE II amplifiers which can be configured to act as inverting or noninverting. Finally, we have two TYPE III amplifiers which can be used as voltage
buffers.
Three analog multipliers are included in the kit. These are wide-bandwidth
precision analog multipliers from Texas Instruments (MPY634). Each
multiplier is a 14-pin IC and operates on internally provided 10V supply.
page 14
e have included two transistor sockets on the board, which are needed in
W
designing an LDO regulator (Experiment 10), or custom experiments.
here are two 1kX trimmers (potentiometer) in the kit to enable the designer
T
to obtain a variable voltage if needed for a circuit. The potentiometers are
labeled P1 and P2. These operate respectively in the range 0V to +10V, and
-10V to 0V.
The kit has a screw terminals to connect 10V power supply. All the
ICs on the board are internally connected to power supply. Please refer to
Appendix D for schematics of ASLK PRO.
have included two diode sockets on the board, which can be used as
We
rectifiers in custom laboratory experiments.
10
The top right portion of the kit is a general-purpose area which can be
used as a proto-board. 10V points and GND are provided for this area.
5
introduction
6
10
9
1
Analog System Lab Kit PRO
1
page 15
introduction
are asked to use the simulation software. For each of the experiments, we have
clarified the goal of the experiment and provided the theoretical background.
The Analog System Lab can be conducted parallel to a theory course on Analog
Design or as a separate lab that follows a theory course.
The student should have the following skills to pursue Analog System Lab:
page 16
Chapter 1
Experiment 1
Study the characteristics of negative feedback
amplifiers and design of an instrumentation amplifier
page 17
experiment 1
(1.1)
V0 =A0 $ (V1 - V2)
(1.2)
V1 - V2 = V0
The goal of this experiment is two-fold. In the first part, we will understand
A
0
the application of negative feedback in designing amplifiers. In the second
A0 $ (AV11 V
00 =open-loop
In the above equations, A0 isV
part, we will build an instrumentation amplifier.
Vthe
V22))for real amplifiers, A0 is in the
0 =
-gain;
=A0 $ (V0A
range 10 to 10 and hence V1Vcs V2 . A1unity
feedback
circuit is shown in the Figure
+ V00
V =AV $=
(VA -$ (VV)- V )
V
1.2. It is easy to see that,
0
V
V110V122 =
-"V
=
V V
as A
A000 " 3
V - VV = VA = A
V0s
V
A
V A A
1.1 Brief theory andVV =motivation
(1.3)
V
A00
0 =
=
A0
V1 + A1 + A
=
V
1
A
s
0
+
A
=
V
1
A
s
+ 0
V V
_1 + s ~d1i_1 + s ~d2i
V
0
1.1.1 Unity Gain Amplifier V " V1 as" A1 as" A3 " 3
V0 "
1 as A
0 " 3
A A
(1.4)
V
s " 1 as
1 A0 " 3
A=A=
V
s
T
=
_1 + _s1 ~
+ si_1~+i_s1 ~
+ si ~ i
An OP-Amp [8] can be used in negative feedback mode
to build unity gain amplifiers,
V0 =A0 $ (V
V2+
) 1 A A
1-1
A00
A
=
T = While
T =1 an1ideal OP-Amp is assumed
non-inverting amplifiers and inverting amplifiers.
In
OP-amps,
closed
loop
gain
A
is
frequency
A = _1 +
1 + 11 A
+1 A
~
1 + sswhere
~dd11ii__1
~dd22ii1
1+
V=0 _below,
+ ss ~
to have infinite open-loop gain and infinite bandwidth, real OP-Amps1have
dependent, as shown in the equation
1 finite
2
V
= =
1 - V2 =
A
A0 ~
1
_1 of1
0 + s A0 ~d1 + s A0 ~d2 + s
sto+
A understand
s A+~s +
A~
s some
A+~s +As~ A~
~i ~ iare called the dominant
~
+ 1_1 A
+ 1+ A
numbers for these parameters. Therefore, it is_1important
and
the
OPA
0 poles+
1
V
T
=
$
V
A
V
V
(
0 =
0transfer
1 -function
2)
T
1 (GB
1). Similarly,
=
limitations of real OP-Amps, such as finite Gain-Bandwidth
Product
amp.
This
is
typical
OP-Amp
that
V
1
= =
V0 V0 =AA0 0=$ (11V1+
)
-11V2A
A
+
GB
s equally
A~
s A+~simportant.
GB
s $~
GBij$ ~ has
ij internal frequency
_s+
`1 amplifier
+ `_1s +GB
+
+
=
compensation. Please
view
the slew rate and saturation limits of an operational
are
11 s 2 GB $ ~d2ij
1 + A0know
VV
0s
GB +
s A1.2:
_ sabout
`1Vmore
0 ~d2 +
+
GB =GB
A=
~A~
the
[17] to get to=
Given an OP-amp, how do we measure these parameters?
Figure
V1recorded
- V2 =lecture
0
AV0 0 V1 - V2==_11 + 11 A
A0 ~Gain
s A0 ~d2 + s 22 A
0+s
d1 +System
frequency compensation.
A Unity
GB GB
A00 ~
~
_ AA3
+
00 ~d1 A0 + s A0 ~d1 + s A0 ~d2 + s
A0 =
" 1 asGB
"
V0
A0 Vs
1 1
1
T= T=
V0 GB=A0
1
1 + s1 ~
+ sQ ~
+ sQ +~s ~
Vs = 1 + A0
= 1= AA0
2
V
s
1
s
GB
s
A
0
+
_
+V
`
1
1
A
0 ~d2 +s 2 GB $ ~d2ij
+
+
=
(1.5)$ ~d2ij
Q=Q=
1
s
GB
s
A
s
GB
~
_
`
0
2
d
+
+
+
V
0
1 GB
~ ~ 1 GB
_10 + s ~d1i_1 + s 1~d2i
V
1
as
A
3
"
"
+
+
V
0
T 1=as
V = A [V -V ]
~ ~
GB GB
GB
A
A A
V =A $ (V - V ) "
13
=
A
"dd~
Vs
GB
A000 s~
~
1 0 Q + s 2 ~02
=
V
1
1
+
V
s
GB $ ~
~ =~ GB
= $~
V
T
=
-V
V-V =
A0+ 1GBA
A 1
Q Q
Acan
= now write the
01
GB
We
transfer
function
T for aAunity-gain
amplifier as,
Q
=
A
=
V
A
1
s
s
~
~
1
i
i
_
_
1
2
d
d
+
+
1
1
=
1
1
GB
~
2
d
p=p=
V
_1 + s ~d1i+
_11
1+A
+ s ~d2i
2Q 2 Q
=
1A
T
=
2
2 d2 2
1
V "
GB
T
=
A
s
A
A0 ~d1 ~d2i
1
~
1
_
~ ~
0
0
00~
+
+
+sss~
1
1
as
A
3
"
ss ~
~
2 A
2 d2 + s
0 Qd1+
+
T= V
1
1
Q
~
~
0
0
+
+
(1.6)
T
=
A
1
1
+
Figure 1.1: An ideal Dual-Input, Single-Output
OP-Amp
and its I-O characteristic
~ ~
~ ~
A
~
0+
=1 AGB $ ~11d12
1
A=
Q
=
s ~=i
~ i_1 + Q
_1 + s=
1 d2
V V
2
~
Q
1GB $ ~d2ij
=
1
s
GB
s +A011~d2 +GB
_
`
+
+
1
GB
~
d2
2s
V
GB
V
GB
$
1
$
1
T
=
=
A
s
A
s
A
s
1
~
~
1
_
Since the frequency and transient response of an amplifier are impacted by these
0 A
d2 + ~d2A0 ~d1 ~d2i
+1 + 1 A0 + _10 d11+ A
+
2
GB
A0 ~~
A0 ~d1 ~
0+s A
d1 +
GB
d2 s A0 ~d2 + s
1 2 1the frequency and transient
GB = A0p~d1+
1
parameters, we can measure the parameters ifQwe
have
1
2Q
1
=
=
2
2
=
response of the amplifier; you can obtain these response characteristics by applying
~ + $$s ~
~00 +
_1 + 1 A + s A~
(1.7)
=
GB
~
~Add22~ ~ 1i
=s2AQGB
p11
p11
2
=
GB
1
s
GB
s
A
s
GB
$
~
~
1
_
sinusoidal and square wave inputs respectively. We invite the reader to view the
` =+
0
d2 +
d2ij
+~
2
Q
10 +s_ sGBGB
s A0 ~d2 +s GB $ ~d2ij
~ ~
A` ~ +
$ ~ i+
`1 + _ s GB + s Q
j
recorded lecture [16].
1
_1 - 1_1 4-Q1 i4Q i
GB
A
~
=GB0= AdT1~=, also
The term
known
as
product of the operational
11d1gain 2bandwidth
GB
A~
~
0~
=
0the
2
dV dV
p
=
1
s
s
~
~
0 in OP-Amp negative feedback
0Q
+
+
An OP-Amp can be considered as a Voltage Controlled
Voltage
Source
(VCVS)
with
amplifier,
is
one
of
the
most
important
parameters
p = 2Q
dt dt
GB GB
21Qbe rewritten as
GBfunction
V
the voltage gain tending towards infinity. V
For finite
output voltage, the input
circuit. The above transfer
can
p
V
1
~
0
Q
T=
=
voltage is practically zero. This is the basic theory of OP-Amp in the negative
~
1 + s ~1Q + s ~
~d02
11 1GB
T=
V
feedback configuration. Figure 1.1 shows a differential-input, single-ended-output
2 p $ GB
2
+
1
T
~
~
Q+
= s ~0 Q +=
1
s
~
00 A
~d2 2
GB
2
~ ~0
1 GB
~
OP-Amp which uses dual supply !Vss for biasing.
+ A ~ 1 + s1 ~0 Q + s ~0
GB 1
Qpp 2
V
$ ~d2 1
~0$ ~= GB
Q = ~ = GB
V
2
Q
=
1
GB
~
d2
System Lab Kit PRO
page 18
Q
Q
1 GB
~1d2 1 Analog
+
V
GB
$
p1
p
~
GB
A
+
V
pd$2 GB 1
1
GB A ~d2
00
10
21
21
0
2
0
d1
d1
d2
d1 0
d2
d1
d2 0
2
d2
d1 0 d2 d1
d2
d1 0
d2 0
2
d2
d2
d2
d1
22
0
2
0
SS
d2
d2
d2
d2
d2
d2
SS
d1
d2
d1
d1
2
0
d2
d2
d2
d2
d2
d2
d1
d2
GB = A=
0 ~d1
Vs 1 + A0
GB V0
" 1 as A0 " 3
Vs
1
V =A $ (V - V )
T=
2
2
A
0
where
called slew rate. It can therefore be determined by applying a square wave of Vp at
1A+=
s ~0 Q + s V ~
0 $ (V - V
A V$ (V - V )
=A
V -VV) ==
$ (V - V )
V =A
V =
A A $ (V - V ) certain high frequency and increasing the magnitude of the input.
V =A $ (V - V )
V =A V$ (V A
V
)
1
s
s
~
~
1
i
i
_
_
V
1
2
d
d
+
+
V V -A
)
= $ (V - V 1
V =
Q=
V - V =V V=A $ (V - V ) V - V = AV =
A V
VV
1
AV = A
V-V = V
V - V V= VV ~AdV
+
1
GB
2 1 V
=
A
A
V
A
V
A
2R
R
V T =AV -AV+
= A
= 1 GB
V
A
V VVA
AA ~Vd2= 1 + AVV "V 1=asVV1A=+"1A+A3A
1
1
+AA
+
=
=
V
V V1V+ =
1+A
A 1V A A
V " 1 as A "V 3" 1 as A A" 3
R
R
+A=" 3
asV
" 1 GB
A =V V1 " 1 as A " 3
V
1~
$
+
V " 1 as A " 3
V~"
V
0 =
d2A
V
1Vas "
A=
3
"
1
s
s
~
~
1
i
i
_
_
V
+
+
V
V
1V
as A "A3
V
V
A
A=
2
A s= A0 ~d1A+
V d2i
A ss ~
A~s0 ~~
A0 ~d1 ~
_A"1 1+as1A "A3
1s
0+
di2_1+
AV=
Q
V
A
1
i
_
A
1
s
s
~
1
+
+
i
i
_
_
=
+
+
T
=
A=
A=
1+s ~ i
_1 + s ~ i_A
1 + 1 A_1 + s ~ i_1 + s ~ i
~A i=
1 + si_1~ isA~ i
_1 + s ~ i_1 + s ~ _i1A+=s _1
1
1 1T=
+ _s ~
+
1
T
=
1
T =1
_1 + s ~ i_1 + s 1~+i1 A= T1 =
1
+ 1 A1
+ 11 A
T=
Tp==T 1 1 =
2+
A
1
1
A
s
A
s A ~ +s A ~ ~ i
1
~
1
_
+
+
+
=
A
1 +1 A
1 +2
1Q
1
1
2ij 1
1+
T 1`
=1A + _ s GB1+
= s A0 ~d=2 +s GB $ 1~dFigure
1 +i sNon-inverting
1.5:
1= _1 1 A1 + 1s A
1
A
s
A
A ~ ~ i amplifier of gain 2, (b) Inverting amplifier of gain 2
1
~
1
_
A
s
A
s
A
1
~
~~~(a)
~
1
+
+
_
=
+
+ s+ sA A
A ~ ~ _1i +
=
=0
+
+ A ~ + s 1A ~ ++ s= +
A
s
A
1
~
+
+
~
=
1 +i _ s 1GB + s A ~ 1+s GBs $ ~A ~
ij + s A ~ ~ i
A
A
A
s
s
A
1 _~
~
~
0A~
1~s iA ~ + s 1A ~ `~
d+
_1 + 1 A + s A ~ +
_1s+GB
=
+
+
A~ ~ i
1 A + s A 1~ + s= A ~ + s =
1 +=
0
0
0
1
2
0
s
d1
1
0 0
2 0
0 0
d1
d2
d2
0
d2
d2
d1
d2
d2
d2
0
0 0 d1 d1
d2 d1
d1
d1
0
2
d1
d1
20
0
0
s
0
0
20
0
0
0
s
s 0
d2
02
d1
00
s 0
1
0
01
0 s
0 0
02
s 0
20
1
2
d1
d2
d2
2
20
d1
d2
d1
d1
0
0 0
d1
d02
d2
d2
0 0 d1 d2 d2
2d1
d02
d2
d1
d2
0
2
d1
d2
d1
d2
0
0
0
d1
d2
d1
d2
1
A0 ~
s d2+
=
_1 + 1 A0 + s A0 ~
d1 + s GB
d1 ~d22i
A+0`~
1
1A0A
=d2+
s0 ~
$ ~d2ij
~dd22ij+s 2 GB
_~
s1=
2 `1 + _ s GB
d2GB
+s+ sGBA$0~
1
=
=
2
1
s
GB
s
A
s
GB
$
~
~
i
_
`
j
0
2
2
d
d
+
+
+
~
~
0=2
1
s
GB
s
A
GB $ ~d2ij
_
`
2
0 ~d2 +s
+
+
GB
1
GB
A
GB
$
$
~
~
i
`1 + _ s GB + s A0 ~d`21++s _ s`GB
j
0 ~d2 +s
2ij GB GB
d2s
+
2 dA
A
~
=
GB
~
0
1
d
=
0 $d~
1 d2ij
+ s A0 ~d2 +s= GB
GB = A10+
~d_1 s`1GB
2
GB
A
0 ~d1
=
s
GB
s
A
GB
$
~
_
j
0 ~d2 +s
d2i
+
+
GB = A0 ~d1
GB
A0 ~d1 A ~
Vp =GBGB
GB
= 0 d1
T =GB GB 1
2
2
T =GB = A0 ~d1 1
GB
GB GB
2
2 11 + s ~0 Q +1s ~0
1
s
Q
s
~
~
1
T
0
0
+
+
T
=
=
GB
2
Vp $ TGB
= 1
1s =
1 + s Q~=
1
+~s 012~0 Q +1s 2 ~A022non-inverting
0 Q +T
2
amplifier with a gain of 2 is shown in Figure 1.5 (a).
T=
T = T 1 + s1 ~0 Q2 1+ s2 2 ~02
~d2 1 +1s ~GB
=
1 + s ~0 Q + s 2 ~02 1 +
s 1~0TQs+~s1 Q~0 s 2 1~12
+ A 1 ~0 Q + s ~0
1
0
0
+
+
Q
=
GB
Q
=
Figure 1.3: Magnitude
and
response of2 a
Gain System
=Unity
2
Q
1d2
Q=
1 =~Phase
0Q + s
1
1 d2 1 +
1 Q GB
~d2
=~d2 + 1 GB
1~s d2~
GB
Q=
QQ=2Q
1 ~0 GB
~0+=A GB~$dGB
~d2 ~d2A 1~d2 GB
+
=
GB
2
1
1 GB
1
GB
~d2
~
2
d
+A ~
2 GB
A 1 ~GB
2
d+
Q~=
d2
and
~GBd2Q$ ~~d2 0 = GB $ GB
GB + A ~d2
GB + GB
A d2 +~GB
d 2 d2
GB
~
~d2
0 =
~d12 A~
+
GB
$
~
~
0 =
d2 A
GB
$
~
~
0 =
d2
p
1
1
~
GB
A
2
d
~0 = GB $ ~d2
~0 = ~GB $ ~GB
d2
1
$ ~d2 $ ~d2 Q
0 =
p =Q Q
Q ~
0 =
GB $ ~d2
~0 = GB
2Q
An inverting amplifier with a gain of 2 is shown in Figure 1.5 (b).
Q
Q
1 ~ p= 1
Q~10
p=
0
1
p1 =Q Q
2
Q
2
Q
1
p
=
p=
p = p 2Q1 2
2Qnatural
~ ~
= 24QQis ithe
12~Q0 1
~00 is the
Q is the2Qquality factor _and
and
1 damping ~factor,
0
p=
~
0
~0
~0 When
12Q response
frequency
of the system.
Vp ~with
~0 magnitude
~ ~is plotted
~ the frequency
0
d1
d02
d2
d21
d2
0
~ =
dV0~ p
0
~0
~ ~0
vs ~ ~0 and phase vs ~ ~0, ~
it appears
as shown in Figure
1.3.Vp $ GB
2Q
Vp 1
Vp
Vp ~0 ~ ~0
dt
Vp
Vp
Vp
Vp $ GB 1 Q 2Vp1$ GB 1
Vp~0
V
p $ GB 1
V
V
p
p
to
the
unity
gain
amplifier,
and
if
If one
voltage
2 Vp $ GB 1 slew
Vp $ applies
GB 1 a step of peak
Vp $ GB
1 p 1Q12 1
V1
p $ GB 1
1
Q
2
rate, then the output appearsQas
shown
in
Figure
2.4
if
or
. 2 1
Vp 0$ GB 1
~ ~
2
2
Q2
Q21
Q 2 1Q 22 1
2
2112
p~
10 1 2
p11
p
Q21
2 1
1 4presponse
Q1
2 of visible peaks~in the
_1 i
Q ispapproximately
equal
total
step
and
p to
11
1 the
1 pV
p number
~
0
1~
10
0
p
1
1
~20
dV
2 0
the frequency
of
ringing
is
.
~0
~0
1
1
4
Q
_
i
1
1
4
Q
_
i
2
40Q i
_1 - 1p2 ~
dt
_1 1 4Q 2i
0
Q i$ GB ~1
_1 - 1 4Q 2i
_1 - 1 _41V
dV0 dV0
dV0 - 1 4Q 2i
V
p
2
1 - 1 4Q i
dt dV0
dt
dV0
dV0maximum
Slew-rate
is known as the
dtdV0 _rate
dt
1
dt
V
V
p
dV
p
0is
at which
the output ofdttheVOP-Amps
Q 2dt
p dt
Vp
Vp
Vp
2
Vp
capable of rising; in other words,
slew
Vp
rate is the maximum value that
dVo/dt
p11
can attain. In this experiment, as we go
~0
on increasing the amplitude of the step
input, at some amplitude the_1rate
- 1at 4Q 2i
which the output starts rising remains
dV0 with Figure 1.4: Time Response of an
constant and no longer increases
the peak voltage of input; thisdtrate is
Amplifier for a step input of size Vp
0
Unity gain
Non-inverting amp
Inverting amplifier
R2
R4
R1
VF1
VG1
+
R3
U1
VF2
U2
VF3
U3
Figure 1.6 shows all the three negative feedback amplifier configurations. Figure
1.7 illustrates the frequency response (magnitude and phase) of the three different
negative feedback amplifier topologies. Figure 1.8 shows the output of the three types
of amplifiers for a square-wave input, illustrating the limitations due to slew-rate.
Vp
Analog System Lab Kit PRO
page 19
experiment 1
experiment 1
Design the following amplifiers - (a) a unity gain amplifier, (b) a non-inverting
amplifier with a gain of 2 (Figure 1.5(a)) and an inverting amplifier with the
gain of 2.2 (Figure 1.5(b)).
Transient response - Apply a square wave of fixed magnitude and study the
effect of slew rate on unity gain, inverting and non-inverting amplifiers.
Frequency Response - Obtain the gain bandwidth product of the unity gain
amplifier, the inverting amplifier and the non-inverting amplifier from the
frequency response.
Determine the second pole of an OP-Amp and develop the macromodel for the
given OP-Amp IC TL082. See Appendix B for an introduction to the topic of
analog macromodels.
Submit the simulation results for Transient response, Frequency response and
DC transfer characteristics.
Apply square wave of amplitude 1V at the input. Change the input frequency
and study the peak to peak amplitude of the output. Take the readings in
Table 1.1 and compute the slew-rate.
Specific ICs from Texas Instruments which can be used as instrumentation Amplifiers
are INA114, INA118 and INA128. Additional ICs from Texas Instruments which can
be used as general purpose OP-Amps are OPA703, OPA357, etc. See CHAPTER 2,
EXPERIMENT 1.
S. No.
Input Frequency
Magnitude Variation
Phase Variation
1
2
nR
V1
R
R
nR
R
R
VO
R
R
R
V1
V2
VO
V2
S. No.
Input Frequency
Table 1.2: Plot of Magnitude and Phase variation w.r.t. Input Frequency
DC Input Voltage
DC Output Voltage
Phase Variation
1
2
3
1
4
2
Table 1.3: Plot of DC output voltage and phase variation w.r.t. DC input voltage
3
4
Table 1.1: Plot of Peak to Peak amplitude of output Vpp w.r.t. Input frequency
Frequency Response - Apply sine wave input to the system and study the
magnitude and phase response. Take your readings in Table 1.2.
DC transfer Characteristics - Vary the DC input voltage and study its effect on
the output voltage. Take your readings in Table 1.3.
Further Reading
Datasheets of all these ICs are available at http://www.ti.com.
An excellent reference about operational amplifiers is the Handbook of
Operational Amplifier Applications by Carter and Brown [5].
page 21
experiment 1
experiment 1
Notes on Experiment 1:
page 22
Chapter 2
Experiment 2
Study the characteristics of regenerative feedback
system with extension to design an astable and
monostable multivibrator
page 23
experiment 2
V0b
V0 =V0-=A-0 $ A
_V0 i$ i V0 i
_Vib1
V0 V0 A $
0 A $ V 1 bV
V0 = A 0$ _ i - 0 i
Vi =Vi =- 10-1A-0 $ Ab0 $ b
R1bR
1
VA01i0 $
V0 = -bA0=$ _VV0i =bVR
=
i1+
R11R+2 R21 - A0 V$ 0b= - A0 $ _Vi - bV0 i
V0
V0 = - A0 $ _Vi - bV0 i
=- A00 $ b = 1 R1 , it becomes
1
Vi A
V0
However,
when
$ 0biA0=$ b1
V0 = b1b0 V
0 $ _Vi -A
=
A0 $
=R1 + R2
1
VA0 0 $ b A $
V
i
1
1
$
A
b
1
R
0
1
unstable
as
amplifier
as
output
satu=- 0
V0 = - AA
0 0$ _
$V
bi -1b1V0 i
V0 b =
V
i
1
A0 $ b
A0 R$ 1 + R12A0 $ b = 1
=R
Vi When
rates.
b =of 1
b 1&
0 $A
The goal of this experiment is to understand the basics of hysteresis and
1the
V0 1A11 region
Ab0A00$0$$ &
b
R1 + R2 b = R1
A
$
b
1
1
A
0 $ b==
RV
is $regenerative
i1 this
b
1 A
R1 + R2
b+VV
V0operation
0 iss circuit
= -bA=0 $ _Viof
the need of hysteresis in the switching circuits.
A0 $ b = 1
+ Vss - 0
RA10+
21 1 A0 $ b & 1
$ bRThis
R
1is the
comparator.
A0 $ b = 1
V0 =mixed-mode
- A0 $ _Vi - bV0 i
1
V0
V
b
ss
=
VR
A0 $ b 1 1
ss 2
$ A0=$ b1 &
=-AA0 $0 b
R1is
+
V
ss
1+stable
Vicircuit.
Output
two
1 - Ab
0$ b
A0 $ b 1 1
1
V0 onlyA in
$V
ss
$
0
=1
$
A
b
$
V
b
0
=
$b & 1
A
ss
1
AR
1
0 $1 b V
V
V
ss
stages
. When
the 1input
i
+ ss and
-0 A0 $ b
b=
A0 $ b & 1
RA
1 + R2 A0 $V
1
ss 1
R1 + Vss
1 bss Vvalue
0$ b
is large
negative
$ Vss output
b
V&
ss
b = saturates
Vss 2.2: Symbol for an Inverting
+
Figure
Aat
R
R
0$ b = 1
1+
2 V
ss
1ss$ increased
A $2b$ b&$ Vb
Vss
output
+ Vss bas
$ Vss0input2V$ssin
Vss Schmitt Trigger
1
$
A
b
0
=
1
Aremain
0 $ b 1 at
1+b
- Vss Vss + VssTuntil
$sslnreaches
d$ ln d 1 +nbb$ nVss
=T22=$$input
$ $VRC
bRC
2
b $ Vss
1 state
b1 1
& 1 - Vssit changes Ato0 $ stable
Aat
0$ b
1bthis
Vb
b $ Vpoint
ss
2 $ b $ Vss
11+ssb
1
V
ss
&
$
A
b
0
1
V
input
is
decreased
$ ln 2 $ bnit$ Vss
+ ss . Now when
=RC
$2ln$ d$RC
=xTRC
b $ Vxss the
ln
=
d b dn1 nb
Vss
1b1at
1
b
+
V
2
can
change
state
only
hysteresis of $ b $ Vss is seen around 0. This kind
- Vss
$ ln d + ss .nThus
T Vss2 t$ RC
1
1+b
+txx
2 $ b $ V=
ss
-while
x 1RC
$Vbln d driving
+must
=
$ RC $ ln d as a switch
n
In the earlier experiment we had discussed the use of only negative feedback. Let b of
comparator
is
a
in ON-OFF controllers
- ss 1 - bTn= a2 MOSFET
$ Vss
1=
-2b$ RC $ ln d 1 + b n
2
b $ Vss 1 + b
$
1
T
b
1
+
b
1
+
x
$
RC
ln
=
d
n
us now introduce the case of regenerative positive feedback as shown in Figure 2.1.
SMPS
(Switched
Mode
Power
Supply),
pulse
width
modulators
1 -and
b class-D audio
$ lnnbd$ ln
x
+1 RC
Vdssb n n
=
Vss T = 2 $ RC $xln=dxt1RC
b 1$ +
-$ ln d 1type
= RC
b bfor xthis
n Schmitt1 trigger is shown in
The reader will benefit by listening to the recorded lecture at [20].
power amplifiers.
The
symbol
inverting
1b RC $ ln
$ ln V
d
1n+ b
x=
+Tx=!21$V!RC
n
2 $ b $ xVss tRC
1x1V
ln dbSchmitt
n+ xtrigger is as shown ind 1Figure
=n RC1ss$ - b 2.3.
$ ln d non-inverting
Figure=2.2. The
t
b
1
b
b
1
R
+
$
2
b
$
V
1
1
ss
b$dln d Rn1 n
1b+
t+x
x=
$=
ln
x RC
RC
=
11V+b1R-2 b
b!nR
=
1+b
(2.1) T = 2t $+RC
x $ ln d 1 - b
V0 = - A0 $ _Vi - bV0 i
R1 + R2
x =1RC
+ b$ ln d b n
1+b
! 1tV+1xR11 +
x = RC $ ln d
n
Rb1 b= T R=1 2 $ RC $ ln d 1 - b n
b
RC
x
$
ln
x
$
RC
ln
d
n
=
=
d
n
R1 + RV20 = ! 1VA0 $ _Vi - bV0 i
1
V0
RbR
2 1b
1
b
1
+
1
R
2
! 1V
A $
b=
1 d
RC $Rln
x=
x = nRC $ ln d
n
RR
1 + R2
Vi =- 0 1 - A0 $ b
t + x ! 1V
b
- b R1
b1=
R
R
R
R
1
2
+
R2
R1 !R1V
b1
= R 1R
t R+2 xV0 =- A0 $
1 b
1+
1+
2
b=
R1
R
1
x = RC
$ lnRRd21 + R2f =
n fR1= =1 1,5
kHz
1,5VkHz
= SS
i
1
T1 T +V
b
b+V=
R
R
b
1
1 A0 $ b
+
SS
b=
x = RC $ ln dR2
n
R1 + R2
Rms
1+
2 1
! 1V R1 R R1 xR=
VI
4 ms= 1,5 kHz b R1
xf4=
R2
=
VI
T ! 1Vb = R
R2R1 R1 1 RC
V
O
A
0 $ b =VO1
RC
b=
kHz
R1 + R2 R
4 ms
x=
+
RR1 + Rf 2=R2T = 1,5
R1 f = 1 = 1,5 kHz
b
=
T
R1
4 ms RC -VSS RA
x=
1 + R2
f = 1 = 1,5 kHz
A
11
1 R 1,5 kHz
0$ b = 1
-V0
SS $ b
T
ms
4
x
f
=
=
=
R1
R2
TRC
1
4 ms
x
=
VR
fV
0 $ _kHz
i - bV0 i
=0 =
=A1,5
RC
x = 4 ms
AR02 $ b & 1
T2
A
0$ b 1 1
R
RC
R1
1
msA $
xV
=0 4
RC
Vi =- 0 1 R- A0 $A
b $b & 1
f = 1 =Figure
1,5 kHz
+ Vss
Schmitt Trigger and its Hysteresis Curve
RC 2.3: Non-inverting
T
1 0 1,5
R
1
f
kHz
=
=
b=
x = 4 ms
T
R1 + R2
- Vss
V
ss
+
RC
A0 $ b = 1 x = 4 ms
Figure 2.1: Inverting Schmitt-Trigger
and
its
Hysteresis
Characteristic
b $ Vss
A0 $ b 1 1 RC
V
page 24
Vss
V00 =
-A
bV
V00 ii
Vii A00 $$ __V
-b
$ V2V
$ b=
ss
11
V
V00 =- A
0$
1
+0 b
$
A
0
=V
$ bn
T=
Vii 2 $ RC $ ln11 dA
0$ b
-1 A
b
R
R11
b
b=
=R
1 + R2 1
x = RCR1$ +
ln dR2
1 - bn
A
0$ b = 1
A0 $ b = 1
t+x
A
A00 $$ b
b 1
1 11
1+b
- ss
2.1.2 Astable Multivibrator
A $b & 1
b $ Vss
V
+
An astable multivibrator
is shown in Figure 2.4. The square and the triangular
-V
waveforms shown
in the figure
Vss are both generated using the astable multivibrator.
We refer to b $ as
V the regenerative feedback. The time period of the multivibrator is
2 $ b $ Vss
given by V
2$b$V
1+b
(2.4)
1T
+b
n
=n 2 $ RC $ ln d
T = 2 $ RC $ ln d
1-b
1-b
1
x = RC $ ln d
n
1
1 -x
b = RC $ ln d
n
1 - bSystem
t+x
Analog
Lab Kit PRO
1 + tb + x
x = RC $ ln d
n
0
ss
ss
(2.2)
ss
ss
ss
(2.3)
SS
SS
ss
ss
= RR1 1 R
= R 1R
- Vss
- Vss
1+
2
1+
2
$=
V
b$ bV
ss ss1
A0 $ b = 1
A0b $ Vss
b $ Vss
A0 $ b 1 1
A0 $ b 1 1
Vss
Vss
bss$ Vss
V
& 1 2.4: Astable
&1
A0 $ b Figure
A0 $ b Multivibrator
$
2
b
$
V
2
$ b $ Vss
ss
and its characteristics
ss
+ Vss
+ V2
Vss$ b $ Vss
1+b
1+b
T = 2 $ RC $ ln d
n T = 2 $ RC $ ln d
n
1
b
V
V
ss
ss
The monostable remains in the on state until it is triggered; at this time, the circuit 1 - b
$ Vss equal to 1x .=+
2ss $ b
bequation
b $ Vssto the off state
b $ Vfor
$n
RC
ln d 1 for
x=
$ ln d 1 n
switches
is RC
shown
2 $ RC
$ ln d The
T =a period
1 - bn
1-b
11t ++
Vss
below.Vss
-x b
b
t+x
2 $ RC $ ln d1
n 1 b
=
2 $ b $ Vss
2$T
b$V
ss
1+b
$ ln d
n
lnbd 1x =-RC
nb$ ln d +b n x = RC(2.5)
1 + b x = RC 1$ +
b
T = 2 $ RC $ ln d
Tn = 2 $ RC $ ln d
n1 - b
1-b
1-b
1
! 1V
x+=xRC1$ ln d ! 1V n
1
t
R1
R1
1 -b b
x = RC $ ln d
n x = RC $ ln d
=
= applied
1 -monostable
1 - bt,n the next
b
After triggering the
at time
trigger
mustbbe
R1 + Rpulse
R1 + R2
2
t +tx+
after t + x . The formula for
is x
given below. 1 +R1b
R1
x = RC
n
1+b
1 +$ bln d
R
R2
2
x = RC $ ln d
n x = RC $ ln d
n 1 bb
+R
b
b
R
x
n
=V RC $ ln d
V 1
! 1V
! 1!
b 1
f = = 1,5 kHz
f = 1 = 1,5 kHz
R1
R1
T
T
b=
b=
!
R1 + R2
R11 V
+ R2 R1
ms
4
x
4 ms
x
=
=
b
=R R
R1
R1
1+
2
RC
RC
R1
S. No.
Regenerative
Feedback
Hysteresis
R2
R2 b
R1 = R1 + R2
1
f = 1 = 1,5 kHz
f =R112 = 1,5 kHz
T
T
2 x = 4 ms
x=
R42 ms
RC
RC
3
Rf 1 1,5 kHz
=T =
4
1 1,5 kHz
=
xf =
= T4 ms
Table 2.1: Plot of Hysteresis w.r.t. Regenerative Feedback
x
RC= 4 ms
Analog System LabRC
Kit PRO
R
experiment 2
V0 = - A0 $ _Vi - bV0 i
2.1.3 MonostableV00Multivibrator
V0 i
- AA00$$_Vi -1b(Timer)
=
=Vi
1 - 1A0 $ b
V
0
The circuit diagram for a monostable
multivibrator
is shown in 2.6. The trigger
$
A
0
=R1 to1 the
V2.5i =is applied
0$ b
- Amonostable.
waveform shown in Figure b
The negative edge
R1 +
R
2
triggers the monostable, which produces
the
square
waveform
shown
V = - A $ _V - bV iin Figure
V = - 2.6.
A $ _ V - bV i
R1
bA=
1
1
0$ b
=
1
V
V
R1 + R2 V =- A $
A $
1 - A $ b V =1-A $b
R
+V
R
A0 $ b =
11
b=
b=
R +R
R +R
R
V
A $b = 1
A $b = 1
A0 $ b V &
11
V = - A $ _ V - bV i V = - A $ _ V - b V i
A $b 1 1
A $b 1 1
+AV0 ss$ b C&
1
1
-V 1
V
V
1
&
$
A
b
A $b & 1
A $
=- A $
V =1-A $b V
1-A $b
+V
+V
+ VRss
R R
b
b
+VSS
R
C
Trigger V
-VSS
VC
C
R
R
experiment 2
1+b
2 $ b $ Vss
1 + b Vss
T = 2 $ RC1$ +
ln db
n
T = 2 $ RC $ ln d
n
1n- b
1
b
2
$
$
T
RC
ln
d
=
1+b
$
2
b
$
V
1
b
ss
T = 2 $ RC $ ln d
1
1n
x = RC $ ln
x = RC $ 1lndb
n
1 + bx = RC $ ln d 1 d 1n- b n
1
b
T = 2 $ RC $ ln d
n
1
1-b
x = RC
1-b
t+x
t +$ ln
x d1 - b n
t
x
+
1
1+b
t+x
1 + b x = RC $ ln d 1 - b n
x = RC1$ +
ln db
n
x = RC $ ln d
n
b
RC
x
$
ln
d
nb
=
1+b
b
t
x
+ the hysteresis of ! 1V . Obtain the
x = RC
lnfeedback
d
n circuit with
Design a regenerative
! 1$ V
b
1 + b ! 1V
DC transfer characteristics
of
the
system.
and Rsee
how
1
! 1V b
RC $ ln d the hysteresis
x =Estimate
R1
n
b=
=
b
R
1 R1 + R2
R
R
it can be controlled by
varying
the
regenerative
feedback
.
b=
R 1+ 2
R
! 1V
b = R1 1
R11 + R2
R1 + R2
R1
R1 the triangular Rwaveform
2
. Apply
with
Vary either R1 or R2 in order to vary b =
3
R2
R1 + R2
the peak voltage
of
10V
at
a
given
frequency
to
both
circuits
and
observe
the
R
R2
R
R1
R
output waveform.
1 1,5 kHz
R
1
R
2
f = = 1,5 kHz
1f = 1,5
T =kHz
T
f
=
=
1 1,5 kHz
Tx = 4 ms
R for DC transfer characteristics.
= T x=
ms
= 4simulation
a) Sfubmit
the
results
x = 4 ms
ms
x = 4RC
f = 1 = 1,5 kHz RC RC
T
b) TRC
ake the plots of DC transfer characteristics from oscilloscope and
x = 4 ms
compare it with simulation results.
RC
T = 2 $ RC $ ln d
1-b
1n+ b
T = 2 $ RC1$ ln db
n
1
1
b
x = RC $ ln d
1
x = RC $ ln d
1 - bn
n
x = RC1$ ln db 1 n
t+x
1-b
t+x
t+x
1+b
1+b
x = RC $ ln d
n
x = RC $ ln d
n
b
b d1 + b n
x = RC $ ln
! 1V
b
! 1V
c) Vary the regenerative feedback
! 1V and see the variation in
R1 the
b=
R1
R1 + R2
hysteresis, hysteresis bis=directly
proportional
to
regenerative
R
R
+ R2 1
b1 =
R1
feedback.
R1 + R2
R1
R1
R2
R2
Design an astable multivibrator using charging
and
discharging
R2
R of capacitor
R
C through resistance R between input and
output
of
the
Schmitt
trigger.
See
R
1 1,5
f
kHz
=
=
Figure 2.4. Assume that frequency f = 1 = 1,5
T
kHz .
Tf = 1 = 1,5 kHz
x = 4 ms
x = 4 ms T
ms
4
x
and estimate RC using the
Design a monostable multivibrator for =
RC
formula 2.5.
RC
Notes on Experiment 2:
page 26
Chapter 3
Experiment 3
Study the characteristics of integrators and
differentiator circuits
page 27
experiment 3
A = GB s
A = GB s
A = GB s
- 1
V0
sCR
=
s
Vi
a1 + GB 1$ RC + GB
k
- 1
V0
sCR
=
s
Vi
a1 + GB 1$ RC + GB
k
- 1
V
0
sCR
3.1.2 Differentiators
Vi = a1 +
1 + s k
GB $ RC GB
A differentiator circuit that uses an OP-Amp is shown in Figure 3.2.
C
V0
Vi =
- sRC
s
s 2 $ RC
b1 + GB
+ GB l
- sRC
=
s
s2
b1 + ~0 Q + ~02 l
C
C
V0
V0
sRC
- sRC
=
= differentiators
Integrators Vand
can be used as a buildingVi block
for sfilters.
2
i
s 2 $ Filters
RC
s
s
RC
$
1 + signal
b
l
+
b1 +block
l
+
form the essential
in
analog
signal
processing
to
improve
to
GB
GBnoise
GB
GB
sRC
sRC
ratio. An OP-Amp
can
be
used
to
construct
an
integrator
or
a
differentiator.
This
=
=
2
s
sinstead
s
s 2 advantage of integrators as building
experiment is to understand
+~
b1 + ~blocks
b1 + ~0 Q + the
l
2l
~02
0Q
0
of differentiators. Differentiators are rejected because of their
poor
high-frequency
~0
~0
noise response.
~ GB
~ GB
Vpp
Vpp
Vp
Vp
C
Vpp = Vp $ T
2 $ RC
T =1 f
VI
f
N th
A = GB s
(3.1)
- 1
V0
sCR
=
Vi
a1 + GB 1$ RC +
C
(3.2)
V0
- sRC
=
2
Vi
s
$
b1 + GB + s GB
- sRC
~0
=
s
s2
b1 + ~0 Q + ~0
The output of the differentiator remains at input offset (approximately 0). However,
~at GB
any sudden disturbance
the input causes it to ring at natural frequency ~0 .
~ GB
Vpp
Vp
Vpp
Vp
Vp $ T
V
V pp =
2 $ RC
T =1 f
C
Vpp = Vp $ T
2 $ RC
T =1 f
VO = -Vf I/SCR
VO = -SCRVI
Vpp = Vp $ T
2 $ RC
T =1 f
f
f
Figure 3.2: Differentiator
3.2 Specifications
Fix the RC time constant of the integrator or differentiator so that the phase shift
and magnitude variation of the ideal block remains unaffected by the active device
parameters.
3.1.1 Integrators
N th
- 1
V0
sCR
=
- 1
s
N th Vi
a1 + GB 1V
k
0 +
sCR
$ RC =GB
A =CGB s
Vi
1 + s
1+
1
GB
$ RC GB
V0
sRC
V0 Vi = - sCR
2
s
s
RC
$
=
1 +1 C
l
Vi
GB + sGBk practice.
a1 +bto
The output goes
For making it work a high valued resistance
GBsaturation
$ RC + GBin
- sRC
in0 order
to bring the
OP-Amp to the active region where it
across C must=be added
2
V
- sRC
s
s
1 + sRC
+
b
=
2l
can act Vas
an
integrator.
0
- ~0 QVi ~0
s
s 2 $ RC
2
Vi =~0
s
s
RC
$
1
+
+
b1 + GB + GB l
GB
GB
page 28 ~ GB - sRC
=
- sRC
Vpp 1
s
s2
+ 2 l=
b +
2
Transient Response - Apply the step input and square wave input to the
integrator and study the output response. Apply the triangular and square
input to the differentiator and study the output response.
Frequency Response - Apply the sine wave input and study the phase error
and magnitude error for integrator and differentiator.
b1 + GB + GB
l
- sRC
C - sRC2
=
V0
- sRC
s
s2
s
s
RC
$
2
- sRC
b1 + ~0 Q + ~02 l
b1 +
l=
Vi =
s
$R
V0 GB + GB
sRC
2
1
b + GB + s GB
s
s
2
Vi =
1
s
s
RC
$
+
+
b
l
~l0~0 Q ~02
- sRC
b1 + GB
+
=
- sRC
s
s 2 ~0 GB ~ GB
=
b1 + ~0 Q + ~
l
s
s2
2
0 sRC
b1 + ~0 Q + ~0
=
2
s
s
V
GB
~
~0
b1 + ~0 Q + ~02 l pp
~0
Vp
Vpp
~ GB ~0
~ GB
Transient response - Apply the
$ T an input to integrator, vary
Vp squareV waveVpas
Vpp
pp =
GB
~
Vpp value
the peak amplitude of the square wave and
the peak to peak
RC
2 $obtain
Vp $ T
Vp
pp =
T
f
1
=
of output wave. Vpp is directlyVproportional
to
peak
voltage
of
input
Vp and is
2 $ RC
given by Vpp = VpV$pT , where T = 1 f , f being the input frequency.
2 $ RC
Vpp = Vp $ T
2 $ RC
V
T
$
f
p
T = 1 f Vpp =
T
1
=
RC
$
2
Figure 3.4 shows sample output waveforms obtained through simulation. f
f
T =1 f
f
f
Simulate the integrator and differentiator and obtain the transient response
and phase response.
Input Frequency
Magnitude
Phase
experiment 3
V0
Vi =
1
2
3
4
5
Table 3.1: Plot of Magnitude and Phase w.r.t. Input Frequency
S. No.
Input Frequency
Magnitude
Phase
1
2
3
N th
A = GB s
- 1
V0
sCR
=
s
Vi
a1 + GB 1$ RC + GB
k
5
C
Table 3.2: Plot of Magnitude and
Input Frequency
V0 Phase w.r.t.
- sRC
2
Vi =
s
$ RC
b1 + GB + s GB
l
Frequency Response - Apply a sine wave to the integrator (similarly to the
- sRC
= to obtain
2
differentiator) and vary the input frequency
phase
and magnitude
1 + s + s 2l
b
Q
~
error. Prepare a Table of the form 3.1. Figure 3.3 ~
shows
the
typical
frequency
0
0
~0
response for integrators and differentiators.
For an integrator, the plot shows
a phase lag which is proportional to ~ GB . The magnitude decreases with
increasing frequency. For the differentiator,
the phase will change rapidly at
Vpp
natural frequency in direct proportion Vtop quality factor. The magnitude peaks
at natural frequency and is directly proportional to the quality factor.
Vpp = Vp $ T
2 $ RC
4
T =1 f
f
S. No.
1
2
3
4
Table 3.3: Variation of Peak to Peak value of
output w.r.t. Peak value of Input
page 29
experiment 3
C1
R2
C2
R1
VF1
+
U1
VF2
U2
C
R
VI
VI
VO = sCRVI/2
R
R
VO = 2VI/SCR
R
R
Notes on Experiment 3:
Chapter 4
Experiment 4
Design of Analog Filters
page 31
experiment 4
2
N
2
N
20 = 1 RC
~
20 = 1 RC
~
~
0 = 1 RC
H
~
H000 = 1 RC
H
Goal of the experiment
V0300
+H
H
VV03i =
H00 s 2
+
s
Low Pass Filter
VV03i = b1 + +s H0+ s 2 l
VV03 = 1 + ~+0 Q
H0 ~022
To understand the working of four types of second order filters, namely, Low
s 022 l
Pass, High Pass, Band Pass, and Band Stop filters, and study their frequency
Vii = bb1 + ~0ssQ +
+
s 2l
2 ~
~0 Qs+
b1 +b H
2 ~02 l
characteristics (phase and magnitude).
~00 $Qs 22 l~0
0$ ~
bH
s 0022 l
V01
0$ ~
s 2l 2
bb H
VV01i =
H
$
~
02 l s 2
VV01i = b1 + 0ss ~+
High Pass Filter
0
s 22 l
VV01 = 1 + ~0 Q +
~
i = b
s
s 0022 l
~0sQ + ~
Vi
s 2l
bb11 +
4.1 Brief theory and motivation
s~
+a-~
0Q +
H
$
N
0
k 002 l
s0 ~
~H
0Q
V
02
0$ ~
a
s0 k
N22
VV02i =
N
H
N
0$ ~
a
sk2
N
Second
order
filters
(or
biquard
filters)
are
important
since
they
are
the
building
s
V
H
02 =
0 $ ~0 ks 2
a
N
N
N
1
N
2 2 in the construction
+ s 22 l
N 2 2of N order filters, for N 2 2 . When N is odd, the N order
i
b + 0sQ ~
VV
Band Pass Filter
blocks
V02i =
= b11 + ~
sQ +0 ~
s 0022 l
N22
N22
1 second
-2
N
~
V
0
filter can be realizedNusing N N
order filters
When
i
sQ2 + ~
s 2l
bb1 +
N2
2
2
N and one first order filter.
2
N
~
~
s
+
+
0
02 l
N
2
Nis 1even, we need N - 1 second
order filters. Please
H
$
1
Q
~
~
00
+
0s
N - 1listen to the recordedN lecture
b
l
NN
2
2
1 for a detailed explanation
N22
N-1
0
b11 + ~
s 0022 l $$ H
V04
at
[19]
2 N - 1of active filters. 2
~
+
s
b
V
N2
2 N-1
N
04 =
2 l H02
N
~ =21 RC
2
i =
s0
0 l$ H
b1 + s~
VV
04
2N
2
N
2
~02 + s 222 l
i = b1 +
s
VV
04
Second
order filter can
types of filters.
TheNtransfer
2 = 1 RC
H
~
2
RCNto construct four different
~ be
= 1used
Q
~
Vi = b1 + 0s + ~
~ = 1 RC
s 0022 l
Band Stop Filter
2
2 and
~ = 1 RCfor the different filter
~0sQ + ~
Vi
functions
are
s
bb11 +
V ~ types
+ HshownHin Table 4.1, where ~ = 1~RC
H
H
1
1
RC
RC
=
=
=
Q
~
~
+ 1~0 Q + ~022 ll
V of the transfer
s
s function. The filter names
H is the low frequency gain
are
often
H
1
0
0
1
~
0
- 2Q
12
V
V
+H
+bH+ ~ Q + ~ lV
HFilter),
H Filter),
H (Band Pass
=
1
~
abbreviated
asHLPFs (Low-pass
HPF
(High-pass
Filter),+BPF
0
1
=
V =
+
2
V
s
s
s
V
H
+
V
s
s
~0 1 - 2Q
+b H~ $+
b1 +(Band
l
b1 +
lsHl we
12
V~
H
V =BSF
+ ~ Q +a~universal
b1 describe
lV = V active
sQ +
~s Filter).
and
Stop
In
this
will
=Q experiment,
= s + +s l
~0 Hof10 Active
Q- 2Q
+
~
b1 + ~
l
Table
4.1:
Transfer
functions
Filters
V
1
2
+
b
V
V
s
s
s
s
Q
~ provides
~ all the four
=
Q
~
s
~
s
2
Q
H
Q
1
1
0
+
+
+
+
b
l
b
l
filter, which
filter
functionalities.
Figure
4.1
shows
a
second
s
V bH $
s~
b H $ ~s l
l s~ Q
Q
~
~
H
$
b
l
1
H
Q
+
+
b
l
~
0
V
1
s
~ Qintegrators.
b H $ ~filter
l V realized
order
using two
=
bH $ ~ l s
s ~ V = Note that~ thereV are different
1H-0 Q 1 2
V = universal
s
s V
s
bs Hl $ ~
l V
bH $ ~ l
s
s
s
=
1
1
+
+
1 - 4Q
b
l
+
+
b
=
12
outputs
of
the
circuit
that
realize
LPF,
HPF,
BPF
and
BSF
functions.
V ~ Q a-~H $ k
V
1
V
+
+
b
l
s
s
Q
~
~
V
s
s
V V =
~
~ Q ~
1 - 4Q
b1 + ~ Q + ~ l
12
bV1 +=~ Q + ~
l s
s
s
s
=
s
s
1
4
Q
z
d
Va- H $b1 +k s
+s ~ l
b1 + ~ Q + ~ l
s
H
$
a
k
Q
1
~
H
$
+
+
b
l
a
k
s
V
~~ Q ~ V
4Q 2
dz
s
~
a- H $ ~ k V =
=
a- H $ k s
s
th
th
th
th
th
th
th
th
0
0
03
03
i
03
0
0
01
01
i
i
2
0
2
0
2
00
01 0
i
2
2 0
01
2
0
2
2 0
0
02
2
0
2
0
01
2 0
03
2
0
2
0
03
2
0
02
02
2
0
0
2
03
2
0
01
02
0
2
2
0
2
00
03 0
01 i
2
0
2
0
2
0
2
0
0
03
01
2
0
2
0
2
0 0
2
0
2
0
0
0
0
0
V02
i
s ~0 s 2 Vi
s
s 2 2 0 $ k Vi =
a~
-0H02$ ~ k
s
s 2 V02 = V02
b1 +V02~0 Qb1++a~-0s2H
l l $~
2l
1
00
0
Vi = b1 + ~0sQ + ~
+
+
b
l
H
s
2
0
V
2
i
C l
s
s
=
=
Q
~
~
0
0
~
b1 + ~0 Q2 + ~
2
0
V
2
04Vi
bV1i + ~0 Q + ~
2
s C 2s
s 02 l s 2
0
=
s
2
s
1
1
+
+
+
+
b
l
b
l
s
Vb1i + 2 l $ Hs0~0 Q s ~02
b1 + ~s02 l $ H0
~02
0Q
b1 + ~02 l $ H0R
b10 + ~0 Q +2 ~02 lV04
~
V04
V04
s2 ~
1
+
2
b
2 l $ H20
H
$
1
=
=
b + ~02 l s0
2 s
R
=
V04
i
s~0 s Vi
s b1s+
b1 + ~02 l $ H0
s
s 2 V04 = V04
+1~ 2 l~02 l $ H0 Vi
b1~+
VR~10 Q
1
Vi = b1 + ~0sQ + ~s02 l
+
+
b
2l
0 04
V
0
i
s
s2
2
=
=
~
~
0Q
0
2
b1 + ~0 Q + ~02 l
2
Q
1
R
+
+~
b
V
V
2l
i
i
s
s
s
s2
Q
~
1
1H0 Q b1 +
+ ~2l
b01 + ~0 Q0 + ~02 l
1
BPF
~0 1 1
~
0
~
0Q
0
2
2
1~
0
1
LPF
2Q
1
2Q 2
~0 1 - 2Q 2
~0 1 - HPF
10- 11-2 1 2
H0 Q 2Q
H0 Q ~
1 2- 1 2
~
0 2Q
H
Q
0
4Q 2Q
2Q
H0 Q1
H
0Q
1
1 - 12
1 - dz2 H0 Q
H0 Q
1- 1 2
4
Q
4
Q
4Q
1d~
1- 1 2 1
4Q 2
dz
4Q1 dz
1~- 1 2 R
dz R
~
0 4Q
=
4Q 2
z
dz
dd~
d~
~
d
z
z
d
d
2Q
d~
~d~
~ = ~0-QR
= ~0
~ = ~0
d~
~d0~
~ = ~0
~
= ~0
- 2Q
- 2Q ~0~ = ~0
~ = ~0
2Q
-BSF
-~20Q
~0
- 2Q
~0
VI
H0Q2Q
~0 - 2Q
~0~0
~0
~0
H0 Q
H0 Q
~0 = 1 kHz
~0 = 1 kHz
Q=1
Q=1
~0 = 10 kHz
~
0 = 10 kHz
page
32
Q
= 10
Q = 10
f = 1 kHz
H0 Q
R/H~
0
0
~0 = 1 kHz
~0
~0
H0 Q
~0
~0
~0
H0 Q
QH
1
=0 Q
~0 = 1 kHz
H0 Q
~0 = 1 kHz
~0 = 1 kHz
101kHz
Figure
Second-order
Universal
Active
Filter
Q =4.1:
1 ~A0~=
kHz
~
0 =
0 = 1 kHz
Q=1
Q=1
10
=
~0 = 10QkHz
Q=1
Q=1
~0 = 10 kHz
~0 = 10 kHz
1 kHz
Q = 10 f =
~0 = 10 kHz
~0 = 10 kHz
Q = 10
f = 10 kHz
f = 1 kHz
Q = 10
z
d~
z
d~
d~= ~0
~
d~= ~0
~
~
0
=Q~
-2
~
~0
=
2
Q
-~20Q
-~20Q
~~
0 0
~~
0 0
~
0
H
Q
~
H00 Q
0
H00 Q
~
= 11 kHz
H00 Q
~
= kHz
~
0 = 1 kHz
Q
1
=
~
Q0 =11 kHz
=
Q0=
kHz
~
=1110
Q0=
~
10 kHz
=
~
10 kHz
=10
Q00=
~
10 kHz
=
Q 10
= 10
Q
= 110
f
kHzBPF, BSF, and HPF filters
=
Q
=of1LPF,
Figure 4.2: Magnitude and Phase response
f=
kHz
ff = 110kHz
kHz
110kHz
=
f Analog
kHz
=
System Lab Kit PRO
f=
10
4 $10
Vp kHz
f=
kHz
b1 + ~0+
l 02
=0
+
+
l
a- H0 0 $ ~0 k 0
QQ ~~0V0 V=
~
Q ~02~
~00N
N2sb1+
V02
i b1 +
s 1~~0s202lQs 2 ~02
i
Vi = ~0 Q
N22
N th
~s0 Q
s 2
2 2
N
1Hb+
+++
s s 2l
01$ + 2 l
1 +s 2Hs $ +
l
VV03i = N a- +
2l
b
0
2
s
b
2
s
H
$
V
H
0H
k
03
0
s
Q
~
s
s
~
0
0
2
Q
~
~
a
k
0
~
00
H
$
1
~
00Q
V
0
0
+
b
l
01
H
$
VV02i = b21 + s ~
0
2 l
b
l
1
N
2
=
2
0
s
H
$
2
0
a
k
H
$
1
+
2
0
+
l
V02 b
s 022
~0~0 =
N
N22
Vi V02bsH0 N
s0
$1s 2s2 2ls
Q ~
~02 s~20VV04012 =
b10 +
1 00sRC
Vi = ~
=~
2Vi V0122 ~
s 02 l V04 =
+
+~
b11+
~220~
RC
0 b=
2 l2
Vi =
si i =
Q2 +
~
1=
0
Hs0 $ +
l2$0lH
b10 +~1~
2Q
2V
b
l
ss
ssV =
+
Q
V
~
b1 + ~
V
0s
2
i-+
s
2l
1
V
s
+
i
b
l
s
s
2
N-1
2
~
N
Q
~
0
2
~
0
0
1
0
~00
V01b1 + ~0+
NQ +
+~
+~
V0i 20042ll = H
l
s~b01=+1s~RC
b1 +~0 Q022sl2 $ H
2 +
l 02 bb1+
= ~0 Q Q2 ~02 ~
~00Q
~
~02
0
+H0~$ s20s2lQ
b1H+
2
V04 H0 b H0~
$
V
i
0 Q~0 Q
s
V
i
s
s
2
2l
s
b
l
0
N-1
k + s202l2
1H
+0 $ ~Q
VV01i = V03b1 + s ~
b11b1++~0sQ2 l+$ H~002 l
l0 $ H02 0
1 0 $ Vs021k
Va01bN
H000 bs1 +~~
0 0 l $ H0
H
~V0 1 - a-2H
~
VV04i = b1 += s~02 + +ss H
2 l
0 = =RC V03= 1~
2
2
~
0
2
1
~
V
0
2
04
2
~
2
1
02
=
2
H20 $ s ks s ~0 s s 2
2Q
i Va
Vi 0V022 VV
04
sQ
ss 022 l s
2
1i + ~b0s1Q++ ~
i 4
Vi = bV
1b1bV
+~0 + +2H
l
=
+
N
l Vi = 21Q a- H
s s Vski2 H=0 Q
03 ~20lQ +~
s
s b1 +
0 Q + ~0 l+
1 -~
b1 + 1~
Vi02Q
21 +
s ~0 0s2 l20
~
2
~~
~02 H
0~0 2Q
0Q
V020 Q b + ~ Q0 $ +
~
=
~0 2 l b1 + H0 + V~i 20=
0 = 1 RC
l
Q
s
s
2
z
d
~
0Q
0
1
+ ~2 lQs +s ~ 2 l s
2
~02
~0 1 0
s s2
~0 Q ~0 b1 + s 2 Vbi +
2
0 2
0+
1 and
Vi =1 of LPF,
H
s BPF,
s1 -BSF,
2
Q
0 $ and
ak phase
b01in
V03HPF
H0~shown
~
The
magnitude
response
filters
are
2l
0 Q$aH
H
0$ +
s
H
Q
k
0+
2
~
d
1
1
H
0
H
1
+
V
1
RC
~
~
b
l
Q
~
~
b
l
0
+
+
02
0
00 $
=
b
l
0
2
0
s i V=
1~0 Q ~02 4Q1 V
V02s ~02 s22 b H10 $ ~02 l
1~1V~0 =
2
~02
2
$H
01
0
0 41
b + peaks
=
~0 21s 2 Simulate the circuits and obtain the Steady-State response and Frequency
Qfilter
s -l$2H
2 l04
Vi ~
2
011
2=Q
~
Vi H0 Q
Figure
4.2.
Note
thats 2the
low-pass
frequency
response
at
=
00 + 1
s
=
1
~
2
2
Q
+
V
b
0
s
s
1
V
2
0
+
2
2
04
b
l
=
1
2
V03
H0
dz =
+ H0
Vi V042 + s 2 l sdz
bV1i +
2 ~
s2Q H $2
Q
~+
04
i Qs b1
0 +
H0
1 + s 2l$ V
+QV
+00 ~20lsQ2 +b+~0s02 2l~l02 l response.
b12~
l
1H-0 Q 1 2 ~b10 Q+ ~~
s
s =
Vi =
s
s2
~s0 2Q
HbsV0101Q+~
~d02~ V04 H0 Q b
~0 d~i
0~0 Q
0Q
=
1
2
+
+
4Q
b
l
V
~
0
i 2z
s
2
1
V
H
2
+
+ ~2l
d
03
0
+
b
s
1
H
=
s
s
~
0 $+ 2 lVi + s l
~
0Q
0 b
1
2
b
1
~
Q
=
~
0
0
0
2
H
$
1
. The
phase
sensitivity
and
hasb a2+value
s to i1 0
l equal
~~
s
s
bH1at
0 0Q
V01~0 d1~-is 1maximum
b1 1+ ~
l $sH00Q + ~02 l
d04z1 0 2+
Vi
s
s2
0
402Q ~02a- H0 $ ~0 k~ =V~
V
2
b1Q+2 ~0 Q +~~=02 l~0
0 $ ~k
= ~0 V2V04Q
2~
2 1 - 2 a4
1
1
+
+
b
V
s
2l
=
4
Q
~
V
02
0
i
s
s
2
Take
the
plots
of
the
Steady-State
response
and
Frequency
response
from
the
~2
=1+
0
~0 Q ~0 b H0 $ 2 l
d
= s
22 s
i
z
dV~
Q 1 - 2Q 2
~
10 +
=1~
V
2l s
~bH
-i0 di 2z=
~0
ss 2 l s-2 2dQz
V01s 2
+~
a- sHs202l$ ~0 koscilloscope and compare it with simulation results.
bV1i + 1Q+given
s +
~
Q0 ~
0
0H
1
+
Qb21bV
Q0VQ
+ ~ 2 l~0. This
~
information
phase
variation
can
be
02+used
1
0 by
~
+
0 about
l
d~= ~0 and~b0is
1
Q
~
~
2
0
0
H
Q
H
$ i =2 l
2
~0 Q
0
0V
0~0
b
d~
s
s2
- 2HQ01Q d~s Vi =~0 Q ~
0
2
2
Q
~0 b1 +
V01
s
s
+ ~2l
H
2 a desired frequency ~0 . This is demonstrated
0 $ kHz
k 1next
1 filter sto
1 -~~a0to
the
~
2
th
0 =
Q~
2 1in
1
-02=tune
=
~
1
+
+
~
0Q
0
b
l
~
0 ~ =H
V
~
0
02
2
2
1 0- the
0
~
s
N
4Q~0~ =
2 b1 +
0Q
1~021 +2 2 l ~
Vi
1~0
s
s
l $ H0
0
Q ~0 $ H0 Q
1its+input
~02
s
4Q 2 Vi d=z ~10Q-=Vs1104 2 sb2
+
b
V04 2Q
Frequency
Response
Apply
a
sine
wave
input
and
vary
frequency
experiment.
2l
H
0Q
2
3
-~20Q
th
H
$
1
Q
~
~
0
a
k
H
Q
0
0
2Q
0
+
b1 + ~40Q
N22
N
=
H0 QVi =
Q~02 l s b1 + ss2 2 l $ H
0Q
~~
s
s2 - 1 dz
QH2
0
0 0
4.2 and 4.3V02to=snote your ~0 2
d~dH
b1 + ~0 Q + ~~020 l=~10 kHz4Q 2
~0 = 1 kHz
Q0 =Vi10
z0~
bV1104+=~0 Q + ~~020 l to obtain the phase and magnitude error. Use Table
2~0kHz
1
a- HV0i $ ~0 kb1 + s + s l
N
N
2
2
~
d
s
~
- 4Q
02
H00 1Qthe
2
1 02Vi0 2 by
H
The nature of graphs should be as shown V
above.
For
bandpass
filter, the~dmagnitude
response
at ~ =
and
is
s2
0z
b0 10=+
l $4given
~~
d~
=
~0 Q ~02
~
Q~==1~peaks
Q 1 b1 + s + readings.
kHz
1~
0
1
Q
10
V
=
04
2l
0
V
i
s1
s2
Q
1
=
N
N
~
d
~
~
1
~
0Q
0
0
=
2
H
Q
1
1
~
~
~
0
+
+
0
b
l
2
0
=
The
response at 2Q
kHzbandstop
~
dz
s2
0 =. 1
2
H0 Q a null magnitude
2Q filter shows
d.z 0 Q s 2Q 2
~
~-0 2
2 0 Q ~0b1 + ~02 l $ H0
=Q10 kHz Vi - bQ1 +
=
f =1 s1HkHz
~ 10
~
+
0
=
1
kHz
~
2l
0 =
1
N
V
~
~
d
04
0
2
Q
0
d~
~
=11 kHzH0 Q
- 2Q ~
Q0=
s $H
H0 ~
Q~00 1 - 2Q 2
~0 = 1 kHz
~kHz
0 = 1 kHz
b1N+ ~
l 0
Q~
Vi02 =
2
=0 10
s
s2
10
2Q
~0 ~
~ = ~0
Q =-10
~00f==
~0 1
1~10
1
= kHz
V
04
2
b1 + ~0 Q + ~02 l
Q0=
1
1
~
1
H
Q
~
kHz
10
~
0
0
0
=
Q
1
2 1 =
2
=
N
~
2
0
2
Q
1
2Q
4Q
f = 1 kHz
10
Vi
4VQ
$2
p = 4Q
H0 ~
QQ0 =
RCs l
~0 =s 1 +
- 2Q
f = 1 kHz
1
2
b1 +
10
~
0=
=
~00= 10 kHz
H0 Q
Q~
10
H0HQf Qr 1$ HkHz
dzkHz
~
~~
- 4Q 2
0Q
$ 0Q= 101kHz
0z
1~-02 1 2
d
0
0
~
~
f
kHz
10
0
=
0
=
~0 = 1 kHz
H
~
0
0 = 1 RC
2Q
f
kHz
10
=
Band Pass
Band
d~
Q
1 Stop
Vp ~d0 ~ dz
= 110
~
~0 = 1 kHz
f 0=
kHz
0 Q10
QH=
1 -~f0 1=
~0 1 - V 2 H0 Q H
Q
= 10
4 $ Vp
kHz
kHz
Q =41Q 2 110~
H
03
0
+
0
2
Q
~
~
4
V
$
0
=
p
~d0$ 10
Phase Magnitude
f 0=Q110kHz
2=$ r
~0 H
~ 4 rad/s S.No. Input Frequency Phase Magnitude
=0 Q
1 kHz
H
Q$ =
kHz
0 =
H01$ Q
r
f~=
1 kHz
Vi = 1 - 1 s
s2
dz~0 Q
r$H
f
kHz
1
0$ Q
H
=
0Q
1
4
V
$
=
p
kHz
10
1
V
H
2
=
03
+ 0 b +4~
2Q
-kHz
2Q ~ = ~0
Q0 Q + ~02 l
V
p 0 = 10 kHz d~
=
f
10
H
10
=
0~
=
Q
1
kHz
~
1
~
4
V
$
2
=
0
=
p
V
H
Q
$
$
r
p
f
kHz
10
0
kHz
1
1
=
Design ~
a0 Band Pass and a Band Stop filter. For the BPF, assume
Vi
f==
10 kHzand
1
kHz
~0 = 100 ~
2
- 4sQ 2 +dsz 2 l
0
Q~
=
b11+
$p Q
r 4$ H$ V
2Q rt i 0.1 sin _200rt i
-_100
4
=
2 $ .r $ 10~4 rad
/sV0 10
= 10
p y_ t i
~0 Q ~0 b H0 $ s 2 l
kHz
~402=
Q
= 01.~
For
the BSF, assume
and
=41sin
+
rad
/s ~Q0 =
~0 =
$ $Vr10
0
Q
p $ 10
=
~
0
~
d
~
V
$ p~4 0
0
Vs012
10
Vrp $ H0 $ Q
f =Q 1=kHz
dz
H010
$Q
r
Hf0=
$=
r$ H
$ 10
=110
Q$10
kHz
~0 = 10
kHz - 2Q ~0 =~2H0 r
Qrad/s
b H0 $ V~i 02=
l = ~0 s
=
0 $kHz
~
H0 =
s2
2
~
0
0 Q 10
~
d
Vp0 = 2H$0rQ$ 10 4 rad/s
1
V
f
kHz
1
+
+
01
=
b
~
~f0 = 10 kHzV
2l
Vp
=
Q
~
~
0
0
10=_p200
0 = sin
t isin
y0.1
rt i +H0.1
r0 tQi
_100
= _sin
f=
1 kHz
Q = 10
f_=
kHz
10
= sin
Vi ~ = ~0 s
22Q
kHz
~$0r=$ 10
1
s
Q
10
4
_
i
200
t
t
t
100
y
r
r
_
i
i
H
+
kHz
~
1
0
=
~
0
4
rad
s
2
/
~
b1 + ~ Q + ~
H00 = 10
4f $=
Vp 10 kHz
4
~0 = 2 $ r $ 10 rad/s
H $ s
~2 l
radsin
2$r
/s _3200rt i
~0 =_100
y0_$tQi f=
rt$1i10
+ 0.1
f = 10 kHz
f = 1 kHz
4 $ Vp
Q=1
- 2Q 0 V02 s= 00 a- 0 ~0 k
1 1kHz
kHz
~0 =
r$H
Q=sin
=
H
0Q
H_0 t=i =
10
4
V
$
p
~
200
t
sin _100rt i + 0.1 sin _H
y
r
0
i
10
0 =
r $ H0 $ Q
$i k 1
~0 a- H0 V
s
s2
H0 = 10
V=p r
4 $ Vp
f = 10~kHz
V02
~0 b +
Q=
$ H0 $f~
+ ~2l
0 = 10 kHz
kHz
10
Q
1
=
kHz
10
0 =
kHz
~
1
0
=
Q
~
t isin _100rt iV+
y _ t i = sin _100rt i + 0.1 sin _y200
0
0
p 0.1 sin _200rt i
Hs0 Q
2
r_ t$ iHr=
0$ Q
Vi ~0
s
_$ V
t4iprad
sin
rt i +40.1 sin _200rt i
_100
=0 =
/s 10
~01V=p 2 $ rQ$4y10
4 $ VQ
p = 10
b1 + ~0 Q + ~02 l
kHz
~
s2 $ H
10
=
Q4 =
V
~
p
0 = 2 $ r $ 10 rad/s
1
kHz
~
0
H
Q
+
b
l
0
=
0
2
r $ H0 $ Q
$ Q4 rad/s
~0
2r$ $rH$ 010
0 =
H0 ~
10
=(Try
f = 1 kHz
Q = 10
sV204, Q
Steady
State Response
square
wave ~
input
and
=0 1
kHzVf = 1 kHz
0 = 10
$ r $ 10a4 rad
~0 =- 2Apply
V1
H/s0 = 10
p
1 1+kHz
Table 4-2: Frequency Response of a BPF with ~0 =
b
V
s
s2
p
2il $ H=
~0
0 = 10
V04
b1 + ~0 Q + ~02 l
tHioutputs.
t=
100
sin _200rt i
y _10
rf kHz
i +1 0.1
f = 10 kHz
to both BPF and BSF circuits and observe
the
= sinf _=
kHz
4
10
=
Q
=
4
2
H0 = 10
~0 = 2 $ r $ 10 rad/s
10 kHz
y _ t i = sin _100rt i + 0.1~sin
_200
Vi Q = 1 s ~0s =
2 $ rrt$ i10 rad/s
0 =
_ t i = sin
0.1 sin _200rt i
rt10
i +kHz
b1 + ~0 Q + ~02 l 1
4 $ Vp
4 $_100
Vpf =
f=
1iykHz
1
~
0
H0 = 10
Q
10
_
i
200
t
t
t
sin
100
0.1
sin
y
r
r
kHz
_
i
_
10
~
=
=
+
0 =
Hr0 =
2Q 2
r $ H0 $ Q Band Pass output will output the fundamental frequency
$ H10
0 $ Qof the
1
4 $ Vp
f
kHz
10
=
1
~
0
H
f 0=Q1 kHz
t i + 0.1wave
sin _200
Q = 210
y _ t i =Vpsin _100r
rt i
V_pt i = rsin
square
multiplied
by the gain at the centre y
frequency.
Q2
$ H_100
$ Qrt i + 0.1 sin _200rt i
0The
1 kHz
4
H
Q
f-= 10
f
kHz
~0 = 2 $ ramplitude
$ 10 4 rad/s at this frequency is given by 4 $ Vp , where
1
0
=
1
therad/s
~0 = 2V$p ris$ 10
4Q 2
r $ H0 $ Q
Band Pass
Band
Stop
H0 = 10 peak amplitude of the input square wave. Vp
kHz
1 -f =110
~0 = 2 $ r $ 10 4 rad/s
H0 = 10
dz 4 $ Vp
4Q 2
S.No. Input Frequency Phase Magnitude
Phase
Magnitude
~ r $ H0 $ Q
d
4
4
V
$
p
y _ t i = sin _100rt i + 0.1 sin _200rt i
H
10
0
=
dz
~0 = 2 $ r $ 10
i =/ssin _100rt i + 0.1 sin _200rt i
y _ trad
Vp
H
$
r
0 $ Q ~ = ~0
The Band Stop filters output will carry all the harmonics of the
d~
y _ t i = sin _100r1t i + 0.1 sin _200rt i
H0 = 10
4
square wave, other than fundamental. This illustrates the application
Q0 = 2 $ r $ 10 rad/s
~=V
~p0
- 2~
y _ t i = sin _100rt i + 0.1 sin _200rt i
~0H40 rad
/s
= 10
of BSF as a distortion analyzer.
- 2Q~0 = 2 $ r $ 10
2
~
0
~0 H0 = 10
y _ t i = sin _100rt i + 0.1 si
H0 Q
~0
2 Frequency Response - Apply the sine wave input and obtain the magnitude
y _ t i = sin _100rt i + 0.1 sin _200rt i
3
and the phase response.
~0 = 1 kHz
H0 Q
experiment 4
4.2 Specification
~0 = 1 kHz
Q=1
Q=1
~0 = 10 kHz
Q = 10
f = 1 kHz
f = 10 kHz
f = 1 kHz
page 33
f = 10 kHz
4 $ Vp
H0 Q
experiment 4
~0
~0 = 1 kHz
~0 = 1 kHz
Q=1
H0 Q
Q=1
~0 = 10 kHz
~0 = 1 kHz
~0 = 10 kHz
Q = 10
Q=1
Q = 10
f = 1 kHz
~0 = 10 kHz
f = 1 kHz
f = 10 kHz
Q = 10
Higher
order filters are normally
f = 10 kHz
4 $ Vp designed by cascading second order filters
f = 1 kHz
$ Q Design a third order Butterworth Lowpass
r $ H0filter.
and,
ifp needed, one first- order
4$V
f=
kHz
V
p
Q
$ H10
$
r
Filter
using
FilterPro
and
obtain
the frequency response as well as the
0
4
Vp 4 $ Vp response of the ~
rad/s
$ r $ 10
0 = 2The
transient
filter.
specifications
are bandwidth of the filter
r $ H0 $ Q
~0 = 2 $ r $ 10 4 rad/s and H0 = 10.
Vp
H0 = 10
y _ t i = sin _100rt i + 0.1 sin _200rt i
~0 = 2 $ r $ 10 4 rad/s
Design
a
notch
filter
(band-stop
_
i
t
t
sin
100
0.1
sin
y
r i+
_
_200rt i filter) to eliminate the 50Hz power
=
H0 = frequency.
10
life
In order to test this circuit, synthesize a waveform
y _ t i = sin _100rt i + 0.1 sin _200rt i Volts and use it as the input to the filter.
What output did you obtain?
Related Circuits
The circuit described in Figure 4.1 is a universal active filter circuit. While
this circuit can be built with OP-Amps, a specialized IC called UAF42 from
Texas Instruments provides the functionality of the Universal Active Filter.
We encourage you to use this circuit and understand its function.
Datasheet of UAF42 is available from http://www.ti.com.
Also refer to the application notes [7], [11], and [12].
Notes on Experiment 4:
page 34
Chapter 5
Experiment 5
Design of a self-tuned filter
page 35
Vyy
l
V = V V cos z
2V
V
yyr # Vx
RC
V
Vrr # VxxRCK # V #KV +=pdV
V =RC
V + KV#=V V+ K+#KV #+VK+#KV ## VV +
V
rry #
V#+xxrVr Vp=+Vp + K # dVz+ K # V + K # V # V + p
#VV
V
V
#
V
V
K
V
K
V
K
p
#
#
#
=
+
+
+
V
V
#
y
p
K
y
r
p
p
V through the low-pass
V
V
#
yyr #
rr
V
c
z
= 90
V
V
After
passing
filter,
the
high
frequency
component gets
Goal of the experiment
Vrr
V
V only the average value
V V out and
filtered
of output V remains.
V
RC
r = VV
Vyy ~V
Vr
#V
V
V #V
V0r0 =
Vxxx #
V #VV
The goal of this experiment is to learn the concept of tuning a filter. The idea
y V rr K
V = V 0+ K # V
K
#
+
+ #V #V +p
V #V
is to adjust the RC time constants of the filter so that in phase response of
V
V
V #VV# V V # V
0
xxp #
yy V
rr
=
l
V
V
V
pV
V
V
V
V
#
0
=
~
= V $ RC
(5.3)
p
pp V
V
#pplV cos z
0 = VV
V
V
#
a lowpass filter, the output phase w.r.t. input is exactly 90 at the incoming
V
V
V
00 = 2Vr cos z
V
~
d~
1
V
frequency. This principle is utilized in distortion analyzers and spectrum
V2Vpp Vrrppll cos
= V RC = V
V =VV # V VV = V # V V
V
0
dVz
V
cos
z
dV
0 =
=
av
V
V
analyzers, such self tuned filters are used to lock on to the fundamental
K pd =
2VdV
V=rravavV # VdzV
=2
V = Vl # V V V V l
V = V V cosVz = 2V cosVz# V K pd
(5.4)
zavV V ldV
d
pd
frequency and harmonics of the input.
2V V V l
dV
d=z
VdV
cos z
av
V =
cos z dV V # V K
pd
=
2
V
z
z
d
d
K
dV
pd
=
~
d
2
V
K =
K =
dz
K pdpdpd Kd
z= dV dV = d~ $ dV
dz
dz
V
K = dV K
K is called
+ H in Volts/radians.
dzthe sensitivity of the
K
detector
c dzVVand= is measured
90
zVpdpdphase
=V 90
K
V =Vz
#
Kc
s
s
5.1 Brief theory and motivation
=
c
K
90
z
=
z = 90c
b1 + ~ Q + ~ l
l
V
V
c
c= is90used
zc
z
=
Vavavcos
This
to tune the~voltage controlled
For
90
= z90
V z = 90c , V becomes V0.=
2z
Vinformation
V
av
b~ Q
l
V
In order to design self-tuned filters and
filter
(VCF)
automatically.
The
voltage-controlled
filter,
along with
phase
detector, is
~
~ V
z = tan
V
av
K = dV
~
0
V
av
~
~
other analog systems in subsequent
called
a
self-tuned
filter.
See
Figure
5.2.
of
the
VCF
is
given
by
z 00
d~
~
d1 - b ~ ln
~ = V K
~ = V
V $ RC
experiments, we need to introduce
V
V $ RCV
~
0
VccV $ RCdz
~ =
0
~ ~
d~~
1
V
one more building block, the Analog
c~0 =
d~ ~ = 1V $ RC
c
= - 2Q ~
= V RCz==V90~
=
=
0
=
$
V
RC
r
dV
0
d~$VRC
1d~ ~
dV d~ V RC 1 V ~
multiplier. The reader will benefit
V
=
rr Vcc=
V
=
=
V
dV 1 V RC
dz
dz ~
~
0
dz dV
V
V RC
~
~
d~
0 =
=
0 V $ RC
- 20Q V
from viewing the recorded lecture at
Therefore,
~
dV
drrz$ RC
dV== ~
d
1
00 =
V
dV dz
Figure 5.1: Analog Multiplier
Vcc000
dV
RC PRO, we have used to
[21]. In ASLK
c =dVVr RCV =
dz
dz d~
= 0~
dz dV dz d~
~
d
1
V
V
0
V
RC
dV
r
c
$
=
c
~
~
d
1
c0
~ =
$ dV
=
=
dz r dz1 kHz
MPY634
analog
Texas
d~ 0
V = V multiplier
V +K #V #V +p
$ RC
+ K # V from
+K #
RC
dV =
dV d~ d~ dV V d
dzd~ dz
=
=
z
RC
$
=
V
V
RC
dV
c
r
c
$
z
ddV
dVVr RC
d~ dV Vc
+dH
~
~
1 c
Instruments.
the symbol of an analog multiplier.
V dV = d+
~VH dV
V = V +p
K Refer
V +to
K Figure
K # which
V # V shows
p
# RC
# V + 5.1,
+ RC
Q +H
V = V + K # VV =
p =s V
+ K # V s+VK=#sV # V s+
dV
c = V
RC
RC
dV
z
d
V b1 +
H
1
+
lzcc
b +
=
d
+~
l ~ dQz+ ~dV
=
V V = V + K # V +RC
p
V
K # V V+ =
K V# V +
V+
#K
V s
$sQ $+
~
Q
V + K # V + Kp# V # V + p
#p
s VCFsis
+H
zc
zb1Now
dz
dz
The V
sensitivity
of
~
d~~
+ ~ ldV~ radians/sec/Volts.
b1 + ~
dV
Q0 ~ l
d
d
~
dV
(5.1)
V
V
K
V
K
V
K
V
V
p
V
Q
c
#
#
#
#
0
offset
x
x
y
y
0
x
y
=
+
+
+
+
V
d
$
p
0
=
b~ Ql
RC
V = V p+ K # V + K # V + K # V # V + p
0
b~ Ql
~
dV
dd
0 $ dV
c~ l
zzcd=
dz
dd
~
~ d
z =b tan
z
b~
z = tan
~
d
V
0 Q
~
dV
dV
l
z
z
d
d
c$c
00 d
cc0
=
V =VV# V+ K # V + K # V +
K # VV# V + p
V
p
~
~
~~ Q
dV
dn~ dV
p
z = tan$$ + H0
=
d1 - b ~ ln d1 - b ~ ldV
z = tan
V00 cc+=
~
V # V p isV a#non-linear
V
term in V and V . For a precision multiplier, V # V and
where
V
H d
~
V
~00 +dV
dV
d~
dV
=
-cc00b ~ ln 2
d1H
0
dd1z- b ~ ln V = Vi =
s
s 22
s
s
d
z
VxV V #isVthe referenceV voltageV #ofVthe multiplier. Hence, forV precision
V # V , Vwhere
#V
2Q ~ b1V
+00ii ~ Q +
0
sH
+l ~+
= - 2Q ~
V
b11d~z+
V
H
0+ s 2 l
+
d~ = d
~
=
d
z
+
b
Q
~
0
Q
~
2
amplifiers,
.
-s
= ~ =~
#V V
V
V V = VV #
V
V #V V #V
V
s 2200022 l
~
00 Q
V
dz d~ = - 2dQz ~
ii b ~ d
s
s
V
y
l
Q
V
2
1
=
+
+
b
- 2Q VdV
1dz+ ~20QQV~+r ~022 ll
~bQ
V = V #VV#VV = VV V l cos z
V = V # V V dV =
V #V V
dz
z = tan
~0bQ~rr ~
2
V
Q
V
In Experiment
4, if we replace the integrator with a multiplier followed by integrator,
= - 2V = 0
~
dV = l#
VVV
V xdV
b~
~~00 Q
Q ll 0
= V #V V
Vz V
r #
V = V #V V
V V l cos z V =dV0
V
d1 - b ~ l-n1
V = Vthe
cos
V
r
=
0
V
then
circuit
becomes
a
Voltage
Controlled
Filter
(or
a
Voltage
Controlled
Phase
z = tan=--11 b ~0 r l2
2V K =
V = 0 1 kHz
2V
1 kHz
d=zV V l cos z
V
V = V #VV self-tuned
VV V l
b~
dz z = tan
~rlr22
Generator).
ThisV
The
Q
= 2V cos zfilter. See Figure 5.2.dV
1 kHz
V
rforms
1
~00 ~
Q
2V the basic circuit for
K = dVVyK#
- 2Q ~tan
Q
K =
- 1 d1 - b
Q 1 kHz
z
d~ = z
=
Vz =
l
# V V dV filter for a square-wave
V
V
1
tan
z
d
d
=
outputdof
theV self-tuned
input,
including
the
control
voltage
~r0r220 llnn
b~
V =
cos zdV
Q
K
Q
=
H
Q
V
$
$
2
V
c
K
90
z
d
z
=
K
=
~r0 ln
H $Q$V
~
V l cos zin
dzFigure 5.3. The figure brings
r isV shown
waveform,
12Q V H $ Q $ d
dz out the aspect ofKautomatic
VV=
- bb ~
dV1
ln
dV = - dz
H $Q$V
2VK
0
K = dVK
z
= 90candVself-tuning.
~
c
90
z
control
=
dz
V = 0 dz = - 2Q ~0 0
dV
V
V
V
V
x # y
r
= - 2Q ~0
K 0=
dd~
~
~= z =
V
V
K
z = 90c
z
dz 90c
z000 = - 2Q ~00
1 kHz dd
V
~
~
z00 = - 2Q ~0
z = 90cV Detector
~ =VVp Vpl
Q
5.1.1KVVMultiplier
asza Phase
dd~
~
V $ RC cos
z
= - 2Q Vc
0 =c ~
90
z
~
V
=
~ =
dV
c = - 2Q Vcc
H $ Q $ VdV
~ = V
d
z
V $ RCd~ =2V1r = ~
V $ RC
dzcc = - 2Q Vc
RCV V
V 1 dV ~ V
V
~
= Vav5.1,
d~the circuit
~ =
V
=0- 2Q Vc
dV
av =
~
d~
1
In
of Figure
the output of the
multiplier
is
$
RC
=
=
dV
z
d
c
$
V
RC
=
=
VdV
av
V~K
RCpd =V
dV
av c= 0
V
V
V
RC
dV
~
~
d
1
~
=
dV
~
~
1
d=zV RC = V
V $dRC
dz
VavavkHz
=
dz
dVpdz
VV
0
=0
Vp$ld$~ cos z d~ cos
dV = V RC = V
~V=dz =
(5.2)
11VFilter
kHz
~
1
dV
~
t
z
_
i
dV
B
+
Figure
5.2:
A
Self-Tuned
based on a Voltage Controlled Filter
K0pddV=V $ dRC
zd~ dV8
=
=
z
d
V
V
RC
dV
2
V
r
dz
ddz~ d~ dV
11QControlled
kHz
dz
dz d~
kHz Phase Generator
or Voltage
dV
$ V= 1 =+~H
= d~ $ dV
dz
Q
dV = d~
dV=V90
V
RC
dV
dV
c
z
z
d
d
z
=
V
~
d
z
z
d
d
s
s
~
d
dV
$
= d~ +
b1 +
V
$
=
dz + H dV
Q
V
+H
H00 $$ Q
Q $$ V
Vii Analog System Lab Kit PRO
~ Q dV
~ l
Q
=
page
z d~d~ dV
dz
ddV
V = 36dV s
H
s
V
s
s
0
i
+
$
V
H
l
b1 +V~
~
=
+
av
1
V
H
+
+
+
l
b
Q
~
dV
d~ =dV
~Q ~
dz
dz
H
V =d~ b ~ Q
sl
s
V
s
s
H0 $$ Q
Q $$ V
Vi
p
x offset y
offset
experiment 5
x 0
offset
xy
x 0
yx
yy
x
r
y
0
x
r
av
pd
av
offsetx
offset
yx
offset
xx
2x
yr
0r
yx
r
0x
rp
yr
2
r
0
r y
py
av
0c
0
i
c r
c 2
0
i
2
0
-1
2
0
2
c0
0
0
i
2
0
U1U2
R4
U3
U4
R6
R9
VF2
R10
R3
c
VF3
C3
U5
VG1
00
U1U2
R7
R11
R5
Uav
2
R8
r0
VF1
av
av
av
r
0
R2
i
av
av
2
rc
C1
pd
-1
U1
pd
R1
0
pd
2
0
U1U2
av
pd
pd
C2
av
r pd
pd
av0
av
pd
2
r
av
-1
av
av
av
pd
av
av
rp
pd
pd
pd
x
r
av
av
pd
pd
2
0
2
r
c
0
c0
2
0
0c
-1
av
2
r 0
2
0
2
0
00
yx
0
i
0
0 0
i 0
av
-1
r
0
cc
2
r
-1
pd
c c
-1
x
offset x
2
0
0
x
i
0 r
av
av
0 0
av
pd
offset
pd
pd
av
av
av
offset
pd
pd
pd
pd
av
y
x
r0
pd
pd
offset
av
av
y
pd
offset
offset
RC
V3
Vr # Vx
V
zK= 90c
Vy # Vr
c
90
z
~
V =
Vy # Vr
Vr # Vx
~V
~ = V
V $ RC
Vr
~
V
= V $ RC=
~
d~
1
Input~voltage
V0y =
# Vrx # Vy Vr
V
dV = V RC = V
~
=
V0 = Vx # Vy Vr
~
~
d
1
S.No.
Input Frequency
= V $ RC = VOutput Amplitude
dz
Vr Vp Vpl
dV
~
d~ V RC
1
V0 = Vp Vpl cos z
dV
= V RC = V
z
d
1
dV
V
V00 =
z
dz
dz d~
V
dV
#rr Vcos
y Vr
= V2
$
dz
2xdV
V
dV = d~ dV
av
z
ddV
dz d~
K pd =VpdV
2
$
=
V
+H
dV
dz d~
dz dV
K0pd== dVzpavl cos z
V =
s
s
V
$ dH~
=
1
+
V
b
+
dV
d~ dV
z
d
2
V
r
~ Q+~ l
=
3
VV
K pd
s H s
+~ l
b1 + ~ +
~
Q
dV
K
b~ Ql
av RC
pd
V =
s
s
K
1
+
+
pd =
l
b
~ ~
z = tan
~b Q
z = 90dcz V = V + K # V + K # V + K # V # V + p 4
~
~~
Ql
d1 - b ~ ln
z = 90c
RC
z = tan
b ~~Q l
p
Kavpd
V
tan d1 - bwith
z =amplitude
V = V +K #V +K #V +K #V #V +p
dz
Table 5.1: Variation of output
~~lninput frequency
Vav
2Q ~
V
1
d
n
l
b
d
~ =dz
~
z
~0= 90c V p
2Q ~
=
dz
d~
~0
dz
2Q V
V
dV = = - 2Q ~
V
V
#
d
z
d
~
V
V
av
c
V
Q
V
2
5.2
Specification
=V =0
~0 = Vc V # V
dV
dz
V
r $ RC V # V
2Q V
=
~
0
=
1
kHz
0
V
=
dV
0
Figure 5.3: Output~
Self-Tuned
based on simulation
Vr $ RC
dof~the
1V VFilter
0
# V~0
0
=
Q
and
design
a
highBand pass filter
Assume that the input frequency is 1 V
kHz
V ==
V #~
V 0V
~c0 = VVrc1RC
ddV
V
c
whose
centre
frequency
gets
tuned
to
.
V=
H $Q$V
Q1 kHz
~
0 ==
l c
RC
V =V V=VVV
cos z
HQ$ Q $ V
zc Vr V$ rRC
ddV
2V # V V
zc 0
d~
1K V==dVV~V0l cos z
H $Q$V
dV
=
=
dz2VV
5.3
Measurements
to be taken
dV
c
r RC
K d
zcc then
ddV
dVz
If we consider the low-pass output,
0 dV
K~=
dzc = dd~
z0z$ =ddV
90cc0 dz
dV
$ K~
=
5.3.1 Transient response
dVc d~0V dV
c
V
0
+
zH
=090c
dV0iz= dz ~+dsV~
V
H s2
Apply a square wave input and observe the amplitude of the Band Pass output for
$ s 0+
V s 22 l
Vi c==b1d+
~
dV
dV
0~
c
~ 0=
Q
~
~
0
fundamental and its harmonics.
$ RC 2 l
b1 + ~0 QV +
~
0
~
d~
1
V0
H
0 r V
+~==~
= V
RC
2
$ RC
Vi = - 1 ddVzsbbd~~~V0 VQ
r l
s
1 2l ~
l
1
+
+
b
= V
z = tan - 1 ~
~0=QV~
5.4 What should you submit
Q
0 dV
0
2RC
~
z = tan dV
r
z
d
z
z
d
d
2
d~
d1 b~
r $ ln
=~
db~~r0ldV
ddV1bdV
~0 Q
~d+z0 Hlnd~
dz
1 Simulate the circuits and obtain the transient response of the system.
-1 V =
zdz
= tan V dV = d~s2 $ dV s
l
b10+~r +
~
z0 = - 2dQ1 Vdd~
then
2Q V~=b0 ~~0 Ql~+ns H~ s
2 Take the plots of transient response from oscilloscope and compare it with
=
dd~
0
1 +b ~ Q l+
l
b
simulation results.
z
~
z =Vtan
Q
2
d
z
c
=
dzc
~~
d1 - bb~
dV
=--22QQ zV~
c 0
=
~ lQn l
3 Measure the output amplitude of the fundamental (Band Pass output) at
d
~
tan
=
0
dV
c
~
Vav = 0
dz
varying input frequency at fixed input amplitude.
d1 - b ~ ln
2Q ~
Vdavz= 0
d~ = = - 2Qdz Vdzc
1dV
kHz
Hence, sensitivity of VCF(KVCF)
Output amplitude should remain constant for varying input frequency within
=
cis equal to
2Q- 2VQ. ~
1 kHz
dV d=~the lock range of the system.
V
V =
dz0
Qav = 0
Q
V
2
=
For varying input frequencyQ
the output phasedV
will always lock to the input phase
1 kHz
with 90 phase difference between
1HkHz
$ VitwoQif V = 0.
0 $ Q the
H0 $ Q $ Vi
1 kHz
H $Q$V
Q
Q
pd
av
av
0av
0
0
offset
-1
2
0
2
r
2
0 r
-1
2
0
2
0 2
-1
offset
0c
0 2
r
av
av
avp
pd
av
pd
av
pd
pd
av
av
r r
2
0 0
2
0
00
-1
2
r r
00
-1
2
r
av
av
H0 $ Q $ Vi
page 37
H0 $ Q $ Vi
experiment 5
~2
d1 - b ~r ln
experiment 5
dz
2Q ~0
d~0 = dz
2Q Vc
dVc = Vav = 0
kHzself-tuned filter you designed. The lock range
Determine the lock range of1the
Related Circuits
Texas Instruments also manufactures the following related ICs - Voltagecontrolled amplifiers (e.g. VCA820) and multiplying DAC (e.g. DAC7821).
Refer to http://www.ti.com for application notes.
Notes on Experiment 5:
page 38
Chapter 6
Experiment 6
Design a function generator and convert it to
Voltage-Controlled Oscillator/FM Generator
page 39
experiment 6
f = _1 4RC i $ _ R2 R1i
1kHz
1
! Vss
_R R i
4RC # 2 1
Vc
f = _1 4RC i $ _ R2 R1i
Sensitivity of the VCO is the important parameter and is given as KVCO , where it is
Vc $ R2
given as
df
! Vss f l =
dVc
4
RC
V
$
$
r $ R1
To understand a classic mixed mode circuit that uses two-bit A to D Converter
f = _1 4RC i $ _ R2 R1i
1V
along with an analog integrator block. The architecture of the circuit is similar
df l
f
R2
Vc $ R2
(6.1)
l
1kHz
f
=
K
Hz
Volts
VCO =
to that of a sigma delta converter.
4 $ RC
$ Vr $ R1dVc = 4RC $ Vr V1 = Vc
10kHz
df l
f
R
KVCO =
Hz Volts
=_4RC $2V V = Vc
1 4RC
fdV=
R1i
r 1 i $ _ R2
c
where f = _1 4RC i $ _ R2 R1i
1kHz 1kHz
VCO is an1important analog circuit as it is used in FSK/FM generation and constitutes
_ R1
2 R1i
4RC # part
_ RMODEM.
2 R1i As a VCO, it can be used in Phase Locked Loop
the modulator
of#the
4
RC
The feedback loop is made up of a two-bit A/D converter (at ! Vss levels), also
(PLL). ItVcis a basic building block forming sigma delta converter. It can also be used
Vc
KVCO oscillator
for a Class D amplifier.
called Schmitt trigger, and an integrator. The circuit is also known
function
_1 a4RC
i $ _ R2 R1i as reference
f = as
df
generator and is shown in Figure 6.1. The output of the function generator
is
Vc $ R2
fl =
dVc KVCO
4 $ RC $ Vr $ R1
shown in Figure 6.2.
1
df l
f V
R
KVCO =
= 4RC $2V V = Vc Hz Volts
df
dV
c
1kHz
The function generator produces a square wave at the Schmitt Trigger output
and r 1
f = _1 4RC i $ _ R2 R1i
! Vss
10kHz dVc
a triangular
wave at the integrator output with the frequency of oscillation
equal
1
kHz
1V
to f = _1 4RC i $ _ R2 R1i . The function generator circuit can be converted as a linear
1
VCOf lby using
the
multiplier
integrator
combination
as
shown
in
Figure
6.3.
V $R
_R R i
= 4 $ RCc $ V2 $ R
4RC # 2 1
1kHz
r
1
V
c
df l
f
R2
KVCO =
Hz Volts
10kHz
dVc = 4RC $ Vr V1 = Vc
KVCO
f = _1 4RC i $ _ R2 R1i
df
VG
dVc
1kHz
1V
1
C
_R R i
4RC # 2 1
1kHz
Vc
10kHz
R
KVCO
U
1U2
VF1
10
df
VF2
dVc
Figure 6.2: Function Generator Output
R1
U1 R2
1V
U2
1kHz
10kHz
6.2 Specifications
! Vss
f = _1 4RC i $ _ R2 R1i
Vc $ R2
fl =
4 $ RC $ Vr $ R1
df l
f
R2
KVCO =
Hz Volts
=
=
dVc 4RC $ Vr V1 Vc
page 40
Design of a function generator which can generate square and triangular wave for
a frequency of 1 kHz.
! Vss
f = _1 4RC i $ _ R2 R1i
Vc $ R2
fl =
4 $ RC $ Vr $ R1
df l
f
R2
K =
Hz Volts
Determine the frequency ofVCOoscillations
Vc triangular wave. Frequency of
RCsquare
$ Vr V1 =and
dVc = 4of
= _1 4RC i $ _ R2 R1i . Convert the function generator into a
oscillation should be equalfto
1kHz
Voltage Controlled Oscillator
(VCO) or FM/FSK generator also called mod of modem.
1
_R R i
4RC # 2 1
Analog System Lab Kit PRO
Vc
KVCO
experiment 6
Notes on Experiment 6:
Simulate the circuits and obtain the Transient response of the system.
C
R2
R1
VC
R1
! Vss
2
3
f = _1 4RC i $ _ R2 R1i
Vc $ R2
fl =
4 $ RC $ Vr $ R1
df l
f
R2
K
Hz Oscillator
Volts
VCO = 6.3:
Figure
(VCO)
4RC $ Vr V1 = Vc
dVc =Voltage-Controlled
f = _1 4RC i $ _ R2 R1i
1
kHzof time response from oscilloscope and compare it with
Take the plots
1
simulation results.
_R R i
4RC # 2 1
Vc
Vary the control voltage of the VCO and see the effect on the frequency of
KVCO
the output waveform
also measure the sensitivity (KVCO) of the VCO which is
nothing but df . Use Table 6.1 to note your readings.
dVc
1V
1kHz
S.No.
Control Voltage (Vc)
Change in Frequency
10kHz
1
2
3
4
Table 6.1: Change in frequency as a function of Control Voltage
page 41
experiment 6
Notes on Experiment 6:
page 42
Chapter 7
Experiment 7
Design of a Phase Lock Loop (PLL)
page 43
Vc
Vc
V
dVc
~=
d~
dVc
~ = Vc c
4Vr $ RC
4Vr $ RC
4
$ RC
V
V
dV
c
rV$r RC
c
V
~=
d
V
~
c
~
= 4V $ cRC
d~
Vc
4Vr $ RC=
Vc
~c
~ dV
r
=
dVc Vr $ RC
dVc = Vr $ RC
dVc Vr $ RC
d~
Vc
d~
Vc
KVCO
Vc
Vc Vc
~
Vc ~ Vc
~ =
dVc = V~r $ RC
~=
dVc = Vr $ RC
4Vr $ RC
~0Q
~ Vc KVCO = ~ Vc
KVCO = no
~ Vc
c
Vc system oscillates~atVthe
VCO = ~ the
When
voltage is applied to the K
system,
free
d~
Vinput
c
=
V
~
CQ
Q
0
K
VCO = ~ Vc
~
0Qc
V
RC
$
dV
K
r
VCO
c
= ~ Vof
~
Q
0
with corresponding control voltage
running frequency of the VCO, given by
~CQ Vc
V
V
0
CQ
~
K
Q
0
VCO
V
~
Q
0
. If the input is applied to the system Vwith
the same frequency as
, the PLL
CQ
K0VCO continue
= ~ Vc to run
Vi V
V0 free running
VCQ at the
d~frequency
will
and the phase difference
V
VCQ between
0
dVc Vref is 0 (already explained in Experiment 5
~i 0Q two signals V0 and Vi as 90 since
the
V
V0
Vi Vc
~
= 4signal
of
Chapter
6).
As
the
frequency
of
input
will
Vref
CQ
r is changed, the control Vvoltage
Vref
Vi
V
RC
$
V
r
i
KV
# 2 # A0 # KVCO
pdref
change
correspondingly,
so
as
to
lock
the
output
frequency
to
the
input
frequency.
d~
Vc
V0
Vref
r
Vref
= V $ RC
K pd # r # A0 #
K pd a# result,
A there
KVCO is a change
dVKc VCO
K pdr # r # Abetween
0 # KVCO
As
difference
the two signals away
2 of phase
2 # 0#
Vi
2
r
r
K pd #of input
A KVCO ~ Vc for which output frequenciesKgets
A K
pd # locked
from 90. The range
2 # 0 #frequencies
2 # 0 # VCO
Vref
KVCO
Vc
~ system.
to the input is called the lock range
of=the
The lock range is defined as
K pd # r # A0 # KVCO on either side of ~0Q .
2
VCQ
V0
7.2 Specifications
Vi
V
ref
VI
Input Frequency r
ref K pd # 2
W(Input)
K pd #
V1
+
VF2
VF2
V1
R2
R2
+
U2
U2
R3
R3
VF1
10.00
K pd # r # A0 # KVCO
2
KVCO
# A0 #Vref=0
5.00
A K
2 # 0 # VCO
Output
experiment 7
~
=
KVCO
0.00
-5.00
-10.00
0.00
20.00m
10.00m
30.00m
Time (s)
Figure 7.2: Sample output waveform for the Phase Locked Loop (PLL) Experiment
VF1
Measure the lock range of the system and measure the change in the phase of
the output signal as input frequency is varied within the lock range.
Vary the input frequency and obtain the change in the control voltage and plot
the output. A sample output characteristic of the PLL is shown in Figure 7.2.
Measure the change in the phase of the output signal as input frequency is
varied within the lock range.
Vary the input frequency and obtain the change in the control voltage. Use
Table 7.2 to record your readings.
S.No.
Input Frequency
Notes on Experiment 7:
Output Phase
1
2
3
4
Table 7.2: Control Voltage as a function of Input Frequency
S.No.
Input Frequency
Control Voltage
1
2
3
4
Table 7.1: Output Phase as a function of Input Frequency
page 45
experiment 7
experiment 7
Notes on Experiment 7:
page 46
Chapter 8
Experiment 8
Automatic Gain Control (AGC) Automatic Volume
Control (AVC)
page 47
In the front-end electronics of a system, we may require that the gain of the
amplifier be adjustable, since the amplitude of the input keeps varying. Such
a system can be designed using feedback. This experiment demonstrates
one such system.
Transfer Characteristics - Plot the input versus output characteristics for the AGC/AVC.
Simulate the circuit of Figure 8.1 and obtain the Transfer Characteristic of the
system. Assume that the input comes from a function generator; use a sine
wave input of a single frequency.
Build the circuit shown on Figure 8.1. Plot/print the transfer characteristic
using the oscilloscope and compare it with simulation results.
VI =Vpisint
VC
Vpisint
VR
VC
experiment 8
VCVpi 1
VR
VR
Input Voltage
Output Voltage
1
2
C
Vref=
VOP
2VR
4
Figure 8.1: Automatic Gain Control (AGC)/Automatic Volume Control (AVC)
8.2 Specification
Design AGC/AVC system to maintain the peak amplitude of the sine wave at 2V.
page 48
C1
V2
U1
+
VG1
Notes on Experiment 8:
R4
VF2
experiment 8
R3
VF1
VXVY
10
U2
R1
R2
VXVY
10
V1
page 49
experiment 8
Notes on Experiment 8:
page 50
Chapter 9
Experiment 9
DC-DC Converter
page 51
experiment 9
_1 _1 V-ref VrefVpiVpi
T =
2 2T =
T T
T =T 1= 1f f
Vp
Vav Vav
f
!
V
ss
V
!
V
ss
between
depending upon the value of ref . Hence circuit becomes SMPS system
Vp
where Vav V=av 1 _1 V V i
x
=V-ref V$ refVss$ VVssp .Vp
ref
p
=
f
T
2
x x
The goal of the experiment is to design a high-efficient DC-DC converter using
Vref Vref
T
T
V
T
If we replace LC filter with MOSFET, and apply audio input as ref to the comparator
a general purpose OP-Amp and a comparator and study its characteristics.
T T of the MOSFET amplified audio
x
T = 1 output
f
then
atxoutput
is obtained,
1 this is Class D
x
We also aim to study the characteristics of a DC-DC converter IC, and for
= 2 _1 - Vref Vpi
T
V
av
Power
Amplifier
operation.
this purpose we selected the wide-input non synchronous buck DC/DC
T
! Vss
controller TPS40200 from Texas Instruments. This IC is included in ASLK
T =1 f
PRO as evaluation module.
Vav = - Vref $ Vss Vp
Vav
x
Vref
! Vss
T
x T
Vp Vav = - Vref $ Vss Vp
Design a DC-DC converter which has 10 kHz oscillator whose ftriangular
wave output
x
Vref is connected to
with peak amplitude Vp is fed to a comparator whose otherVrefinput
T
x T
Vref (reference voltage).
1 1 V V
x
T = 2 _ - ref pi
T
The reader will benefit from viewing the recorded lecture at [24]. Also refer to the
application note, Design Considerations for Class-D Audio Power Amplifiers [15].
T =1 f
Vp
Vav
Vp
p
Vp
Function generator
is the basic block for DC-DC converter. VThe
triangular
output
f Vp
! Vss
Vp
f
f
f is fed to the
of the function
Vref f generator with peak amplitude Vp and frequency
Vav = - Vref $ Vss Vp
f
comparator
input is connected to the reference
voltage
Vref.
Vref
Vref
Vref The output
f
1 _1 other
x whose
V
ref
x
V
V
i
ref
p
of this comparator
is the
PWM
(Pulse width modulation)
waveform
cycle
Obtain the time response
system and plot Vref versus T Vref .
T =2 1whose
x
1 _the
x of
1duty
Vref
V_1x -=Vref
V
1
pi Vref Vpi
=
ref Vpi
=
1
_
1
x
T
T
2 T wave
T
2
1 V V
2 and is
is given by
1 1 xV T V
x
T = 2 _ - ref pi , where T is time xperiod
1 _1of triangular
V
V
T
p
ref Vpi T
=
T
T = 2 _ - ref pi
equal to T =T1 f . This duty cycle is directly proportional
T
2 to reference voltage Vref.
T
f
T = 1offTthe
T =1 f
f
T at the output
= 1comparator
If we connect
low-pass filter (LC filter)
Vav Tthe
f
= 1lossless
T =1 f
V
V
ref
as shown !inVFigure
9.1,
it
is
possible
to
get
stable
DC
voltage
Obtain
the
high
efficiency
versus Vav characteristics.
av withV
T =1 f
av
ssVav
Vav
1 1 !VVss V
x
! Vss
! Vss
Vav
Vav =
!VssVref $ Vss Vp
T = 2 _ - ref pi
! Vss
$ VVav = - Vref
Vav = - Vref $ Vss Vp
ss Vref
p $ Vss Vp
! Vss
av =
x Vav = - Vref $ Vss Vp
T
V
Vav = - Vref $ Vss Vp
T ref
x
Vav = - Vref $ Vxss VVrefp x V
V
T =1 f
ref
x Tx Vref
T
T ref
T
x
T
x
Vref
Vav
Vref
x T
x T
x T
T
T
x T
T
x
! Vss
x T
Vav = - Vref $ Vss Vp
9.2 Specifications
Function
Generator
+VSS
Vg
VO
-VSS
L
Vav
C
Vref
x T
RL
Vref
1
2
3
4
VF1
VG1
R3
R1
VF2
U2
1 1 V Vi
x
- ref p
T = 2 _ and
Take the plots of transfer characteristics
time response from oscilloscope
Vp
T
and compare it with simulation results.
f
T =1 f
Plot the average output voltage Vav as a function of reference voltage Vref and
Vp
Vp
obtain the plot; the plot will be linear.
1 1 V V
x
! Vss
f
T = 2 _ - ref pi
f
Vav = - Vref $ Vss Vp
T the
Plot the duty cycle Vref as a function
of reference voltage Vref and obtain
x
Vrefincluded the typical output waveform
1 _1We V
plot, the plot will be xlinear.
have
TV
1 1 VT =V1off
x
T = 29.2- refx Tpi
T = 2 _ - Vrefav pi
the SMPS circuit in Figure
T
T
! Vss
T =1 f
= 1Vp f
S.No.
Reference Voltage
OutputTVoltage
Vav = - Vref $ Vss Vp
Vav
Vav f
x
V
1
! Vss
T ref
! Vss Vref
T
x
Vav = - Vref $ Vss Vp
Vav = x Vref 1$ Vss Vp
_1 - Vref Vpi
=
2
T
2
x
x
V
V
T ref
T ref T
3
x T
x T T =1 f
Vav
4
! Vss
R4
C1
R2
U1
V2
Vav =converter
- Vref $ Vss Vp
Table 9.1: Variation of output voltage with reference voltage in a DC-DC
x
S.No.
Reference Voltage
Vref
Duty Cycle x T
1
2
3
4
Table 9.2: Variation of duty cycle with reference voltage in a DC-DC converter
page 53
experiment 9
experiment 9
Notes on Experiment 9:
page 54
Chapter 10
Experiment 10
Design a Low Dropout (LDO) regulator
page 55
experiment 10
1
2
3
dV
Measure the output impedance of the LDO, which is given by dI 0 . We have shown
0
the sample output of load regulation and line regulation in Figure 10.2.
S.No.
Reference Voltage
Output Voltage
1
2
3
LDO is used to produce regulated voltage for high efficiency low noise applications.
Please view the recorded lectures at [23] for a detailed description of voltage
regulators. In case of DC-DC converter switching takes place (as shown by PWM
waveform) and switching is a source of noise but in LDO no switching takes place
hence it is used as voltage regulator in low noise high efficient systems. As shown
in the circuit below LDO uses PMOS along with OP-Amp so that power dissipation in
OP-Amp is minimal and efficiency is high. The regulated output voltage is given by
V0 = Vref _1 + R2 R1i.
VUN
dV0 V0
V0 = Vref _1 +
R2 R1i the load regulation of the system. Load regulation
Output Characteristics
- Measure
is given by dV0 V0 when Io is varying from minimum to maximum value.
V0 = Vref _1 + R2 R1i
V0
dV
V1i0 the line regulation of the system. Line regulation
1
V
V
_
0
20 R
ref
=
+
Transfer Characteristics
-R
Measure
dV0
V
V
is given by dV
when
is
varying from minimum to maximum value.
dI0 0
0
V0
dV0
V0 = Vref _1 + R2 R1i
dI0 by applying the ripple input voltage and measuring
Measure thedVripple
rejection
0
dV0 V0
dI0 voltage.
the output ripple
V0
V0
dV0
dI0
4
Table 10.1: Variation of Load Regulation with Load Current in an LDO
R
Vref
R2 10k
R2
R1
VF1
R 10k
R6 10k
R2
VO = Vref [1+
]
R1
RL
Z1
R4 10k
+
R5 2k
V1
D1
R3 10k
10.2 Specifications
Generate 3V output when input voltage is varying from 4V to 5V.
page 56
Take the plots of output characteristics, transfer characteristics and ripple rejection
from the Oscilloscope and compare it with simulation results.
Obtain the Load Regulation - Vary the load such that load current varies and obtain
the output voltage, see the point till where output voltage remains constant.
After that output will fall as the load current increases.
Obtain the Ripple Rejection - Apply the input ripple voltage and see the output
ripple voltage, with the input ripple voltage output ripple voltage will rise.
Obtain the Line Regulation - Vary the input voltage and plot the output voltage as
a function of the input voltage. Until the input reaches a certain value, the output
voltage remains constant; after this point, the output voltage will rise as the input
voltage is increased.
Input Voltage
Line Regulation
1
2
3
4
S.No.
1
2
3
4
experiment 10
experiment 10
page 58
Chapter 11
Experiment 11
To study the parameters of an LDO integrated circuit
page 59
The ASLK Pro kit includes an on-board voltage regulator evaluation module
TPS7250. The goal of this experiment is to study the parameters of the
Low Dropout Regulator (LDO) IC TPS7250 from Texas Instruments using
the on-board evaluation module.
The regulator can be enabled/disabled using the ON/OFF jumper JP7. The Enable
pin (EN) must never be left floating. Connecting a shorting jumper wire between pins
1 (GND) and pin 2 (EN) of JP7 enables the regulator. Connecting a jumper wire between
pins 2 (EN) and pin 3 (VIN) disables the regulator. Output voltage is available on screw
terminal CN4, or Vout pin header, and the typical load current is 200mA.
11.2 Specifications
To study the parameters (Line regulation, Load regulation) of LDO TPS7250 using the
on-board evaluation module.
Obtain the Line Regulation: Vary the input voltage (from 5.5V to 11V in steps of
0.5V) and plot the output voltage as the function of the input voltage for a fixed
output load.
Obtain the Load Regulation: Vary the load (within the permissible limits) such that
load current varies and obtain the output voltage for a fixed input voltage. Plot
the output voltage as function of the load current.
HD118
VOUT
R4
4K7
R101
247K
LD4
IC1
1
2
3
4
SENSE
PG
GND
EN
OUT
OUT
IN
IN
GND
C103
10uF
VCC+10
JP6
6
5
IN
C101
1u F
VOUT
HD117
REG IN
VIN
C102
100nF
GND
HD116
ENABLE
VIN
CN3
JP7
OUT
OUT
VOUT 5 V
@250mA
CN4
TPS7250
experiment 11
GND
OFF
ON
Simulate the circuit using a simulator such as PSPICE Capture (version 15.7 or
higher) or Cadence 16.0. The typical characteristics will be of the form as shown
in Figure 11-2(a) and Figure 11-2(b).
Vary the input voltage for constant load and observe the output voltage. Use
Table 11-1 for taking the readings for line regulation.
S.No.
1.8032V
1
2
3
1.8028V
VOUT
4
Table 11.1: Line regulation
1.8024V
3
1.8020V
3.0V
3.5V
4.0V
4.5V
5.0V
5.5V
VIN
Vary the load so that load current varies; observe the output voltage for
constant input voltage. Use Table 11-2 for taking the readings for load
regulation.
S.No.
Output voltage(VOUT)
1.8040V
3
4
VOUT
1.8035V
1.8030V
21.5mA
30.0mA
40.0mA
50.0mA
60.0mA
70.0mA
IOUT
page 61
experiment 11
experiment 11
page 62
Chapter 12
Experiment 12
To study the parameters of a DC-DC Converter using
on-board Evaluation module
page 63
experiment 12
Pchannel Power FET and Schottky diode to produce a low cost buck converter. The
regulated output of the EVM is resistance-selected and can be adjusted within the
limited range by making the changes in the feedback loop, as shown below.
Vout = Vref
b
Vref = 0.7V
R209
V =V b =
b
R209 + R207
V = 0.7V
Vout = Vin $ duty cycle
R
The feedback factor b =
can
be
by changing feedback resistance R209 to
R +changed
R
TP
205
adjust the output. ButVin =
ASLK
PRO,
we
do
V $ duty cycle not have the provision of changing R209.
We can therefore achieve
this
task by connecting an external resistance of suitable
TP
TP207 the ground.
value between the terminals TP8 and
TP
1MX
1MX
R
R209
TP
TP208
J
TP
J201
TP
TP203
R
C
TP204
R201
C213
ref
out
ref
The TPS40200 evaluation module included on ASLK PRO. Kit uses the TPS40200
non synchronous buck converter to provide a resistor-selected, 3.3V or 5V output that
delivers up to 2.5A from up to 16V input bus. See Figure 12-1 for a schematic diagram
of the EVM. The evaluation module operates from a single supply and uses the single
209
209
out
207
in
205
207
209
201
JP9
VIN
203
TP2
TP3
HD121
R201
100K
C203
220nF
RC
SS
COMP 3
R210
1M
C214
470nF
U4
RC
SS
COMP
FB
VDD
ISNS
DRV
GND
C205
R202
0.03
R203
204
201
1K
470pF
ISNS
DRV
R204
GATE
213
0E
Q101
FDC5614P
C208
100nF
TP4
HD126
DRAIN
C213
470pF
C204
220nF
R 205
100K
L201
TP6
HD124
FB
C206
4.7nF
TP8
HD123
JP8
3.3V
5V
R211
41K2
D201
MBRS340
VOUT
C202
68pF
R 206
25.5E
VOUT
CN6
33uH
C207
33pF
HD143
TP5
HD128
TP7
HD127
C209
330uF
C210
330uF
C211
10uF
C212
10uF
R3
4K7
VOUT
LD3
TP9
HD125
R207
R208
100K
49.9
R209
27K4
VOUT 3.3V or 5V
@ 0.125 2.5A
C201
220uF
HD120
DC/DC IN
VIN
208
SRC
Vin
TP1
HD122
1
2
5
6
CN5
VCC+10
TPS40200
VIN 6 15V
HD142
The unregulated input is connected at screw terminal CN5. Output load is connected
to screw terminal at CN6.The switching
Vout = Vref waveform can be observed at the terminal
TP4.The evaluation module has a switching
frequency of 200 kHz. This frequency
b
is decided by the combination of R201 and C213. The duty cycle of thisVwaveform
Vref = 0.7V
Vout = ref
varies linearly with the input voltage for a constant output voltage, bas shown
Vref = 0.7V
below.
R209
b=
R209 + R207
Vout = Vin $ duty cycle
TP205
Simulate the configured circuit using a simulator. The typical waveforms will
be of the form shown in Figure 12.2.
R209
R209 + R207
Vout = Vin $ duty cycle
12.2 Specifications
12.3
b=
TP205
TP207
The output ripple voltage can be measured across terminals TP5 and
TP7 by simply
M
X impedance,
1
placing the oscilloscope probes.
The
oscilloscope
must
be
set
for
TP207
AC coupling. The same terminals can be used for the measurement Rof209the regulated
1MX
output DC voltage using a voltmeter.
TP208
J201
R209
TP203
TP208
TP204
R201
J201
C213
In this experiment, we wish to study the line and load regulation for
the TPS40200
203
integrated circuit when it isTP
configured
to generate a 5V DC output.
TP204
R201
Measurements
C213
1.00
TP3
0.00
20.00
TP4
-10.00
10.00
Vin
10.00
5.01
Vout
4.98
10.00m
to be taken
Obtain the Load Regulation: Vary the load (within the permissible limits) such
that load current varies and obtain the output voltage for constant input
voltage. Plot the output voltage as a function of the load current.
10.05m
10.07m
10.10m
10.02m
Vary the input voltage for a regulated output voltage of 5V and observe the
change in the duty cycle of the PWM waveform. Use Table 12.1 to record the
readings. Compare the readings with simulation results and plot the graph
between the input voltage and duty cycle. Is the plot linear?
page 65
experiment 12
experiment 12
S.No.
Duty cycle
1
2
3
4
Table 12.1: Variation of the duty cycle of PWM waveform with input voltage
Vary the input voltage for a fixed load and observe the output voltage. Use
Table 12.2 for taking the readings for line regulation
S.No.
1
2
3
4
Table 12.2: Line regulation
Vary the load so that load current varies; observe the output voltage for a
fixed input voltage. Use Table 12.3 for taking the readings.
S.No.
Load current
1
2
3
4
Table 12.3: Load regulation
page 66
Chapter 13
Experiment 13
Design of a Digitally Controlled Gain Stage Amplifier
page 67
experiment 13
13.2 Specifications
To study the variation in gain when the bit pattern applied to the input of the DAC is
changed.
_ A11 A10 ... A0i
Vout = Vin $ R2 $ 114096
R1
/ An 2 n
R2
VIN
IOUT1
TL082
RFB
VDD
GND
2
3
The circuit of Figure 13.1 cannot be directly simulated, since the macro-model for
DAC7821 is not available at the time of writing. For the purpose of simulation,
we will use the macro model of a different 12-bit DAC, the MV95308. Simulate
the circuit schematic shown in Figure 13.2, which is equivalent to the circuit
of Figure 13.1. Observe the output waveforms for different bit patterns. The
typical simulation waveforms are of the form shown in Figure 13.3.
Use the circuit shown in Figure 13.1 for practical implementation of the Digital
programmable gain stage amplifier.
Apply the sine wave of fixed amplitude and vary the bit pattern, as shown
in Table 13.1. Note the Peak to Peak amplitude of the output. Compare the
simulation results with the practical results.
R1
VOUT
TL082
S.No.
BIT Pattern
100000000000
010000000000
001000000000
000100000000
in
page 68
Vin
R2 R1
Vin
R2 R1
DAC7821 VREF
IOUT2
Apply a 100 Hz sine waveVinof 100mV peak amplitude at Vin and measure the output
_ A11 A10 ... A0i and
voltage amplitude. Select R2 R1 to be 2.2. Vary the input bit
R2 pattern
R1
measure the amplitude of the output voltage.
Vout = Vin $ R2 $ 114096
R1
/ An 2 n
VDD
C1
+ V1
5V
E
0
1
2
A
3
RO
4
5
RI
6
7
8 GND
9
10
11
MV95308
V2
10V
+ V3
10V
J2
R4 1k
R2
R1
J1
TL082
J2
+
VIN
R3 1k
experiment 13
J1
J2
TL082
VOUT
J1
500.00m
Output
Amplitude(volts)
-500.00m
100.00m
Input
Amplitude(volts)
-100.00m
0.00
5.00m
10.00m
Time(s)
15.00m
20.00m
page 69
experiment 13
page 70
Chapter 14
Experiment 14
Design of a Digitally Programmable Square and
Triangular wave generator/oscillator
page 71
experiment 14
14.2 Specifications
C 1u
C1
IOUT1
R 1k
TL082
TL082
VDD
RFB
DAC7821 VREF
IOUT2
GND
VOUT
TL082
Design a Digitally Programmable Oscillator that can generate square and triangular
waveforms with a maximum frequency of 400 Hz.
Simulate the circuit using any simulator and observe the frequency of oscillation
of the square and triangular waveforms. See Figure 14.2 for the result of
simulation. The typical simulation waveforms are of the form shown in Figure
14.3. For this simulation, we used the macro-model of MV95308 since the
macro-model for the DAC is not available at the time of writing.
Vary the bit pattern input to the DAC in manner specified in Table 14.1 and
note down the change in the frequency of oscillations and compare the
practical results with the simulation results.
Plot a graph where the x-axis shows the analog equivalent of the bit pattern
and the y-axis shows the frequency of oscillations. Note that the 12-bit input
to the DAC is interpreted as an unsigned number.
R2
R1
S.No.
BIT Pattern
100000000000
010000000000
001000000000
000100000000
11
/A 2
1 $ 1 R2 $ 0
4RC b + R1 l 4096
Q = 10
n
f=
page 72
+ V1
J1
5V
0
E
1
2
A
3
4
RO
5
6
RI
7
8 GND
9
10
11
MV95308
+ V2
10V
+ V3
10V
J2
R 1k
experiment 13
C 1u
V tri
R4 1k
J2
J2
TL082
TL082
J1
J1
R3 1k
J2
TL082
V squ
J1
R2
R1
10.00
V squ
-10.00
3.00
V tri
-3.00
0.00
25.00m
50.00m
Time(s)
75.00m
100.00m
11
/A 2
f = 1 $ b1 + R2 l $ 0
R1
4096
4RC
Design a digitally programmable band-pass filter with Q = 10 and gain of 1 at
the centre frequency.
page 73
experiment 14
page 74
Appendix A
ICs used in
ASLK PRO
Texas Instruments Analog ICs used in ASLK PRO
page 75
appendix A
TL082
A.1.2 Applications
Input Buffer
High-Speed Integrators
D/A Converters
Sample And Hold Circuits
http://www.ti.com/lit/gpn/tl082
A.1.3 Description
The TL08x JFET-input operational amplifier family
is designed to offer a wider selection than any
previously developed operational amplifier family.
Each of these JFET-input operational amplifiers
incorporates well-matched, high-voltage JFET
page 76
A.2.1 Features
A.2.2 Applications
http://www.ti.com/lit/gpn/mpy634
X Input
10V FS
12V PK
+15V
50k
+VS
X2
O ut
MPY634
470k
15V
O ptional O ffset
Trim C ircuit
X1
SF
Z1
Y1
Z2
Y2
VS
+15V
VO UT, 12V PK
=
+ Z2
1k
Y Input
10V FS
12V PK
15V
O ptional
S umming
Input,
Z, 10V PK
A.2.3 Description
The MPY634 is a wide bandwidth, high accuracy,
four-quadrant analog multiplier. Its accurately
laser-trimmed multiplier characteristics make it
easy to use in a wide variety of applications with
a minimum of external parts, often eliminating
all external trimming. Its differential X, Y, and Z
inputs allow configuration as a multiplier, squarer,
page 77
appendix A
MPY634
appendix A
DAC 7821
A.3.2 Applications
Portable Battery-Powered Instruments
Analog Processing
Waveform Generators
Programmable Amplifiers and Attenuators
Digitally Controlled Calibration
Programmable Filters and Oscillators
Composite Video
Ultrasound
A.3.3 Description
The DAC7821 is a CMOS 12-bit current output
digital-to-analog converter (DAC). This device
operates from a single 2.5V to 5.5V power supply,
making it suitable for battery-powered and many
other applications. This DAC operates with a fast
parallel interface. Data read back allows the user
page 78
A.4.1 Features
Input Voltage Range 4.5 to 52 V
Output Voltage (700 mV to 90% VIN)
200 mA Internal P-Channel FET Driver
Voltage Feed-Forward Compensation
Undervoltage Lockout
Programmable Fixed Frequency (35-500 kHz)
Operation
Programmable Short Circuit Protection
Hiccup Overcurrent Fault Recovery
Programmable Closed Loop Soft Start
A.4.2 Applications
Industrial Control
DSL/Cable Modems
Distributed Power Systems
Scanners
Telecom
A.4.3 Description
The TPS40200 is a flexible non-synchronous
controller with a built in 200-mA driver for P-channel
FETs. The circuit operates with inputs up to 52V with
a power-saving feature that turns off driver current
once the external FET has been fully turned on. This
page 79
appendix A
TPS40200
appendix A
TPS7250
A.5.2 Applications
Wireless Handsets
Smart Phones, PDAs
MP3 Players
ZigBeeTM Networks
BluetoothTM Devices
Li-Ion Operated Handheld Products
WLAN and Other PC Add-on Cards
http://www.ti.com/lit/gpn/tps7250
TPS7250
VI
0.1 F
5
6
IN
IN
PG
SENSE
OUT
EN
OUT
GND
3
PG
250 k
VO
8
+
CO
10 F
CSR = 1
A.5.3 Description
The TPS72xx family of low-dropout (LDO) voltage
regulators offers the benefits of low-dropout
voltage, micropower operation, and miniaturized
packaging. These regulators feature extremely low
dropout voltages and quiescent currents compared to
conventional LDO regulators. Offered in small-outline
integrated-circuit (SOIC) packages and 8-terminal
thin shrink small-outline (TSSOP), the TPS72xx
page 80
Transistors
E B
E B
DGS
Figure A.8: BS250
P-Channel Enhancement
Mode Vertical DMOS FET
http://61.222.192.61/mccsemi/
up_pdf/2N3906(TO-92).pdf
http://61.222.192.61/mccsemi/
up_pdf/2N3904(TO-92).pdf
http://www.diodes.com/datasheets/BS250P.pdf
page 81
DIODE
Figure A.9:
1N4448 Small Signal Diode
A.7.1 Features
Breakdown Voltage: VR = 100V @ IR = 100A
Forward Voltage: VF = 620-720mV @ IF = 5mA
Reverse Leakage: IR = 25uA @ VR = 20V
Total Capacitance: CT = 4pF, VR = 0, f = 1MHz
Reverse Recovery Time: tRR = 4nS @ IF = 10mA, VR = 6.0V, RL = 100
page 82
Appendix B
Introduction to
Macromodels
Analog System Lab Kit PRO
page 83
appendix B
Simulation models are very useful in the design phase of an electronic system.
Before a system is actually built using real components, it is necessary to perform
a software breadboarding exercise through simulation to verify the functionality
of the system and to measure its performance. If the system consists of several
building blocks B1, B2, ..., Bn, the simulator requires a mathematical representation
of each of these building blocks in order to predict the system performance. Let us
consider a very simple example of a passive component such as a resistor. Ohms law
can be used to model the resistor if we intend to use the resistor in a DC circuit. But
if the resistor is used in a high frequency application, we may have to think about
the parasitic inductances and capacitances associated with the resistor. Similarly,
the voltage and current may not have a strict linear relation due to the dependence
of the resistivity on temperature of operation, skin effect, and so on. This example
illustrates that there is no single model for an electronic component. Depending
on the application and the accuracy desired, we may have to use simpler or more
complex mathematical models.
We will use another example to illustrate the above point. The MOS transistor,
which is the building block of most integrated circuits today, is introduced at the
beginning of the course on VLSI design. In a digital circuit, the transistor may be
simply modeled as an ideal switch that can be turned on or off by controlling the
gate voltage. This model is sufficient if we are only interested in understanding
the functionality of the circuit. If we wish to analyze the speed of operation of the
circuit or the power dissipation in the circuit, we will need to model the parasitics
associated with the transistors. If the same transistor is used in an analog circuit,
the model that we use in the analysis would depend on the accuracy which we want
in the analysis. We may perform different kinds of analysis for an analog circuit DC analysis, transient analysis, and steady-state analysis. Simulators such as SPICE
require the user to specify the model for the transistor. There are many different
models available today for the MOS transistor, depending on the desired accuracy.
The level-1 model captures the dependence of the drain-to-source current on the
gate-to-source and drain-to-source voltages, the mobility of the majority carrier,
the width and length of the channel, and the gate oxide thickness. It also considers
non-idealities such as channel length modulation in the saturation region, and the
dependence of the threshold voltage on the source-to-bulk voltage. More complex
models for the transistor are available, which have more than 50 parameters.
B.1 Micromodels
If you have built an operational amplifier using transistors, a straight-forward way
to analyze the performance of the OP-Amp is to come up with the micromodel of the
OPAMAP, where each transistor is simply replaced with its corresponding simulation
model. Micromodels will lead to accurate simulation, but will prove computationally
page 84
intensive. As the number of nodes in the circuit increases, the memory requirement
will be higher and the convergence of the simulation can take longer.
A macromodel is a way to address the problem of space-time complexity mentioned
above. In todays electronic systems we make use of analog circuits such as
operational amplifiers, data converters, PLL, VCO, voltage regulators, and so on.
The goal of the system designer is not only to get a functionally correct design,
but also to optimize the cost and performance of the system. The system-level
cost and performance depend on the way the building blocks B1, B2,..., Bn have
been implemented. For example, if B1 is an OP-Amp, we may have several choices
of operational amplifiers. Texas Instruments offers a large number of operational
amplifiers that a system designer can choose from. Refer to Table B.1. As you
will see, there are close to 2000 types of operational amplifiers available! These
are categorized into 17 different bins to make the selection simpler. However,
you will notice that 240 varieties are available in the category of Standard Linear
amplifers! How does a system designer select from this large collection? To
understand this, you must look at the characteristics of a standard linear amplifier
- these include the number of operational amplifiers in a single package, the
Gain Bandwidth Product of the amplifier, the CMRR, Vs (min), Vs (max), and so
on. See http://tinyurl.com/ti-std-linear. The website allows you to specify these
parameters and narrow your choices.
But how does one specify the parameters for the components? The overall
system performance will depend on the way the parameters for the individual
components have been selected. For example, the gain-bandwidth product of an
operational amplifier B1 will influence a system-level parameter such as the noise
immunity or stability. If one has n components in the system, and there are m
choices for each component, there are mn possible system configurations. Even
if we are able to narrow the choices through some other considerations, we may
still have to evaluate several system configurations. Performing simulations using
micromodels will be a painstaking and non-productive way of selecting system
configurations.
B.2 Macromodels
A macromodel is a mathematical convenience that helps to reduce simulation
complexity. The idea is to replace the actual circuit by something that is simpler,
but is nearly equivalent in terms of input characteristics, output characteristics, and
feedforward characteristics. Simulation of a complete system becomes much more
simple when we use macromodels for the blocks. Manufacturers of semiconductors
provide macromodels for their products to help system designers in the process of
system configuration selection. The macromodels can be loaded into a simulator.
Number of Varieties
240
28
Voltage Feedback
68
Current Feedback
47
Rail to Rail
14
JFET/CMOS
23
DSL/Power Line
19
Precision Amplifier
641
Low Power
144
10
182
11
38
12
Low Noise
69
13
Wide Bandwidth
175
14
121
15
High Voltage
16
54
17
22
appendix B
Characteristic
Notes on Appendix B:
page 85
appendix B
Notes on Appendix B:
page 86
Appendix C
Activity
Convert your PC/laptop into
an Oscilloscope
page 87
appendix C
C.1 Introduction
In any analog lab, an oscilloscope is required to display
waveforms at different points in the circuit under
construction in order to verify circuit operation and, if
necessary, redesign the circuit. High-end oscilloscopes
are needed for measurements and characterization
in labs. Today, solutions are available to students for
converting a PC into an oscilloscope. These solutions
require some additional hardware to route the analog
signals to the PC for observation; they also require
software that provides the graphical user interface to
convert a PC display into an oscilloscope. Since most
students have access to a PC or laptop today, we have
designed the Analog System Lab such that a PC-based
oscilloscope solution can be used along with ASLK
PRO. We believe this will reduce the dependence of
Limitations
Not possible to display DC voltages (due to input
capacitor of sound card blocks DC)
Low frequency range (10 Hz-20 kHz)
Measurement is not very accurate
+12V
BNC
R2
47k 1/2W
C1
0.1uF
C3
100pF
R1
1M
Zin=1M
IVinl<150V
D1
1N914
TI082
C2
20pF
D2
1N914
R4
3k
R3
4.7k
D3
1N914
IVoutl<12V
RS
27k
R6
100k
RCA
S1
-12V
Figure C.1:
Buffer circuit
needed to
interface an
Analog Signal
to Oscilloscope
page 88
Appendix D
Connection
diagrams
Analog System Lab Kit PRO
page 89
appendix D
HD21
R15
HD21
R15
R25
HD25
R25
HD25
R15
10K
R15
10K
10K
R25
10K
R25
HD19
R14
HD19 C14
R14HD20
HD7
R24
HD7
R14
4K7
R14
1uF
4K7 C14
1uF
R24
4K7
R24
HD17
R13
HD17 C13
R13HD18
HD6 R23
C23
HD5
R23
HD5
R13
2K2
R13
2K2 C13
C23 2K2
0.1uF R23
2K2
R23
HD15
R12
HD15 C12
R12HD16
HD4 R22
C22
R22
HD3
R12
1K
R12
1K
C22 1K
0.1uF R22
1K
R22
HD13
R11
HD13 C11
R11HD14
HD2 R21
C21
R21
HD1
R11
1K
R11
1K
C21 1K
0.01uFR21
1K
R21
0.1uF
0.1uF
0.01uF
C14
HD11
HD9
OP1A INGND
HD11
HD9
0.1uF
2
OP1A IN3
GND
C20
HD18
HD6
C23
C13
C23
0.1uF
HD16
HD4
C22
C12
C22
0.1uF
HD14
HD2
C21
C11
C21
0.01uF
VCC+10
HD10
HD119
HD119
+10V
0.1uF
+10V
+10V
+10V
2
HD23
3
OP1A OUT
HD12
-10V
OPAMP1A
HD26
1
OP1
C20
0.1uF
VCC-10
OPAMP1B
HD23
7
OP1B OUT
OP1A OUT
HD12
-10V
OP1
6
HD26
5
OP1B OUT
OPAMP1B
7
OP1
HD181
HD181
-10V
-10V
VCC-10
HD3
HD1
VCC+10
HD10
page 90
VCC+10
C10
OP1
VCC-10
C13
0.01uF
OPAMP1A
1
0.1uF
1uF
C11
C11
C24 4K7
C24
0.1uF
C24
HD8 R24
C14
C12
C12
C24
HD8
1uF
0.1uF
VCC+10
C10
HD20
HD24
6
HD22
5
OP1B INGND
HD24
HD22
OP1B INGND
VCC-10
HD41
R35
HD41
R35
R45
HD63
R45
HD63
R35
1K
R35
1K
1K
R45
1K
R45
HD45
R34
HD45
R34
R44
HD65
R44
HD65
R34
2K2
R34
2K2
2K2
R44
2K2
R44
HD44
R33
C33 HD44
R43
HD57
R33
10K
R33
0.01uF
10K
R43
HD42
R32
C32 HD42
R42
HD56
R32
4K7
0.1uFR32
4K7
R42
HD40
R31
C31 HD40
R41
HD55
R31
1K
1uF R31
1K
R41
HD43
R33
C33
10K
HD47
R32
C32
4K7
HD46
R31
C33
C32
HD38
HD36
0.1uF
2
OP2A INOP2A IN+
C31
HD46
HD58
C41
1uF
C31
C41
1uF
C34 HD35
R36
1K
1uF R36
HD31
R37
C35 HD31
R37
10K
0.1uFR37
HD32
R38
C36 HD32
R38
2K2
0.1uFR38
C43
R42
HD66
4K7
C42
R41
HD58
1K
C41
+10V
0.1uF
+10V +10V
+10V
HD52
OP2A OUT
HD39
-10V
2
HD62
3
OP2B OUT
OP2
HD180HD39
0.1uF
-10V
R36
C34
1K
HD30
R37
C35
10K
HD34
R38
C36
2K2
C34
VCC-10
C34C44
1uF
C35
HD30
HD48
C45
C36
0.1uF
HD34
HD50
C36C46
HD55
C41
R41
1uF
HD53
HD51
VCC-10
HD54
1uF
C35C45
0.1uF
-10V
C44
0.1uF
R42
C42
HD180
HD33
HD60
GND
HD56
0.01uF
HD62
-10V
VCC-10
R43
C43
HD53
OPAMP2B
6
OP2B IN7
HD51
5
OP2B OUT
OP2 OP2B IN+
6
HD52
5
OP2 OP2A OUT
C40
HD54
HD33
OPAMP2B
OPAMP2A
1
7
HD57
VCC+10
VCC+10
HD183
10K
HD183HD37
VCC-10
R36
0.1uF
HD64
HD37
0.1uF
HD35
C32
C42
VCC+10
C40
C42
R43
C30
OPAMP2A
HD38
1
OP2A INHD36
OP2
OP2A IN+
0.01uF
HD47
HD66
0.1uF
VCC+10
C30
C33
C43
0.01uF
1K
C31
C43
HD43
HD64
appendix D
GND
0.1uF
C46
0.1uF
R46
HD60
1K
C44
R47
HD48
10K
C45
R48
HD50
2K2
C46
HD61
C44
R46
1uF
HD59
C45
R47
HD49
R48
0.1uF
C46
0.1uF
R46
HD61
1K
R46
R47
HD59
10K
R47
R48
HD49
2K2
R48
page 91
appendix D
VCC+10
HD70
HD69
C59
HD67
0.1uF
+10V
2
OP3A IN-
OPAMP3A
1
OP3A OUT
OP3
OP3A IN+
C58
HD72
HD68
-10V
0.1uF
VCC-10
HD75
VCC+10
VCC+10
HD90
GND
VCC+10
VCC+10
C59
HD67
HD179
+10V
+10V gain configuration
Figure D.5: OP-Amp 3A can
be used in unity
0.1uF
or any other26 custom
configuration
OPAMP3A
OPAMP3B
HD70
HD73
HD69
HD71
OP3A
INOP3B INOP3A
IN+
OP3B IN+
C71
100nF
HD68
OP AMP TYPE III - HD182
B
- BASIC
-10V
-10V
HD75
GND
HD84
HD83
HD82
4
5
HD85
C72
100nF
U1
1
VCC-10
-10V
VCC+10
X2
GND
C58
VCC-10
VCC-10
X1
SF
OP3A
OUT
OP3B OUT
OP3
OP3
0.1uF
HD86
HD72
HD74
1
7
3
5
+10V
Y1
Y2
HD81
HD80
VCC
6
7
X1
+VS
X2
NC
NC
OUT
SF
MPY634
Z1
NC
Z2
Y1
NC
Y2
-VS
14
C81
100nF
13
12
11
10
HD89
HD88
HD87
OUT
Z1
Z2
9
8
C82
100nF
VCC-10
HD179
+10V
HD73
HD71
6
OP3B INOP3B IN+
OPAMP3B
7
HD74
OP3B OUT
OP3
HD182
-10V
VCC-10
page 92
VC
VCC+10
VCC+10
89
HD89
88
HD88
87
HD87
VCC+10
VCC+10
HD106
HD106
+10V
+10V
C81C81
100nF
100nF
HD93
HD93
GND
GND
OUT
OUT
Z1 Z1
Z2 Z2
HD96
HD96
X1 X1
HD95
HD95
X2 X2
HD94
HD94
SF SF
-10V
-10V
C82C82
100nF
100nF
2 2
4 4
5 5
HD92
HD92
Y1 Y1
HD91
HD91
Y2 Y2
6 6
7 7
X1 X1
+VS+VS
X2 X2
NC NC
NC NC
OUT
OUT
12 12
MPY634
MPY634Z1 Z1 11 11
Z2 Z2
Y1 Y1
NC NC
Y2 Y2
-VS-VS
C91C91
100nF
100nF
13 13
SF SF
NC NC
+10V
+10V
14 14
10 10
HD103
HD103
OUT
OUT
HD101
HD101
Z1 Z1
HD100
HD100
Z2 Z2
8 8
HD108
HD108
GND
GND
HD105
HD105
X1 X1
HD104
HD104
X2 X2
HD107
HD107
-10V
-10V
C92C92
100nF
100nF
U3 U3
1 1
2 2
3 3
HD102
HD102
SF SF
VCC-10
VCC-10
9 9
VCC+10
VCC+10
HD112
HD112
VCC-10
VCC-10
VCC+10
VCC+10
U2 U2
1 1
3 3
VCC-10
VCC-10
HD97
HD97
appendix D
4 4
5 5
HD99
HD99
Y1 Y1
HD98
HD98
Y2 Y2
6 6
7 7
X1 X1
+VS+VS
X2 X2
NC NC
NC NC
OUT
OUT
14 14
13 13
12 12
MPY634
MPY634Z1 Z1 11 11
SF SF
NC NC
Z2 Z2
Y1 Y1
NC NC
Y2 Y2
-VS-VS
10 10
HD111
HD111
OUT
OUT
HD110
HD110
Z1 Z1
HD109
HD109
Z2 Z2
9 9
8 8
VCC-10
VCC-10
page 93
appendix D
DAC I
VCC+5
HD137
JP3
CS
VCC+5
DA1
CS A
T1
IOUT1
C51
100nF
DBA11
DBA10
DBA9
DBA8
DBA7
DBA6
DBA5
DBA4
DBA3
DBA2
DBA1
DBA0
DC/DC VOUT
R51
10K
DBA11
DBA10
DBA9
DBA8
DBA7
DBA6
DBA5
DBA4
DBA3
DBA2
DBA1
DBA0
HD144
IOUT2
HD153
HD151
1
2
3
DBA11
DBA10
DBA9
DBA8
DBA7
DBA6
DBA5
10
IOUT1
RFB
IOUT2
VREF
GND
VDD
DB11
R/W
DB10
CS
DB9
DAC7821
DB0
DB8
DB1
DB7
DB2
DB6
DB3
DB5
DB4
20
19
VCC+5
HD171
HD169
VREF
HD184
17
16
CS A
15
DBA0
14
DBA1
13
DBA2
12
DBA3
11
DBA4
R/W
R54
10k
HD145
VCC+10
220R
SW1
HD176
+1 2 3 4
+10V
HD136
R52
CS
18
+ 1 2 3 4 5 6 7 8 9 10 11 12
VCC+5
HD138
C52
100nF
RFB
DBB11
DBB10
DBB9
DBB8
OUT
DBB11
DBB10
DBB9
DBB8
LDO
VCC+5
VCC-10
R53
220R
GND
HD175
VCC+5
-10V
page 94
R62
220R
SW2
HD138
C52
100nF
RFB
VREF
R61
10K
CS
CS B
T2
IOUT1
C61
100nF
HD184
R/W
R54
10k
HD145
VCC+10
HD176
GND
HD175
-10V
IOUT2
HD154
HD152
1
2
3
DBB11
DBB10
DBB9
DBB8
DBB7
DBB6
DBB5
10
appendix D
IOUT1
RFB
IOUT2
VREF
GND
VDD
DB11
R/W
DB10
CS
DB9
DAC7821
DB0
DB8
DB1
DB7
DB2
DB6
DB3
DB5
DB4
20
19
VCC+5
HD172
HD170
C62
100nF
RFB
VREF
18
HD185
17
16
CS B
15
DBB0
14
DBB1
13
DBB2
12
DBB3
11
DBB4
R/W
R64
10k
VCC+10
+ 1 2 3 4 5 6 7 8 9 10 11 12
+10V
HD136
VCC-10
VCC+5
DA2
DBB11
DBB10
DBB9
DBB8
DBB7
DBB6
DBB5
DBB4
DBB3
DBB2
DBB1
DBB0
VCC+5
VCC+5
DBB11
DBB10
DBB9
DBB8
DBB7
DBB6
DBB5
DBB4
DBB3
DBB2
DBB1
DBB0
DAC II
VCC+5
+10V
HD135
R62
SW2
220R
HD178
VCC-10
R63
220R
GND
HD177
-10V
page 95
appendix D
DC/DC CONVERTER
VCC+10
TP1
HD122
JP9
VIN
TP2
TP3
HD121
R201
100K
C203
220nF
RC
SS
COMP 3
R210
1M
C214
470nF
U4
RC
SS
COMP
FB
VDD
ISNS
DRV
GND
C205
R202
0.03
R203
1K
470pF
ISNS
DRV
R204
GATE
Q101
FDC5614P
0E
5
C208
100nF
TP4
HD126
DRAIN
C213
470pF
C204
220nF
R205
100K
CN6
L201
VOUT
33uH
C207
33pF
TP6
HD124
FB
C206
4.7nF
TP8
HD123
C202
68pF
R206
25.5E
TP7
C209
330uF
C210
330uF
HD127
C211
10uF
C212
10uF
R3
4K7
VOUT
VOUT
LD3
TP9
HD125
JP8
3.3V
R207
R208
5V
100K
49.9
R211
41K2
D201
MBRS340
HD143
TP5
HD128
VOUT 3.3V or 5V
@ 0.125 2.5A
C201
220uF
HD120
VIN
SRC
DC/DC IN
CN5
1
2
5
6
VIN 6 15V
Vin
TPS40200
HD142
R209
27K4
page 96
HD118
appendix D
LDO REGULATOR
VOUT
R101
247K
1
2
LD4
3
4
SENSE
PG
GND
EN
TPS7250
R4
4K7
IC1
OUT
OUT
IN
IN
GND
C103
10uF
VOUT
VCC+10
HD117
JP6
IN
C101
1uF
VIN
CN3
REG IN
VIN
C102
100nF
GND
HD116
JP7
ENABLE
OUT
OUT
VOUT 5 V
@250mA
CN4
GND
OFF
ON
HD141B
HD115B
COLLECTOR
DRAIN
HD113B
SOURCE
BASE
GATE
HD139B
HD113B
EMITTER
SOURCE
HD140B
TRANSISTOR
SOCKET
MOSFET SOCKET
B
BASE
TRANSISTOR SOCKET
BG 11
GATE
HD140B
HD114B
2
2
MOSFET SOCKET
3
3
1
3
E
S
HD114B
HD141B
COLLECTOR
C
D
HD115B
DRAIN
HD139B
EMITTER
page 97
appendix D
DIODES
TRIMMERS
VCC+10
HD76B
HD78B
D2
D2A
D2K
HD77B
HD79B
D1
D1A
D1K
POWER SUPPLY
CN1
VCC+10
VCC+10
HD131
HD133
+10V
-10V
HD132
S1
P1
1K
P2
1K
HD134
S2
HD129
HD130
GND
GND
HD29
+10V
HD28
+10V
CN2
GND
VCC-10
VCC-10
-10V
VCC+10
VCC-10
HD27
-10V
R1
6K8
LD1
R2
6K8
LD2
page 98
VCC-10
Bibliography
List of references and related articles for
further reading
page 99
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[02] F. Archibald. Automatic Level Controller for Speech Signals Using PID Controllers. Application Notes from Texas Instruments.
Available from http://focus.ti.com/lit/wp/spraaj4/spraaj4.pdf
[03]
[04] Wide Bandwidth Precision Analog Multiplier MPY634, Burr Brown Products from Texas Instruments,
Available from http://focus.ti.com/lit/ds/sbfs017a/sbfs017a.pdf
[05]
B. Carter and T. Brown. Handbook Of Operational Amplifier Applications. Texas Instruments Application Report. 2001.
Available from http://focus.ti.com/lit/an/sboa092a/sboa092a.pdf
[06]
B. Carter. Op Amp and Comparators - Dont Confuse Them! Texas Instruments Application Report, 2001.
Available from http://tinyurl.com/carteropamp-comp
[07]
B. Carter. Filter Design in Thirty Seconds. Application Report from Texas Instruments. Downloadable from http://focus.ti.com/lit/an/sloa093/sloa093.pdf
[08]
B. Carter and R. Mancini. OPAMPS For Everyone. Elsevier Science Publishers, 2009.
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[10] Thomas Kuehl and Faisal Ali. Active Filter Synthesis Made Easy With FilterPro V3.0. Tutorial presented in TI Technology Days 2010 (May), USA.
Available from http://www.ti.com/ww/en/techdays/2010/index.shtml.
[11] J. Molina. DESIGN A 60Hz NOTCH FILTER WITH THE UAF42. Application note from Burr-Brown (Texas Instruments), 2000.
Available from http://focus.ti.com/lit/an/sbfa012/sbfa012.pdf
[12] J. Molina. DIGITALLY PROGRAMMABLE, TIME-CONTINUOUS ACTIVE FILTER, 2000.
Application note from Burr-Brown (Texas Instruments), http://focus.ti.com/lit/an/sbfa005/sbfa005.pdf
[13]
George S. Moschytz. From Printed Circuit Boards to Systems-on-a-chip. IEEE Circuits and Systems magazine, Vol 10, Number 2, 2010.
[14]
[15]
R. Palmer. Design Considerations for Class-D Audio Amplifiers. Application Note from Texas Instruments.
Available from http://focus.ti.com/lit/an/sloa031/sloa031.pdf
[16] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. OPAmp in Negative Feedback.
Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec7 and http://tinyurl.com/krkrao-nptel-lec8
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Bibliography 2 of 2
[17] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Frequency Compensation in Negative Feedback.
Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec16 and http://tinyurl.com/krkraonptel-lec17
[18]
K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Instrumentation Amplifier.
Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec11
[19] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Active Filters.
Recorded lecture available through NPTEL. http://tinyurl.com/krkraonptel-lec12
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http://tinyurl.com/krkrao-nptel-ic-lec25, http://tinyurl.com/krkraonptel-ic-lec26, and http:// tinyurl.com/krkrao-nptel-ic-lec27
[23] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Voltage Regulators. Recorded lecture available through NPTEL.
http://tinyurl.com/krkrao-nptel-26, http://tinyurl.com/krkrao-nptel-27, and http:// tinyurl.com/krkrao-nptel-28
[24]
K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Converters. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-28,
[25] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. AGC/AVC. http://tinyurl.com/krkrao-nptel-33, http://tinyurl.com/krkrao-nptel-34,
http://tinyurl.com/krkrao-nptel-35, http://tinyurl.com/krkrao-nptel-36
[26] K.R.K.Rao. Analog Ics Voltage Controlled Oscillator. Recorded lectures available from links: http://tinyurl.com/krkrao-vco-1, http://tinyurl.com/krkrao-vco-2
[27]
Thomas Kugesstadt. Active Filter Design Techniques. Texas Instruments. Available from http://focus.ti.com/lit/ml/sloa088/sloa088.pdf
[28]
[29]
[30]
[31]
Texas Intruments Analog eLAB - SPICE Model Resources. Macromodels for TI analog ICs are downloadable from http://tinyurl.com/ti-macromodels
[32]
[33]
page 101
page 102
Analog
System
Lab Kit PRO
MANUAL
Authors
K.R.K. Rao and C.P. Ravikumar
Editor in Chief
Zoran Risti
Assistant Editor
Miodrag Veljkovi
Cover Design
Danijela Krajnovi
Graphic Design/DTP
Aleksandar Nikoli
Special Thanks to
Harmanpreet Singh
for his help in performing the additional experiments
(Experiments 11-14) included in the new release of ASLK Pro.
Publisher
MikroElektronika Ltd.
www.mikroe.com
June 2012.
0 100000 019382