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SEPTEMBER 2016
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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection
INTRODUCTION
Production test is expensive. A common method of controlling cost is to utilize the most efficient sequence of
creating and applying test patterns that also detects the most defects in silicon. This presents a great
challenge in scan test: how to determine the ideal order in which to create multiple pattern types and the
most effective order to apply scan patterns on the tester. Finding the right balance among test cost, test
quality, and data collection for running diagnosis requires consideration of several competing factors.
Applying a very large number of patterns and pattern types, such as gate-exhaustive patterns, can improve
defect detection in silicon and overall test quality but it isnt a cost-effective strategy. Therefore, the pattern
creation process must be optimized to target the types of fault models that detect the most silicon defects
without over-testing, which drives up test cost with little benefit.
Equally important for reducing costly tester time is the efficient application of patterns on the tester in order
to identify defective parts quickly. This means applying patterns that have the highest probability of defect
detection early, even if those were not the first patterns that were created.
This paper summarizes the best practices for creating cost-effective pattern sets in the most efficient manner
and the best order to apply them on the tester for effective and efficient detection and diagnosis of defective
parts.
Because cross-fault simulation is an essential technique for test cost reduction, the key challenge to creating
patterns that target several different fault types is determining the order in which patterns should be created.
In the most general sense, the principle for deciding which pattern type to create next is to give priority to
creating patterns that have the most strict detection requirements. Typically, patterns that have strict
detection requirements have complex capture sequences, require large number of patterns, or are types of
patterns that must be applied to meet the devices test requirements, regardless of number of patterns.
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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection
For example, path delay patterns target very specific paths in the design and typically focus on a small
number (a few hundred) of paths that must be tested. Creating path delay patterns first and fault simulating
them for other fault models ensures that the required path delay patterns are part of the test suite while
reducing the pattern count for other fault types.
The list of all test patterns can be grouped into three main categories:
Chain test patterns
At-speed patterns, which include transition, path delay, timing-aware, delay cell-aware, delay bridge, and
delay functional UDFM patterns.
Static patterns, which include stuck-at, toggle, static cell-aware, static bridge, and static functional UDFM.
Functional UDFM patterns, which may be static or delay, are the designs functional patterns described using
User Defined Fault Modeling (UDFM) so that they can be applied easily through scan.
The ordered list of scan pattern types in Figure 2 can be used as a guideline for creating and fault simulating
each pattern type in order to achieve the smallest pattern set. At-speed patterns are shown in a darker shade.
Before creating new patterns, all previously-created patterns are simulated for the target fault type so that
only top-up patterns that target the remaining undetected faults need to be created.
Figure 2: Pattern creation and fault simulation sequence for the smallest pattern set.
Iddq patterns can be created in parallel to this flow since the number of patterns is generally very small and
the observation process does not contribute to detection of the fault models in Figure 2. Additional pattern
set optimization can be achieved by determining the effectiveness of each pattern type by examining field
return and manufacturing yield data. By focusing the pattern creation process on pattern types that provide
higher quality test, a more effective pattern set can be created. The goal is to create a set of patterns that is
efficient to apply and detects the most defects in silicon.
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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection
w w w. m e nto r. co m
Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection
Applying the at-speed patterns at the low speed (at static) next has two benefits. One is to assure enough
coverage for testing the static defects since the static patterns are top-ups to the at-speed patterns and may
not offer enough test coverage. The other benefit is that if the at-speed patterns fail at low speed, they have
detected static defects (not timing-related ones) and so static diagnosis (not at-speed diagnosis) is needed.
If the patterns for static defects pass, it is the right time to datalog the failures from the at-speed patterns
applied at functional frequency. This makes sure that the failures are speed or path delay related and the
datalog is then used for at-speed diagnosis.
SUMMARY
Determining the ordering of test pattern types has different requirements during the pattern creation and the
tester application. Considering test coverage, pattern size, and efforts in pattern creation, the best practice is
to create the most restrictive patterns first, fault simulate the remaining faults and create top-up patterns if
needed. During tester application, go/no go test needs to have the most easily failed patterns tested first,
while testing to datalog for diagnosis needs to stage the tests so that diagnosis can use them to isolate root
causes among chain defect, static defect, and path-related defect.
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