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Mentor Graphics Tutorial 5

Layout in IC Station
Estimated Time: 1.5 hours
In this tutorial we are going to layout a minimal sized inverter in Mentor Graphics IC Station. Length
width of the nmos and the pmos for the minimally sized inverter is 26 and 212 lambda respectively.
1. Starting and Setting up IC Station
1. Download the ic script file from the Environment Variables page and set it up if you havent already
done so.
2. Create a folder called ictut in your home directory. We will use this directory to save the inverter files.
3. Invoke IC Station by typing the command ./ic in the terminal.

Fig: IC Station window showing the completed inverter.

4. Press the Create Cell icon in the top left corner and enter/choose the following in the pop up window:
Cell Name: ~/ictut/inverter
Attach Library: /usr/local/mentor/adk/techonology/ic/process/ami05. You should see an L
in its icon when you select this.
Process: /usr/local/mentor/adk/techonology/ic/process/ami05. You should see an P in its
icon when you select this.
Rules Files: /usr/local/mentor/adk/techonology/ic/process/ami05.rules
Leave everything else to the default settings.
5. Click on Other>Window>Set Grid from the menu bar to set-up the grid as shown in the picture below.
Zoom in a little if you cant see the minor grids.

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Fig: Grid Setup.

6. Type the command Show Layer Palette while having the curser in the window to display the list of
available layers. Choose the layers from P_WELL to METAL2 and click OK. The layers should appear
above the IC Palettes in the top right section of the screen.

Fig: IC Palettes and Show Layer Palette.

2. Basics of IC Station
Selecting:
Clicking on a layer will select it.
Clicking on the window will select the nearest layer to the curser.
Clicking again will add other layers to the selection.
Unselecting:
Pressing the F2 button will unselect everything that is selected.
Moving:
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Select the layer(s) to be moved. Click on the Move button in the ADK_Edit palette, click
where you want to place it, and then press ESC.
Select the layer(s) to be moved. Press Ctrl and drag it to the desired location.
Changing Sizes of Layers:
Select the edge you want to move. This can be done by Ctrlclicking the edge. Then press
Ctrl and drag the edge to change the size.
3. Creating the PMOS
1. Click ADK Edit>Shape on the IC Palette, and then Select ACTIVE. This will let you make place the
chosen layer.
2. Place the ACTIVE of size 21x12 (horizontalxvertical). Here the vertical 12 units is the width of the
PMOS. Press F2 to unselect it. F2 is the command for Unselect All.
3. Then choose POLY of size 2x20 from the palette and place it in the horizontal center as given in the
figure below. The vertical height of the POLY doesnt have to be accurate as we will be tweaking it
later Press F2 to unselect all selected layers. F2 is the command for Unselect All

Fig: PMOS in the making.

4. Place a METAL1 layer of size 4x4 on top of the ACTIVE layer on one side of the POLY layer. Then Click
on the Copy button on the ADK Edit palette on the right which will let you make copy of the selected
layer. Copy 5 more of the METAL1 layer and place it as shown in the figure above.
5. Choose CONTACT_TO_ACTIVE of size 2x2 and place it inside each of the METAL1 square. You can
make use of the Copy button. Design rule requires that each contact be of size 2x2 and that METALs
should overlap contacts and via by at least 1 units.
6. Then place an P_PLUS_SELECT (yellow on the right), N_PLUS_SELECT(green on the left) layers and
N_WELL(dark dashed green) layer on top of the ACTIVE layer to overlap it by 2 units and 6 units,
respectively, in all direction as shown in the figure below.

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Fig: Completed PMOS.

7. The PMOS is complete.
4. Creating the NMOS
1. Place an ACTIVE of size 21x6 units, three METAL1 of size 4x4, three CONTACT_TO_ACTIVE of size
2x2, N_PLUS_SELECT and P_PLUS_SELECT to overlap the ACTIVE by 2 units to make your NMOS
look like the one in the picture below.
2. Then extend the POLY that we placed in the PMOS to go through the horizontal center of the NMOS.
To do this, Ctrl-click the bottom edge of the POLY, then drag the edge down without letting go of the
Ctrl key. Move the layers if you have to.

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Fig: PMOS and NMOS transistors.

3. The PMOS and the NMOS are complete.
5. VDD and GND
1. Place a METAL1 (Power Rail) layer of rough size 33x8 on top of the N_WELL layer and another layer
(Ground Rail) of rough size 33x8 below the N_PLUS_SELECT. Press ESC to end the placing the Shape.
2. Then click on Path in the ADK Edit palette to place a path. A path is basically a net used to connect
two layers. Click on Options in the small window that pops, and select the width of the path as 3.
Check the option Keep Setting if you want to make more paths of the same width. The width of
METALs should be at least 3 units as per design rules. (Click to start the path, click again to bend the
path, and double click to end the path.) Connect the Ground Rail to the left METAL1 in the NMOS,
and connect the two left METAL1 in the PMOS to the Power Rail. See figure below for reference.

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Fig: Power and Ground Rails.

3. Also connect the right METAL1 layers in PMOS to the right METAL1 layers in the NMOS and the left
METAL1 to the the ground and power as shown in the figure below.
4. Type the command pwc with the curser in the window to place a pwell_contact and place it on top of
the Ground Rail.
5. Type the command nwc and place a nwell_contact on top of the Power Rail.

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Figure: pwell_contact and nwell_contact placed.

6. Adding layers for IN and OUT ports
One way of connecting two gates is to use a METAL layer that is not used in the design. We can use
METAL2 for this purpose so we will be using METAL2 to make IN and OUT ports.
1. Type the command pc and then press Enter to place a POLY, METAL1 and CONTACT_TO_POLY
layers.
2. Select the placed layers and move it so that it is connected to the POLY layer that connects the PMOS
and the NMOS.

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Fig: Placing connection from POLY to METAL1.

3. Place a layer of METAL1 of size 4x4 touching the METAL1 layer of the block we just placed. Then place
METAL2 of the same size on top of the METAL1, and a VIA layer of size 2x2 at the center as shown in
the figure below. This is going to be our Port IN.

Fig: Adding layers which will become Port IN.

4. Select and copy the METAL1, METAL2 and VIA layers that you just placed and connect it to the
METAL1 path that connects the PMOS to the NMOS as shown below. This is going to be our Port OUT.

Fig: Port OUT.

7. Making Ports
1. Click on the Add Text icon in the left panel and then click on the Power Rail METAL1. This should open
a pop-up bar.
2. Type VDD as the Value, click on the Option button, and then choose METAL1.PORT as the layer in the
popup window. Check the Keep Option Settings box to keep the layer selected for later use. You can
change the size of the text placed by changing the Height in this window.
3. Press the OK button when you are done. This will add a text value VDD on the Power Rail.

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Fig: Adding text VDD which will act as a port.

4. Repeat the same procedure to add text with value GND and layer type METAL1.PORT to the Ground
Rail. You will not need to click on Option to choose the layer type if you did check the Keep Option
Settings box.
5. Add text with value IN and layer METAL2.PORT to the Port IN Metal and text of value OUT and layer
METAL2.PORT to the metal in Port OUT.
6. The inverter is complete.

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Fig: Completed minimal inverter.

8. Design Rule Check (DRC)
1. Click on ADK Edit>Drc>Check on the IC palette on the right.
2. Click OK to check the complete layout. You can choose to check only a small portion by drawing a
rectangle around the area instead.
3. The result will be shown in the status bar at the bottom of the IC Station window. The number of
Total Results is the number of design rule errors one has on the design.
4. To view the first error, click on AKD Edit>Drc>First. The erroneous part of the design will be
highlighted, and the design rule will be displayed in the status bar.
5. You can view the other errors by going to ADK>Drc>Next. Then you can correct them.
6. Note that you may get a DRC error due to nwell_contact and pwell_contact. Moving both layers a few
units to the right should resolve these errors.
9. Measuring the size of a cell
1. One way of measuring the size of a cell is by using a ruler.
2. Click on Objects>Add>Rulers in the menu bar, then click somewhere in the design to start the ruler,
and click again to end it.

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Block Cells (This part of the tutorial will be required only for Lab 5)
1. Making block cells
You can make designs into a block cells and then place them into other cells. These block cells act like a
single unit and make designing layout easier, and it also keeps the design cleaner.
1. Open the design which you want to make into a block cell. Remove all the text-ports you have added
to your design. (You can choose to make only a part of a design into a block cell.)
2. Select all the ports in your design. (VDD, GND, A, B, IN, OUT)
3. Type the command 'change aspect' with the curser in the window.

Fig: Change the aspect of the layers to both

4. Change the aspect to both (Internal and External). You can see the layers with external aspects when
the cell in unpeeked as well.
5. Select all the layers that you want to make into a block cell.
6. Go to Objects>Make>Cells in the menu bar. Browse to the directory you want to save the cell, give it
a discriptive name, choose Block as the Cell Type and click OK.
7. You can now select all the layers together as a single unit.
8. Unpeeking a block cell will only show you the ports which will help keeping bigger designs cleaner to
read. Choose the block cell you want to unpeek, and then Go to Context>Hierarchy>Unpeek in the
menu bar.

Fig: Example of Peeked and Unpeeked Block cell.

9. You can click the unpeeked block cell and click on Context>Hierarchy>Peek, choose 1 as the level and
then click OK to peek into the block cell.
2. Using block cells
1. Invoke IC Station and open a sheet you want to use block cells in. Right click on the sheet and click
on Add>Cell. Browse to the directory where you have saved the block cell and choose the cell. Click on
the sheet to place the block cell in the open sheet.

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Fig: Two block cells combined to make a bigger design.

2. If you already have a block cell in your design you can select the cell, click on the Copy button in the
ADK Edit palette in the right to copy the block cell.
3. You have to connect the power rails and ground rails of the different block cells for the design to work.
4. Add text-ports after you are done placing all the cells to form a larger layout. Then your design is
complete.
*When you exit the design, IC Station promts you to save the layout. Choose Hierarchy if you have made
block cells from your design to save the block cells as well.

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