ECE210 DIGITAL SYSTEMS

Assignment 2
23rd September, 2015
1. Design a logic circuit
a) J = m( individual digits in your mobile number) + d( last five individual digits in your roll
number)
b) K = M( Individual digits of the product of the non zero digits in your mobile number)+d(digits
in your date of birth {D,D, MM, Y, Y})
Note: If a particular digit repeats consider it only once (either in minterm or max term but NOT in dont
care term)
2. Design a code converter to convert 8421 code to ABCD code. AB corresponds to the last two digits of
your year of birth and CD last two digits of your roll number.
3. Map and then simplify F = ABCD + ABCD + ABCD + ABCD + ABCD. Use 4 X1 MUX to
implement the simplified design.
4. Design a comparator circuit using logic gates.
5. Design a 4-bit even parity detector.
6. Design a 4-bit binary to 2s complement converter by using half adder and inverters (nothing else)
7. Using four full adders (nothing else) design a circuit that will convert XS3 to BCD.
8. Design a BCD to 7 segment decoder.
9. Compare ECE, TTL and CMOS logic families.
10. Give your idea of designing a priority encoder by assuming the priority as per the last four digits in
your mobile number. If a particular digit repeats consider it only once
Example:
Mobile Number
Roll No.
DOB

: 9431806311
: CB.EN.U4ECE07201
: 30/04/1992

1a) J = m(0,1,3,4,6,8,9)+d(2,7)

1b) K = M(1,2,5)+d(0,3,4,9)

Each answer should have the design parameters, design, design from simulation tool, waveform
from simulation tool.
Last date for submission: Before 9th October, 2015 9.00 AM