- 43 -

CHNG 4 THIT K MCH GIAO TIP

4.1. c im ca h vi iu khin AVR
AVR l tn ca mt lot cc b vi iu khin do cng ty Atmel sn xut, c
kin trc RISC (Reduced Instruction Set Computer) l mt kin trc ph bin trong
ca cc b x l hin i vi nhng c tnh sau:
1. Kin trc RISC vi hu ht cc lnh c chiu di c nh, truy nhp b nh np,
lu tr v 32 thanh ghi a nng.
2. Kin trc b nh kiu ng ng cho php lm tng tc x l lnh.
3. C cha b phn ngoi ngay trn chip bao gm cc cng I/O s, cc b bin i
ADC, b nh EEFROM, b nh thi UART, b nh thi RTC, b iu ch
rng xung PWM,.v.v.. c im ny c xem l ni bt so vi nhiu vi iu
khin khc v trong khi cc b vi x l khc phi t to ra b truyn nhn
UART hoc giao din SPI bng phn mm th trn vi iu khin AVR c
tch hp sn:
C 48 ng dn I/O lp trnh c.
b truyn nhn UART lp trnh c.
Mt giao din SPI ng b.
b timer/Counter 8 bit
Mt b timer/Counter 16 bit vi chc nng so snh v bt mu.
Gm bn li ra iu bin rng xung PWM.
Mt ng h thi gian thc (RTC-Timer)
Mt b bin i ADC 10 bit c n 8 knh li vo.
Mt b pht hin trng thi st in p ngun nui.
Mt b so snh Analog
Mt b nh thi Watchdog
4. Hu ht cc lnh ch tr lnh nhy v np/lu tr u c thc hin trong mt
chu k xung nhp.

- 44 5. Hot ng vi tc ng h n 20 MHz. So vi cc h vi iu khin khc th

vi iu khin h ATMEL c tn s xung nhp cho php tng i cao, c th l
t 0 n 20MHz ty theo tng loi c th. Xung nhp do b dao ng to ra
cng chnh l xung nhp ca h thng, khng h phi qua b chia tn nh trong
trng hp cc vi iu khin ra i trc , nn ko theo tc x l lnh cao.
6. Kh nng thc hin lnh trong mt chu k xung nhp, AVR c kh nng t n
tc x l 20 MPIS (triu lnh trong mt giy)

Hnh 4.1 So snh thi gian thc thi lnh gia cc b vi x l

Cc vi iu khin SX cng c tn s xung nhp cao hn cc vi iu khin
AVR nhng li c dng tiu th tng i ln, ngoi ra li khng c cc b phn
ngoi vi trn chp rt tin dng cho ngi dng nh vi iu khin AVR. Chnh cc
b phn ngoi vi tch hp gp phn lm tng tc x l lnh tnh chung cho c
h thng.
7. B nh chng trnh v d liu c tch hp ngay trn chp AVR c ti 3 cng
ngh b nh khc nhau:
B nh EPROM xa c kiu Flash (lun lun lp trnh mi c) dng cho
m chng trnh m ngi dng c th lp trnh c.
B nh EPROM hay PROM xa c bng in, nhng ni dung b nh vn
gi nguyn sau khi tt in p ngun. Chng trnh ngi dng c th c lp
trnh trong thi gian thckhi h thng ang hot ng

- 45 B nh RAM tnh (SRAM) dng cho cc bin, ni dung ca b nh s mt i

khi tt in p ngun. Ngoi ra, vi iu khin AVR c ti 32 thanh ghi lm vic a
nng, tt c u c ni trc tip vi khi ALU (n v logic s hc) v c trao
i trc tip trn vng a ch b nh, c th l 32 u tin ca b nh (0x00 n
0xFF) tng ng vi thanh ghi lm vic a nng R0-R31.
8. Kh nng lp trnh c trong h thng do cch thit k v cng ngh b nh
c s dng m cc vi iu khin c th c lp trnh ngay khi ang cn cp
ngun trn bn mch. Khng cn phi nhc vi iu khin ra ngoi bn mch nh
nhiu h vi iu khin khc. Cc cng giao tip RS-232 v SPI cho php thao
tc d dng thc hin trn h thng.
9. C tc x l ln hn 12 ln so vi cc vi iu khin CISC thng thng.
10. H tr cho vic lp trnh bng ngn ng bc cao, chng hn nh ngn ng C.
11. Tt c cc vi iu khin ang lu hnh trn th trng u c ch to bng
cng ngh CMOS 0.6 m.
12. in p lm vic cho php t 2.7V n 6V.
13. Mt kin trc n gin v hp l s gip ngi dng tm hiu d dng trong thi
gian ngn.
14. Tp lnh AVR c ti 113 lnh cho php lp trnh mt cch d dng v n gin
bng hp ng, nhng cu trc ca b x l Atmel cn cho php lp trnh bng
ngn ng C.
4.2. Cu trc phn cng ca h vi iu khin AVR
4.2.1. Tng quan v kin trc
Cc thanh ghi a nng truy cp nhanh gm 32 thanh ghi 8 bit c truy cp
trong mt chu k xung nhp. iu ny c ngha l trong 1 chu k xung nhp ALU
thc hin c mt php ton: hai ton hng c xut t cc thanh ghi a nng,
php ton c thc hin v kt qu c lu tr li vo tp cc thanh ghi. 6 trong
s 32 thanh ghi ny c th dng lm con tr a ch gin tip 16 bit nh a ch
khng gian d liu v cho php tnh a ch hiu dng. Mt trong 3 con tr a ch

- 46 cng c dng lm con tr a ch cho chc nng tm kim bng hng s. Cc

thanh ghi c chc nng b xung ny l cc thanh ghi 16 bit X,Y,Z.
ALU: H tr cc chc nng s hc v chc nng logic gia cc thanh ghi. Cc
php ton trong thanh ghi cng c thc hin trong ALU.

Hnh 4.2 Kin trc ca b x l AVR

Ngoi ch nh a ch gin tip thanh ghi, ch nh a ch b nh
thng thng cng c th c dng trong tp cc thanh ghi a nng. Nguyn nhn
l cc thanh ghi a nng c gn 32 a ch thp nht trong khng gian d liu t
$00 m $1F nn chng c truy cp nhng v tr thng thng.
Khng gian b nh vo ra cha 64 bit a ch cho cc chc nng ngoi vi ca
CPU nh cc thanh ghi iu khin, b Timer/Counter, b ADC v chc nng I/O
khc. B nh I/O c th truy cp trc tip hoc nh cc v tr trong khng gian d
liu ngay sau cc v tr ca tp cc thanh ghi a nng t a ch $20 n $5F.

- 47 AVR s dng kin trc Harvard vi b nh v bus ring bit cho chng trnh
v d liu. B nh chng trnh c thc thi vi mt ng ng hai tng. Trong
khi mt lnh ang c thc thi th lnh tip theo c nhp vo b nh chng
trnh. Gii php ny cho php vc lnh c thc thi trong mi chu k xung nhp.
B nh chng trnh l b nh Flash lp trnh c.
Trong qu trnh gi ngt v chng trnh con, a ch tr v ca b m lnh
hay b m chng trnh PC c a vo ngn xp. Ngn xp c cp pht
trong b lu d liu SRAM nn kch thc ch b gii hn bi dung lng v
khng gian s dng ca b nh SRAM. Tt c chng trnh ca ngi dng
phi khi to con tr ngn xp SP (Stack Pointer) khi bt u chng trnh (trc
khi chng trnh con v ngt c thc thi). Con tr ngn xp 16 bit SP c truy
cp c/ghi trong khng gian vo/ra. B nh SRAM c th c truy cp d
dng thng qua 5 ch nh a ch c cung cp trong kin trc AVR.
Khi ngt mm do c cc thanh ghi iu khin trong khng gian vo ra v
mt bit cho php ngt ton cc trong thanh ghi trng thi. Mi ngt u c mt
vector ngt ring. Cc ngt c th t u tin tng ng vi th t vector ngt ca
chng, a ch ca vector ngt cng thp th th t u tin cng cao.
4.2.2. Cc thanh ghi a dng
Tt c cc b vi iu khin AVR u c 32 thanh ghi a nng. Mt s trong
cc thanh ghi ny cn c cc chc nng b xung. Tt c thanh ghi c t tn t
R0 n R31, tp thanh ghi c tch thnh hai phn, mi phn c 16 thanh ghi
nh s t R0 n R15 v R16 n R31. Tt c cc lnh thao tc trn cc thanh ghi
u c th truy cp trc tip v truy cp trong chu trnh n n tt c cc thanh
ghi, nhng c mt ngoi l l cc lnh SBCI, SUBI, CPI, ANDI v ORI cng nh
WI, cc lnh ny ch tc ng n cc thanh ghi t R16 n R31.
Cc thanh ghi R0 v R26 n R31 c cc chc nng b sung. Thanh ghi R0
c s dng trong cc lnh np b nh chng trnh LPM (Load Program
Memory), trong khi cc thanh ghi R26 n R31 c s dng lm cc thanh ghi

- 48 con tr nh trong hnh minh ha bn di. Cc thanh ghi con tr ny c s dng

trong nhiu lnh gin tip trong thanh ghi.

Hnh 4.3 Tp thanh ghi ca vi iu khin AVR

4.2.3. Cng ra vo
Tt c cc vi iu khin AVR u c mt lng ln cc cng vo ra nm trong
khong 3 bit trn vi iu khin loi 90S2313 n 48 bit Mega103. Tt c cc cng
vo/ra ca vi iu khin AVR u chu c dng in n 20mA nn rt thch
hp vi vic iu khin trc tip cc led v khng cn n cc mch m b sung.
Tt c cc cng vo/ra u c 3 a ch vo/ra i km vi chng, ba a ch vo
ra u cn c t cu hnh cho cc bt ring bit thnh li vo hoc thnh li ra,
a ch khc c cn n xut d liu v a ch th 3 dng c d liu v
(li vo).
Cc cng c nh s DDRx, PORTx, PINx cho mt cng x cho trc.
c d liu ca phn li vo ca mt cng, ta s dng thanh ghi PINx.
Thanh ghi PINx c ni tip vi chn ca cng. Chn ca cng c th cp tn
hiu duy tr trng thi theo mc in p cao (pull up) bn trong bng cch ghi
gi tr 1 vo bit cng v tr PORTx. Cc in tr pull up c gi tr 30k n
150k. Gi tr tng ng ca dng in l 160 A n 33A.

- 49 -

Hnh 4.4 Cc port c v ghi

Ngc li nu mt gi tr 0 c ghi vo bit cng a ch PORTx th trng
thi pull up v chn li vo chuyn theo trng thi tr khng cao.
4.2.4. B nh SRAM
B nh SRAM c trong hu ht cc b vi x l ca vi iu khin AVR. Dung
lng ca b nh SRAM thay i t 128 byte ti 4kbyte. B nh SRAM c truy
nhp bng cch s dng nhiu lnh truy nhp d liu hoc trc tip hoc gin tip.
B nh SRAM cng c s dng cho ngn xp, thi gian truy nhp vo b nh
SRAM bng 2 chu k ng h.
Giao tip vi b nh SRAM ngoi.
Trn cc b vi iu khin AVR c ln u c kh nng kt ni vi b nh
SRAM bn ngoi. cho php truy nhp b nh SRAM ngoi trn PortA v
PortC ca cc b iu khin cng nh tn hiu ALE dng cho vic phn knh a
ch/d liu, bit SRE (bit 7) trong thanh ghi MCUCR c t ln 1. Thi gian
truy nhp mc nh i vi qu trnh nhp ln SRAM ngoi l bng 3 chu k ng
h. Thi gian ny c th lm tng ln 4 chu k ng h bng cch thit lp bit SRW

- 50 (bit6) trong thanh ghi MCUCR. Hnh sau minh ha chu trnh truy nhp m rng
vi mt trng thi ch b sung thm.

Hnh 4.5 Kt ni SRAM ngoi vi b vi iu khin

4.2.5. Cu trc ngt
Ngt l mt c cu iu khin dng lnh, c cu ny c thit k trn hu ht
cc b vi iu khin. Trong qu trnh giao tip ca h thng b vi x l vi th gii
bn ngoi, nhiu s vic xy ra theo cch khng ng b, iu ny gy kh khn
cho b x l khi m phi kim tra tt c cc thit b gim st s di chuyn ca
d liu. Ngc li, s tr nn tt hn nu cc thit b ny c th loan bo s n
ni ca d liu. y l c nhng g m c cu ngt phi thc hin. Thit b ngoi
vi s ngt vic thc thi chng trnh chnh v b x l tm ngng vic thc thi
chng trnh bnh thng kim tra ngun ngt v thc hin nhng thao tc p
ng cn thit. Sau khi hon thnh nhng thao tc cn thit, vic thc thi chng
trnh b ngt s tip tc. Chng trnh ngt ch n gin ging ht nh mt
chng trnh con ch ngoi tr mt c im l vic thc thi ca on chng trnh
ngt ny khng b b x l chn trc l s xut hin vo thi im c th no.
B vi iu khin AVR c rt nhiu cu trc ngt. Kh nng ngt c chu
cp cho hu ht cc thit b ngoi vi sao cho chng trnh chnh khng cn phi
thng xuyn kim tra cc thit b ny.
1. Thit b ngoi vi ngt b x l

- 51 2. Vic thc thi lnh hin ti c hon thnh.

3. a ch ca lnh tip theo c lu tr trn ngn xp (thuc phn cng hoc
phn mm)
4. a ch ISR (on chng trnh ngt) c np vo b m chng trnh.
5. B x l ISR.
6. Vic hon thnh cc thao tc thc thi ISR c ch bo bng lnh RETI.
7. B x l np b m chng trnh vi gi tr c lu tr trn ngn xp v
vic thc thi chng trnh bnh thng li c tip tc.
4.2.6. B so snh analog
B so snh analog so snh cc gi tr in p li vo, c th l li vo AINO
(AC+) v AIN1 (AC-) vi nhau. Nu nh in p li vo AIN0 ln hn AIN1 th
li ra ca b so snh analog ACO (Analog Computer Output) c t ln mc 1.
Li ra ny c th cho b Timer/Counter 1 trigger xa ngt b so snh analog.

Hnh 4.6 S khi ca b so snh Analog

B so snh analog c iu khin thng qua thanh ghi iu khin v trng
thi so snh analog, thng vit tt l ACSR, ti a ch $08 trong vng a ch I/O
hoc a ch nh $28 trong vng a ch nh d liu.
Bng 4.1 Sp xp cc chn ca b so snh Analog

- 52 4.2.7. B bin i A/D bn trong

Cc vi iu khin AVR loi AT90S4434/8535 v Atmega 103/603 c mt b
bin i ADC vi phn gii l 10 bit.
Ngoi b ADC cn c b dn knh li vo, mi li c th c dn ring l ti b
hin th ADC.

Hnh 4.7 S khi b bin i ADC

- 53 Bng 4.2 Cc thanh ghi iu khin b bin i ADC

Thanh ghi iu khin b dn knh ADC

$07 ($27)

ADMUX
Thanh ghi trng thi iu khin ADC

$06 ($26)

ADCSR
Thanh ghi d liu ADC (HIGH)

$05 ($25)

ADCH
Thanh ghi d liu ADC (LOW)

$04 ($24)

ADCL
B bin i ADC c bin i qua 4 thanh ghi ADMUX, ADCSR,ADCH v
ADCR trong vng a ch vo ra. Bng thanh ghi 3DMUX, mt trong 8 knh c
la chn bin i tn hiu s. B bin i c th hot ng trong hai ch :
-

Qu trnh bin i c ngi dng khi ng

Qu trnh bin i din ra lin tc

Bng 4.3 S sp xp cc chn li vo ca b bim i ADC
Tn hiu

AT90S8535/4434

ADC0

PA0

ADC1

PA1

ADC2

PA2

ADC3

PA3

ADC4

PA4

ADC5

PA5

ADC6

PA6

ADC7

PA7

Vic kt thc qu trnh bin i ngha l thi im m mt tn hiu analog

c s ha v sn sng ch x l tip tc, s c bo hiu qua mt c trong
thanh ghi trng thi ADC (ADCSR). Trong thanh ghi ADCSR ny ngi dng c

- 54 th la chn mt trong hai ch . Kt qu ca qu trnh bin i A/D c t

cc thanh ghi ADCH (bit 8 v 9) v ADCL (bit 0 n 7).
4.2.8. B nh thi watchdog bn trong
B nh thi Watchdog l b nh thi iu khin c v c s dng lm
thit b nh thc trong trng hp phn mm b ri vo mt hoc mt s vng lp
v tn hoc trong trng hp vic thc thi chng trnh b mc li. B nh thi
watchdog c mt li ra, c kh nng t li b iu khin. Hnh bn di.
Mch nh thi watchdog timer c gi nhp t mt b dao ng RC ring
bit trn chip. Bng cch iu khin mch chia tn s timer, khong thi gian reset
mch Watchdog c th iu chnh nh hnh minh ha trong bng sau cc khong
reset,mch Watchdog cng ph thuc vo in p ngun nui.

Hnh 4.8 S khi ca b nh thi Watchdog

Ch hot ng tit kim nng lng:
B vi x l AVR c nhiu kh nng lm gim nng lng tiu th chuyn
sang trng thi ng (sleep mode), bit SE trong MCUCR (m thanh ghi iu khin
b x l) phi c t ln 1, mt lnh sleep cn phi c thc thi. Nu mt
ngt c cho php xut hin trong khi MCU ang trng thi ng, th MCU s
thc dy thc thi on chng trnh (routine) ngt, v li tip tc thc thi t lnh
k tip theo lnh sleep. Ni dung ca tp thanh ghi, SRAM, v b nh I/O vn
c gi nguyn. Nu mt tn hiu reset xut hin trong trng thi ng th MCU s
thc dy v thc thi t vector reset.

- 55 Khi SM b xa v khng th lnh sleep bt buc MCU chuyn sang ch

ngh, lm ngng hot ng ca CPU nhng cho php b Timer/Counter Watchdog
v ngt h thng tip tc hot ng. c tnh ny cho php MCU nh thc v
ngt c trigger t bn ngoi cng nh ngt bn trong ging nh ngt trn b
nh thi v t li Watchdog. Nu nh s nh thc t ngt b so snh analog
khng c yu cu, th b so snh analog c th b ngt ngun nui bng cch t
bit ACD vo thanh ghi iu khin v trng thi analog ACSR. Bin php ny lm
gim dng tiu th trong ch ngh.
Khi MCU b nh thc khi ch ngh, n v CPU khi ng chng trnh
chp hnh ngay lp tc.
Khi bit SM c t ln 1, lnh sleep bt buc MCU chuyn sang ch tit
kim nng lng hay gim dng tiu th. Trong ch ny b dao ng ngoi b
ngng hot ng, trong khi cc ngt ngoi v Watchdog (nu ang trng thi cho
php) hot ng. Ch thao tc t li (reset) bn ngoi.
Thao tc t li Watchdog (nu ang trng thi cho php hot ng) hoc
ngt theo mc ngoi ln INT0 hoc INT1 mi c th nh thc MCU. Ch rng
mt khi ngt trigger theo nc c s dng cho vic nh thc khi trng thi tit
kim nng lng th mc thp hn cn nng lng gi trong khong thi gian di
hn thi gian lm tr di nht (Time out) i vi thao tc reset TOUT. Nu khng
th thit b s khng thc dy.
4.3. Gii thiu h vi iu khin Atmega 16
4.3.1. c im
Atmega16 l b vi iu khin RISC 8 bit tiu th t nng lng da trn kin
trc RISC AVR. Bng vic thc hin cc lnh mnh trong mt chu k xung nhp,
Atmega16 t n tc x l lnh ln n 1 triu lnh/giy tn s 1MHz. Vi
iu khin ny cn cho php ngi thit k h thng ti u ha mc tiu th
nng lng m vn m bo tc x l.
Phn ct li ca AVR kt hp tp lnh phong ph v s lng vi 32 thanh ghi
lm vic a nng. Ton b 32 thanh ghi u c ni vi ALU cho truy cp hai

- 56 thanh ghi c lp bng mt lnh n trong mt chu k xung nhp. Kin trc t tc
x l nhanh gp 10 ln so vi vi iu khin CISC (Complex Instruction Set
Computer ) thng thng.
Atmega16 vi kin trc RISC c ch tiu cht lng cao v tiu th nng lng
t:
131 lnh hu ht c thc hin trong mt chu k xung nhp.
32x8 thanh ghi lm vic a nng.
Tc x l lnh ln n 16 triu lnh/giy tn s 16MHz.
B nh d liu v b nh chng trnh khng t mt d liu:
16K byte b nh Flash lp trnh c ngay trn h thng, c th ghi xo
10000 ln.
512 byte b nh EEFROM lp trnh c ngay trn h thng, c th ghi
xa 100000 ln.
1K byte b nh SRAM.
Kha bo mt phn mm lp trnh c.
Giao din ni tip SPI lp trnh ngay trn h thng.
Cc tnh nng ngoi vi:
Hai b m/ b nh thi 8 bit vi ch so snh v chia tn s tch bit.
Mt b nh thi 16 bit vi ch so snh, chia tn s tch bit v ch
bt mu (Capture Mode).
B m thi gian thc (RTC) vi b dao ng tch bit.
Bn knh PWM iu ch rng xung.
B bin i ADC bn trong 8 knh 10 bit.
B USART ni tip lp trnh c.
B nh thi Watchdog lp trnh c vi b dao ng trn chip.
B so snh Analog ngay trn chip.
Cc tnh nng vi iu khin c bit:
C mch power - on reset v c th reset bng phn mm.
Cc ngun ngt ngoi v trong.

- 57 C 6 ch ng: ngh (Idle). Tit kim nng lng (power save) v

power down, ADC Noise Reduction, Standby and Extended Standby.
Tn s lm vic c th thay i c bng phn mm.
Vo ra v cc cch ng v
32 ng vo ra lp trnh c.
44 chn dn kiu v vung (TQFP)
in th lm vic:
VCC = 2,7V n 5,5V i vi Atmega16L.
VCC = 4,5V n 5,5V i vi Atmega16.
Vng tc lm vic:
0 n 8 MHz i vi Atmega16L.
0 n 16 MHz i vi Atmega16.
4.3.2. S chn Atmega16

Hnh 4.9 S chn Atmega16

- 58 4.3.3. S khi ca Atmega16

Hnh 4.10 S khi vi iu khin AVR Atmega16

4.3.4. M t chc nng cc chn Atmega16
Vcc : in p ngun nui

- 59 GND : ni t
PORT A (PA0 PA7) : c nhiu chc nng:
- L ng vo tn hiu chuyn i A/D
- L cng vo ra 8 bit nu nh bin i A/D khng s dng, cc chn ca
Port A c cc in tr ni ln ngun dng. Port A c th cung cp
ngun in 20mA v iu khin trc tip led hin th.
- Khi cc chn Port A l cc li vo c t xung mc thp bn ngoi
chng s l ngun dng nu nh cc in tr ni ln ngun dng c
kch hot. Cc chn ny s trng thi tng tr cao khi tn hiu reset
mc tch cc hoc ngay c khi khng c tn hiu gi nhp.
PORT B (PB0 PB7)
- L cng vo ra 8 bit, c in tr ko ln bn trong, c th cung cp
dng in 20mA. Khi port B l port nhp vo (in put) v cc ng ra
mc thp (low) th port B ng vai tr l ngun dng nu cc in tr
ko ln c kch hot. Port B s trng thi tng tr cao khi vi iu
khin b reset hoc khi khng c dao ng.
PORT C (PC0 PC7)
- L cng vo ra theo hai hng 8 bit. Cc chn ca Port C c cc in tr
ni ln ngun dng. Ng ra port C c th cho dng 20mA i qua v
iu khin trc tip led hin th.
- Khi cc chn port C l cc li vo c t xung mc thp t bn ngoi,
chng s l ngun dng nu cc in tr ni ln ngun dng c kch
hot. cc chn ny s trng thi tng tr cao khi tn hiu reset mc
tch cc hoc ngay c khi khng c tn hiu gi nhp.
PORT D (PD0 PD7)
- L cng vo ra theo hai hng 8 bit. Cc chn ca Port D c cc in tr
ni ln ngun dng. Ng ra port D c th cho dng 20mA i qua v
iu khin trc tip led hin th. Khi cc chn port D l cc li vo c
t xung mc thp t bn ngoi, chng s l ngun dng nu cc in

- 60 tr ni ln ngun dng c kch hot. cc chn ny s trng thi tng

tr cao khi tn hiu reset mc tch cc hoc ngay c khi khng c tn
hiu gi nhp.
- Cung cp cc tnh nng tng ng vi cc chc nng c bit.
Reset: l li vo t li. B vi iu khin s c t li khi chn ny mc
thp trong hn 50ns ngay c khi c tn hiu gi nhp. Cc xung ngn hn
khng to ra tn hiu t li.
XTAL1: Li vo mch khuch i o v li vo mch to xung nhp bn
trong.
XTAL2: Li vo b khuch i o.
ICP: Chn vo c chc nng bt tn hiu cho Timer/Cuonter 1
ALE: L chn tn hiu cho php cht a ch (adress latch enable) c dng
khi truy nhp b nh ngoi. Xung ALE c dng cht bit a ch trong
chu k truy cp b nh th nht. Sau cc chn AD0 AD7 c dng
lm cc ng d liu trong chu k truy nhp b nh th hai (AT90S8515).
B to dao ng thch anh: XTAL1 v XTAL2 ln lt l li vo v li ra
ca mt b khuch i o, b khuch i ny c b tr lm b to dao
ng trn chip nh hnh 4.3. Mt b cng hng tinh th thch anh hoc mt
b cng hng gm c th s dng. iu khin vi iu khin bng ngun
xung nhp bn ngoi th chn XTAL2 khng v ni XTAL mt vi tn
hiu dao ng bn ngoi.
4.4. Gii thiu vi iu khin Atmega8
4.4.1. c im
Vi iu khin Atmega8 ca hng ATMEL l mt loi vi iu khin AVR mi
vi kin trc rt phc tp.
Atmega 8 l b vi iu khin RISC 8 bit tiu th nng lng nhng t hiu
sut rt cao, da trn kin trc RISC AVR. Bng vic thc hin cc lnh trong mt
chu k xung nhp, Atmega8 t c tc x l d liu ln n 1 triu lnh/giy

- 61 tn s 1MHz. Atmega8 cn cho php ngi thit k h thng ti u ho mc

tiu th nng lng m vn m bo tc x l.
Atmega 8 tch hp y cc tnh nng nh b chuyn i ADC 10bit, b
so snh, b truyn nhn ni tip, b nh thi, b m thi gian thc, b iu ch
rng xungDo ta phi nghin cu v khai thc trit cc tnh nng ny
ng dng hiu qu vo nhng mch trong thc t.
Atmega8 s dng kin trc RISC (Reduced Instruction Set Computer) AVR.
Atmega8 vi kin trc RISC c ch tiu cht lng cao v tiu th nng lng
t:
- 130 lnh hu ht c thc hin trong mt chu k xung nhp.
- 32 thanh ghi lm vic a nng.
- Tc x l lnh ln n 16 triu lnh/giy tn s 16MHz.
B nh d liu v b nh chng trnh khng t mt d liu:
- 8K byte b nh Flash lp trnh c ngay trn h thng, c th np xo
10000 ln.
- 512 byte b nh EEFROM lp trnh c ngay trn h thng, c th ghi
xa 100000 ln.
- 1K byte b nh SRAM.
- C th giao tip vi 8K byte b nh ngoi.
- Kha bo mt phn mm lp trnh c.
- Giao din ni tip SPI lp trnh ngay trn h thng.
Cc tnh nng ngoi vi:
- Hai b m/ b nh thi 8 bit vi ch so snh v chia tn s tch bit.
- Mt b nh thi 16 bit vi ch so snh, chia tn s tch bit v ch
bt mu (Capture Mode).
- B m thi gian thc (RTC) vi b dao ng tch bit.
- B iu ch rng xung PWM 8 bit.
- B bin i ADC bn trong 8 knh 10 bit.
- 2 b USART ni tip lp trnh c.

- 62 - B nh thi Watchdog lp trnh c vi b dao ng trn chip.

- Mt b so snh Analog.
Cc tnh nng vi iu khin c bit:
- C mch power - on reset v c th reset bng phn mm.
- Cc ngun ngt ngoi v trong.
- C 5ch ng: ngh (Idle). Tit kim nng lng (power save) v
power down, ADC Noise Reduction, Standby.
- Tn s lm vic c th thay i c bng phn mm.
Vo ra v cc cch ng v
- 23 ng vo ra lp trnh c.
- 32 chn dn kiu v vung (TQFP)
in th lm vic:
- VCC = 2,7V n 5,5V i vi Atmega8L.
- VCC = 4,5V n 5,5V i vi Atmega8.
Vng tc lm vic:
- 0 n 8 MHz i vi Atmega8L.
- 0 n 16 MHz i vi Atmega8.
4.4.2. S chn Atmega8

Hnh 4.11 S chn Atmega8

- 63 4.4.3. S khi ca Atmega8

Hnh 4.12 S khi vi iu khin AVR Atmega8

4.4.4. M t chc nng cc chn Atmega8
VCC: in p ngun nui.
GND: t.
Port B (PB0PB7)

- 64 - Port B l port I/O 8 bit vi in tr ko ln bn trong, cung cp dng

in 40mA c th iu khin trc tip led n.
- Khi cc chn Port B l cc li vo c t xung mc thp t bn
ngoi, chng s l ngun dng nu nh cc in tr ni ln ngun dng
c kch hot. Cc chn ny s trng thi tng tr cao khi tn hiu
Reset mc tch cc hoc ngay c khi khng c dao ng.
Port C (PC0PC6)
- Port C l port I/O 8 bit vi in tr ko ln bn trong, cung cp dng
in 40mA c th iu khin trc tip led n.
- Khi cc chn Port C l cc li vo c t xung mc thp t bn
ngoi, chng s l ngun dng nu nh cc in tr ni ln ngun dng
c kch hot. Cc chn ny s trng thi tng tr cao khi tn hiu
Reset mc tch cc hoc ngay c khi khng c dao ng.
- Port C cng ng vai tr nh 8 ng a ch cao t A8 n A15 khi kt
ni b nh SRAM bn ngoi.
Port D (PD0PD7)
- Port D l port I/O 8 bit vi in tr ko ln bn trong, cung cp dng
in 40mA c th iu khin trc tip LED n.
- Khi cc chn Port D l cc li vo c t xung mc thp t bn
ngoi, chng s l ngun dng nu nh cc in tr ni ln ngun dng
c kch hot. Cc chn ny s trng thi tng tr cao khi tn hiu
Reset mc tch cc hoc ngay c khi khng c dao ng.
Reset: Ng vo c t li. ATmega8 s c t li khi chn ny mc thp
trong hn 50ns hoc ngay c khi khng c tn hiu xung clock. Cc xung ngn
hn khng to ra tn hiu t li.
AVCC: Cung cp ngun cho Port C v b chuyn i ADC hot ng. Ngay khi
khng s dng b chuyn i ADC th chn AVCC vn phi c kt ni ti
ngun VCC.
AREF: y l chn iu chnh in p tham chiu cho chuyn i A/D.

- 65 XTAL1: Ng vo b khuch i o v ng vo mch to xung nhp bn ngoi.

XTAL2: Ng ra b khuch i o.
B to dao ng thch anh :
- XTAL1 v XTAL2 ln lt l li vo v li ra ca mt b khuch i
o, b khuch i ny c b tr lm b to dao ng trn chip
- iu khin c b Vi iu Khin t mt ngun xung nhp bn
ngoi, chn XTAL2 khng, chn XTAL1 c ni vi tn hiu dao
ng bn ngoi.