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Colour Television

Chassis

LC10.1L
LA

18850_000_100107.eps
100209

Contents

Page

Revision List
2
Technical Specifications and Connections
2
Precautions, Notes, and Abbreviation List
4
Mechanical Instructions
8
Service Modes, Error Codes, and Fault Finding 13
Alignments
19
Circuit Descriptions
21
IC Data Sheets
27
Block Diagrams
Wiring Diagram 32" - 40" (Dali)
37
Block Diagram Video
38
Block Diagram Audio
39
Block Diagram Control & Clock Signals
40
Block Diagram I2C
41
Supply Lines Overview
42
10. Circuit Diagrams and PWB Layouts
Diagram
SSB: DC-DC
(B01) 43
SSB: Tuner
(B02A) 44
SSB: Digital Demodulator
(B02B) 45
SSB: Class-D & Muting
(B03) 46
SSB: MTK Power
(B04A) 47
SSB: DDR
(B04B) 48
SSB: Controller
(B04C) 49
SSB: LVDS Display
(B04D) 50
SSB: HDMI & Multiplexer
(B05) 51
SSB: Analog I/O - Headphone
(B06A) 52
SSB: Analog I/O - Audio
(B06B) 53
SSB: Analog I/O - Video
(B06C) 54
SSB: USB
(B06D) 55
SSB: VGA
(B06E) 56
SSB: Hospitality
(B07) 57
SSB: TCON Control
(B08A) 58
SSB: TCON DC/DC
(B08B) 59
SSB: P Gamma, VCOM & NVM
(B08C) 60

Contents

1.
2.
3.
4.
5.
6.
7.
8.
9.

Page

SSB: MPD
SSB: Mini LVDS
SSB: SRP List Explanation
SSB: SRP List
IR/LED Board
Keyboard Control Board
11. Styling Sheets
Styling Sheet Dali 32" - 40"

(B08D) 61
(B08E) 62
65
66
(J) 68
(E) 69

63-64
63-64

68
70

71

PWB
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64
63-64

Copyright 2010 Koninklijke Philips Electronics N.V.


All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

Published by JA/JY 1064 BU TV Consumer Care

Printed in the Netherlands

Subject to modification

EN 3122 785 18980


2010-Apr-06

EN 2

1.

Revision List

LC10.1L LA

1. Revision List
Manual xxxx xxx xxxx.0
First release.

2. Technical Specifications and Connections


Table 2-1 Described Model numbers

Index of this chapter:


2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections

CTN

Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).

2.1

Published in:
3122 785 18980

40PFL3605D/78

2.2

Technical Specifications

Directions for Use


You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com

For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.

2.3

Styling

32PFL3605D/78 Dali

Connections

Side connector

Back connector
4

Bottom connector
6

10

18980_001_100330.eps
100402

Figure 2-1 Connection overview


Note: The following connector colour abbreviations are used
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green,
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1

Side Connections
1 - USB2.0
1

10000_022_090121.eps
090121

Figure 2-2 USB (type A)


1
2
3
4

- +5V
- Data (-)
- Data (+)
- Ground

Gnd

2 - HDMI: Digital Video/Audio - In (see HDMI 1)


2010-Apr-06

k
jk
jk
H

Technical Specifications and Connections


2.3.2

Back Connections

LC10.1L LA

EN 3

9 - VGA: Video RGB - In


1

3 - CVI-1: Cinch: Video YPbPr - In, Audio - In


Wh - Audio - L
0.5 VRMS / 10 k
Rd - Audio - R
0.5 VRMS / 10 k
Rd - Video Pr
0.7 VPP / 75
Bu - Video Pb
0.7 VPP / 75
Gn - Video Y
1 VPP / 75

5
10

H
k
j

5 - AV IN: S-Video (Hosiden): Video Y/C - In


1 - Ground Y
Gnd
2 - Ground C
Gnd
3 - Video Y
1 VPP / 75
4 - Video C
0.3 VPP / 75

H
H
j
j

jq
jq
jq

10000_002_090121.eps
090127

Figure 2-4 VGA Connector


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

- Video Red
- Video Green
- Video Blue
- n.c.
- Ground
- Ground Red
- Ground Green
- Ground Blue
- +5VDC
- Ground Sync
- n.c.
- DDC_SDA
- H-sync
- V-sync
- DDC_SCL

10 - Aerial - In
- - F-type

Bottom Connections
6 - CVI-2: Cinch: Video YPbPr - In, Audio - In
Wh - Audio - L
0.5 VRMS / 10 k
Rd - Audio - R
0.5 VRMS / 10 k
Rd - Video Pr
0.7 VPP / 75
Bu - Video Pb
0.7 VPP / 75
Gn - Video Y
1 VPP / 75

jq
jq
jq
jq
jq

7 - Cinch: Digital Audio - Out


Bk - Coaxial
0.4 - 0.6VPP / 75 ohm

kq

15

11

jq
jq
jq
jq
jq

4 - Service Connector (UART)


1 - Ground
Gnd
2 - UART_TX
Transmit
3 - UART_RX
Receive

5 - AV IN: Cinch: Video CVBS - In, Audio - In


Ye - Video CVBS
1 VPP / 75 ohm
Wh - Audio L
0.5 VRMS / 10 kohm
Rd - Audio R
0.5 VRMS / 10 kohm
2.3.3

2.

0.7 VPP / 75
0.7 VPP / 75
0.7 VPP / 75

j
j
j

Gnd
Gnd
Gnd
Gnd
+5 V
Gnd

H
H
H
H
j
H

DDC data
0-5V
0-5V
DDC clock

j
j
j
j

Coax, 75

8 - HDMI 1: Digital Video, Digital Audio - In


19
18

1
2

10000_017_090121.eps
090428

Figure 2-3 HDMI (type A) connector


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- Easylink
- n.c.
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground

Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Control channel/CEC

j
H
j
j
H
j
j
H
j
j
H
j
jk

DDC clock
DDC data
Gnd

j
jk
H
j
j
H

Hot Plug Detect


Gnd

9 - Mini Jack: Audio - In DVI/VGA


Bk - Audio
0.5 VRMS / 10 k

jo

2010-Apr-06

EN 4

3.

LC10.1L LA

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List


Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List

3.1

Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard. Of de set
ontploft!
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
Route the wire trees correctly and fix them with the
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage.
Check the strain relief of the Mains/AC Power cord for
proper function.
Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the on position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch off the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

3.2

Warnings

All ICs and many other semiconductors are susceptible to


electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched on.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

3.3

Notes

3.3.1

General

2010-Apr-06

Measure the voltages and waveforms with regard to the


chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.2

Schematic Notes

3.3.3

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for


NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

All resistor values are in ohms, and the value multiplier is


often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
Resistor values with no multiplier may be indicated with
either an E or an R (e.g. 220E or 220R indicates 220 ).
All capacitor values are given in micro-farads ( = 10-6),
nano-farads (n = 10-9), or pico-farads (p = 10-12).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An asterisk (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed on the Philips
Spare Parts Web Portal.

Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.

3.3.4

BGA (Ball Grid Array) ICs


Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
Magazine, then go to Repair downloads. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.

3.3.5

Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
To reach a solder-tip temperature of at least 400C.
To stabilize the adjusted temperature at the solder-tip.
To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around
360C - 380C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch off unused equipment or
reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

Precautions, Notes, and Abbreviation List


3.3.6

3.4

Alternative BOM identification


It should be noted that on the European Service website,
Alternative BOM is referred to as Design variant.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number 1
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a 2 (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
MODEL

: 32PF9968/10

PROD.NO: AG 1A0617 000001

MADE IN BELGIUM
220-240V ~ 50/60Hz
128W
VHF+S+H+UHF

BJ3.0E LA

10000_024_090121.eps
100105

Figure 3-1 Serial number (example)


3.3.7

3.3.8

Practical Service Precautions

It makes sense to avoid exposure to electrical shock.


While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

3.

EN 5

Abbreviation List
0/6/12

AARA

ACI

ADC
AFC

AGC

AM
AP
AR
ASF

ATSC

ATV
Auto TV

AV
AVC
AVIP
B/G
BDS
BLR
BTSC

Board Level Repair (BLR) or Component Level Repair


(CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!

LC10.1L LA

B-TXT
C
CEC

CL
CLR
ComPair
CP
CSM
CTI

CVBS
DAC
DBE
DCM

DDC
D/K
DFI

SCART switch control signal on A/V


board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
format
Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
Analogue to Digital Converter
Automatic Frequency Control: control
signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that
controls the video input of the feature
box
Amplitude Modulation
Asia Pacific
Aspect Ratio: 4 by 3 or 16 by 9
Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
Advanced Television Systems
Committee, the digital TV standard in
the USA
See Auto TV
A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
External Audio Video
Audio Video Controller
Audio Video Input Processor
Monochrome TV system. Sound
carrier distance is 5.5 MHz
Business Display Solutions (iTV)
Board-Level Repair
Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
Blue TeleteXT
Centre channel (audio)
Consumer Electronics Control bus:
remote control bus on HDMI
connections
Constant Level: audio output to
connect with an external amplifier
Component Level Repair
Computer aided rePair
Connected Planet / Copy Protection
Customer Service Mode
Color Transient Improvement:
manipulates steepness of chroma
transients
Composite Video Blanking and
Synchronization
Digital to Analogue Converter
Dynamic Bass Enhancement: extra
low frequency amplification
Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
See E-DDC
Monochrome TV system. Sound
carrier distance is 6.5 MHz
Dynamic Frame Insertion
2010-Apr-06

EN 6

3.

DFU
DMR
DMSD
DNM
DNR
DRAM
DRM
DSP
DST

DTCP

DVB-C
DVB-T
DVD
DVI(-d)
E-DDC

EDID
EEPROM
EMI
EPG
EPLD
EU
EXT
FDS
FDW
FLASH
FM
FPGA
FTV
Gb/s
G-TXT
H
HD
HDD
HDCP

HDMI
HP
I
I2 C
I2 D
I2 S
IF
IR
IRQ
ITU-656

2010-Apr-06

LC10.1L LA

Precautions, Notes, and Abbreviation List

Directions For Use: owner's manual


Digital Media Reader: card reader
Digital Multi Standard Decoding
Digital Natural Motion
Digital Noise Reduction: noise
reduction feature of the set
Dynamic RAM
Digital Rights Management
Digital Signal Processing
Dealer Service Tool: special remote
control designed for service
technicians
Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
Digital Video Broadcast - Cable
Digital Video Broadcast - Terrestrial
Digital Versatile Disc
Digital Visual Interface (d= digital only)
Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
Extended Display Identification Data
(VESA standard)
Electrically Erasable and
Programmable Read Only Memory
Electro Magnetic Interference
Electronic Program Guide
Erasable Programmable Logic Device
Europe
EXTernal (source), entering the set by
SCART or by cinches (jacks)
Full Dual Screen (same as FDW)
Full Dual Window (same as FDS)
FLASH memory
Field Memory or Frequency
Modulation
Field-Programmable Gate Array
Flat TeleVision
Giga bits per second
Green TeleteXT
H_sync to the module
High Definition
Hard Disk Drive
High-bandwidth Digital Content
Protection: A key encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a snow vision mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP software key
decoding.
High Definition Multimedia Interface
HeadPhone
Monochrome TV system. Sound
carrier distance is 6.0 MHz
Inter IC bus
Inter IC Data bus
Inter IC Sound bus
Intermediate Frequency
Infra Red
Interrupt Request
The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.

ITV
LS

LATAM
LCD
LED
L/L'

LPL
LS
LVDS
Mbps
M/N
MHEG

MIPS

MOP
MOSFET
MPEG
MPIF
MUTE
MTV
NC
NICAM

NTC
NTSC

NVM
O/C
OSD
OAD

OTC
P50
PAL

SDI), is a digitized video format used


for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
Institutional TeleVision; TV sets for
hotels, hospitals etc.
Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
Latin America
Liquid Crystal Display
Light Emitting Diode
Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LG.Philips LCD (supplier)
Loudspeaker
Low Voltage Differential Signalling
Mega bits per second
Monochrome TV system. Sound
carrier distance is 4.5 MHz
Part of a set of international standards
related to the presentation of
multimedia information, standardised
by the Multimedia and Hypermedia
Experts Group. It is commonly used as
a language to describe interactive
television services
Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
Matrix Output Processor
Metal Oxide Silicon Field Effect
Transistor, switching device
Motion Pictures Experts Group
Multi Platform InterFace
MUTE Line
Mainstream TV: TV-mode with
Consumer TV features enabled (iTV)
Not Connected
Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
Negative Temperature Coefficient,
non-linear resistor
National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
Non-Volatile Memory: IC containing
TV related data such as alignments
Open Circuit
On Screen Display
Over the Air Download. Method of
software upgrade via RF transmission.
Upgrade software is broadcasted in
TS with TV channels.
On screen display Teletext and
Control; also called Artistic (SAA5800)
Project 50: communication protocol
between TV and peripherals
Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=

Precautions, Notes, and Abbreviation List

PCB
PCM
PDP
PFC
PIP
PLL

POD

POR
PSDL
PSL
PSLS

PTC
PWB
PWM
QRC
QTNR
QVCP
RAM
RGB

RC
RC5 / RC6
RESET
ROM
RSDS
R-TXT
SAM
S/C
SCART

SCL
SCL-F
SD
SDA
SDA-F
SDI
SDRAM
SECAM

SIF
SMPS
SoC
SOG
SOPS
SPI

S/PDIF
SRAM
SRP
SSB
SSC
STB
STBY
SVGA

3.575612 MHz and PAL N= 3.582056


MHz)
Printed Circuit Board (same as PWB)
Pulse Code Modulation
Plasma Display Panel
Power Factor Corrector (or Preconditioner)
Picture In Picture
Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set)
Power On Reset, signal to reset the uP
Power Supply for Direct view LED
backlight with 2D-dimming
Power Supply with integrated LED
drivers
Power Supply with integrated LED
drivers with added Scanning
functionality
Positive Temperature Coefficient,
non-linear resistor
Printed Wiring Board (same as PCB)
Pulse Width Modulation
Quasi Resonant Converter
Quality Temporal Noise Reduction
Quality Video Composition Processor
Random Access Memory
Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
Remote Control
Signal protocol from the remote
control receiver
RESET signal
Read Only Memory
Reduced Swing Differential Signalling
data interface
Red TeleteXT
Service Alignment Mode
Short Circuit
Syndicat des Constructeurs
d'Appareils Radiorcepteurs et
Tlviseurs
Serial Clock I2C
CLock Signal on Fast I2C bus
Standard Definition
Serial Data I2C
DAta Signal on Fast I2C bus
Serial Digital Interface, see ITU-656
Synchronous DRAM
SEequence Couleur Avec Mmoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
Sound Intermediate Frequency
Switched Mode Power Supply
System on Chip
Sync On Green
Self Oscillating Power Supply
Serial Peripheral Interface bus; a 4wire synchronous serial data link
standard
Sony Philips Digital InterFace
Static RAM
Service Reference Protocol
Small Signal Board
Spread Spectrum Clocking, used to
reduce the effects of EMI
Set Top Box
STand-BY
800 600 (4:3)

SVHS
SW
SWAN
SXGA
TFT
THD
TMDS
TS
TXT
TXT-DW
UI
uP
UXGA
V
VESA
VGA
VL
VSB
WYSIWYR

WXGA
XTAL
XGA
Y
Y/C
YPbPr

YUV

LC10.1L LA

3.

EN 7

Super Video Home System


Software
Spatial temporal Weighted Averaging
Noise reduction
1280 1024
Thin Film Transistor
Total Harmonic Distortion
Transmission Minimized Differential
Signalling
Transport Stream
TeleteXT
Dual Window with TeleteXT
User Interface
Microprocessor
1600 1200 (4:3)
V-sync to the module
Video Electronics Standards
Association
640 480 (4:3)
Variable Level out: processed audio
output toward external amplifier
Vestigial Side Band; modulation
method
What You See Is What You Record:
record selection that follows main
picture and sound
1280 768 (15:9)
Quartz crystal
1024 768 (4:3)
Luminance signal
Luminance (Y) and Chrominance (C)
signal
Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
Component video

2010-Apr-06

EN 8

4.

LC10.1L LA

Mechanical Instructions

4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing
4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly

4.1

Notes:
Figures below can deviate slightly from the actual situation,
due to the different set executions.

Cable Dressing

18980_101_100331.eps
100331

Figure 4-1 Cable dressing 32"

18970_108_100323.eps
100331

Figure 4-2 Adding felt on front cabinet 32"

2010-Apr-06

Mechanical Instructions

LC10.1L LA

4.

EN 9

18980_103_100331.eps
100331

Figure 4-3 Cable dressing 40"

Add 2 felts on Front Cabinet

40PFL3605D/78
&
40PFL3805D/78

FELT (145 x 7 x 0.9)

RIB
END OF RIB

FELT (145 x 7 x 0.9)

END OF RIB
18980_104_100331.eps
100401

Figure 4-4 Adding felt on front cabinet 40"

2010-Apr-06

EN 10
4.2

4.

Mechanical Instructions

LC10.1L LA

Service Positions
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.

4.3

Assy/Panel Removal
Instructions below apply to the 32PFL3605D/xx, but will be
similar for other models.

4.3.1

Rear Cover
Warning: Disconnect the mains power cord before you remove
the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.

4.3.2

Rear Cover

2
2
2

2
2

2
2

2
2

18980_105_100331.eps
100331

Figure 4-5 Rear cover removal (32")


Warning: Disconnect the mains power cord before removing
the rear cover.
See Figure 4-5.
1. Remove fixation screws [2] and [3] that secure the rear
cover. It is not necessary to remove the stand first [1].
2. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
the set.

2010-Apr-06

4.3.3

Speakers
Tweeters (when applicable)
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Loudspeaker/subwoofer
The loudspeaker/subwoofer is located in the centre of the set,
and is fixed with two screws.
When defective, replace the whole unit.

Mechanical Instructions
4.3.4

LC10.1L LA

4.

EN 11

Main Power Supply


Refer to next figure for details.

18980_102_100331.eps
100401

Figure 4-8 Keyboard Control Board - 1 18980_106_100331.eps


100331

Figure 4-6 Main Power Supply


1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
Be aware to (re)place the spacers [3].
4.3.5

Small Signal Board (SSB)


Refer to next figure for details.

2
18980_109_100331.eps
100331

3
3

Figure 4-9 Keyboard Control Board - 2 -

1
4.3.7

IR/LED Board
Refer to next figure for details.

18980_107_100331.eps
100331

Figure 4-7 SSB


1. Unplug all connectors [1] and [2].
2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit.
4.3.6

1
2

18980_108_100331.eps
100331

Local Control Board


Refer to next figure for details.
1. Unplug the connector [1] on the IR/LED board that leads to
the Local Control board, as it is not unplug-able at the Local
Control board itself (soldered connector).
2. Release the cable from its clamps/tape.
3. Put your thumbs against the front bezel [1] while pulling the
Local Control board in the direction of the arrow (fig. 2).
When defective, replace the whole unit.

Figure 4-10 IR/LED Board


1. Push both clips [1] that secure the IR & LED board
outwards.
2. Pull the board out.
3. Remove the connectors [2] on the IR/LED board.
When defective, replace the whole unit.

2010-Apr-06

EN 12
4.3.8

4.

LC10.1L LA

Mechanical Instructions

LCD Panel
Refer to Figure 4-11 for details.
1. Remove the Stand [A].
2. Remove the Speakers/Subwoofer [B] as described earlier.
3. Remove the PSU [C] and SSB [D] as described earlier.
4. Remove the IR/LED board [E] as described earlier.
5. Remove the Local Control board [F] as described earlier.
6. Remove the clamps [1].
7. Remove all metal brackets [2] that do not belong to the
LCD display.
Now the LCD Panel can be lifted from the front cabinet.

B
1

C
F

18980_110_100331.eps
100331

Figure 4-11 LCD Panel removal (based on 32" model)

4.4

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
order.

Notes:
While re-assembling, make sure that all cables are placed
and connected in their original position.
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.

2010-Apr-06

Service Modes, Error Codes, and Fault Finding

LC10.1L LA

5.

EN 13

5. Service Modes, Error Codes, and Fault Finding

5.1

Test Points
In the chassis schematics and layout overviews, the test points
are mentioned. In the schematics and layouts, test points are
indicated with Fxxx or Ixxx.
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. Several key ICs are
capable of generating test patterns, which can be controlled via
ComPair. In this way it is possible to determine which part is
defective.
Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.

5.2

Service Modes
The Service Mode feature is split into four parts:
Service Default Mode (SDM).
Service Alignment Mode (SAM).
Customer Service Mode (CSM).
Computer Aided Repair Mode (ComPair).
SDM and SAM offer features, which can be used by the Service
engineer to repair/align a TV set. Some features are:
A pre-defined situation to ensure measurements can be
made under uniform conditions (SDM).
Activates the blinking LED procedure for error identification
when no picture is available (SDM).
The possibility to overrule software protections when SDM
is entered via the Service pins.
Make alignments (e.g. White Tone), (de)select options,
enter options codes, reset the error buffer (SAM).
Display information (SDM or SAM indication in upper
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, CSM, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
Increase the home repair hit rate.
Decrease the number of nuisance calls.
Solved customers' problem without home visit.

5.2.1

General
Next items are applicable to all Service Modes or are general.
Life Timer
During the life time cycle of the TV set, a timer is kept (called
Op. Hour). It counts the normal operation hours (not the
Stand-by hours). The actual value of the timer is displayed in
SDM and SAM in a decimal value. Every two soft-resets
increase the hour by +1. Stand-by hours are not counted.
Software Identification, Version, and Cluster
The software ID, version, and cluster will be shown in the main
menu display of SDM, SAM, and CSM.
The screen will show: AAAAAB-XX.YY, where:
AAAAA is the chassis name: LC101.
B is the region indication: E= Europe, A= AP/China, U=
NAFTA, L= LATAM.
XX is the main version number: this is updated with a major
change of specification (incompatible with the previous
software version). Numbering will go from 01 - 99 and AA ZZ.
If the main version number changes, the new version
number is written in the NVM.
If the main version number changes, the default
settings are loaded.
YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
Numbering will go from 00 - 99.
If the sub version number changes, the new version
number is written in the NVM.
If the NVM is fresh, the software identification, version,
and cluster will be written to NVM.
Display Option Code Selection
When after an SSB or display exchange, the display option
code is not set properly, it will result in a TV with no display.
Therefore, it is required to set this display option code after
such a repair.
To do so, press the following key sequence on a standard RC
transmitter: 062598 directly followed by MENU/HOME and
xxx, where xxx is a 3 digit decimal value of the panel type:
see column Display Code in Table 6-4 , or see sticker on the
side/bottom of the cabinet. When the value is accepted and
stored in NVM, the set will switch to Stand-by, to indicate that
the process has been completed.

Display Option
Code

39mm

PHILIPS
27mm

Index of this chapter:


5.1 Test Points
5.2 Service Modes
5.3 Service Tools
5.4 Error Codes
5.5 The Blinking LED Procedure
5.6 Fault Finding and Repair Tips
5.7 Software Upgrading

040

MODEL:
32PF9968/10
PROD.SERIAL NO:

ComPair Mode is used for communication between a computer


and a TV on I2C /UART level and can be used by a Service
engineer to quickly diagnose the TV set by reading out error
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this,
ComPair has to be connected to the TV set via the ComPair
connector, which will be accessible through the rear of the set
(without removing the rear cover).

AG 1A0620 000001

(CTN Sticker)

10000_038_090121.eps
090819

Figure 5-1 Location of Display Option Code sticker


During this algorithm, the NVM-content must be filtered,
because several items in the NVM are TV-related and not SSBrelated (e.g. Model and Prod. S/N). Therefore, Model and
Prod. S/N data is changed into See Type Plate.
In case a call centre or consumer reads See Type Plate in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.
2010-Apr-06

EN 14
5.2.2

5.

LC10.1L LA

Service Modes, Error Codes, and Fault Finding


How to Navigate
As this mode is read only, there is not much to navigate. To
switch to other modes, use one of the following methods:
Command MENU from the user remote will enter the
normal user menu (brightness, contrast, color, etc...) with
SDM OSD remaining, and pressing MENU key again will
return to the last status of SDM again.
To prevent the OSD from interfering with measurements in
SDM, command OSD or i+ (STATUS or INFO for
NAFTA and LATAM) from the user remote will toggle the
OSD on/off with SDM OSD remaining always on.
Press the following key sequence on the remote control
transmitter: 062596 directly followed by the INFO[i+]
button to switch to SAM (do not allow the display to time out
between entries while keying the sequence).

Service Default Mode (SDM)


Purpose
Set the TV in SDM mode in order to be able to create a predefined setting for measurements to be made. In this platform,
a simplified SDM is introduced (without protection override and
without tuning to a predefined frequency).
Specifications
Set linear video and audio settings to 50%, but volume to
25%. Stored user settings are not affected.
All service-unfriendly modes (if present) are disabled, since
they interfere with diagnosing/repairing a set. These
service unfriendly modes are:
(Sleep) timer.
Blue mute/Wall paper.
Auto switch off (when there is no ident signal).
Hotel or hospital mode.
Child lock or parental lock (manual or via V-chip).
Skipping, blanking of Not favourite, Skipped or
Locked presets/channels.
Automatic storing of Personal Preset or Last Status
settings.
Automatic user menu time-out (menu switches back/
OFF automatically.
Auto Volume levelling (AVL).
How to Activate
To activate SDM, use one of the following methods:
Press the following key sequence on the RC transmitter:
062596 directly followed by the MENU button.
Short one of the Service pads on the TV board during cold
start (see Figure 5-2). Then press the mains button
(remove the short after start-up).
Caution: When doing this, the service-technician must
know exactly what he is doing, as it could damage the
television set.

How to Exit
Switch the set to Stand-by by pressing the mains button on the
remote control transmitter or on the television set.
If you switch the television set off by removing the mains (i.e.,
unplugging the television), the television set will remain in SDM
when mains is re-applied, and the error buffer is not cleared.
The error buffer will only be cleared when the clear command
is used in the SAM menu.
Note:
If the TV is switched off by a power interrupt while in SDM,
the TV will show up in the last status of SDM menu as soon
as the power is supplied again. The error buffer will not be
cleared.
In case the set is accidentally in Factory mode (with an F
displayed on the screen), pressing and holding VOL- and
CH- simultaneously should exit the Factory mode.
5.2.3

Service Alignment Mode (SAM)


Purpose
To change option settings.
To display / clear the error code buffer.
To perform alignments.
Specifications
Operation hours counter (maximum five digits displayed).
Software version, error codes, and option settings display.
Error buffer clearing.
Option settings.
Software alignments (White Tone).
NVM Editor.
Set screen mode to full screen (all content is visible).

SDM

18980_200_100331.eps
100402

How to Activate
To activate SAM, use one of the following methods:
Press the following key sequence on the remote control
transmitter: 062596 directly followed by the INFO[i+]
button. Do not allow the display to time out between entries
while keying the sequence.
Or via ComPair.

Figure 5-2 Service pads (SSB component side)


On Screen Menu
After activating SDM, the following items are displayed, with
SDM in the upper right corner of the screen to indicate that the
television is in Service Default Mode.
Menu items and explanation:
xxxxx: Operating hours (in decimal).
AAAAAB-XX.YY: See paragraph Software Identification,
Version, and Cluster for the SW name definition.
ERR: Shows all errors detected since the last time the
buffer was erased in format <xxx> <xxx> <xxx> <xxx>
<xxx> (five errors possible).
OP: Used to read-out the option bytes. Ten codes (in two
rows) are possible.

2010-Apr-06

After entering SAM, the following items are displayed, with


SAM in the upper right corner of the screen to indicate that the
television is in Service Alignment Mode.
Menu items and explanation:
1. System Information.
Op Hour: This represents the life timer. The timer
counts normal operation hours, but does not count
Stand-by hours.
MAIN SW ID: See paragraph Software Identification,
Version, and Cluster for the SW name definition.
ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible.
OP1/OP2: Used to read-out the option bytes. See
paragraph 6.6 Option Settings in the Alignments

Service Modes, Error Codes, and Fault Finding

2.

3.

4.

5.
6.
7.

8.
9.
10.

section for a detailed description. Ten codes are


possible.
Tuner.
AGC Adjustment: See paragraph 6.3.1 for
instructions.
Store: To store the data.
Clear. Erases the contents of the error buffer. Select this
menu item and press the MENU RIGHT key on the remote
control. The content of the error buffer is cleared.
Options. To set the option bits. See paragraph 6.6 Option
Settings in the Alignments chapter for a detailed
description.
RGB Align. To align the White Tone. See White Tone
Alignment: for a detailed description.
NVM Editor. To change the NVM data in the television set.
See also paragraph 5.6 Fault Finding and Repair Tips.
NVM Copy. Gives the possibility to copy/load the NVM file
to/from an USB stick. See also paragraph 5.7.4 How to
Copy NVM Data to/from USB and 5.7.5 How to Copy EDID
Data to/from USB.
Initialise NVM. To initialize a (corrupted) NVM. Be careful,
this will erase all settings!
Auto ADC. Refer to chapter 6. Alignments for detailed
information.
EDID Write Enable. Enables EDID writing.

How to Navigate
In the SAM menu, select menu items with the UP/DOWN
keys on the remote control transmitter. The selected item
will be indicated. When not all menu items fit on the screen,
use the UP/DOWN keys to display the next / previous
menu items.
With the LEFT/RIGHT keys, it is possible to:
Activate the selected menu item.
Change the value of the selected menu item.
Activate the selected sub menu.
When you press the MENU button twice while in top level
SAM, the set will switch to the normal user menu (with the
SAM mode still active in the background). To return to the
SAM menu press the MENU button.
The INFO[i+] key from the user remote will toggle the
OSD on/off with SAM OSD remaining always on.
Press the following key sequence on the remote control
transmitter: 062596 directly followed by the MENU button
to switch to SDM (do not allow the display to time out
between entries while keying the sequence).
How to Store SAM Settings
To store the settings changed in SAM mode (except the
OPTIONS and RGB ALIGN settings), leave the top level SAM
menu by using the POWER button on the remote control
transmitter or the television set. The mentioned exceptions
must be stored separately via the STORE button.
How to Exit
Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or the television set.
Note:
When the TV is switched off by a power interrupt while in
SAM, the TV will show up in normal operation mode as
soon as the power is supplied again. The error buffer will
not be cleared.
In case the set is in Factory mode by accident (with F
displayed on screen), by pressing and hold VOL- and
CH- together should leave Factory mode.
5.2.4

Customer Service Mode (CSM)


Purpose
The Customer Service Mode shows error codes and
information on the TVs operation settings. A call centre can
instruct the customer (by telephone) to enter CSM in order to

LC10.1L LA

5.

EN 15

identify the status of the set. This helps them to diagnose


problems and failures in the TV before making a service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.
Specifications
Ignore Service unfriendly modes.
Line number for every line (to make CSM language
independent).
Set the screen mode to full screen (all contents on screen
is visible).
After leaving the Customer Service Mode, the original
settings are restored.
Possibility to use CH+ or CH- for channel surfing, or
enter the specific channel number on the RC.
How to Activate
To activate CSM, press the following key sequence on a
standard remote control transmitter: 123654 (do not allow the
display to time out between entries while keying the sequence).
After entering the Customer Service Mode, the following items
are displayed:
Menu Explanation CSM1
1. Set Type. Type number, e.g. 32PFL5605/93. (*)
2. Production code. Product serial no., e.g.
BZ1A1008123456 (*). BZ= Production centre, 1= BOM
code, A= Service version change code, 10= Production
year, 08= Production week, 123456= Serial number.
3. Installation date. Indicates the date of the first initialization
of the TV. This date is acquired via time extraction.
4. a - Option Code 1. Option code information (group 1).
b - Option Code 2. Option code information (group 2).
5. SSB. Indication of the SSB factory ID (= 12nc). (*)
6. Display. Indication of the display ID (=12 nc). (*)
7. PSU. Indication of the PSU factory ID (= 12nc).
(*) If an NVM IC is replaced or initialized, these items must be
re-written to it. ComPair will foresee in a possibility to do this.
Menu Explanation CSM2
1. Current Main SW. Shows the main software version.
2. Standby SW. Shows the Stand-by software version.
3. Panel Code. Shows the current display code.
4. Bootloader ID. Shows the Bootloader software ID.
5. NVM Version. The NVM software version no.
6. Flash ID. Shows the flash ID.
Menu Explanation CSM3
1. Signal Quality. Shows the signal quality (No Signal/Poor/
Average/Good).
2. Child lock. This is a combined item for locks. If any lock
(Preset lock, child lock, lock after, or Parental lock) is
active, this item indicates active.
3. HDCP KeyS. Indicates if the HDMI keys (or HDCP keys)
are valid or not.
4. not used
5. not used
6. HDMI audio format input stream. Specification of HDMI
audio input stream.
7. HDMI video format input stream. Specification of HDMI
video input stream.
How to Exit
To exit CSM, use one of the following methods:
Press the MENU/HOME button on the remote control
transmitter.
Press the POWER button on the remote control
transmitter.
Press the POWER button on the television set.

2010-Apr-06

EN 16

5.

Service Modes, Error Codes, and Fault Finding

LC10.1L LA

5.3

Service Tools

5.4

Error Codes

5.3.1

ComPair

5.4.1

Introduction

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.

Error codes are required to indicate failures in the TV set. In


principle a unique error code is available for every:
Activated (SW) protection.
Failing I2C device.
General I2C error.
The last five errors, stored in the NVM, are shown in the
Service menus. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code may never lead to a
deadlock situation. This means that it must always be
diagnosable (e.g. error buffer via OSD or blinking LED
procedure, ComPair to read from the NVM).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.

Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
and the TV communicate via a bi-directional cable via the
service connector(s).
How to Connect
This is described in the ComPair chassis fault finding database.

5.4.2

You can read the error buffer in 3 ways:


On screen via the SAM/SDM/CSM (if you have a picture).
Example:
ERROR: 0 0 0 0 0 : No errors detected
ERROR: 6 0 0 0 0 : Error code 6 is the last and only
detected error
ERROR: 9 6 0 0 0 : Error code 6 was detected first and
error code 9 is the last detected (newest) error
Via the blinking LED procedure (when you have no
picture). See paragraph 5.5 The Blinking LED Procedure.
Via ComPair.

TO TV
TO
UART SERVICE
CONNECTOR

ComPair II
RC in

RC out

TO
I2C SERVICE
CONNECTOR

TO
UART SERVICE
CONNECTOR

Multi
function

Optional Power Link/ Mode


Switch
Activity

I2C

How to Read the Error Buffer

RS232 /UART

PC

5.4.3

The layer 1 error codes are pointing to the defective board.


They are triggered by LED blinking when CSM is activated. In
the LC10 platform, only two boards are present: the SSB and
the PSU/IPB, meaning only the following layer 1 errors are
defined:
2: SSB
4: PSU/IPB

ComPair II Developed by Philips Brugge

HDMI
I2C only

Optional power
5V DC

10000_036_090121.eps
091118

Table 5-1 Error code table

Figure 5-3 ComPair II interface connection

Layer-1
Defective
error code board

Caution: It is compulsory to connect the TV to the PC as


shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
ComPair UART interface cable: 3138 188 75051.
Program software can be downloaded from the Philips
Service web portal.

Error codes

5.4.4

Layer-2
Defective device
error code

SSB

11

Speaker DC protection active on SSB

IPB

12

+12 missing/low, IPB defective,


POWER_DOWN

IPB

13

POK line defective

SSB

15

EEPROM I2C error on SSB, M24C16

SSB

16

Tuner I2C error on SSB

SSB

18

IF Demodulator I2C error on SSB,


TDA9886

How to Clear the Error Buffer

Additional cables for VCOM Alignment


ComPair/I2C interface cable: 3122 785 90004.
ComPair/VGA adapter cable: 9965 100 09269.

The error code buffer is cleared in the following cases:


By using the CLEAR command in the SAM menu:
If the contents of the error buffer have not changed for 50
hours, the error buffer resets automatically.

Note: If you encounter any problems, contact your local


support desk.

Note: If you exit SAM by disconnecting the mains from the


television set, the error buffer is not reset.

2010-Apr-06

Service Modes, Error Codes, and Fault Finding


5.5

The Blinking LED Procedure

5.5.1

Introduction

Errors can also be displayed by the blinking LED procedure.


The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of
1.5 seconds in which the LED is off. Then this sequence is
repeated.
Example (1): error code 4 will result in four times the sequence
LED on for 0.25 seconds / LED off for 0.25 seconds. After
this sequence, the LED will be off for 1.5 seconds. Any RC5
command terminates the sequence. Error code LED blinking is
in red color.

5.5.2

5.6

5.6.1

Fault Finding and Repair Tips

5.6.6

It is possible to download default values automatically into the


NVM in case a blank NVM is placed or when the NVM first 20
address contents are FF. After the default values are
downloaded, it is possible to start-up and to start aligning the

Unstable Picture via HDMI input


Check (via ComPair) if HDMI EDID data is properly
programmed.

5.6.5

No Picture via HDMI input


Check if HDCP key is valid. This can be done in CSM.
HDMI CEC Not Functioning
Go to Home/Menu ->Setup -> Installation -> Preference and
set the Easylink option to on. Also check if the connected
device is CEC enabled.

5.6.7

NVM Editor

Load Default NVM Values

No Picture
When you have no picture, first make sure you have entered
the correct display code.
See Display Option Code Selection for the instructions.
See also Table 6-4 Option code overview.

5.6.4

Caution:
Do not change these, without understanding the
function of each setting, because incorrect NVM
settings may seriously hamper the correct functioning
of the TV set!
Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the
original settings, if the new settings turn out to be incorrect.
5.6.2

5.6.3

Additionally, the entire error buffer is displayed when Service


Mode SDM is entered. In case the TV set is in protection or
Stand-by: The blinking LED procedure sequence (as in SDMmode in normal operation) must be triggered by the following
RC sequence: MUTE 062500 OK.
In order to avoid confusion with RC5 signal reception blinking,
this blinking procedure is terminated when a RC5 command is
received.

In some cases, it can be convenient if one directly can change


the NVM contents. This can be done with the NVM Editor in
SAM mode. With this option, single bytes can be changed.

EN 17

Alternative method:
It is also possible to upload the default values to the NVM with
ComPair in case the SW is changed, the NVM is replaced with
a new (empty) one, or when the NVM content is corrupted.
After replacing an EEPROM (or with a defective/no EEPROM),
default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
be accessed.

Displaying the Entire Error Buffer

Notes:
It is assumed that the components are mounted correctly
with correct values and no bad solder joints.
Before any fault finding actions, check if the correct
options are set.

5.

TV set. To initiate a forced default download the following


action has to be performed:
1. Switch off the TV set with the mains cord disconnected
from the wall outlet (it does not matter if this is from Standby or Off situation).
2. Short-circuit the SDM pads on the SSB (keep short
circuited, see Figure 5-2).
3. Press P+ or CH+ on the local keyboard (and keep it
pressed).
4. Reconnect the mains supply to the wall outlet.
5. Release the P+ or CH+ when the set is started up and
has entered SDM.
When the downloading has completed successfully, the set will
perform a restart. After this, put the set to Stand-by and remove
the short-circuit on the SDM pads.

The software is capable of identifying different kinds of errors.


Because it is possible that more than one error can occur over
time, an error buffer is available, which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.

Example (2): the content of the error buffer is 12 9 6 0 0


After entering SDM, the following occurs:
1 long blink of 5 seconds to start the sequence,
12 short blinks followed by a pause of 1.5 seconds,
9 short blinks followed by a pause of 1.5 seconds,
6 short blinks followed by a pause of 1.5 seconds,
1 long blink of 1.5 seconds to finish the sequence,
The sequence starts again with 12 short blinks.

LC10.1L LA

TV Will Not Start-up from Stand-by.


Possible Stand-by Controller failure. Reflash the SW.

5.7

Software Upgrading

5.7.1

Introduction
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a
stand alone set. A description on how to upgrade the main
software can be found in the DFU or on the Philips website.

5.7.2

Main Software Upgrade


Automatic Software Upgrade
In normal conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the autorun.upg (FUS part
in the one-zip file). This can also be done by the consumers
themselves, but they will have to get their software from the
commercial Philips website or via the Software Update

2010-Apr-06

EN 18

5.

LC10.1L LA

Service Modes, Error Codes, and Fault Finding

Assistant in the user menu (see DFU). The autorun.upg file


must be placed in the root of your USB stick.
How to upgrade:
1. Copy the autorun.upg file to the root of an USB stick.
2. Insert the USB stick in the side I/O while the set is on.
The TV will prompt an upgrade message. Press Update
to continue, after which the upgrading process will start. As
soon as the programming is finished, the set must be
restarted.
In the Setup menu you can check if the latest software is
running.
5.7.3

Content and Usage of the One-Zip Software File


Below you find a content explanation of the One-Zip file, and
instructions on how and when to use it. Only files that are
relevant for Service are mentioned here!

5.7.4

EDID_clustername_version.zip. Contains the EDID


content of the different EDID NVMs. See ComPair for
further instructions.
FUS_clustername_version.zip. Contains the
autorun.upg which is needed to upgrade the TV main
software and the software download application.
NVM_clustername_version.zip. Default NVM content.
Must be programmed via ComPair.

How to Copy NVM Data to/from USB


Write NVM data to USB
1. Insert the USB stick into the USB slot while in SAM mode.
2. Execute the command "NVM Copy" > "NVM Copy to USB",
to copy the NVM data to the USB stick. The NVM filename
on the USB stick will be named "NVM_COPY.BIN" (this
takes a couple of seconds).
Write NVM data to TV
1. First, ensure (via a PC) that the filename on the USB stick
has the correct format: "NVM_COPY.BIN".
2. Insert the USB stick into the USB slot while in SAM mode.
3. Execute the command "NVM Copy" > "NVM Copy from
USB" to copy the USB data to NVM (this takes about a
minute to complete).
Important: The file must be located in the root directory of the
USB stick.

5.7.5

How to Copy EDID Data to/from USB


Write EDID data to USB
1. Insert the USB stick into the USB slot while in SAM mode.
2. Execute the command "NVM Copy" > "EDID Copy to
USB", to copy the EDID data to the USB stick. The
filename on the USB stick will be named "EDID2USB.BIN"
(this takes a couple of seconds).
Write EDID data to TV
1. First, ensure (via a PC) that the filename on the USB stick
has the correct format: "EDID2USB.BIN".
2. Insert the USB stick into the USB slot while in SAM mode.
3. Execute the command "NVM Copy" > "EDID Copy from
USB" to copy the USB data to EDID (this takes about a
minute to complete).
Important: The file must be located in the root directory of the
USB stick.

2010-Apr-06

Alignments

LC10.1L LA

6.

EN 19

6. Alignments
6.3

Index of this chapter:


6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 ADC gain adjustment
6.6 Option Settings

With the software alignments of the Service Alignment Mode


(SAM) the Tuner and RGB settings can be aligned.

Note: Figures below can deviate slightly from the actual


situation, due to the different set executions.

6.3.1

General Alignment Conditions

6.2

The LC10.1L LA chassis comes with the VA1E1BF2403 tuner.


No alignment is necessary, as the AGC alignment is done
automatically (standard value: 0).
6.3.2

Perform all electrical adjustments under the following


conditions:
Power supply voltage (depends on region):
AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%).
AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%).
EU: 230 VAC / 50 Hz ( 10%).
LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%).
US: 120 VAC / 60 Hz ( 10%).
Connect the set to the mains via an isolation transformer
with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.
Test probe: Ri > 10 Mohm, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform
alignments.

Tuner Adjustment (RF AGC Take Over Point)


Purpose: To keep the tuner output signal constant as the input
signal amplitude varies.

General: The Service Default Mode (SDM) and Service


Alignment Mode (SAM) are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.

6.1

Software Alignments

RGB Alignment
Before alignment, set the picture as follows:
Picture Setting
Dynamic backlight

Off

Dynamic Contrast

Off

Colour Enhancement
Picture Format

Off
Unscaled

Light Sensor

Off

Brightness

50

Colour

Contrast

100

White Tone Alignment:


Activate SAM.
Select RGB Align. and choose a color temperature.
Use a 100% white screen as input signal and set the
following values:
Red BL Offset and Green BL Offset to 7 (if
present).
All White point values initial to 127.

Hardware Alignments
There are no hardware alignments foreseen for this chassis,
but below find an overview of the most important DC voltages
on the SSB. These can be used for checking proper functioning
of the DC/DC converters.
Description Test
Point

Specifications (V)
Min.

Typ.

Max.

+12VS

F118

Diagram

11.7

12.3

12.91

+3V3_STBY F113

3.2

3.3

3.4

B01_DC-DC
B01_DC-DC

+3V3_SW

F133

3.17

3.34

3.5

B01_DC-DC

+1V2_SW

F131

1.18

1.25

1.31

B01_DC-DC

+5V_SW

F132

4.98

5.25

5.51

B01_DC-DC

+1V8_SW

F125

1.74

1.83

1.92

B01_DC-DC

+1V0_SW

F134

0.99

1.05

1.1

B01_DC-DC

+5VS

F235

4.94

5.2

5.46

B02A_Tuner

+2V5_SW

In case you have a color analyzer:


Measure with a calibrated (phosphor- independent) color
analyzer (e.g. Minolta CA-210) in the centre of the screen.
Consequently, the measurement needs to be done in a
dark environment.
Adjust the correct x,y coordinates (while holding one of the
White point registers R, G or B on max. value) by means of
decreasing the value of one or two other white points to the
correct x,y coordinates (see Table 6-1 White D alignment
values). Tolerance: dx: 0.002, dy: 0.002.
Repeat this step for the other color Temperatures that need
to be aligned.
When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

F305

2.38

2.5

2.62

B02B_Demod

+5VTUN_DI F236
GITAL

4.75

5.25

B02A_Tuner

VLS_15V6

FJ00

14.82

15.6

16.38

B08B TCON DC/DC

VGL_-6V

FJ14

-6.32

-6.02

-5.72

B08B TCON DC/DC

Value

Cool (11000 K)

Normal (9000 K)

Warm (6500 K)

VCC_3V3

FK13

3.14

3.3

3.47

B08B TCON DC/DC

0.276

0.287

0.313

0.282

0.296

0.329

Table 6-1 White D alignment values

If you do not have a color analyzer, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).
Set the RED, GREEN and BLUE default values per
temperature according to the values in the Tint settings
table.
When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
2010-Apr-06

EN 20

6.

Alignments

LC10.1L LA

6.5

Table 6-2 Tint settings 32"


Colour Temp.

Cool

tbf

tbf

tbf

Normal

tbf

tbf

tbf

Warm

tbf

tbf

tbf

New requirement for TCON on SSB project:


The purpose of VCOM alignment is to obtain an equal
voltages for both Positive and Negative LC polarity. This is
important to avoid Flicker and Image Sticking.
The P-Gamma + VCOM calibrator IC, ISL24837 is used for
VCOM adjustment.
The adjusted VCOM data will be stored inside on-chip
memory and will be automatically recalled during each
power-up.

Table 6-3 Tint settings 40"

6.4

Colour Temp.

Cool

tbf

tbf

tbf

Normal

tbf

tbf

tbf

Warm

tbf

tbf

tbf

ADC gain adjustment


Use a Quantum Data Patters Generator 802BT and apply a
PgcWrgb image (dot, cross and color bar mix pattern)
according to Figure 6-1.

TCON Alignment (= VCOM alignment)

ComPair (see 5.3.1 ComPair) will foresee in a possibility to do


this alignment.

6.6

Option Settings

6.6.1

Introduction
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence/absence of these specific
ICs (or functions) is made known by the option codes.
Notes:
After changing the option(s), save them with the STORE
command.
The new option setting becomes active after the TV is
switched off and on again with the mains switch (the
EAROM is then read again).

6.6.2
18920_200_100317.eps
100317

Figure 6-1 PgcWrgb pattern


6.4.1

YPbPr
Following instructions result in correct alignment of ADC gain,
offset and phase, related to YPbPr input signal. Apply a signal
of format 1080i25.
Apply following signals to the YPbPr input connectors:
Pr signal of 0.7 Vp-p1 / 75 ohm to the red cinch
connector.
Y signal of 0.7 Vb-p2 / 75 ohm with a sync pulse of 0.3
Vp-p1 to the green cinch connector.
Pb signal of 0.7 Vb-p1 / 75 ohm to the blue cinch
connector.
Select the input source to YPbPr input.
In SAM, initiate the Auto ADC calibration command.
Upon appearance of the Auto ADC Completed message, the
alignment is completed.
Notes:
1. Peak-to-Peak
2. Black-to-Peak.

6.4.2

PC VGA
Following instructions result in correct alignment of ADC gain,
offset and phase, related to PC VGA input signal. Apply a
signal of format DMT1060.
Apply following signals to the PC VGA input connector:
Red signal of 650 - 730 mV.
Green signal of 650 - 730 mV.
Blue signal of 650 - 730 mV.
Select the input source to PC VGA input.
In SAM, initiate the Auto ADC calibration command.
Upon appearance of the Auto ADC Completed message, the
alignment is completed.

2010-Apr-06

How To Set Option Codes


When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set all option numbers. You can find the correct option
numbers in Table 6-4.
How to Change Options Codes
An option code (or option byte) represents eight different
options (bits). All options are controlled via ten option bytes
(OP#1... OP#10).
Activate SAM and select Options. Now you can select the
option byte (OP#1... OP#10) with the CURSOR UP/ DOWN
keys, and enter the new 3 digit (decimal) value. For the correct
factory default settings, see Table 6-4 Option code overview.
Table 6-4 Option code overview
CTN

Option Code

32PFL3605D/78

002 192 145 248 072 006 060 078 068 001

Display Code
237

40PFL3605D/78

002 192 145 248 072 006 060 078 068 002

238

Circuit Descriptions

LC10.1L LA

7.

EN 21

7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 Video
7.3.1 Video: Front-End
7.3.2 VIDEO: TCON
7.4 Audio
7.5 Inputs
7.5.1 Inputs: HDMI
7.5.2 Inputs: USB
Notes:
Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use chapter 9. Block Diagrams and
10. Circuit Diagrams and PWB Layouts. Where necessary,
you will find a separate drawing for clarification.

7.1

Introduction
The LC10.1L LA chassis is a digital chassis using a Mediatek
chipset. It covers screen sizes of 32" to 40" with a styling called
Dali.
Main key components are the Mediatek MT5363 integrated
System On Chip (SoC) that supports multimedia video/audio
input, and the integrated TCON (Timing Controller) part for the
LCD panel.
System SoC is based on MT5363:
NAND Flash 128 Mbyte, NumOnyx/Hynix.
DDR 128 Mbyte (32x16M, 2 pcs), Hynix.
Use internal MT5363 Stand-by micro-controller.
Tuner/Frontend configuration:
Half NIM tuner from Sharp.
Toshiba Channel Decoder (TC90517).
Digital Connectivity:
1x USB port with over current protection using power
switch.
2x HDMI ports (using MT5363 internal mux).
Analog Connectivity:
2x YPbPr (component video) + Audio (cinch).
1x CVBS (composite) + Audio (cinch).
1x VGA (RGB) + Audio (3.5mm stereo jack).
Interfaces for debug and SW upgrade:
UART (3.5mm jack).
USB port.
JTAG.
Refer to Figure 7-1 for details.

2010-Apr-06

EN 22

7.

LC10.1L LA

Circuit Descriptions

18980_201_100402.eps
100402

Figure 7-1 LC10.1L LA Architecture

18980_202_100402.eps
100402

Figure 7-2 SSB cell layout


2010-Apr-06

Circuit Descriptions
7.2

LC10.1L LA

7.

EN 23

Power Supply
The Power Supply Unit (PSU) in this chassis is a buy-in and is
a black-box for Service. When defective, a new panel must be
ordered and the defective panel must be returned for repair,
unless the main fuse of the unit is broken. Always replace the
fuse with one with the correct specifications! This part is
commonly available in the regular market.
Refer to Figure 7-3 and Figure 7-4 for details
The power supply system consists of stand-by, switched and
regulated voltages. The stand-by voltage, +3V3STBY, will be
available once AC supply is provided to the system. As for the
other voltages, namely switched and regulated voltages, these
are available once the STANDBY signal is pulled low to allow
other supplies from the IPB to turn on. The switched supplies
are generated from the main +12VS supply, while the regulated
supplies are derived from the switched supplies. There are a
number of detection circuits to detect the following supplies:
+12VS, +12Vdisp and +3V3_SW. The +12VS is the main
supply voltage from the IPB that enables the switched voltages
to be generated. The +12Vdisp is the supply to the display
timing controller, while the +3V3_SW is powering the
microprocessor and its flash memory.

18980_203_100402.eps
100402

Figure 7-4 Power timing overview

The mains power supply unit distribute the following voltages to


the TV system: +3V3STBY, 12VS, +24Vaudio, and +24Vpanel
for panel with inverter (or) high voltage (HV) for inverterless
panel. Requirement of the High Voltage depend on the
specification of the LCD panel.

+12VS

DC/DC

1.1V+/ - 0.05V
1.25V+/ - 0.06V

DC/DC

1V8+/ - 0.09V

DDR2 x2

3.3V+/ -0.16V
DC/DC

5.25V+/ -0.26V
R e g u la tor

USB
R e g u la tor

2.5V +/ - 0.12V

Dig Demod

MT5363

NVM

EEPROM
EEPROM

5.25V+/ - 0.25V
Tuner

Flash

+3V3STBY

18980_203_100402.eps
100402

Figure 7-3 Power distribution overview

2010-Apr-06

EN 24

7.

Circuit Descriptions

LC10.1L LA

7.3

Video

7.3.1

Video: Front-End

Key components for the tuner section are:


Sharp Half NIM tuner VA1E1BF2403,

Refer to Figure 7-5 for details.

Toshiba channel decoder TC90517 (external ISDB-T


channel decoder).
Analog demodulator (using internal MT5363 analog
demodulator - pin AH35 VIP, AH37 VIN).

18980_205_100402.eps
100402

Figure 7-5 Front-end functional block diagram


7.3.2

VIDEO: TCON
The Timing Controller (TCON) is integrated in the SSB
(Forward Integration concept). Refer to Figure 7-6.

EEPROM

LVDS

Mini - LVDS

(10bit)
Timing
Controller

Control
Signals

MTK

+3V3
+ 1V2

Gamma
Reference
Voltage

Main Platform

Power
Block

VGH (+35V)
VGL ( 6V)

Gate Drive IC

+ 15.6V
+12V

Source Drive IC

TFT LCD Panel

TCON
LCD Panel

SSB
18920_209_100318.eps
100319

Figure 7-6 TCON system block diagram

2010-Apr-06

Circuit Descriptions
7.4

LC10.1L LA

7.

EN 25

Audio
In this chassis, audio processing is done by the following key
components:
MT5363 micro-processor for input selection and audio
processing,
TPA3123D2 class-D power amplifier for 2 x 10 W
amplification.
The audio profile (optimal setting per screen size and styling) is
stored at Option 10 (bit 0 to bit 4). Profile 1 for 32-inch Dali and
profile 2 for 40-inch Dali.
Table 7-1 Microprocessor control lines - 1 From uP

At class D Usage

SW_MUTE

SW_MUTE Will pull audio signals to LOW upon DC drops, help


to eliminate plop sound.

RESET_AUDIO A_STBY

Control SHUTDOWN pin of class D amplifier:


ON/OFF the amplifier

MUTE

MUTE

Corresponding to the MUTE button on Remote


Control, to mute/unmute speakers

DC_PROT

DC_PROT Detecting present of DC at speakers output and


feedback to uP. This will trigger TV into protection
mode. This is important to protect speakers

Table 7-2 Microprocessor control lines - 2 From uP


SW_MUTE

A_STBY Class D outputs


to class D
LOW

MUTE

HIGH

Operating (unmute)

RESET_AUDIO LOW

HIGH

Operating (unmute)

HIGH

LOW

Class D shutdown (mute)

MUTE
DC_PROT

LOW

Operating (unmute)

HIGH

MUTE

LOW

DC detected -> set going to protection

HIGH

No DC -> normal operating

18980_206_100402.eps
100402
Figure 7-7 Audio signal flow

2010-Apr-06

EN 26

7.

Circuit Descriptions

LC10.1L LA

7.5

Inputs

7.5.1

Inputs: HDMI
In this chassis, the main Mediatek MT5363 SoC has an on-chip
HDMI multiplexer.
Refer to Figure 7-8 for the implementation.

18980_208_100402.eps
100402

Figure 7-8 HDMI implementation


Signal description:
TMDS: Signals that contain audio and video information.
PWR5V: Signal to detect the presence of any HDMI source
connected to the TVs HDMI input port.
SIDE_HDMI_HPD1 and HDMI_HPD2: Signal to initiate
reading of the TV EDID data by the source device.
I2C: The EDID data reading and the HDCP authentication
process runs via I2C.
CEC: Signal direct connected between inputs and uP.
EDID_WC: Signal used to disable the write protect pin of
the EEPROM. When updating, the program will temporarily
pull this pin LOW before writing new data.
7.5.2

Inputs: USB
In this chassis, the main Mediatek MT5363 SoC has an on-chip
USB processor.
Refer to Figure 7-9 for the implementation.

18980_207_100402.eps
100402

Figure 7-9 USB implementation

2010-Apr-06

IC Data Sheets

LC10.1L LA

8.

EN 27

8. IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).

8.1

Diagram B01, Type TPS54386 (IC7116 and 7117)

BLOCK DIAGRAM
Level
Shift

+
4

FB1

BOOT1

PVDD1

SW1

Current
Comparator

f(IDRAIN1) + DC(ofst)
GND

2
BP

CLK1

R
R

f(IDRAIN1)
Overcurrent Comp

0.8 VREF

RCOMP
Soft Start
1

SD1

f(ISLOPE1)

BP

f(IMAX1)
CLK1

CCOMP

Anti-Cross
Conduction

VDD2

Weak
Pull-Down
MOSFET

f(ISLOPE1)
Ramp
Gen 1
TSD

6 A
EN1
EN2

1.2 MHz
Oscilator

6 A

CLK1

Divide
by 2/4

f(ISLOPE2)
Ramp
Gen 2

SD1
Internal
Control

SD2

CLK2

UVLO
150 k
SEQ 10

BP

FB1

150 k

FB2
CLK2

Output
Undervoltage
Detect

13 BOOT2
BP

Level
Shift

14 PVDD2

f(IDRAIN2) + DC(ofst)

Current
Comparator
+

GND

FB2

R
R

FET
Switch

f(IDRAIN2)
Overcurrent Comp

0.8 VREF

RCOMP
Soft Start
2

SD2

f(ISLOPE2)

CLK2

CCOMP

5.25-V
Regulator

BP 11
150 k

12 SW2
BP

f(IMAX2)

Anti-Cross
Conduction

Weak
Pull-Down
MOSFET

PVDD2

BP
ILIM2

Level
Select

9
150 k

0.8 VREF
References
IMAX2 (Set to one of three limits)
UDG-07124

PIN CONNECTIONS
HTSSOP (PWP)
(Top View)
PVDD1

14 PVDD2

BOOT1

13 BOOT2

SW1

12 SW2
Thermal Pad
(bottom side)

GND

EN1

11 BP
10 SEQ

EN2

9 ILIM2

FB1

8 FB2

18980_300_100402.eps
100402

Figure 8-1 Internal block diagram and pin configuration


2010-Apr-06

EN 28
8.2

8.

IC Data Sheets

LC10.1L LA

Diagram B01 SSB: DC-DC, Type ST1S10PH (IC7107)

Block diagram

Pinning information

DFN8 (4 4)

PowerSO-8
I_18010_083.eps
100402

Figure 8-2 Internal block diagram and pin configuration

2010-Apr-06

IC Data Sheets
8.3

LC10.1L LA

8.

EN 29

Diagram B02B SSB: Digital Demodulator, Type LD1117D (IC7315)

Block diagram

LD1117DT

Pinning information

DPAK

F_15710_166.eps
100402

Figure 8-3 Internal block diagram and pin configuration

2010-Apr-06

EN 30
8.4

8.

IC Data Sheets

LC10.1L LA

Diagram B03 SSB: Class-D & Muting, Type TPA3123 (IC7400)

Block diagram

1 F

0.22 F
LIN

BSR

RIN

ROUT

1 F

PGNDR
PGNDL

1 F
BYPASS
AGND

22 H

470 F

0.68 F
0.68 F

LOUT
22 H

BSL

470 F

0.22 F

PVCCL

AVCC

PVCCR

VCLAMP
Shutdown
Control

SD

1 F

MUTE

GAIN0
GAIN1

Control

Pinning information
PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND
AGND
PVCCR
VCLAMP
PVCCR

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR

TERMINAL
24-PIN
(PWP)

I/O/P

DESCRIPTION

SD

Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
AVCC

RIN

Audio input for right channel

LIN

Audio input for left channel

GAIN0

18

Gain select least-significant bit. TTL logic levels with compliance to AVCC

GAIN1

17

Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
outputs enabled). TTL logic levels with compliance to AVCC

NAME

MUTE

BSL

21

I/O

PVCCL

1, 3

Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
Class-D 1/2-H-bridge positive output for left channel

LOUT

Bootstrap I/O for left channel

22

23, 24

Power ground for left-channel H-bridge

11

Internally generated voltage supply for bootstrap capacitors

BSR

16

I/O

Bootstrap I/O for right channel

ROUT

15

Class-D 1/2-H-bridge negative output for right channel

PGNDL
VCLAMP

PGNDR

13, 14

Power ground for right-channel H-bridge.

PVCCR

10, 12

Power supply for right-channel H-bridge, not connected to PVCCL or AVCC

AGND

Analog ground for digital/analog cells in core

AGND

Analog ground for analog cells in core

BYPASS

Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
external capacitor sizing.

AVCC
Thermal pad

19, 20

High-voltage analog power supply. Not internally connected to PVCCR or PVCCL

Die pad

Connect to ground. Thermal pad should be soldered down on all applications to properly
secure device to printed wiring board.

18440_302_090303.eps
090318

Figure 8-4 Internal block diagram and pin configuration

2010-Apr-06

IC Data Sheets
8.5

LC10.1L LA

8.

EN 31

Diagram B04 SSB: MTK Power, Type MT5363 (IC7700)

Block diagram
CVBS/
YC Input

DVB-T

ARM

ATD

VADCx4
TV
Decoder

HDMI In
I/F

Audio
Demod

Audio
ADC

Audio In

VDO-In

TS
Demux

Audio
Input

HDMI
Rx

BIM
2-D Graphic

MDDi

LVDS

CVBS
VDAC
TVE

DDR
DRAM
Controller

Mix andPost
Processing

JPEG,MPEG
H.264

PreProc

Panel

IO Bus

OSD
scaler

Vplane
scaler/PIP

Standby uP CKGEN

Audio DSP
Audio I/F

JTAG

IrDA

SIF

USB2.0

Audio DAC

BScan

PVR

RTC UART

Watchdog

Serial Flash

MS,SD

PWM

Servo ADC

NAND Flash

SPDIF, I2S
18850_300_100107.eps
100222

Figure 8-5 Internal block diagram

2010-Apr-06

EN 32

8.

IC Data Sheets

LC10.1L LA

Pinning information
LT 1

RCLK0_

VCC2IO

RA12

RCKE

RDQ19

RDQM2

RDQS2_
RDQS3

AA

AB

RDQ16

AC

AD

RCLK1

AE

AF

AG

AH

GPIO38

AJ

AK

JTDI
JTRST_

AL

AM

AN

AP

VCCK

AR

AT

AU

AV 1

PDD0
POCE0_

USB_VRT
PDD4

VCCK

PWR5V_1

HDMI_HPD
1

AVDD12_H

SB

DMI
USB_DM

AVSS33_U

PDD5

RX2_0B

SB

RX1_2

RX1_1

RX1_C

10

11

12

13

14

RX1_1B

RX1_CB
15

RX1_2B

RX1_0B

RX2_2B

RX2_1B

RX2_CB

USB_DP
9

1
RX1_0

AVSS33_U

SB
PDD7

RX2_1

OPCTRL1
HDMI_SDA

HDMI_HPD
2
RX2_2

RX2_0

RX2_C

HDMI_SCL
1

PWR5V_2

HDMI_CEC

DMI

AVSS33_U

PDD6

PDD3
6

AVDD33_H
DMI

AVDD33_U
SB

AVSS12_U
SB

HDMI_SDA
2

AVSS33_H

PDD2

HDMI_SCL

AVDD12_U
SB

VCCK

POCE1_

PACLE

VCCK

VCCIO33-1

VCCK

VCCK

PARB_

POWE_

POOE_

VCCK

VCCK

VCCK

VCCK

VCCK

PDD1

PAALE

DVSS

DVSS

DVSS

VCCK

VCCK

VCCK

DVSS

VCCK

VCCK

VCCK

OSCL0

DVSS

DVSS

DVSS

VCCIO33-1

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS

VCCK

VCCK

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS
DVSS

DVSS

GPIO42

VCCK

VCCK

OSDA0

VCCK

GPIO40

VCCK

JTCK

VCCK

RDQ31

VCC2IO

JTDO

JTMS

VCCK

VCCK

GPIO39

GPIO41

GPIO43

DVSS

DVSS

GPIO37

VCC2IO

GPIO44

RDQ27

VCC2IO

VCC2IO

VCC2IO

VCC2IO

AVSS12_V
PLL
DVSS

VCCK

VCCK

REXTDN

VCC2IO

AVSS12_L
VDS

DVSS

EMPLL

RDQ26

RDQ18

AVDD12_V
PLL

AVDD12_L
VDS

DVSS

DVSS

RDQ24

RCLK1_

AVSS33_L
VDS

AVSS12_M

RDQ25

RDQ28

RDQ23

AVDD12_M
EMPLL

RDQM3

RDQ29

RDQ21

AECKP

AE1P

VDS

DVSS

RVREF

VCC2IO

DVSS

RDQS3_

AE2P

AE0P

AVDD33_L

TP_VPLL

RVREF

RDQ30

DVSS

VCC2IO

AECKN

AE1N

VCC2IO

RODT

RDQ17

RDQS2

AE2N

AE0N

AVDD33_L
VDS

RDQ4

AO3P

AO2P

RA6

RRAS_

RDQ20

AO3N

AOCKP

DVSS

VCC2IO

RDQ22

RCS_

VCC2IO

19

AOCKN

AO2N

AO0P

VCC2IO

RDQ1

18

AO1P

RDQ3

DVSS

17

MEMTP

RA4

RA0

VCC2IO

MEMTN

AO0N

VCC2IO

RDQ6

16

AO1N

VCC2IO

RDQM0

VCC2IO

15

VCC2IO

RDQ9

DVSS

14

VCC2IO

RDQ11

DVSS

13

RDQ12

RDQM1

DVSS

12

DVSS

DVSS

RA11

11

RDQ14

DVSS

VCC2IO

10

RDQS0

RDQ7

RA1

RA2

RA8

RDQ2

DVSS

RCAS_

DVSS

RDQ0

VCC2IO

RWE_

RA13

RDQS1

RDQ5

RBA0

RDQS0_

RDQS1_

RA3

RBA1

RDQ15

VCC2IO

RA10

RDQ8

RA7

RBA2

RDQ13

VCC2IO

RA5

RCLK0

RA9

RDQ10

VCC2IO

16

17

18

19

18850_301_100107.eps
100222

Figure 8-6 Internal block diagram

2010-Apr-06

IC Data Sheets

LC10.1L LA

8.

EN 33

Pinning information
20

21

AO4N

22

23

24

25

GPI O35

GPIO28

GPIO36

AO4P

GPIO34

DVSS

28

29

30

GPIO9

GPIO20

GPIO4

GPIO10

34

RT
A

ETRXDV

ETMDIO

ETRXER

ETMDC

ETTXER

CI_MCLKO

37

ETCRS

ETRXD3

ETTXD2

36
ETRXD0

ETRXD1

ETTXCLK

ETPHYCLK

35

ETRXD2

ETTXD1

GPIO6

GPIO8

33

ETRXCLK

ETTXEN

GPIO12

GPIO16

32
ETTXD0

ETTXD3

GPIO11

GPIO18

GPIO24

31

GPI O3

GPIO17

GPIO27

GPIO33

AE4N

27

GPIO22

GPIO30

DVSS

AE3N

GPIO26

GPIO32

DVSS

26
GPI O21

E
CI_MOSTR

CI_MCLKI

VCCIO33

AE4P

GPIO19

GPIO29

DVSS

AE3P

GPIO25

GPIO31

GPIO14

GPIO15

GPIO23

GPIO5

GPIO7

GPIO13

ETCOL
CI_MISTR

VCCIO33

VCCIO33

GPIO2

FSRC_WR

ALIN

IF_AGC
VCCK

VCCK

DVSS

TUNER_DA

DVSS

DVSS

DVSS

DVSS

DVSS

OSDA2

OSDA1

AVSS33_A
DAC1
VCCK

DVSS

DVSS

VCCK

AVDD33_A
DAC1

DVSS

DVSS

DVSS

OSCL2

DVSS

DVSS

DVSS

DVSS

AVDD33_R

VCCK

U1RX

AR2

VCCIO33

AOSDATA2

R
VCXO

U1TX

AR1

VCCIO33

OSCL1

AL1

TUNER_CL

AOSDATA1

OPWM2

AOLRCK

AOMCLK

TA
DVSS

AOSDATA0

AOBCK

AOSDATA4

GPIO1

GPIO0

RF_AGC

OPWM1

OPWM0

ASPDIF

G
CI_MDO0

CI_MDI0

AOSDATA3

CI_MOVAL

CI_MIVAL

AR3
AL3

AL2
VCCIO33

VCCIO33

EF_AADC
DVSS

DVSS

AVSS33_R
EF_AADC

VCCK

DVSS
DVSS

DVSS

VCCK
DVSS

DVSS

AIN1_L_AA

AIN4_R_A

AIN2_R_A

DC

ADC

ADC

AIN1_R_A

DVSS

AIN0_R_A

ADC
DVSS

DVSS

VCCK

VCCK

DVSS

AVSS12_P
LL

AVDD33_
DEMOD1

EMOD1

F
AVSS33_V

AVDD12_A

ADCINN_D

ADCINP_D

LL

DCPLL

EMOD

EMOD

AVDD33_D

ADIN1_SR

GA_STB

HSYNC

OPCTRL3

TAL_STB

ADIN0_SR

ADIN3_SR

FS_VDAC

BYPASS0

AVSS12_R

AVDD33_V

AF

GB

DAC

COM1

COM

TAL

MPXN

AN

CVBS0N

SY1

AM

TUNER_BY

CVBS2P

PASS
VBS

DAC

AL
ADIN4_SR
V

SY0

AK

MPXP

AVSS33_C

AVSS33_V

Y0P

AJ

ADIN5_SR

VBS
VDAC_OUT
1

PB0P

PR1P

AVDD33_C

AH

AVSS33_X

ADIN2_SR

SOY1

SOG

U0TX

AVDD33_X

GB
AVDD33_V

OIRI

OPCTRL2

IG

IF
AVDD12_R

DO

XTALI

XTALO

AVDD33_S

GA_STB

AG

AVSS12_P

IG

AF

AVSS33_D

AVSS33_D

AVSS33_SI

AL0

AVICM

ADAC0
AVDD12_S
YSPLL

AE

AR0

DAC0

AVDD12_A
PLL

OPCTRL0

AD

DC

AVDD33_

VDPLL

AVDD10_L

AC

DC

AVSS33_A

DVSS

ORESET_

AB
ADC

AIN2_L_AA

DC

AVDD12_T

OPWRSB

AIN3_R_A

AIN3_L_AA

ADC
AIN0_L_AA

AA

DC

DC

DC

C
VCCK

ADC
AIN6_L_AA

AIN5_L_AA

AIN4_L_AA

VMID_AAD
DVSS

AIN6_R_A

AIN5_R_A
ADC

AVSS33_A
ADC

AVDD33_A
ADC

AP
AR

VDAC_OUT

20

21

22

23

24

SOY0

Y1P

GP

VSYNC

OPCTRL4

25

COM0

PB1P

RP

BP

U0RX

26

27

28

SC0

30

31

32

33

34

CVBS0P
CVBS1P

SC1

PR0P
29

CVBS3P

35

36

AT
AU

37

RB

18850_302_100107.eps
100222

Figure 8-7 Internal block diagram

2010-Apr-06

EN 34
8.6

8.

IC Data Sheets

LC10.1L LA

Diagram B06B SSB: Analog I/O - Audio, Type LM833 (IC7B01)

Pinning information

Output 1

VCC

Output 2

Inputs 1
3

6
2

VEE

Inputs 2
5

(Top View)
18520_306_090325.eps
100402

Figure 8-8 Pin configuration

2010-Apr-06

IC Data Sheets

8.

EN 35

Diagram B08B SSB: TCON DC/DC, Type ISL97653 (IC7J00)

Block diagram

VREF PROT

RSET HVS

CM1
GM AMPLIFIER
FBB

HVS
LOGIC

SAWTOOTH
GENERATOR
SLOPE
COMPENSATION

+
VREF

LX1
LX2

BUFFER

CONTROL
LOGIC

UVLO COMPARATOR
+

RSENSE
PGND1
PGND2

CURRENT
AMPLIFIER

0.75 VREF
680kHz
OSCILLATOR

FREQ
VL
PVIN1,2

CURRENT LIMIT
COMPARATOR

REGULATOR
REFERENCE BIAS
AND

CDEL

CURRENT LIMIT
THRESHOLD

SEQUENCE CONTROLLER

EN

VL
PVIN1,2

CB
SUPN
LXL1
LXL2

NOUT

CONTROL
LOGIC

FBN

CURRENT
LIMIT
COMPARATOR

BUFFER
CURRENT AMPLIFIER

GM AMPLIFIER

0.2V

VREF
SLOPE
COMPENSATION

CURRENT LIMIT
THRESHOLD

UVLO COMPARATOR

CM2
FBL

SAWTOOTH
GENERATOR

+
0.4V
0.75 VREF

LDO
CONTROL
LOGIC2

TEMP
SENSOR

SUPP

FBP

LDO-CTL
LDO-FB

TEMP

VREF
POUT
SUPP

LX1

PGND2

PGND1

TEMP

COM

LX2

CTL

PROT

40

DRN

C2-

AGND

Pinning information

C2+

LDO-FB

POUT

PVIN1

C1+

LDO-CTL

C1-

39

38

37

36

35

34

33

32

31

PVIN2

30 COMP

CB

29 FBB

LXL1

28 RSET

LXL2

27 HVS

PGND3

PGND4

CM2

24 CTL

FBL

23 DRN

VL

22 COM

VREF

10

21 POUT

ISL97653A
40 LD 6X6 QFN
TOP VIEW

26 EN

12

13

14

15

16

17

18

19

20

SUPN

PGND5

C1P

C1N

C2P

C2N

SUPP

FBP

25 CDEL

NOUT

11
FBN

8.7

LC10.1L LA

18770_307_100217.eps
100217

Figure 8-9 Internal block diagram and pin configuration

2010-Apr-06

EN 36

8.

LC10.1L LA

IC Data Sheets

Personal Notes:

10000_012_090121.eps
090121

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 37

9. Block Diagrams
Wiring Diagram 32" - 40" (Dali)
WIRING DIAGRAM 32"- 40" DALI

TO DISPLAY

TO BACKLIGHT

Board Level Repair

TO DISPLAY

LCD DISPLAY
(1004)

32"

8316
1319

1316

1P3

1P3

1M95 (B01)

1M99 (B01)

1. +3V3STDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12VS
7. +12VS
8. +12VS
9. +24VAUDIO
10. GNDSND
11. N.C.

1.
2.
3.
4.
5.
6.
7.
8.
9.

+12VDISP
+12VDISP
GND
GND
LAMP-ON
PWM-DIMMING
BACKLIGHT-PWM
GND
POWER-OK

8KA2

LOUDSPEAKER
(5213)

HIGH VOLTAGE

1M20 (B04c)

1KA1 (B08E)

1KA2 (B08E)

1.
2.
3.
4.
5.
6.
7.
8.

1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_35V
79. VGL_-6V
80. GND

1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_35V
79. VGL_-6V
80. GND

LIGHT-SENSOR
GND
RC
LED-2
+3V3STBY
LED-1
KEYBOARD
+5V

1735 (B03)

8M20

1M20

1KA2

1KA1

8P

80P

80P

B
1M99

9P

8M95

1M95

11P
4P

SSB
(1150)

HDMI

HDMI

HDMI

PHONE

SPDIF

USB

8M99

1735

1M95

11P

(1005)

KEYBOARD CONTROL
(1114)

LEFT_SPEAKER
GND-AUDIO
GND-AUDIO
RIGHT_SPEAKER

TUNER

9P

MAIN POWER SUPPLY


IPB 32 PLHC-P984A B
IPB 40 PLHE-P986A B

1M99

1.
2.
3.
4.

VGA

2P3
N

1308

J1
8P

IR/LED BOARD
(1112)

8191

J2
3P

MAINS CORD

J1

3P

40"

8KA1

8319

TO BACKLIGHT

TO BACKLIGHT

Component Level Repair


Only For Authorized Workshop

18980_400_100329.eps
100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 38

Block Diagram Video


VIDEO
B02A TUNER

B04 MT5363:

+B

5207

+5VTUN_DIG
1201
VA1E1BF2403

7302
TC90517FG

IF_OUT+
IF_OUTSCL

10

DIF_N

29

11

DIF_P

30

7
SDA
9
IF_AGC
RF_AGC

(I2C)

G34
H33

TSO_CLK

F35

60 TSO_DATA0
AGCCNTI 9

H35

IF_AGC

M31

61

B08D MPD

B08E MINI LVDS

7H01
VPP1501BFG

B05 HDMI-LVDS

CI_MIVAL

1KA1
81

B08A
INTERFACE

B04C MAC-CI

58 TSO_VALID
DIGITAL
DEMODULATOR
59 TSO_SYNC

TUNER

B08A TCON CONTROL

7700
MT5363BHMG

VGL_-6V
VGH_35V

7L00
SL24016IRTZ

CI_MISTRT
CI_MCLKI

LEVEL
SHIFTER

ASIC_CS

RXO

PX1

AO
CI_MDIO

CS(1-12)

61
VH
50

B04C CONTROL

7218

RF_AGC

M33

79
78
72

LLV(0-7)

AGC_IF
AE

AGC_RF

13
34

RXE

PX2

TO DISPLAY
(TCON ON SSB)

VCC_3V3

33
12

B04C

B06C ANALOG I/O - VIDEO

CVI-1

12
9

PB

3B08

Y0N

AT29

SC1_G

5C05

SC1_B

5C04

SC1_CVBS_OUT

5C03

SY0P

3B07

Y0P

AR28

SPB0P

3B09

PB0P

AP29

SPR0P

3B11

PR0P

AU30

7
PR

AK22

1C01
12

Y
CVI-2

PB

SY1P_SC2

5C02

PB1P_SC2

5C01

PR1P_SC2

5C05
2C06

7
PR

SOY1-AV2

3B00

SY1P

3B01

SPB1P

3B03

SPR1P

3B05

SY1N

3B02

AP25
AU26
AT27
AP27
AR26

VCOM & NVM

MT5363

REF
VOLTAGE
GEN

2
1

7K00
ISL24837IRZ

SOY0

Y0P

VL

B08C P GAMMA &

B06B AUDIO-VIDEO

2C15

1C02

11
10

B06B ANALOG I/O - AUDIO


SY0N

VLS_15V6

7217
RF_AGC_SW

RF_AGC_SW

1KA2
81
VL/VH

VGL_-6V
VGH_35V

79
78
72

PB0P
VH

PR0P

61
50

RLV(0-7)

PBR0N

13

TO DISPLAY
(TCON ON SSB)

34
SOY1
VCC_3V3

33
12

VLS_15V6

11
10

Y1P
PB1P
VL

PR1P

2
1

Y1N

1C03

B06D USB

B04C CONTROL
2C06

AR36

CVBS_0N

USB_DM
USB_DP

USB_DM
USB_DP

AR10
AU10

2
3

4
1

VGA_R

VGA_Rp

RP

VGA_G
VGA_B
H-SYNC

VGA_Gp
VGA_Bp

GP
BP
HSYNC

V-SYNC

VSYNC
2E08

3
13
14

VGA
CONNECTOR

2E03

10
1

6
11

GND_CVBS

1D01
1

CVBS_2P

1E01

15

B06E VGA

AP35

CVBS_AV3

CVBS

3 2

AVIN

AT25 RP
AU24
GP
AT23
BP
AR22
HSYNC
AU22
VSYNC

SOG

AP23

GN

AR24

B05 HDMI & MUX

USB 2.0
CONNECTOR SIDE
SW UPLOAD
JPEG
MP3

B04C FLASH & EJTAG & DISPLAY INTERFACE


7708
NAND01GW3B2CN6F

SOG

PDD

NAND_PDD(0-7)

FLASH
1G

COM

B05 HDMI

HDMI 2
CONNECTOR

M_RX2_2

M_RX2_2B
M_RX2_1

4
6
7

B04B DRAM

AP19
AT19
AR18

M_RX2_1B
M_RX2_0

AU18

9
10

M_RX2_0B

AT17

M_RX2_C

AR16

12

M_RX2_CB

AU16

M_RX1_2

M_RX1_2B
M_RX1_1

AP15
AT15
AR14

B04B DDR
RDQ(0-31)

RDQ

AP17 RX1

7600
H5PS5162FFR

SDRAM
512Mb

RDQ(16-31)

RDQ(0-15)

19
18

1
2

1902

7601
H5PS5162FFR

SDRAM
512Mb

19
18

HDMI 1 (SIDE)
CONNECTOR

4
6
7

M_RX1_1B
M_RX1_0

A1

AU14

RA

AP13 RX2

9
10

M_RX1_0B

AT13

M_RX1_C

AR12

12

M_RX1_CB

AU12

VDD

VDD

1
2

1901

A1

RA(0-13)
+1V8_SW

18980_401_100329.eps
100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 39

Block Diagram Audio


AUDIO
B02A TUNER

+B

5207

1201
VA1E1BF2403

IF_OUT-

10

DIF_N

11

DIF_P

G34

TSO_CLK

F35

60 TSO_DATA0
AGCCNTI 9

H35

IF_AGC

M31

30

SCL
7
SDA
9
IF_AGC
RF_AGC

B04C MAC-CI

58 TSO_VALID
DIGITAL
DEMODULATOR
59 TSO_SYNC
29

(I2C)

61

H33

B06B ALI_ADAC

CI_MIVAL
CI_MISTRT

7218

RF_AGC

M33

7400
TPA3123D2PWP

7B01

CI_MCLKI
CI_MDIO

AL_L

B04C CONTROL

B03 CLASS-D & MUTING

7700
MT5363BHMG

7302
TC90517FG

TUNER
IF_OUT+

B06B ANALOG I/O - AUDIO

B04 MT5363:

+5VTUN_DIG

AR_R

V37

PREAMPL

AOUTL

u36

PREAMPR

AOUTR

AGC_IF
AGC_RF

RF_AGC_SW

7217
RF_AGC_SW

B04C
B04C

B06B ANALOG I/O - AUDIO

RESET_AUDIO

MUTE

A_STBY

STANDBY

SW_MUTE

1735
1

LEFT_SPEAKER
5406

CLASS D
POWER
AMPLIFIER
B04C

B04C

22

GND-AUDIO
15

RIGHT_SPEAKER

SPEAKER
LEFT

3
4

SPEAKER
RIGHT

74087410

B06B ALI_DAC

B04C

DC_PROT

DC-DETECTION

1B01
J28

ASPDIF_OUT

ASPDIF

MT5363

1B02

DVI_AUL_IN

AC36

DVI_AUR_IN

AC37

AIN_AADC_3_L
AIN_AADC_3_R

B06D USB

B04C CONTROL

1D01
1
1

B06C ANALOG I/O - VIDEO


1C12

CVI-1

AV IN
AUDIO
L/R

AIN1_L-SC1

3B28

AIN1_R-SC1

3B27

AIN1_L

V30

AIN1_R

V29

2
3
4

AIN1_L

USB_DM
USB_DP

AR10
AU10

3 2

USB_DM
USB_DP

USB 2.0
CONNECTOR SIDE
SW UPLOAD
JPEG
MP3

AIN_1_R

B04C FLASH & EJTAG & DISPLAY INTERFACE


7708
NAND01GW3B2CN6F

1C13
AV IN
AUDIO
L/R

AIN0_L-SC2
AIN0_R-SC2

3B29

AIN0_L

V28

AIN0_R

V27

AV3_L_IN

U29

AV3_L_IN

U28

5
CVI-2

3B30

AIN_0_L
PDD

AIN_0_R

FLASH
1G

NAND_PDD(0-7)

1C11
AIN_2_L
AIN_2_R

B04B DRAM

B04B DDR

B05 HDMI

HDMI 2
CONNECTOR

M_RX2_2

M_RX2_2B
M_RX2_1
M_RX2_1B
M_RX2_0

AP19
AT19
AR18
AP17 RX0

M_RX2_0B

AT17

M_RX2_C

AR16

12

M_RX2_CB

AU16

M_RX1_2

M_RX1_2B
M_RX1_1

AP15
AT15
AR14

A1
RA

1
2
19
18

A1

RA(0-13)
+1V8_SW

1901

HDMI 1 (SIDE)
CONNECTOR

SDRAM
512Mb

AU18

9
10

4
6
7

SDRAM
512Mb

7601
H5PS5162FFR

VDD

7600
H5PS5162FFR

VDD

19
18

1
2

1902

4
6
7

RDQ(0-31)

RDQ

B05 HDMI & MUX

RDQ(16-31)

AV IN
AUDIO
L/R

RDQ(0-15)

AVIN

M_RX1_1B
M_RX1_0

AU14
AP13 RX1

9
10

M_RX1_0B

AT13

M_RX1_C

AR12

12

M_RX1_CB

AU12
18980_402_100329.eps
100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 40

Block Diagram Control & Clock Signals


CONTROL + CLOCK SIGNALS
B04 MT5363

B04B DDR

7700
MT5363BHMG

B08A TCON CONTROL


7J00
ISL97653AIRZ

B04B DRAM

7601
H5PS5162FFR

RDQ(0-15)

7600
H5PS5162FFR

SDRAM
512Mb

MT5363

RDQ(16-31)

RDQ(0-31)

RDQ

7601
H5PS5162FFR

SDRAM
512Mb

RA
CLK
CLK
CLK
CLK

B08C
B02A

B23

RF_AGC_SW

B29

RCLK1

AD3

RCLK1#

B3

RCLK0

A2

RCLK0#

DC_PROT

AG6

USB_PWR_EN

G30

USB_OCP

E30

RESET_DEMOD

A30

B03
B06D
B06D
B02B

GPIO_42

B08C
B08A

B04C FLASH & EJTAG & DISPLAY INTERFACE

GPIO_32
GPIO_9

L2

TCK#

L1

1H00
27M

K8

GPIO_7
GPIO_35

GPIO_5

GPIO_24

GPIO_6

GPIO_41

H29

EDID_WC

A22

LCD-PWR-ONn

D28

LAMP-ON

AG4

B08E

RLV(0-7)

B08E

TA(0-12)
TCK

SLOPE

OSC_IN

GSLOP

T16

B08B

B08D MPD
B1

RA(0-13)
AD1

B04C GPIO
BYPASS_MODE

J8

LLV(0-7)

TDQ(0-15)

A1

J8 K8

B04C CONTROLLER

SDRAM
512Mb

TCON
CONTROL

RESET

T9

50Hz_60Hz

U9

OSC_OUT

7L00
SL24016IRTZ

RST

CS

RTC50_60

LEVEL
SHIFTER

ASIC_CS

CS(1-12)

B08E

B08C P GAMMA & VCOM & NVM


7K00
ISL24837IRZ

B06 B07E
B04C
B01A

POWER-OK

B01A

VH

B08E

VL

B08E

P
GAMMA

GPIO_3
7708
NAND01GW3B2CN6F
B04C CONTROL

2701

B25

SDM
2700

A26

OUT12

PWM-DIMMI

C5

OUTCOM
INCOM

24

VCOM
BUFER

CS_L

VCOM

B08E

B08B

B01
1701

XTAL1
U0_RX

AJ34

25
26

GPIO_21
OPWM_2

1700
54M

OUT12

GPIO_26

PANEL
AJ36

OUTCOM

FLASH
1G

NAND_PDD(0-7)

PDD

XTALO

U0_TX

AT21

AP21

UART
SERVICE
CONNECTOR

1
7710
STANDBY

1M20
3

RC

AN22

OIRI

OPWRSB
HDMI_CEC

+3V3STBY

TO IR/LED PANEL
6
AND
KEYBOARD CONTROL
4

KEYBOARD

OPCTRL_0
LED-1

AL36

LED-2

AM37
AM35

ADIN_SRV_5

OPCTRL_4

ADIN_SRV_4

OPCTRL_3

AH14

STANDBYn

AN14

HDMI_CEC

AM21

POWER_DOWN

AU20

MUTE

AR20

SW_MUTE

B01

B05
B04C
B03
B03

B06D USB

ADIN_SRV_2

7D00
TPS2041BD
OUT

OC

USB_PWR_EN

B04C

USB_OCP

B04C

AL22

ORESET

USB_DM0
USB_DP0

AJ5
AK5

USB_DM0
USB_DP0

2
3

3 2

ORESET

1D01
1

+3V3STBY
7701
BD45292G
5
VDD
4
VOUT

EN

USB 2.0
CONNECTOR
SIDE

3
18980_403_100329.eps
100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 41

Block Diagram I2C

IC
B04C

CONTROLLER

CONTROL
AP1

3719

B04C

CONTROLLER

+3V3_SW

7700
MT5363BHMG

3718

B04C

SDA-MAIN

OSDA_0

3716

SCL-MAIN

AH1

SYS_EEPROM_WE

7702
M24C64

7708
NAND01GW3B2CN6F

FLASH
1G

NAND

1703
2

4702

EEPROM
(NVM)

MT5363
PDD

4701

3772

7703
GPIO_44

+3V3_SW
6

3773

3
1
4

ERR
15

6
MAIN NVM
SW

+3V3STBY

3746

FOR DEBUGGING ONLY

3727

3747

AP3

3717

OSCL_0

3749

3728

3748

1701

UART
SERVICE
CONNECTOR

2
1

B2B

B02A

DIGITAL Demod

B08A

TUNER

B08C

TCON CONTROL

P GAMMA & VCOM & NVM

3747

1K00

BYPASS_MODE

WP_TCON

RESET

RDQ(0-31)
7600
H5PS5162FFR

RA

7601
H5PS5162FFR

14

FE_SDA

12

FE_SCL

DIGITAL
DEMODULATOR

SDRAM
512Mb

HDMI & MUX

7H01
VPP1501BFG

7K04
M24C64

TCON
CONTROL

EEPROM

MAIN
TUNER

B06E

VGA
DC_5V

ERR
16

HDMI_PLUGPWR2

15

16

HDMI_SCL1

AM17

HDMI_SCL2

3916

HDMI_SDA2

3915

AN18

12

4E03

15

4E02

1901

HDMI 1 (SIDE)
CONNECTOR

VGA
CONNECTOR

HDMI_PLUGPWR2

HDMI_SDA1

15

3908

SIDE_HDMI_SCL1

3907

AL12

SDA_VGA

SCL_VGA

10

SCL-TCON

12

13

7K03
SL24837IRZ

7K00
ISL24837IRZ

I2C
SWITCH

VOLTAGE
GENERATOR

7E00
M24C02

1902
16
15

SDA-TCON

RES
DEBUG ONLY

10

HDMI_SCL2

AL14

VCC_3V3

11

HDMI_SDA2

1E01

SIDE_HDMI_SDA1

1201
VA1E1BF2403

RA(0-13)

B05

B08A

VDD

VDD

SDRAM
512Mb

7302
TC90517FG

P7

3E22

RDQ

R7

45

3K41

46

B04C

3K40

B04B DDR

3K55

3K56

ROM_SCL

3E21

B04B DRAM

TUNER_SCL

3230

N36

3228

TUNER_CLK

ROM_SDA

3351

TUNER_DATA

TUNER_SDA

3352

N34

3746

+3V3STBY

HDMI 2
CONNECTOR

EEPROM
7E01
B04C

EDID_WC

7900
M24C02

7901
M24C02

EEPROM

EEPROM

SW

Programmable via USB

EDID
SW

EDID
SW

SW

Programmable via ComPair

SW

Pre-programmed device

EDID
SW

2010-Apr-06

18980_404_100329.eps
100402

Block Diagrams

LC10.1L LA

9.

EN 42

Supply Lines Overview


SUPPLY LINES OVERVIEW
B01
1M99
1

B06B

DC - DC

B03

1M99
1

+12VDISP
B04d

B01

B01

B01

BACKLIGHT-BOOST

POWER-OK

B04C
CONTROL

+12VS

+3V3STBY

STANDBY

B04A
CONTROL

+3V3_SW

+12VS

B01

+12VS

+24VAUDIO

+12VS

+5V_SW
B08b

MTK POWER
VGA

SENCE+1V0_MT5363
+3V3STBY

+5V_SW

B01

VGA
CONNECTOR

+3V3STBY

+1V8_SW

+1V8_SW

+3V3_SW

+3V3_SW

+5V_SW

B01

B01

B08A

B01

Synchr
511
Conv 12

DDR

IN OUT
COM

5119

B02a

VCC_3V3

B02b,B04a,c
B06a,b

+5V

VGH_35V

TO
IR/LED B08b
PANEL

5800

SENSE+1V0_MT5363

+VDISP-INT

4J04

B08b

+5V5_TUN

+5V5_TUN

+3V3STBY

+3V3STBY

+3V3STBY

+5V_SW

+5VTUN_DIGITAL

6900

HDMI_PLUGPWR1

6901

HDMI_PLUGPWR2

HDMI 2
CONNECTOR

DIGITAL Demod

HDMI 1 SIDE
CONNECTOR

+5V_SW

B06A
+1V2_SW

+3V3_SW

+3V3_SW

VCC_3V3

B08e
B08a,e
B08a,c,e

VCC_1V8
B08a,b

1902
18

B08C

PWR5V_2
B08b

VCC_3V3

VLS_15V6

VLS_15V6

PWR5V_1

+VDISP

ANOLOG I/O - HEADPHONE

+3V3_SW

P GAMMA & VCOM & NVM

VCC_3V3

B08b

1901
18

+2V5_SW

+1V2_SW

VGH_35V

B08c,e

+5V_SW

B01

+5VS

5324

VGL_-6V

6J02 4J02
LCD
21
SUPPLY
3,4 5J00
3J12
39

B01

+5V_SW

+5V_SW

VLS_15V6

3J10 3J26

10

HDMI & MUX

+5V_SW
5225

7J00
ISL97653

B08a,c,d

VLS_15V6_B
4J01

5802

+3V3STBY

B05

+VDISP
7J01 6J06

B01

TUNER

+VDISP-INT

B04d

7315

B01

TCON DC/DC

5801

5222

B01

VGH_35V

+VDISP-INT
+12VDISP

7802
LCD-PWR-ON

IN OUT
COM

DDR2VDD

LVDS DISPLAY

B01

7216

B01

VDD1V8PLL

5H05

5H04

B08B

+12VDISP

N.C.

B02B

5H01

+5V_SW

7800

SENSE+1V0_MT5363

B01

VDD1V8

+12VS

+5V_SW

GND-AUDIO

IN OUT
COM

VCC_1V8
5H00

+5V
1M20
5

+12VS
B01

+24VAUDIO

B02A

VDD3V3IO

5H06

B01

+1V0_SW

5H03

+3V3STBY

B02b

VDD3V3LVRS

B01

B04a,b

B04a

B01

+3V3_SW

N.C.

+1V2_SW

5H02

B08b

+1V8_SW

10

11

B08b

B01
+3V3STBY

B03

11

VGH_35V
VLS_15V6

B04a

10

VGH_35V
VLS_15V6

TCON CONTROL

+1V8_SW

CONTROLLER

B02a,b,B03,B04c,d,
B05,B06d,e

B04D
9

VGL_-6V

B08b

+3V3_SW

7107
5118

VCC_3V3

VGL_-6V

DC_5V

VCC_1V8

+5V_TUN

+12V_1

7116
TPS54386PWP
1,14 Non 3 5104

1E01
18

VCC_3V3

B04C

5120

MINI LVDS

VCC_3V3

B01
B03,B04a,c,d,
B05,B06a,b,d

B03,B04c,B06b

+3V3_SW

B08b

+1V0_SW

+1V8_SW

6125 +5V_SW

+VDISP

B08b

+12VS

7103
TPS54386PWP
3 5117
Non
Synchronous
5116
Converter 12

VREF_15V2

B08b

B08E

+5V_SW

B06E

B04B

1,14

+VDISP

USB

B01
6

B08c

+24VAUDIO

+1V0_SW

B06D
CONTROL

1M95
1

+5V_SW

B01

1M99
1

+5V_SW

B04A

+3V3_SW

B01

B01

B04C
CONTROL

MPD

VREF_15V2

+3V3STBY

B04C
CONTROL

BACKLIGHT-PWM

+3V3STBY

B06D

LAMP-ON

MAIN
POWER
SUPPLY

B01

B08D

ANALOG I/O - AUDIO

CLASS-D & MUTING

7K00
ISL24837IRZ
32
VOLTAGE
GENERATOR

VREF_15V2

B08d

+VDISP

B08b
+3V3_SW

B01

18980_405_100329.eps
100402

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 43

10. Circuit Diagrams and PWB Layouts


SSB: DC-DC

DC-DC

B01

B01

10

11

12

13

14

A
1M99

10n

2198
100n

100n
2125

10n
2135

2126

100p

100p
2134

100p
2132

2133

100p

3129

1M95

2u2

2146

1n0

F113
F114
F115
F116
F117
F118
F119
F120
F121
F122
F123

RES
2180

1
2
3
4
5
6
7
8
9
10
11

1n0

STBY
3V3
3V
0V
0V
0V
0V

2137

ON
3V3
0V
12V
12V
12V
25V

STANDBY

68R

+12VS

+24VAUDIO
GND-AUDIO

RES

1n0

2145

100n

100n
2147

2148

100n

1n0

2149

100n
2144

2143

100n

1n0

2142

RES
RES

2141

1-2041145-1

30R
5103

1n0

2136

RES

2155

3122

4K7 1%

10p
10p

RES

2161

1M95
PIN
1
2
6
7
8
9

30R
5120

+12VS

+3V3STBY

10u

2159
100u
6.3V

2164

3131

3125

I135

15

1K5

16
17

100p

+3V3_SW

I130

4u7

2160

10R

F133

5116
22u

GND_HS

I129

SS34

GND

3130

6123

SS34

10u

2162

100u
6.3V

10p
2158

5121

VIA1
VIA2

3136
1R0

I128

470p

ILIM2
SEQ
BP

2153
33n

I127
13
12
6
8

6124

9
10
11

BOOT2
SW2
EN2
FB2

2157

BOOT1
SW1
EN1
FB1

I134

PVDD2

10R

470p

2156

RES
2163

3107

1K0 1% RES

2
3
5
7

I132

14

PVDD1

I126

22n

2154

100u 16V

3140
3138

I131

18K 1%

2152
33n

I125

22u

SS36

100K 1%
2170

3135
1R0

5117

6125

RES

7117
TPS54386PWP 1
F132

+5V_SW

2131

F135

+5V5_TUN

POWER-OK

RES 2130

1-2041145-2

B04C
LAMP-ON
BACKLIGHT-PWM
BACKLIGHT-BOOST

68R
68R
68R

100p

2168
10u

3126
3127
3128

100p

2123
10u

F105
F106
F107
F108
F109
F110
F111
F112

RES 2129

RES

2150
100u
16V

+12VDISP

100p

F102
F103
F104

2128

+12VS_1

1
2
3
4
5
6
7
8
9
10
11
12

STBY
0V
0V
0V
0V
0V

2127

1M99
PIN ON
1 12V
5 3V
6 >1.5V
7 1.5V
9 3V

+12VS_1

F124

10u
GND-AUDIO
GND-AUDIO
GND-AUDIO

2187
10u

F131
7107-1
1
ST1S10PH

GND_HS

I137

5119

F134
+1V0_SW

RES

22u

22u
2182

22u

2181

10n

2196

2195

22u

2151

GND
P HS

220u 25V

2u0
3

2124

A
4

VFB

10K 1%

SW

VIN

SYNC

10u

10u

2175

2174

10u

2173

INH

4n7

I139
10p

3144

7107-2
ST1S10PH

VIA

220R 1%
11

1K0 1%

10

SENSE+1V0_MT5363
1K5

RES

3134

2193

390R
1%

3119

2197

SS34

2140
100u
6.3V

10u

I123

15

4u7

I138

470p

VIA1
VIA2

16
17

5118
33R

RES
ILIM2
SEQ
BP

A
10p

2166

+12VS

3142

+1V2_SW

22u
I120

2176

5115

SW

2165

I119

220R
1%

13
12
6
8

I118 3143 1R0


33n

3139

BOOT2
SW2
EN2
FB2

I117

6122

2138

PVDD2

BOOT1
SW1
EN1
FB1

GND
2192

10R

3109

SS34

6103

10u

2191

2190

6.3V

10p

RES

2189

9
I122 10
11

I136

100u

470p

I104

1K2
1%

2
3
5
7

33n

10p

2188

RES

1K2
1%

3105

2167

1R0

22u

3106

PVDD1

I107

2139

+1V8_SW

I106

3108

3145

I105

7116
14 TPS54386PWP

1
5104

F125

3133

2186
10u

10R

2185
100u
16V

G
ROUND 4.02mm SCREW HOLE
1X04
REF EMC HOLE

1X02
REF EMC HOLE

SLOT SCREW HOLE

ROUND 4mm SCREW HOLE


1X06
EMC HOLE

1X05
EMC HOLE

1X01
REF EMC HOLE

1X03
REF EMC HOLE

1
1M95 C10
1M99 A10
2123 B5
2124 F12
2125 B12
2126 B12

2127 B10
2128 B10
2129 B11
2130 B11
2131 B11
2132 B11

2
2133 B12
2134 B12
2135 B12
2136 C11
2137 C11
2138 F3

2139 F5
2140 F6
2141 D10
2142 D10
2143 D11
2144 D11

3
2145 D12
2146 C12
2147 D12
2148 D12
2149 D11
2150 B5

2151 F13
2152 C4
2153 C5
2154 C2
2155 C7
2156 C3

4
2157 C5
2158 D2
2159 C6
2160 C4
2161 C7
2162 D2

2163 D2
2164 D6
2165 E5
2166 F7
2167 E3
2168 B5

5
2170 C1
2173 F9
2174 F10
2175 F10
2176 F12
2180 C11

2181 F13
2182 F14
2185 E3
2186 E3
2187 E4
2188 F2

6
2189 F2
2190 F2
2191 F2
2192 F4
2193 F7
2195 F13

2196 F13
2197 F6
2198 B13
3105 F1
3106 F1
3107 D1

7
3108 E3
3109 F3
3119 F6
3122 C7
3125 C7
3126 B11

8
3127 B11
3128 B11
3129 C11
3130 D3
3131 D5
3133 F12

3134 F12
3135 C3
3136 C5
3138 D1
3139 F6
3140 C1

9
3142 F12
3143 E5
3144 F13
3145 F5
5103 D3
5104 E2

5115 E6
5116 C6
5117 C3
5118 E9
5119 E11
5120 D3

10
5121 D3
6103 F3
6122 F5
6123 D3
6124 D5
6125 C2

7107-1 E10
7107-2 F11
7116 E4
7117 B4
F102 A10
F103 A10

11
F104 A10
F105 B10
F106 B10
F107 B10
F108 B10
F109 B10

F110 B10
F111 B10
F112 B10
F113 C10
F114 C10
F115 C10

12
F116 D10
F117 D10
F118 D10
F119 D10
F120 D10
F121 D10

F122 D10
F123 D10
F124 D4
F125 E2
F131 E7
F132 C1

13
F133 C7
F134 E12
F135 B1
I104 F1
I105 E3
I106 E3

I107 E4
I117 E5
I118 E5
I119 E6
I120 E6
I122 F4

14
I123 F5
I125 C3
I126 C4
I127 C5
I128 C5
I129 C6

I130 C6
I131 C2
I132 C4
I134 C3
I135 C5
I136 F3

I137 E11
I138 E9
I139 F12

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3139 123 6483


18980_500_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 44

SSB: Tuner

Tuner

B02A
6

10

9
B04C

F242

I221

RES

3269

8K2
RES

3223
4208
RES

AGND

22u

10n

2281

1u0

F235

3230

AGND
10R

3228

10R

39K
RES

3224

+5VS

2284
10n

2283
22u

AGND

B02B

AGND

AGND

AGND
F244

FE_SCL

F245

FE_SDA

2226
100p

+5VTUN_DIGITAL

2286

47u

2294

100u

2296

33R
100n

AGND

10u

3268

5207
2258

5222

RF_AGC

2213
22u
RES

47n

AGND
100p

I254

10K
2293

2295

AGND

AGND AGND

AGND

AGND
AGND

B04C

2285
27p
5227

5226

2287
VIP_ATV

2225
100p
F246

3261

IF_AGC

AGND
2263
47n

2262
100p

AGND

75R

5230

2289

220n

220n
2290

10n

C
VIN_ATV

180p

3263

DIF_N

RES

2291

AGND

4209

5229
DIF_P

27p

75R

DIF_P

10n

10K

RES
AGND

220n
33p

220n
3262

AGND

2288

AGND

A225

330n

RES
2297

DIF_N

5228

MT

RF_AGC_EX

RES

13

14

F201
F202
F203
F204
F205
F206
F207
F208
F209
A212
A213
A214

1n0

15

16

MT

1
2
3
4
5
6
7
8
9
10
11
12

ANT_PWR
NC1
RF_AGC
NC2
AS
SCL
SDA
+B
IF_AGC
IF_OUT+
IF_OUTIF_OUT_ANALOG

+5VTUN_DIGITAL
33R

+5V_SW

3270

7218
KTK5132E

AGND

TUNER

F236

5225

I222

AGND

1201
VA1E1BF2403

22u
2278

2277

100K

AGND AGND

1K0
F213

OUT
COM

AGND AGND

7217
BC847B

1K0

IN

+5VIF

I220

3265

10n
RES 3267

SI1013

+5V5_TUN

10K
RES 2292

RES 3266

10K

3264

13

7216
LD29150DT50R

+5VIF

12

RF_AGC_SW

F243

7219
2

+5VS

11

2282

100n

2279

22u
2280

180p

B02A

Near Tuner

Near MTK5363

IF_ATV

Reserved

SAW FILTERS
Reserved

3231

TUNER AGC

AGND

I230

2229

VIF AGC

1211

F216

+5VIF

22p

4M0

I231

2233

RC VCO

DIGITAL VCO CONTROL

5213

390n

1n0
I234

I
IGND

O1
O2

2V

VIF2
VIF1

2
1

VIF1

2V

24

SIF2

5212
RES

2235

AGND

AFC DETECTOR

SOUND TRAPS
4.5 to 6.5 Mhz

VIF-PLL

VIF1
VIF2

I255

VIF2

2V

A210

GND

Note:
DIA 1.2MM FT
Test Keep spaceing 3.5mm

AGND

4
5

A211
OFWM1971M
45M75

AGND

AGND
10n

I232

15R

AGND

3
3234

220n

1213

REF 15

VAGC 16

TOP

TDA9886/V3

TAGC 14

AGND
7212

1n5

I235

I233

22n

470n

AGND
F214

2232

100R
RES 2230

VPLL 19

330R
2228

AFC 21

I228
3232

F237

2231

RF_AGC

0V

DEMODULATOR

CVBS

17

AUD

F215

2V1

7213
BC847B

1V5

SIF1

I237
I238

DEEM

2236
10n
AGND

MAD

B06B

1R0

23

AUDIO PROCESSING
AND SWITCHES

3235

2V

SINGLE REFERENCE QSS MIXER


INTERCARRIER MIXER AND
AM-DEMODULATOR

F227

3254

CVBS_RF

I239

470n

47p

75R
2240

I2 C-BUS TRANSCEIVER

2237

3255

OUTPUT
PORTS

3236

SIF
AGC

SUPPLY

AFD

220R

75R

I240

NARROW-BAND FM-PLL
DEMODULATOR

1n0
2247

10n

1n0

AGND

2V3

4 FMPLL

12 SIOMAD

2V1

7 DGND

11 SCL

10 SDA

3 OP1

NC

18 AGND

22 OP2
I242

I244

2244

2246

+5VIF

13

20

VP

AGND

2243

I243

AGND
3238

I245
10n
2245

AGND

5K6

AGND

H
FE_SCL RES TUNER_SCL

AGND

TUNER_SCL

4210
FE_SDA RES TUNER_SDA

3241

RES 2250

100R

AGND
I247

I251

AGND

3244

TUNER_SDA

4211

390p
I249
AGND

RES 2251

100R

AGND

SIF_OUT

F240

RE_AGC

Int
ATD

TDA9886
RE_AGC

3223
3224
4211
2213

10K
47n

8k2
39k
0R
22u

3246

SIF_OUT_GND

F241

15p

2252

1R0

3247
1R0
AGND

10

11

12

13

1201 B1
1211 E12
1213 E4
2213 B7
2225 C5
2226 B5
2228 E4
2229 E5
2230 E2
2231 E3
2232 E3
2233 E6
2235 F8
2236 G7
2237 G7
2240 G8
2243 H7
2244 H2
2245 H7
2246 H4
2247 H4
2250 H4
2251 I4
2252 I5
2258 C2
2262 C6
2263 C7
2277 A9
2278 A10
2279 A10
2280 A11
2281 A11
2282 A12
2283 B10
2284 B11
2285 C12
2286 C10
2287 C12
2288 C11
2289 C12
2290 D12
2291 D10
2292 A4
2293 B6
2294 C2
2295 B2
2296 C2
3223 A7
3224 B7
3228 C6
3230 B6
3231 E4
3232 E2
3234 E7
3235 G7
3236 G7
3238 H7
3241 H4
3244 H4
3246 I4
3247 I4
3254 G8
3255 G8
3261 C7
3262 C10
3263 D10
3264 A3
3265 A2
3266 A3
3267 A4
3268 B2
3269 A4
3270 B7

4208 B4
4209 D6
4210 H1
4211 I1
5207 B2
5212 E12
5213 E10
5222 A9
5225 A11
5226 C11
5227 C12
5228 C10
5229 C11
5230 C12
7212 E2
7213 F7
7216 A10
7217 A3
7218 B4
7219 A3
A210 E12
A211 E12
A212 C1
A213 C1
A214 C1
A225 C1
F201 B1
F202 B1
F203 B1
F204 B1
F205 B1
F206 B1
F207 B1
F208 B1
F209 C1
F213 B1
F214 E3
F215 F7
F216 E11
F227 G8
F235 A11
F236 A12
F237 E1
F240 I2
F241 I2
F242 A7
F243 A4
F244 B7
F245 C7
F246 C7
I220 A2
I221 A3
I222 A4
I228 E3
I230 E5
I231 E4
I232 E5
I233 E3
I234 E6
I235 E3
I237 F8
I238 F7
I239 G7
I240 G7
I242 H4
I243 H7
I244 H4
I245 H6
I247 H5
I249 H4
I251 H5
I254 A9
I255 F7
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_501_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 45

SSB: Digital Demodulator

Digital Demodulator

B02B

B02B

10

11

7315
LD1117DT25

I337

2374

100n

2372

+2V5_SW
33R

COM

100u 16V
2373

DGND DGND

F305

5324

OUT

DGND

DGND

2376

IN

33R

100n

+5V_SW

100n

2375

I336

47u 16V

5323

DGND

DGND

+2V5_SW

+1V2_SW
I300

5307

I303

5302

30R

1u0

100n

2310

100n
2309

100n
2308

2306

100n
2307

10n

100n

2322

2321

1u0

2320

30R

+3V3_SW
5306

AGND

AGND

I304

I301

AGND

5301

DGND

DGND DGND DGND DGND

30R
1u0

100n

2305

100n
2304

100n
2303

2301

100n
2302

2319

100n

1u0

2318

30R

+1V2_SW

5304

AGND

I302

AGND

I305

DGND DGND DGND DGND

5303

DGND

30R
1u0

2313

100n

100n
2312

2311

100n

2315

1u0

2314

30R

+2V5_SW
DGND

I306

DGND

DGND DGND

5305

DGND

24
25

I313

26

AGND

AGND AGND

39
DGND
40

+3V3_SW

3349

DGND

3337

B04C

10K

I314

I315

1
41
7

I318
11
F300
F301

3351
3352

100R
100R

I316
I317

45
46

43
DR2VDD

34
48
DR1VDD

PLLVDD

13
35
49
64

16
36
56
63

20

32

22

SLOCK
P
AD_VREF
N

SRCK

AD_VREF

SRDT

DTCLK

STSFLG1

DTMB

AGCCNTI

S_INFO

AGCCNTR

0
TSMD
1

STSFLG0
SYRSTN

AGCI
SLADRS

CKI
SCL
SDA

TN

0
1

SCL
SDA

AGND

1u0

100n
33R
2

3353

33R

DEB

AGND
TSO_VALID

DGND

54
55

I321

59

I322

3357
1

33R
2

TSO_SYNC

52
61

I323

3358
1

33R
2

TSO_CLK

60

I324

3359
1

33R
2

TSO_DATA0

38
I325

3339

20K

IF_AGC

10

51
42
6
5

AGND

12
14

+3V3_SW

VSS

RES

F306

RESET_DEMOD

4305

10K

3335

10K
3336

3360

DGND

DGND

RES

4306

4307

DGND

I327
I328

4308

+3V3_SW

4300
4301

5311
30R

30R

FE_SCL
FE_SDA

4311
I338

30R
5310

B02A

2K7

2K7

3343

3344

5309

F302
F303

4309

4310

53

AGND

DGND

DEB

1n5

3354
1

3350

23

TUNER_SCL
TUNER_SDA

10K

SBYTE

P
ADQ_AI
N

2335

1K0

1K0
DEB

100n

I312

100n

RSEORF

I320

2332

100n
100n

2338

RLOCK
P
ADI_AI
N

I319

58

4K7

I311

2336
2337

PBVAL

21

4K7

28
27

FIL

DEB

4
15
33
37
44
47
50
57
62

AGND

I309
I310

VDDS

B04C

3355
+3V3_SW

SML-310

DGND

DGND

RERR

PLLVSS

AGND

100n
100n

30
29

0
XSEL
1

AD_DVSS

2K7

2K7
3332

3331

2377
2378

1u0
1u0

VDDC

31

1n2
2341

2339
2340

100n

4304

DIF_N

DGND

RES
5308

RES

17

3
2

4303

AD_AVDD

19
18

DIF_P

I307
I308

AD_DVDD

AGND

B04A

6301

7301
BC847BW

18p

7302
TC90517FG
AGND

FOR DEVELOPMENT USE

3356

AD_AVSS

25.4M

2316

3
2334

4
2

18p

2333

2317

30R
1

1301

DGND

AGND

10

1301 D3
2301 C6
2302 C6
2303 C6
2304 C6
2305 C7
2306 B6
2307 B6
2308 B6
2309 B6
2310 B7
2311 C6
2312 C6
2313 C7
2314 C3
2315 C3
2316 D7
2317 D6
2318 C3
2319 C3
2320 B3
2321 B3
2322 B4
2332 F7
2333 D2
2334 D3
2335 D6
2336 E3
2337 E3
2338 E3
2339 E3
2340 E3
2341 E2
2372 A2
2373 A2
2374 A3
2375 A3
2376 A4
2377 E3
2378 E3
3331 E1
3332 E2
3335 H7
3336 H7
3337 F3
3339 F6
3343 H7
3344 H7
3349 F3
3350 G7
3351 G3
3352 G3
3353 E6
3354 D6
3355 D10
3356 D9
3357 E6
3358 E6
3359 E6
3360 G7
4300 H8
4301 H8
4303 E2

4304 E2
4305 G10
4306 G10
4307 H10
4308 H10
4309 H11
4310 H10
4311 H11
5301 B7
5302 B7
5303 C7
5304 C3
5305 D7
5306 B3
5307 B3
5308 E2
5309 H10
5310 H10
5311 H11
5323 A1
5324 A3
6301 D10
7301 D9
7302 D4
7315 A2
F300 G2
F301 G2
F302 H7
F303 H7
F305 A4
F306 G7
I300 B4
I301 B4
I302 C4
I303 B5
I304 B5
I305 C5
I306 D6
I307 D3
I308 D3
I309 E4
I310 E4
I311 E4
I312 E4
I313 E4
I314 F4
I315 F4
I316 G4
I317 G4
I318 F3
I319 D6
I320 D6
I321 E6
I322 E6
I323 E6
I324 E6
I325 F6
I327 H7
I328 H7
I336 A2
I337 A3
I338 H10

11
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_502_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 46

SSB: Class-D & Muting

Class-D & Muting

B03
1

B03

10

11

+24VAUDIO

A
5401

0
GAIN
1

BSL

21

GND-AUDIO

2419

10n
10n

1
3405-1

2421

22K

1402

22K

2
3405-2

V_NOM

LEFT_SPEAKER

25V 220u

220R

22u

10n

22K

220n
2414

22K

4
3405-4

3405-3

220n

2416

I420

1
3406-1

220n

3423

B04C

4u7

100K

4u7

2427

2
3406-2

F410

DC_PROT
2426

3
3406-3

220n
2418

2417

5
4

GND-AUDIO

7408
BC857BW

I434

3424

22K

22K
8

22K

100K

GND_HS
25

R
13
14

8
9

L
23
24

AGND

3422

I438

7409
BC857BW
7410
BC847BW

100K
3425

VIA

37
36
35
34

220n

2412

5405

RIGHT_SPEAKER

25V 220u

220R
I418

RIGHT_SPEAKER

2415

I419

2041145-4

100K

VIA

VIA

I414

5404

VCLAMP
BYPASS
MUTE
SD

+3V3STBY

VIA

26
27
28
29

5403

22u

3406-4

I416

I417

1
2
3
4

220n

4K7

3436
7400-2
TPA3123D2PWP

5402

GND-AUDIO

40
39
38

A_STBY

I415
220n

22

PGND
F412

2411

I413

15

F406
2420

16

220R
GND-AUDIO

1403

R
OUT
L

11
7
4
2

1u0
I406
I407

F411

MUTE

18
17
1u0 I405

2408
2409

GND-AUDIO

IN

47n

BSR

CLASS-D
AUDIO AMP

22K

I403

2407

B04C

R
PVCC

1735
F404
F405

5406

V_NOM

6
F402

AVCC

47n

AOUTL

2402

2413

I401

10
12

2406

1
3

7400-1
TPA3123D2PWP

19
20

F401

AOUTR

220u 35V

2403

220n

2400

220u 35V

2401

B04C

GND-AUDIO

GND-AUDIO

LEFT_SPEAKER

GND-AUDIO

220n

I421

2405

22K

10u 35V
2404

3401
I410

I412

I411

4R7

220R

5400

F400

3400

+24VAUDIO

220R

A
7401
BC847BW

GND-AUDIO

GND-AUDIO

VIA
GND-AUDIO

+12VS

GND-AUDIO

100K

I435

47K

4n7

RES

3430

7412
2SD2653K

47K

3420

I436

1K0

1K0

3435
AOUTR

1K0

B06A

47K

3434

RES

2431

B06B
AOUTL

I437
7413
2SD2653K

2425

RES
1

47K

I441

3421

3439

I443

3437

10K

3417

100n

I432
7407
2SD2653K

1K0

A_STBY

1u0

22K
2432

3438

3K0

2423

3427

10K

+3V3STBY

F417

7406
2SD2653K

7405
BSS84

F414

RESET_AUDIO

7404
3
BC857BW

I431

4n7

RES
3416

100K

RES
3414

RES
3415

3432

I442
3428

+3V3STBY

1R0

SW_MUTE

10K

3419

6401
BAS316

7411
BC857BW
3

HP_LOUT

F413

HP_ROUT

I429

47K

RES
3408

47K

4n7

3426
6402
BAT54C

47K

RES

BC857BS(COL)
7402-2

RES

I430

I423

2422

1K8

4401

I433
470u 16V

4K7

3410

3413

3433

BAS316

RES
6400

F409
I425

4K7

56K

3431

7403
BC847BW 3

3411

RES
3409

RESERVED

I440

7402-1
BC857BS(COL)

I422

F415
2430

1K0

4n7

F416

3412

2424

+5V_SW

10K

I424

F408

3418

GND-AUDIO
+12VS

1K0

30
31
32
33

DC-DETECTION

BAT54C
6403

7414
BC847BW

H
1

H
3

10

1402 B10
1403 C10
1735 B11
2400 B5
2401 B5
2402 B6
2403 B6
2404 B4
2405 B4
2406 B4
2407 C4
2408 C4
2409 C4
2411 B6
2412 C6
2413 B8
2414 B8
2415 C8
2416 C8
2417 D7
2418 D7
2419 B11
2420 B10
2421 B11
2422 F4
2423 G4
2424 F6
2425 G6
2426 D9
2427 D10
2430 E9
2431 F9
2432 G3
3400 A3
3401 B4
3405-1 B7
3405-2 B7
3405-3 B7
3405-4 B7
3406-1 D7
3406-2 D6
3406-3 D6
3406-4 D6
3408 F2
3409 F2
3410 F2
3411 E3
3412 E3
3413 E3
3414 F3
3415 F3
3416 F4
3417 G5
3418 E5
3419 F5
3420 F7
3421 G7
3422 C9
3423 D9
3424 D9
3425 D10
3426 F5
3427 G6
3428 F6
3430 E9
3431 E9
3432 E9
3433 E8
3434 F9
3435 F9
3436 D4
3437 G2
3438 G3
3439 G4
4401 E5
5400 A5
5401 A6

5402 C7
5403 C7
5404 C8
5405 C8
5406 B10
6400 E2
6401 F3
6402 F5
6403 H2
7400-1 B5
7400-2 D3
7401 A4
7402-1 E3
7402-2 F3
7403 E5
7404 F6
7405 F5
7406 F7
7407 G7
7408 C10
7409 D10
7410 D11
7411 E9
7412 E10
7413 F10
7414 H3
F400 A4
F401 B2
F402 C2
F404 B11
F405 B11
F406 B11
F408 E2
F409 E5
F410 C10
F411 C2
F412 C2
F413 F3
F414 G2
F415 E7
F416 E4
F417 G2
I401 B5
I403 C4
I405 C4
I406 C4
I407 C4
I410 B3
I411 A5
I412 A6
I413 B6
I414 C6
I415 C7
I416 C7
I417 C7
I418 C7
I419 C8
I420 C8
I421 B4
I422 F2
I423 F2
I424 E3
I425 E3
I429 F5
I430 F5
I431 F7
I432 G7
I433 E4
I434 C9
I435 E8
I436 E9
I437 F9
I438 D10
I440 E5
I441 F6
I442 F9
I443 G3

11
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_503_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 47

SSB: MTK Power

B04A
1

MTK Power

B04A

10

11

30R

5506

+3V3_SW

7700-8
MT5363BHMG
F503

5500

F502

100n

100n

100n

2520

2522

2521

2519

2518

100n

100n

100n
2517

100n

2516

2515

4u7

2514

2566

4u7

100n

100n

2565

2567

100n

100n
2562

100n

100n
2561

2564

100n
2560

2563

100n

100n
2559

100n

2558

100n

2553

F500

3500

I503

4u7
2598

1u0

2599

I502

2570 100n

100n

1u0

1u0

2593

2597

2592

5505 30R
+3V3STBY

2595
2596

10u
100n

2579

AADC
ADAC0
ADAC1
CVBS
DEMOD1
DIG
HDMI
LVDS
REF_AADC
SIF
USB_1
USB_2
USB_3
VDAC
VGA_STB
XTAL

Y33
AE34
U30
AR32
AG36
AJ30
AN12
J18
Y29
AK29
AP9
AT9
AT11
AR30
AL24
AK37

100n
2506
100n

100n

100n
2505

100n

100n

100n

100n
2503

2504

2513

AADC
ADAC0
ADAC1
CVBS
DEMOD1
DIG
HDMI
LVDS_1
LVDS_2
REF_AADC
SIF
USB
VDAC
VGA_STB
XTAL_STB

4u7

I507

Y31
AF33
T31
AN32
AG34
AK31
AM13
F15
H15
W30
AL30
AM11
AN30
AN24
AK35

2508

I506

2569 100n

5504 30R
+3V3STBY

I505

30R
30R

2512

AVDD33 AVSS33
5502
5503

2502

P17
T13
AH29
AH31
AN26
AM9
P19

2510

2580

LVDS
MEMPLL
PLL_1
PLL_2
RGB
USB
VPLL

100n

100n

100n

2581

ADCPLL
APLL
HDMI
LVDS
MEMPLL
RGB
SYSPLL
TVDPLL
USB
VPLL

100n

100n
2582

AH33
AG30
AP11
N16
P13
AM25
AG32
AF29
AL10
N18

2509

100n
2584

AVDD12 AVSS12

100n

AVDD10_LDO

2501

POWER-MISC
AM23

4u7

100n
2574

I504

1R0
7700-7
MT5363BHMG

2500

100n

100n
2575

100n

2576

2577

4u7

2588

2573 100n

100n
2568

2571 1u0

+1V8_SW

H23
H31
J30
V31
W32
W34
W36
AF13
AF15

30R

5501

2552

30R
+3V3_SW

100n

+1V2_SW

B01
SENSE+1V0_MT5363
F501

100n

100n

100n
100n
100n

100n
100n
100n

100n
100n
100n

100n
100n
100n

100n
100n
100n

2537
2536
2535

2534
2533
2532

2531
2530
2529

2528
2527
2526

2525
2524
2523

100n
100n
100n
2543
2542
2541

2538

100n
100n
2545
2544

2540

4u7

100n
2549

100u 6.3V

2551

2550

+1V0_SW

B1
B13
C2
C12
D3
D13
E4
E12
E14
F5
F13
G6
G14
H7
J14
R2
R4
R6
AC6
AD5
AD7
AE2
AE4
AF1
AF3
R16
U14
V13
Y13
Y15
AA14
AD15
AD17
AD19
AE14
AE16
AE18
AG12
AH7
AJ6
AJ8
AK5
AK7
AL2
AL4
AL6
AL8
AM1
AM3
AM5
AM7
AN2
AN4
N22
N24
T25
V25
W24
Y25
AA24
AB25
AE20
AE22

POWER-MAIN
VCCIO33
DVSS

VCCIO33-1

DVSS

VCC2IO
DVSS

VCC2IO
DVSS

VCC2IO
DVSS

VCC2IO
DVSS

VCC2IO
DVSS

DVSS
VCCK

DVSS
VCCK

DVSS
VCCK

DVSS
VCCK

DVSS
VCCK

DVSS
VCCK

DVSS
VCCK

C8
D9
E8
F9
G8
G10
J4
J6
L4
L6
N14
P15
R14
R18
T15
T17
T19
U16
U18
V15
V17
V19
W4
W6
W14
W16
W18
Y3
Y17
Y19
AA16
AA18
AB13
AB15
AB17
AB19
AC14
AC16
AC18
AD13
AE8
AF9
B21
D21
E22
G22
N20
P21
P23
P25
R20
R22
R24
T21
T23
U20
U22
U24
V21
V23
W20
W22
Y21
Y23
AA20
AA22
AB21
AB23
AC20
AC22
AC24
AD21
AD23
AD25
AE24

2500 C8
2501 C8
2502 C8
2503 C9
2504 C9
2505 C9
2506 C9
2508 D8
2509 D9
2510 D9
2512 D9
2513 D9
2514 B8
2515 B8
2516 B8
2517 B8
2518 B8
2519 B9
2520 B9
2521 B9
2522 B9
2523 F9
2524 F9
2525 F9
2526 F9
2527 F9
2528 F9
2529 F8
2530 F8
2531 F8
2532 F8
2533 F8
2534 F8
2535 F8
2536 F8
2537 F8
2538 F8
2540 F7
2541 F7
2542 F7
2543 F7
2544 F7
2545 F7
2549 F7
2550 F6
2551 F6
2552 B4
2553 B4
2558 B5
2559 B5

2560 B5
2561 B5
2562 B5
2563 B5
2564 B5
2565 B6
2566 B6
2567 B6
2568 C3
2569 E3
2570 E4
2571 C3
2573 C3
2574 C4
2575 C4
2576 C4
2577 C3
2579 E4
2580 C4
2581 C3
2582 C3
2584 C3
2588 C3
2592 D3
2593 E3
2595 E3
2596 E3
2597 D4
2598 C5
2599 D4
3500 B5
5500 B6
5501 B3
5502 D3
5503 D3
5504 D3
5505 E3
5506 A8
7700-7 C5
7700-8 A10
F500 B3
F501 F6
F502 B6
F503 B8
I502 D3
I503 B5
I504 C5
I505 D4
I506 D4
I507 E3

10

11
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_504_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 48

SSB: DDR

DDR

B04B

B04B

10

11

12

RDQS0
RDQS1
RDQS2
RDQS3

B9
A8
B7
C6
V3
W2
Y1
AA2

RDQS(0)
RDQS(0)#
RDQS(1)
RDQS(1)#
RDQS(2)
RDQS(2)#
RDQS(3)
RDQS(3)#

L2
L3

RA(0)
RA(1)
RA(2)
RA(3)
RA(4)
RA(5)
RA(6)
RA(7)
RA(8)
RA(9)
RA(10)
RA(11)
RA(12)

3600-2
3604-2
3602-4
3604-4
3602-2
3601-4
3602-3
3601-3
3600-4
3601-1
3604-3
3602-1
3601-2
3605-1

56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

RCLK0

3612
22R 1%

RCLK0#

3613
22R 1%

NC

0
1
2
3
4
5
6 A
7
8
9
10
11
12
CK

F7
E8

LDQS

B7
A8

UDQS

DQ

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

UDM
LDM
VREF

VSS
RDQS(0)
RDQS(0)#
RDQS(1)
RDQS(1)#

SDRAM

0
BA
1

J8
K8

47u 16V

100n
2607

2608

100n

100n
2606

100n
2604

2605

100n

100n
2603

100n

2602

100n

2601

RDQM(0)
RDQM(1)
RDQM(2)
RDQM(3)

56R
56R

J1

E10
C10
V1
U6

3603-4
3603-3

VDDQ
A2
E2
L1
R3
R7
R8

3604-1
RBA(2)
56R
3600-3

RA(13)

56R

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

RDQ(0)
RDQ(1)
RDQ(2)
RDQ(3)
RDQ(4)
RDQ(5)
RDQ(6)
RDQ(7)
RDQ(8)
RDQ(9)
RDQ(10)
RDQ(11)
RDQ(12)
RDQ(13)
RDQ(14)
RDQ(15)

B3
F3

RDQM(1)
RDQM(0)
F600

J2

3615

VSSQ

+1V8_SW

1K0 1%
100n

0
1
2
3

RBA(0)
RBA(1)

VDD
ODT
CKE
WE
CS
RAS
CAS

1K0 1%
2609

RDQM

K9
K2
K3
L8
K7
L7

3616

REXTDN
RODT
RCS
RWE
RCAS
RRAS

56R
56R
56R
56R
56R
56R

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

AB5
N6
P3
K3
L2
P5

RCLK1
RCKE

3605-2
3603-2
3603-1
3605-4
3605-3
3600-1

VDDL

RODT
RCS#
RWE#
RCAS#
RRAS#

RCLK0

RODT
RCKE
RWE#
RCS#
RRAS#
RCAS#

VSSDL

B3
A2
AD1
AD3
K1

7600
H5PS5162FFR-S6C

J7

RCLK0
RCLK0#
RCLK1
RCLK1#
RCKE

0
1 RBA
2

RDQ(0)
RDQ(1)
RDQ(2)
RDQ(3)
RDQ(4)
RDQ(5)
RDQ(6)
RDQ(7)
RDQ(8)
RDQ(9)
RDQ(10)
RDQ(11)
RDQ(12)
RDQ(13)
RDQ(14)
RDQ(15)
RDQ(16)
RDQ(17)
RDQ(18)
RDQ(19)
RDQ(20)
RDQ(21)
RDQ(22)
RDQ(23)
RDQ(24)
RDQ(25)
RDQ(26)
RDQ(27)
RDQ(28)
RDQ(29)
RDQ(30)
RDQ(31)

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

H3
J2
H1

0
1
2
3
4
5
6
RA
7
8
9
10
11
12
13

D7
H11
E6
G12
H13
D5
F11
F7
B5
D11
A4
B11
A12
C4
A10
A6
AB1
U4
AC4
T1
T3
AC2
U2
AB3
Y5
T7
AA6
V7
V5
AA4
T5
Y7

A3
E3
J3
N1
P9

RBA(0)
RBA(1)
RBA(2)

1
RVREF
2

100R

N4
H5
M3
G4
M5
F1
M7
F3
P1
D1
G2
N2
E2
M1

3624

RA(0)
RA(1)
RA(2)
RA(3)
RA(4)
RA(5)
RA(6)
RA(7)
RA(8)
RA(9)
RA(10)
RA(11)
RA(12)
RA(13)

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RDQ 15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

3614

100n
3623

1K0 1%

2630

DRAM

A1
E1
J9
M9
R1

7700-3
MT5363BHMG

2600

+1V8_SW

N8
P7

F602

1K0 1%

+1V8_SW
3622

100R

3617

RCLK1

3606-2
3609-3
3608-1
3609-1
3608-3
3607-1
3608-2
3607-2
3606-4
3607-4
3609-2
3608-4
3607-3
3611-4

56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R
56R

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
J8
K8

3619
3618

RCLK1#

22R 1%

100R

22R 1%

DQ

CK

LDQS

B7
A8

UDQS

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

UDM
LDM
VREF

A3
E3
J3
N1
P9

100n

100n

100n

100n

100n

100n

2622

2623

2624

2625

2626

2627

47u 16V

100n

2628

100n

2621

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

0
1
2
3
4
5
6 A
7
8
9
10
11
12

VSS

J1

NC

0
BA
1

F7
E8

RDQS(2)
RDQS(2)#
RDQS(3)
RDQS(3)#

VDDL

L2
L3

SDRAM

A2
E2
L1
R3
R7
R8

3609-4

RBA(2)

56R
3606-3

RA(13)

56R

G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

RDQ(16)
RDQ(17)
RDQ(18)
RDQ(19)
RDQ(20)
RDQ(21)
RDQ(22)
RDQ(23)
RDQ(24)
RDQ(25)
RDQ(26)
RDQ(27)
RDQ(28)
RDQ(29)
RDQ(30)
RDQ(31)

B3
F3
J2

RDQM(3)
RDQM(2)
F601

3620

VSSQ

+1V8_SW

1K0 1%
100n

56R
56R

VDDQ

1K0 1%
2629

RA(0)
RA(1)
RA(2)
RA(3)
RA(4)
RA(5)
RA(6)
RA(7)
RA(8)
RA(9)
RA(10)
RA(11)
RA(12)

3610-1
3610-2

VDD
ODT
CKE
WE
CS
RAS
CAS

3621

RBA(0)
RBA(1)

K9
K2
K3
L8
K7
L7

VSSDL

56R
56R
56R
56R
56R
56R

J7

RODT
RCKE
RWE#
RCS#
RRAS#
RCAS#

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

7601
H5PS5162FFR-S6C
3611-3
3610-3
3610-4
3611-1
3611-2
3606-1

A1
E1
J9
M9
R1

2620

+1V8_SW

10

11

2600 B9
2601 B9
2602 B9
2603 B9
2604 B9
2605 B10
2606 B10
2607 B10
2608 B10
2609 D9
2620 F9
2621 F9
2622 F9
2623 F9
2624 F9
2625 F10
2626 F10
2627 F10
2628 F10
2629 I9
2630 B1
3600-1 C6
3600-2 C6
3600-3 C9
3600-4 C6
3601-1 D6
3601-2 D6
3601-3 C6
3601-4 C6
3602-1 D6
3602-2 C6
3602-3 C6
3602-4 C6
3603-1 B6
3603-2 B6
3603-3 C6
3603-4 C6
3604-1 B9
3604-2 C6
3604-3 D6
3604-4 C6
3605-1 D6
3605-2 B6
3605-3 B6
3605-4 B6
3606-1 G6
3606-2 G6
3606-3 G9
3606-4 H6
3607-1 H6
3607-2 H6
3607-3 H6
3607-4 H6
3608-1 H6
3608-2 H6
3608-3 H6
3608-4 H6
3609-1 H6
3609-2 H6
3609-3 G6
3609-4 G9
3610-1 G6
3610-2 G6
3610-3 G6
3610-4 G6
3611-1 G6
3611-2 G6
3611-3 G6
3611-4 H6
3612 D6
3613 D6
3614 D6
3615 D10
3616 D9
3617 H6
3618 I6
3619 I6
3620 I10
3621 I9
3622 A1
3623 B1
3624 D1
7600 B7
7601 G7
7700-3 A2
F600 D9
F601 I9
F602 A2

12
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_505_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 49

SSB: Controller

Controller

B04C
1

B04C

10

11

12

13

14

15

16

17

7700-6
MT5363BHMG

D31

3709

F760

100R

+3V3_SW

E34

B01

LAMP-ON

+3V3_SW

3713
10K

SCL

AOLRCK

TRAP0

0
0

0
0

10K
10K
10K
10K
10K

10p

DEB
DEB
DEB

4
13

10K
F719

4K7

4K7

3772

3773

4K7

4K7

3736

1n0
RES
1n0

RES
FRONT CONTROL

3722

RES

RC1

I714

100R
3745

I716

RC

I715

3781

F716

BACKLIGHT-PWM

1M20
F753

4K7

B05

LED-2

100R

100R

+3V3STBY

B2B

3764
1K0

3767
15K
I737
2

10R

I738

3770
1K0

220n

F724

6709

F758

3795

KEYBOARD

7709-2
BC847BS

2041145-8

100R

+5V

3794

LED-1

+3V3STBY
F725

F755
F756

+3V3STBY

F757

POWER_DOWN

1
2
3
4
5
6
7
8

F754
3793

100n

1R0

B03

3792

RC
7705
BC847BW

1n0

B02

3756

4K7

47n

100R
RES

PWM DIMMING

2722

RC2

3791

LIGHT-SENSOR

2723

+3V3_SW

100K
RES

3790

HDMI_SDA2
HDMI_SCL2
SIDE_HDMI_SDA1
SIDE_HDMI_SCL1
F743
PWR5V_2
F744
PWR5V_1
TUNER_SCL
TUNER_SDA

10K
10K

47n

3780

2712

100n

100n

2713

1706

RES

MUTE
STANDBYn
HDMI_CEC

VIP_ATV
VIN_ATV
IF_AGC
RF_AGC

2720

10K

37

36

1705

6701

BZX384-C6V8

BZX384-C6V8

6700

1R0
3723

0
1

2719

+3V3_SW

BACKLIGHT_CONTROL

10K

4705
4706

2K2

MSJ-035-29D PPO
UART (SERVICE)

B01

I755

AM31
AH37
AH35

OPCTRL3(0)
0

4K7

I732
4K7

RES
3779

3730

I752

37A8

TRAP1
PDWNC Normal

+3V3_SW

7709-1
BC847BS

F766

B4B-PH-SM4-TBT(LF)

STANDBY

POWER_DOWN
SDA-LCD
SCL-LCD
SW_MUTE

3784
3785

37A2

2703
3778

3777

4K7
4K7
3774
3775

7710
BC847BW

N36
N34
AP37

M31
M33

1701

1
2
3
4
6

F764
F765

+3V3STBY +3V3STBY

AL16
AM15

ASPDIF

AOBCK

2
3
1

1707

100p
2728

IF
RF

DEB

2727

AGC

DEB

100R

100R

1n0

DEMOD

AN14
AN18
AM17
AL14
AL12

DEB
37A3
37A4
DEB

100n

BYPASS0
ADCINP
ADCINN

3751

+3V3STBY

G
DEB

2724

CLK
TUNER
DATA
BYPASS

RES
RES

1
2
3
4
6

F752
F723

+3V3_SW

2725

PWR5V

I750100R

RES FOR ITV

B4B-PH-SM4-TBT(LF)

2726

3789

I735

5K1 1%

+3V3STBY

10K

RES
3757

10K

CEC
SDA1
HDMI SCL1
SDA2
SCL2

I734 100R
I739 100R

AL20

3734
4707
4708
3738
3744

12

DEB

1703 DEB

DEB

I718

6K8

3731

B06D

DP
DM USB
VRT

I746100R

DEB SDA-MAIN1
DEB SCL-MAIN1

4701
4702

SDA-MAIN
SCL-MAIN

502382-1170

DEB

3798

AU10
AR10
AN10

F718

I749

AM21
AM19
AN20
AR20
AU20

F763

DEB

+3V3_SW

1K0

USB_DP
USB_DM

F717

33R

4K7

AN22

DEB

+3V3_SW

U1TX

3783

3765

DEB

3742

OPWRSB

33R

BZX384-C3V3

I747

0
1
OPCTRL 2
3
4

3748
3749

6708

I733

100R
100R

0
1
2
ADIN_SRV
3
4
5

U1RX

1R0

3735
3737

AL32
AK33
AM35
AL34
AM37
AL36

100R I754
100R I753

J34
J36
T33

F751

1702
1
2
3
4
5
6
7
8
9
10
11
13

F745
F746
F747
F748
F749
F750

33R

F770

3724

LED-2

RES

3727
3728

F771

FOR DEBUGGING
ONLY

U1TX

4K7

3788
3787

100R
100R

I745

CLE
ALE
CE
RE
WE
WP
R
B

VSS

3702

10K

LIGHT-SENSOR
KEYBOARD
RESET_AUDIO

ICE mode + Serial Boot


ICE mode +ROM mode

10K

330R

4K7

0
OPWM 1
2

0
1 OSDA
2

OIRI

LED-1

12

10K

RES
3782

3776

AP1
R32
P33

I744

16
17
9
8
18
19
7

NC

JTDO

+3V3_SW

3747
4K7

10K

RES

AT21
AP21
R36
T35

0
1
2
3
IO
4
5
6
7

5705
220R

U1RX

3746
4K7

3729

4703

RX
TX
RX
TX

I742
I743

+3V3STBY

10K
10K
10K

F742

U1

NAND_PALE
NAND_PCLE
NAND_POWE
NAND_POOE

3733

SDA-MAIN
SDA-DISP

0
1 OSCL
2

NAND_PARB

1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48

VCC

1G

I727

RES 37A6
RES 37A7

AP3
R34
P31

10p
2704

1u0

2706

RES

AT5
AR4
AU4
AT3
AU2

JTRST
JTDI
JTMS
JTCK

[FLASH]

I726

+5V_SW

4704

3758

7708
NAND01GW3B2CN

29
30
31
32
41
42
43
44

NAND_PARB

3755 1K0

F741

NAND_POCE

RES

U0

3761

10K

SCL-MAIN
SCL-DISP

B04D

PAALE
PACLE
POWE
POOE

JTCK
JTDO
JTRST
JTDI
JTMS

+3V3_SW
+3V3_SW

I731

+3V3_SW

+3V3_SW

+3V3_SW

RES
RES

3718
3719
3720
3721

4K7
4K7
4K7
4K7

PARB
AK3
AH5
AK1
AJ2
AJ4

JTCK
JTDO
JTRST
JTDI
JTMS

AT1
AN6

3754 4K7

0
1

+5V_SW

POCE

1
2
3

0
1
2

ADR
SDA

3759

3760

22R

1K0

F736
3717

3762

SDA-MAIN

DEB

+3V3_SW

NAND_PCLE
NAND_PALE
NAND_POCE
NAND_POOE
NAND_POWE

+3V3_SW

ORESET
FSRC_WR
MEMTN
MEMTP
TP_VPLL

3752 1K0

I756
I757

NAND_PDD(0)
NAND_PDD(1)
NAND_PDD(2)
NAND_PDD(3)
NAND_PDD(4)
NAND_PDD(5)
NAND_PDD(6)
NAND_PDD(7)

3753 4K7

37A5

3
+3V3_SW

4K7

RES

2711
100n

AL22
L30
K5
K7
M19

0
1
2
3
4
5
6
7

AR2
AP5
AR6
AU6
AP7
AT7
AR8
AU8

RES

3768

6706
1K0

BAS316
5

VOUT

SUB GND
2

3769

100K

ER

ORESET

F721

PDD

10p

4K7

37A1

BACKLIGHT-BOOST

22R

10p

2717

10p

2716
4u7

2709

4u7

2710

6707

BAS316

CONTROL

XTALO
VCXO

VDD
I725 1

XTALI

EEPROM

F708
3716

NAND_PDD(0)
NAND_PDD(1)
NAND_PDD(2)
NAND_PDD(3)
NAND_PDD(4)
NAND_PDD(5)
NAND_PDD(6)
NAND_PDD(7)

7700-1
MT5363BHMG

T37

C34
A34
B35
A36

(8K 8)

WC

I708

SCL-MAIN

AJ34

D3
D2
D1
D0

MAC-CI

F707

1700

7701
BD45292G

ETRX

B37

3739
1R0

AJ36

ETTX

B33
D35

3763-4
3763-3
3763-2
3763-1

RES
3740

7702
M24C64-WDW6

33R
7703
BC847BW

F706

3741

+3V3STBY

DV

I741

3712

F705

1K0

ER

ER

RES

F31

100n

3711

+3V3_SW

2705

2702

F704

F761

I713

EN

C36
G32

DEB
DEB

100R

SYS_EEPROM_WE

BOOST_CONTROL

CLK

TSO_CLK

F35

5700
30R

RES
3743

3796

CLK

TSO_DATA0

H35

+12VS

BZX384-C8V2

3771

F738
F739
F740

B05
B01
B03

DDC_RESET
POWER-OK
DC_PROT

RES

54M

ETCOL

TSO_VALID

G34

+3V3_SW

F759

I711

ETCRS

D3
D2
D1
D0

B31
E32
C32
A32

+3V3_SW

SDM100n

100n
RES

RES 2701

2700

RES

PANEL

F701

D33

BYPASS_MODE
LCD-PWR-ONn

680R

F702

4700

2721

4K7

4K7

3706

3707

+3V3_SW

F737

1K0

MCLKI

ETMDIO

TSO_SYNC

H33

+3V3_SW

MCLKO

ETPHYCLK

10K
10K

HP_DETECT

MDI0

ETMDC

E36

3715
3714

1K0

I707

RF_AGC_SW

CI

B04D

4K7

3708

D37

4K7

J26
F25
H25
B25
D25
C24
G24
E24
J24
B23
F23
D23
A22
C22
AF5
AG2
AE6
AF7
AG4
AG6
AH3
AH1

23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44

10K

RESET_DEMOD
HP_DET

GPIO
0
1
2
3
4
5
6
7
8
9
10
GPIO
11 GPIO
12
13
14
15
16
17
18
19
20
21
22

K35
K37
J32
A30
C30
G30
E30
H29
F29
B29
D29
C28
E28
J28
G28
H27
F27
B27
D27
G26
E26
A26
C26

I710

3710

I700
I701

10K

100R
100R

3786

B02A

3704
3705

USB_PWR_EN
USB_OCP
EDID_WC

10K

B06D
B05
B02B
B06A

10n

3726

3703

10K

F33
7700-4
MT5363BHMG

MIVAL
CI

MDO0

H37

10K

3701

3700

PBS_SPI_CLK
PBS_SPI_DI
PBS_SPI_DO

MISTRT

MOVAL

G36

+3V3_SW

MOSTRT

F37

2729

+5V_SW

AOSDATA0
1

TRAP2
XTAL 54MHZ

OPWM1
0

10

11

12

13

14

15

16

1700 E2
1701 H12
1702 E16
1703 F16
1705 H10
1706 H10
1707 G16
1M20 I17
2700 D2
2701 D2
2702 C11
2703 D10
2704 D10
2705 D5
2706 D7
2709 F2
2710 F2
2711 G3
2712 E11
2713 E11
2716 E2
2717 E3
2719 K7
2720 K7
2721 K12
2722 I15
2723 I15
2724 J15
2725 J15
2726 K15
2727 J16
2728 J16
2729 B13
3700 B2
3701 B2
3702 I9
3703 C6
3704 B2
3705 B2
3706 C2
3707 C2
3708 B2
3709 C7
3710 C7
3711 D11
3712 D10
3713 C10
3714 D10
3715 D9
3716 D10
3717 D10
3718 H3
3719 H3
3720 H3
3721 H3
3722 I10
3723 I10
3724 I10
3726 B6
3727 H6
3728 H6
3729 I8
3730 I8
3731 I3
3733 I8
3734 H6
3735 I3
3736 H13
3737 I3
3738 I6
3739 E7
3740 D7
3741 D7
3742 I11
3743 J12
3744 I6
3745 I13
3746 G8
3747 G8
3748 H8
3749 H8
3751 I6
3752 I7
3753 I7
3754 I7
3755 I7
3756 K8
3757 J3
3758 H2
3759 F16
3760 F15
3761 H4
3762 D15
3763-1 E15
3763-2 E14
3763-3 E14
3763-4 E14
3764 J11
3765 E14
3767 J11
3768 F3
3769 G2
3770 K12
3771 K12
3772 F16
3773 F16
3774 G8
3775 G8
3776 E8
3777 E8
3778 E8
3779 G8
3780 E14
3781 J11
3782 E7
3783 H5
3784 K6
3785 K6
3786 C6
3787 I3
3788 H3
3789 J4
3790 I14
3791 I15
3792 I15

3793 J15
3794 J15
3795 K15
3796 C5
3798 J14
37A1 G15
37A2 G15
37A3 G15
37A4 H14
37A5 G3
37A6 I8
37A7 I8
37A8 K5
4700 B6
4701 F14
4702 F14
4703 H3
4704 H3
4705 J8
4706 J8
4707 H6
4708 I6
5700 C11
5705 E11
6700 H10
6701 H10
6706 F3
6707 G2
6708 K10
6709 K12
7700-1 F4
7700-4 B4
7700-6 A12
7701 F2
7702 D11
7703 D10
7705 I12
7708 E10
7709-1 K11
7709-2 K11
7710 I9
F701 D3
F702 C2
F704 C11
F705 D10
F706 D10
F707 D10
F708 D10
F716 J10
F717 H10
F718 H10
F719 H11
F721 G3
F723 F16
F724 K12
F725 J10
F736 D10
F737 B5
F738 C5
F739 C5
F740 C5
F741 H2
F742 H2
F743 J9
F744 J9
F745 E16
F746 E16
F747 E16
F748 E16
F749 E16
F750 E16
F751 E14
F752 F16
F753 I16
F754 J16
F755 J16
F756 J16
F757 J15
F758 J16
F759 C7
F760 C7
F761 D8
F763 E16
F764 G16
F765 G16
F766 H16
F770 H7
F771 H6
I700 B3
I701 B3
I707 B2
I708 D10
I710 B3
I711 D7
I713 E6
I714 I13
I715 J11
I716 I12
I718 G16
I725 G2
I726 G8
I727 G8
I731 E10
I732 G8
I733 I4
I734 I5
I735 I4
I737 K11
I738 K11
I739 I5
I741 D12
I742 F9
I743 F9
I744 H5
I745 H5
I746 H5
I747 I4
I749 H6
I750 I5
I752 J9
I753 I4
I754 H4
I755 I8
I756 G4
I757 G4

17
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_506_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 50

SSB: LVDS Display

B04D

LVDS Display

B04D

9
LVDS#1
RES 1G51

A
NC
NC
NC
NC

F805
F806
F807
F808
F809
F810

PX1APX1A+

PX1BPX1B+
PX1CPX1C+

F811
F812

PX1CLKPX1CLK+

F813
F814
F815
F816

PX1DPX1D+
RES
2803

PX1EPX1E+

10n

C
PX2APX2A+
+12VDISP

PX2BPX2B+

F823
F824

4803
4804
4805

F825
F826
F827
F828

PX2CLKPX2CLK+
4806 RES
4807 RES
4808 RES

5800

8
7
6
5

3
2
1

I800

PX2DPX2D+
PX2EPX2E+

30R
5801

I801

30R
5802

F829

+VDISP-INT

+VDISP-INT

2804

30R
7800
SI4835DDY

3802

100n

RES 4800
RES 4801
RES 4802

PX2CPX2C+

100u 16V
2805

+5V_SW

F831
F817
F818
F819
F820
F821
F822

60
58
56
54
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

61
59
57
55
53

1u0

I805

RES

47K RES

47K

47R

I804

3804

2806

3805

I802

BZX384-C6V8
3803

FX16S-51S-0.5SH

47K
6800

F801

F800

7801
PDTC114ET

LCD-PWR-ONn

B04C

10K

I808

3
I809

7802-2
BC847BS
4

3809

5
3112

3808

7802-1
BC847BS
1

2807
1K0

10K

I807

220n

3807

15K

I806

7803
BC857BW

3806

+3V3STBY

1K0

1G51 A9
2803 C8
2804 E9
2805 E9
2806 E1
2807 F3
3802 E1
3803 E1
3804 E2
3805 E2
3806 F2
3807 F1
3808 F1
3809 F3
3900 F3
4800 D1
4801 D1
4802 D1
4803 D1
4804 D1
4805 D1
4806 D2
4807 D2
4808 D2
5800 D3
5801 D3
5802 D3
6800 E1
7800 E2
7801 E3
7802 F2
7802 F2
7803 F1
F800 E4
F801 A9
F805 B8
F806 B8
F807 B8
F808 B8
F809 B8
F810 B8
F811 B8
F812 B8
F813 B8
F814 C8
F815 C8
F816 C8
F817 C8
F818 C8
F819 C8
F820 C8
F821 C8
F822 C8
F823 C8
F824 C8
F825 D8
F826 D8
F827 D8
F828 D8
F829 D9
F831 C8
I800 D1
I801 D2
I802 E1
I804 E3
I805 E2
I806 F1
I807 F2
I808 F2
I809 F3

9
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_507_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 51

SSB: HDMI & Multiplexer

B05
1

HDMI & Multiplexer


2

B05

10

11

12

13

M_RX1_2B

HDMI PORT 1 (SIDE)


+3V3STBY

M_RX1_CB
M_RX1_C

SIDE_HDMI_SCL1
SIDE_HDMI_SDA1

6 7

M_RX2_CB

8
5

M_RX2_0

6 7

M_RX2_0
M_RX2_0B

RES

RES

CDS2C05HDMI2
5.6V

6903

M_RX2_C

M_RX2_0B

SIDE_HDMI_SCL1

F903
SIDE_HDMI_SDA1

F904

21
23

7902
MMBT3904

3901

H : WRITE

10029449-001RLF

10K

F905

EDID_WC

L : WP

HDMI_PLUGPWR1
+5V_SW

HDMI_PLUGPWR1

RES

M_RX2_1B
M_RX2_1

10K

SDA

F902

6904

CDS2C05HDMI2
5.6V

2
RES

CDS2C05HDMI2
5.6V

6905
1

6906

CDS2C05HDMI2
5.6V

RES

ADR

F913

RES

6916
IP4281CZ10
1
3

100K

RES

M_RX2_2B

9 10

7905
MMBT3904

WC
SCL

B04C

M_RX2_2
M_RX2_2B

4901

3913

F900

RES

M_RX2_1

4K7

8
5

6907

SIDE_HDMI_HPD1

M_RX2_2

I902

4900

CDS2C05HDMI2
5.6V

RES

6915
IP4281CZ10
1
3

3914

M_RX2_1B

1K0

3912

PWR5V_1

0
1
2

F901

4K7

M_RX1_CB

HDMI_CEC_A

4904

(256 8)
EEPROM

1
2
3

68K
3902

HDMI_CEC

I907

9 10

7900
M24C02-WMN6

DEB
3924

27K

3906
4K7

3111

RES

RES

4K7
3907

M_RX1_0B

M_RX1_0B
M_RX1_C

3908

7904
BC847BW

M_RX1_1B
M_RX1_0

7908
BSH111
RES

I901

3910

3911

DDC_RESET

RES
4
6 7

M_RX1_0
M_RX1_0B

M_RX1_C

2K2

8
5

M_RX1_0

M_RX1_2B
M_RX1_1

HDMI_PLUGPWR1

100R RES

6914
IP4281CZ10
1
3

I900

100K

M_RX1_CB

B04C

RES

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22

M_RX1_2

+3V3STBY
BAT54 COL

3900

1901

I906

6902

6900

M_RX1_1B
M_RX1_1

BAT54C

9 10

100n

6 7

M_RX1_2
M_RX1_2B

M_RX1_1

HDMI_PLUGPWR1

8
5

M_RX1_2

2900

M_RX1_1B

RES

6913
IP4281CZ10
1
3

PWR5V_1

9 10

M_RX2_CB
M_RX2_C

HDMI_PLUGPWR2

HDMI PORT 2
7700-5
MT5363BHMG

HDMI_SDA2

4K7

3921

RES

RES

2
6909
1

CDS2C05HDMI2
5.6V

2
6910

RES

RES

CDS2C05HDMI2
5.6V

7907
MMBT3904

CDS2C05HDMI2
5.6V

4903

2
F912

HDMI_HPD2

RES

6911

I905

4902

CDS2C05HDMI2
5.6V

1K0

PWR5V_2

F906

WC

SCL
ADR

SDA

10K

3903

100n

0
1
2

F907

HDMI_SCL2

F908

HDMI_SDA2

F909

G
3904

7903
MMBT3904

EDID_WC

10K

21
23

10029449-001RLF

4K7

HDMI_SCL2

1
2
3

M_RX2_CB
HDMI_CEC_A

(256 8)
EEPROM

68K
3905

CDS2C05HDMI2
5.6V

M_RX2_0B
M_RX2_C

7901
M24C02-WMN6

DEB
3923

M_RX2_1B
M_RX2_0

2
6917
1

4K7

4K7
3915

100K

PX1A+
PX1APX1B+
PX1BPX1C+
PX1CPX1D+
PX1DPX1E+
PX1EPX1CLK+
PX1CLK-

RES

RES

6912

HDMI_HPD2

D15
B15
C16
A16
D17
B17
D19
B19
C20
A20
C18
A18

2K2
RES

7906
BC847BW
RES

100K

AN16

0P
0N
1P
1N
2P
2N
AO
3P
3N
4P
4N
CKP
CKN

DDC_RESET

I904

3918

3916

SIDE_HDMI_HPD1

0
0B
1
1B
RX2
2
2B
C
CB

HDMI_PLUGPWR2

100R RES

AP13
AT13
AR14
AU14
AP15
AT15
AR12
AU12

I903

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22

M_RX2_2B
M_RX2_1

HDMI_CEC_A

B04C

3919

M_RX1_0
M_RX1_0B
M_RX1_1
M_RX1_1B
M_RX1_2
M_RX1_2B
M_RX1_C
M_RX1_CB

HDMI_HPD1

PX2A+
PX2APX2B+
PX2BPX2C+
PX2CPX2D+
PX2DPX2E+
PX2EPX2CLK+
PX2CLK-

3917

AL18

G16
E16
H17
F17
G18
E18
G20
E20
H21
F21
H19
F19

3920

HDMI_HPD2

0
0B
1
1B
RX1
2
2B
C
CB

0P
0N
1P
1N
2P
2N
AE
3P
3N
4P
4N
CKP
CKN

3922

AP17
AT17
AR18
AU18
AP19
AT19
AR16
AU16

M_RX2_0
M_RX2_0B
M_RX2_1
M_RX2_1B
M_RX2_2
M_RX2_2B
M_RX2_C
M_RX2_CB

1902
M_RX2_2

HDMI-LVDS

2901

HDMI_PLUGPWR2

RES

+5V_SW

F911

6901

HDMI_PLUGPWR2

BAT54C

RES

B04C

PWR5V_2

10

11

12

1901 B11
1902 F10
2900 B11
2901 F11
3111 C6
3900 B13
3901 C13
3902 C12
3903 F13
3904 G12
3905 H12
3906 B8
3907 C8
3908 C7
3910 C7
3911 B6
3912 C7
3913 D7
3914 D6
3915 G9
3916 G8
3917 G8
3918 G7
3919 G8
3920 H8
3921 H7
3922 G7
3923 H12
3924 C12
4900 C7
4901 D7
4902 H8
4903 H8
4904 C9
6900 D12
6901 I12
6902 B7
6903 C10
6904 D9
6905 D9
6906 D8
6907 D8
6909 H10
6910 H9
6911 H9
6912 H9
6913 A3
6914 B3
6915 C3
6916 E3
6917 G9
7700-5 F4
7900 B12
7901 F12
7902 C13
7903 G13
7904 B7
7905 D7
7906 G8
7907 H8
7908 B9
F900 D6
F901 B13
F902 B13
F903 C13
F904 C12
F905 C12
F906 F13
F907 G13
F908 G13
F909 G12
F911 I12
F912 H7
F913 D12
I900 B7
I901 B6
I902 C8
I903 F8
I904 G7
I905 H8
I906 B8
I907 C8

13
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_508_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 52

SSB: Analog I/O - Headphone

B06A
1

Analog I/O - Headphone

B06A

10

11

A
RESERVED

RES
3A01

HP_DET

1n0

22K

RES
2A00

3A02

1R0

HEADPHONE

RES

RES

RES
3A03

HP_ROUT

6A00

RES

RES

PESD5V0S1BA
1A02

RES
4A00

1n0

RES
2A01

FA01
FA02
FA03

RIGHT
LEFT

1R0

5
4
3
2
1

FA00

2K0

3A00

+3V3_SW

FA04

1A01

LGM1019-0100F

RES

RES
4A01

6A01

1n0

RES
2A02

1R0

RES

RES

PESD5V0S1BA
1A03

3A04

HP_LOUT

RES

RC2
RC1

RES

IA08

2A04

47p
RES
3A09

RES

RES

22K
IA09

3A10
22K
2A05
47p
+3V3_SW

B06B

RES
HPOUTL

FA06

HPOUTR

FA07

RESET_AUDIO

RES

IA05

2A07
1u0

RES 2A08
1u0

RES

IA02

3A15

10K

RES 3A16

IA03

RES 3A17

10K

IA04

10K

PBS_HPR 4A03

6
5
RES 2A11

RES

IA10
3

VDD

AMPLIFIER

RES
1

VO

SHUTDOWN
BYPASS
4

2A06

RES

IA00

RES
2

2A09

RES

IA01

4V 100u

10
11

3A11

B03

3A12

FA08

HP_LOUT

RES

3A13

FA09

HP_ROUT

33R
3A14
33R

B04C

33R

33R

4V 100u

IN-

VIA
GND GND_HS

1u0

RES

1u0

2A10

RES
8

RES
7A00
TPA6111A2DGN

PBS_HPL 4A02

10

1A01 C7
1A02 C6
1A03 D5
2A00 B5
2A01 C5
2A02 D4
2A04 E7
2A05 E7
2A06 F8
2A07 F4
2A08 F4
2A09 G8
2A10 F7
2A11 G6
3A00 C6
3A01 B4
3A02 B5
3A03 C5
3A04 D5
3A09 E7
3A10 E7
3A11 F9
3A12 F9
3A13 G9
3A14 G9
3A15 F4
3A16 F5
3A17 G4
4A00 C5
4A01 D5
4A02 F3
4A03 G3
6A00 C5
6A01 D5
7A00 F7
FA00 C6
FA01 C6
FA02 C6
FA03 C6
FA04 C7
FA06 F3
FA07 F3
FA08 F10
FA09 G10
IA00 F8
IA01 F8
IA02 F5
IA03 F5
IA04 F5
IA05 F4
IA08 E7
IA09 E7
IA10 G6

11
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_509_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 53

SSB: Analog I/O - Audio

Analog I/O - Audio

B06B

B06B

10

11

12

13

7700-2
MT5363BHMG

10n IB31

B06C

SY1P

68R IB32

2B01

10n IB33

3B02

100R IB34

2B02

10n IB35

SY0N
SY1N

3B01

SOY1-AV2

1R0 IB36

3B00

2B00

AP27
3B09

68R

IB402B09 10n

IB41

PB0PAP29

3B07

68R

IB422B07 10n

IB43

Y0PAR28

AT27
AU26
3B08

100R

IB442B08 10n

IB45

Y0NAT29

1R0

IB462B06

IB47

SOY0AU28

AR26
3B06

1n5 IB37

1n5

AP25
AP33
AR34
AT33
AU34

SOY0-AV1

B02A
B06C

FB08

1u0
100R

GND_CVBS

IB59

CVBS_RF
CVBS_AV3

2B15
3B12

47n

2B12

IB61
IB62

3B14

47n

2B14

IB63

100R

AR36
AT37
AU36
AP35
AT35
AP31
AT31

DEB

AM29

0P
PR
1P
0P
PB
1P
0P
Y
1P

VMID_AADC

0
COM
1

AOBCK
AOLRCK
AOMCLK

0
SOY
1
0
SY
1
0
SC
1

0
1
AOSDATA 2
3
4

0N
0P
1P CVBS
2P
3P
OUT1
VDAC
OUT2

3B47

ALIN

AL

0
1
2
3

0
1
AR
2
3

560R

75R

ASPDIF

FS_VDAC

DEB
3110

1B03

6B00
RES

PESD5V0S1BA

1n0

2B36
RES

FB06

AA30

IB03

L34
M37
M35

IB14
IB15

L36
P35
P37
K31
N32

IB16

3B35
3B36

3B34
30K

IB09

2B37

3B37

3B33

IB08

10u

4K7
4K7

1R0

3
7
8
1

B
1B02

FB01

+3V3_SW

4K7
3B38
4K7
IB17 2B42

K33

+3V3_SW

SPDIF
FB03

ASPDIF_OUT

100n
3B39

L32
AF37
U32
V35
V37

4K7 RES
IB18

AE36
V33
U34
U36

IB20

AF35

IB22

2B25

2B24

10u

10u

1u0

AVICM

RES

SAV_L_IN
SAV_R_IN

IB19

HPOUTL
PREAMPL

IB21

HPOUTR
PREAMPR

3B15

240R

3B16

100R

2B20

33p

FB04

CON_JACK
1B01

FB07 2
YKB11-0946V

33p

IB30 2B03

PR0PAU30

1B04

SY0P

IB39

5
4
2

2B19

SPB1P

10n

AUDIO IN
MSJ-035-10A B AG PPO

6B01
RES

68R

SPB0P

IB382B11

68R

PESD5V0S1BA

68R

10n IB29

1R0

1n0

3B03

IB28 2B05

FB00

3B32

10u

2B39
RES

SPR1P

3B05

IB00

2B34

1B05

3B11

SPR0P

COM

IB01

30K

1n0

AR24

3B31

2B35

IB27

GP
BP

IB02
DVI_AUL_IN
DVI_AUR_IN

1n0

GN

SOG
RP

2B38
RES

AU24
AT23

AIN0_L-AV1
AIN0_R-AV1
AIN1_L-AV2
AIN1_R-AV2

10u
10u
10u
10u

47K

IB25
IB26

2B33
2B32
2B31
2B30

IB04
IB05
IB06
IB07

30K
30K
30K
30K

47K

GP
BP

3B30
3B29
3B28
3B27

AIN0_L
AIN0_R
AIN1_L
AIN1_R

3B49

AP23
AT25

IB10
FB02
IB12
IB13

SIF_OUT
SIF_OUT_GND

3B48

IB23
IB24

AD33
AC34
AB31
AC32
AD35
AB35
AC36
AB37
AA32
AB33
AA34
Y35
AA36
Y37

10n
10n

1u0

SOG
RP

0_L
0_R
1_L
1_R
2_L
2_R
3_L
AIN_AADC
3_R
4_L
4_R
5_L
5_R
6_L
6_R

HSYNC
VSYNC

2B16
2B17

100n

AR22
AU22

IB64
IB65

2B44

IB66
IB67

AN34
AN36

2B43

B03

HSYNC
VSYNC

AM33

100n

P
MPX
N

2B40

AF

2B41

AUDIO-VIDEO

3B40

B03

IB49 5K1

AOUTL

30R

3B51

10u

47K

10u

2B54

3B44

IB51

3B42

47K

IB50

+12VS

1u0

LM833
7B01-1

2B53

+12VS

3B43

F
2B58

47K

3B50

10K

3B41

IB48

10u

820p

2B51
PREAMPL

2B52

220p

2B50

22K

7B01-2
LM833
5
6

AOUTR

3B53

47K

10u

5K1
2B57

2B59

3B52

220p

10K

10u

IB52

3B45

820p

IB53

2B56

2B55
PREAMPR

3B46
22K

10

11

12

1B01 C13
1B02 B13
1B03 B12
1B04 C12
1B05 D12
2B00 C2
2B01 C2
2B02 C2
2B03 B2
2B05 B2
2B06 C4
2B07 B4
2B08 C4
2B09 B4
2B11 B4
2B12 C4
2B14 D4
2B15 C3
2B16 A8
2B17 A8
2B19 D12
2B20 D11
2B24 D7
2B25 D7
2B30 B9
2B31 A9
2B32 A9
2B33 A9
2B34 B11
2B35 B11
2B36 B12
2B37 B11
2B38 C11
2B39 C12
2B40 C9
2B41 C8
2B42 C7
2B43 E8
2B44 E8
2B50 F3
2B51 F2
2B52 F2
2B53 G4
2B54 G2
2B55 H2
2B56 H2
2B57 H3
2B58 F4
2B59 H4
3110 D5
3B00 C1
3B01 C1
3B02 C1
3B03 B1
3B05 B1
3B06 C3
3B07 B3
3B08 C3
3B09 B3
3B11 B3
3B12 C3
3B14 D3
3B15 C11
3B16 D11
3B27 B8
3B28 A8
3B29 A8
3B30 A8
3B31 B10
3B32 B11
3B33 B11
3B34 B10
3B35 C7
3B36 C7
3B37 C8
3B38 C7
3B39 D7
3B40 F3
3B41 F2
3B42 G4
3B43 G2
3B44 G2
3B45 H2

3B46 H3
3B47 D5
3B48 E9
3B49 E10
3B50 F3
3B51 F5
3B52 H3
3B53 H5
6B00 B12
6B01 C12
7700-2 A6
7B01-1 F3
7B01-2 G3
FB00 B12
FB01 C12
FB02 A7
FB03 C9
FB04 C12
FB06 B13
FB07 D13
FB08 C2
IB00 B11
IB01 B11
IB02 B10
IB03 B10
IB04 A8
IB05 A8
IB06 A8
IB07 B8
IB08 B11
IB09 B11
IB10 A7
IB12 A7
IB13 B7
IB14 C7
IB15 C7
IB16 C7
IB17 C7
IB18 D7
IB19 D8
IB20 D7
IB21 D8
IB22 D7
IB23 B2
IB24 B2
IB25 B2
IB26 B2
IB27 B2
IB28 B2
IB29 B2
IB30 B2
IB31 B2
IB32 C2
IB33 C2
IB34 C2
IB35 C2
IB36 C2
IB37 C2
IB38 B4
IB39 B4
IB40 B4
IB41 B4
IB42 B4
IB43 B4
IB44 C4
IB45 C4
IB46 C4
IB47 C4
IB48 F2
IB49 F3
IB50 G3
IB51 G3
IB52 H3
IB53 H2
IB59 C2
IB61 C4
IB62 C4
IB63 D4
IB64 A7
IB65 A7
IB66 A2
IB67 A2

13

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_510_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 54

SSB: Analog I/O - Video

Analog I/O - Video

B06C
1

B06C
3

10

11

12

B06B
A

IC09

3C12
1R0

3C00

6C19

1n0

RES
2C21

1n0

RES
2C20
0001

PESD5V0S1BA
1C00

1n0

RES
6C00

RES
2C01

1n0

RES
2C00

1R0

RES

PESD5V0S1BA
1C14

AIN0_R-AV1

IC01
AIN1_R-AV2

B
FC15

1C16

1n0

RES
2C19

1n0

FC04

1C02
1 MSP-636H1-01
2
3

FC11

RES 6C08

60R

56R

15p

3C14

2C17

5C03

18R

PR1P_SC2

5
6
FC12

SC1_CVBS_OUT

7
8

FC13

9
10
11
12

6C09

FC06

56R

SY1P_SC2

3C23

SPB0P
IC13

5C04

18R

60R

3C24

5C05

18R

60R

PESD5V0S1BA
1C09

FC05

3C16

PESD5V0S1BA
1C18

60R

3C21

15p

RES
6C02
RES
6C03

15p
3C04

2C05

56R

5C01

18R

4
5

PB1P_SC2

3C22

IC11

SPR0P
FC07

SPB1P

1
2
3

2C16

60R
PESD5V0S1BA
1C17

18R
56R

2C04

15p
3C02

SPR1P

5C00

C
FC10

PESD5V0S1BA
1C10

FC08

3C20

AV1

1C01
MSP-636V1-01

FC09

IC03

RES
2C18

AV2

RES

PESD5V0S1BA

RES
6C01

1n0

RES
2C03

1n0

RES
2C02

1R0

RES 6C20

1R0

3C01

PESD5V0S1BA
1C15

3C13

IC10

AIN0_L-AV1

IC02
AIN1_L-AV2

FC14

SC1_B

SC1_G

9
10
11
12

3C06

SY1N

56R

3C17

15p

60R
RES
6C04

56R

15p
3C05

2C06

18R

2C15

SY1P

IC14

SY0P

5C02
PESD5V0S1BA
1C19

3C25

3C18

SY0N

PESD5V0S1BA
1C08

SOY1-AV2

RES
6C10

SOY0-AV1

1R0

1R0

F
AV3
B06B

CVBS
1C03-3
RIGHT YELLOW2

FC03

47p

15p

2C07

75R

RES
2C08

1n0

IC06

3C10
30K

1n0

RES
2C10

1n0

RES
2C11

2C09
10u

IC07

2C14
10u

1R0
RES
2C12

FC00

RES
6C07

PESD5V0S1BA

3C11

1C07

5
MSP-305H-BBB-432-03 NI

IC05

1R0

FC01

(RED)

IC08

3C19
30K

1n0

1C03-1
RED 6

RES
6C06

1C06

PESD5V0S1BA

3C09

3
MSP-305H-BBB-432-03 NI

SAV_L_IN

GND_CVBS

FC02

WHITE 4

CVBS_AV3

SAV_R_IN

RES
2C13

LEFT1C03-2
(WHITE)

IC04

1R0
3C08

1C05

RES
6C05

(YELLOW)

1
MSP-305H-BBB-432-03 NI

PESD5V0S1BA

3C07

10

11

1C00 A5
1C01 C6
1C02 C12
1C03-1 I1
1C03-2 H1
1C03-3 G1
1C05 G2
1C06 H2
1C07 I2
1C08 E11
1C09 D11
1C10 D11
1C14 A11
1C15 C11
1C16 C5
1C17 D5
1C18 D5
1C19 E5
2C00 A4
2C01 A5
2C02 C4
2C03 C5
2C04 D4
2C05 D4
2C06 E4
2C07 G4
2C08 G3
2C09 H4
2C10 H4
2C11 H3
2C12 I3
2C13 I4
2C14 I4
2C15 E9
2C16 D9
2C17 D10
2C18 C10
2C19 C10
2C20 A10
2C21 A10
3C00 A4
3C01 C4
3C02 D4
3C04 D4
3C05 E4
3C06 E4
3C07 G4
3C08 G3
3C09 H4
3C10 H4
3C11 I4
3C12 A10
3C13 B10
3C14 D10
3C16 D10
3C17 E10

3C18 E9
3C19 I4
3C20 C4
3C21 C10
3C22 E4
3C23 E10
3C24 E10
3C25 E4
5C00 C5
5C01 E5
5C02 E5
5C03 C10
5C04 E10
5C05 E10
6C00 A5
6C01 C5
6C02 D5
6C03 D5
6C04 E5
6C05 G3
6C06 H3
6C07 I3
6C08 D11
6C09 D11
6C10 E11
6C19 A11
6C20 C11
FC00 I2
FC01 I2
FC02 H2
FC03 G2
FC04 D6
FC05 D6
FC06 D6
FC07 D6
FC08 C6
FC09 C6
FC10 C12
FC11 C12
FC12 D11
FC13 D11
FC14 D11
FC15 B11
IC01 A4
IC02 C4
IC03 C4
IC04 G4
IC05 H4
IC06 H4
IC07 I4
IC08 I4
IC09 A10
IC10 B10
IC11 C9
IC13 E9
IC14 E9

12
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_511_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 55

SSB: USB

B06D
1

USB

B06D
2

B
B04C

7D00
TPS2041BD

USB

1D01

ID04

30R

2 OUT

OC_

USB_PWR_EN

1
IN

FD04

+5V_SW

2D14
100u
16V

2D12
100n

10u

EN_

FD06
USB_OCP

FD05

NUP1301ML3

6D01

NUP1301ML3

2D11

5
6D02 BZX384-C6V8

6D00

FD03

1D02

USB-01-PBT-B-30-CU2

FD02

1D00

FD01

1 5V
2
USB_DM
3
USB_DP
FD00
4
5
1D03

5D00

GND

1D00 C3
1D01 C2
1D02 C3
1D03 C3
2D11 C4
2D12 C5
2D14 C6
2D15 D5
2D16 D6
3D09 D5
3D10 D6
5D00 C4
6D00 C3
6D01 C4
6D02 C3
7D00 B5
FD00 C2
FD01 C3
FD02 C3
FD03 C3
FD04 B5
FD05 C5
FD06 C5
ID04 C4

USB_DM

15K
RES

4p7

3D10

2D16

15K
RES

4p7

RES

RES

2D15

3D09

USB_DP

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_512_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 56

SSB: VGA

B06E

VGA

B06E

10

11

A
6E06
IE00

B04C

+5V_SW

BAS316

3E26
10K

FE00

EDID_WC

3E25

7E01
BC847BW

10K

68K

3E27

RES
DC_5V

B06B
5E00

VGA_R

RES

IE02

3E04

1R0

RES

3E10

VGA_Gn

100R

10n

6E01

IE04

75R

3E03

VGA_G

60R
3E15

IE03

1n5
2E04

5E01

VGA_Gp

68R

SOG

GN

3E02

5p6

10n
2E03

2E08

2E02

GP

FE01

1E00

75R

5p6

2E07

6E00

60R

FE02

0001

VGA_Rp

68R

1E05

3E00

PESD5V0S1BA

10n

PESD5V0S1BA

IE01

3E16

2E00
RP

FE11

DC_5V

1R0

RES
3E24
DC_5V
5E02

4E04

100n

RES

RES

FE05
FE06

1E03

6E03

2K2

5p6
3E17

2E12

30R

PESD5V0S1BA

H_SYNC

16 17

IE06

SCL_VGA

4E02
4E03

FE08
FE09

(256x8)

WC

EEPROM
6
5

SCL
ADR
SDA

0
1
2

1
2
3

1%

FE12

6K2

330p

2E15

SDA_VGA

RES 3E20

FE04
5E04

HSYNC

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

330p

1n0

2E11

100n

2E10

FE03

1%

150R

2E14

3E13

BAS316

6K2

6E05

60R

RES 3E19

5E03

FE10

1E01
DC_5V

7E00
M24C02-WMN6 8

33R

3E23

10K

3E22

10K

3E21

0001

6E02

75R

RES

6K2 1%
2E16

VGA_B

60R

1E02

VGA_Bp

68R

PESD5V0S1BA

3E05

3E14

IE05

2E09

10n

5p6

2E05

BP

FE07

MDS-15P-V-05-B-8.5-U4-ZN

5E05

6E04

2K2

5p6
3E18

2E13

RES

RES

1E04

VSYNC

30R

PESD5V0S1BA

VSYNC

10

1E00 C7
1E01 E8
1E02 E7
1E03 F6
1E04 G6
1E05 D7
2E00 C3
2E02 C3
2E03 D3
2E04 D3
2E05 D3
2E07 C5
2E08 D5
2E09 E5
2E10 E5
2E11 E6
2E12 F5
2E13 G5
2E14 E9
2E15 E9
2E16 D11
3E00 C3
3E02 C3
3E03 D3
3E04 D3
3E05 D3
3E10 D5
3E13 E5
3E14 E5
3E15 D5
3E16 C5
3E17 F5
3E18 G5
3E19 E9
3E20 E9
3E21 E9
3E22 E9
3E23 E9
3E24 D11
3E25 B8
3E26 B10
3E27 B7
4E02 E9
4E03 E9
4E04 D10
5E00 C6
5E01 C6
5E02 D6
5E03 E4
5E04 F5
5E05 F5
6E00 C6
6E01 D6
6E02 E6
6E03 F5
6E04 G5
6E05 E5
6E06 A10
7E00 E10
7E01 B9
FE00 B8
FE01 C7
FE02 D7
FE03 E7
FE04 F7
FE05 F7
FE06 F7
FE07 F8
FE08 E10
FE09 E10
FE10 E10
FE11 D10
FE12 E11
IE00 B9
IE01 C3
IE02 C3
IE03 D3
IE04 D3
IE05 D3
IE06 E8

11

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_513_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 57

SSB: Hospitality

B07

Hospitality

B07
1

DMMC1
5F00
3F00
3F01

FF03

5F01

30R
100R
100R

+3V3STBY
SDA-LCD
SCL-LCD
4

30R

FF04

+5V_SW

1
2
3
5

FF11

PBS_HPR

502382-0370

502382-0570

PBS_HPL

FF13

1n0

FF00
FF01
FF02

FF12

1n0
2F01

SDA_CLOCK
SCL_CLOCK

1F01

2F00

1
2
3
4
5
7

B06A

DMMC3

B04C

1F00

DMMC2

1F02
1
2
3
4
5
6
7
8
10

FF05
FF06
FF07
FF08
FF09
FF10

+12VS

3F02
3F03

PBS_SPI_DI
PBS_SPI_CLK

22R
22R

SDA-MAIN1
SCL-MAIN1
RC1
RC2

1F00 B1
1F01 B5
1F02 C1
2F00 B6
2F01 B6
3F00 B2
3F01 B2
3F02 C2
3F03 C2
5F00 B2
5F01 B2
FF00 B2
FF01 B2
FF02 B2
FF03 B2
FF04 B1
FF05 C2
FF06 C2
FF07 C2
FF08 C2
FF09 D2
FF10 D2
FF11 B5
FF12 B5
FF13 B5

502382-0870

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_514_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 58

SSB: TCON Control

B08A
1

TCON Control
2

B08A

10

11

12

13

14

15

16
A

VDD1V8
VDD1V8PLL

U_D

7H02-2
74LVC2G04
3

Q
Q

100n

100n
2H39

100n
2H38

100n
2H37

100n
2H36

100n
2H35

100n
2H34

100n
2H33

2H32

100n

100n
2H31

100n

2H30

2H28

100n

TBA0
TBA1

P1
P2
3H00

G2
G1

TLDQS
TLDQS#

UDQS

C2
C1

TUDQS
TUDQS#

CK

CKE
ODT
0
BA
1

E1

RESIMP

1K0

T9

FH03

P7
R7

FH04

T7
U9

IN

EE

OSC

SCL
SDA

OUT
TESTAGN
RST
SCL
DB
SDA

TESTMOD

0
1
2
3

ATTN
TESTSE

T8
U8
R10
U5
T5
U6
T6

FH06
FH05

RES
1R0
1R0

ROM_SCL
ROM_SDA
3H27 SCL-TCON
3H28 SDA-TCON

RES

F1
STH
F2

H15
H14
FH35

3H06

RES

POL

U13

GCK

T11

GOE

U11

GSP2
GSP1

T12
U12

GSLOP

T16

RTC50_60

R_L
U_D

T10
U10

SELLVDS

T17

B7
A7
B6
A6
B5
A5
B3
A3
B2
A2
B4
A4

CLKP
RXE
CLKN

0P
0N
1P
1N
2P
RXO
2N
3P
3N
4P
4N
RXO

CLKP
CLKN

CPV
OE
STVU
STVD
SLOPE
GP01
GP02
L|R_
U|D_

100R

100R

LLV

LCK+
LCK-

A14
A15
A16
A17
B14
B15
B16
B17
C14
C15
C16
C17
D16
D17
E16
E17

RLV6+
RLV6RLV5+
RLV5RLV4+
RLV4RLV3+
RLV3RLV2+
RLV2RLV1+
RLV1RLV0+
RLV0RLV7+
RLV7-

F14
F15

RCK+
RCK-

100n
2H53

100n

VCC1V8

5H05

5H06

60R

60R

G
7H00
H5PS5162FFR-S6C
TODT
TCKE
TWE#
TCS#
TRAS#
TCAS#

K9
K2
K3
L8
K7
L7

VDD
ODT
CKE
WE
CS
RAS
CAS

TBA0
TBA1

L2
L3

TA0
TA1
TA2
TA3
TA4
TA5
TA6
TA7
TA8
TA9
TA10
TA11
TA12

M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2

TCK
TCK#

J8
K8

CK

TLDQS
TLDQS#

F7
E8

LDQS

TUDQS
TUDQS#

B7
A8

UDQS

VDDQ

SDRAM
NC

0
BA
1
0
1
2
3
4
5
6 A
7
8
9
10
11
12

DQ

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

UDM
LDM
VREF

VSS

A2
E2
L1
R3
R7
R8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9

VSSQ

TDQ0
TDQ1
TDQ2
TDQ3
TDQ4
TDQ5
TDQ6
TDQ7
TDQ8
TDQ9
TDQ10
TDQ11
TDQ12
TDQ13
TDQ14
TDQ15

B3
F3

DDR2VDD
3H20

FH34

J2

100R

RES

B13
A13
B12
A12
B11
A11
B9
A9
B8
A8

PX1A+
PX1APX1B+
PX1BPX1C+
PX1CPX1D+
PX1DPX1E+
PX1EPX1CLK+
PX1CLK-

B10
A10

CKP
CKN

M14
M15

DDR2VDD

DDR2VDD

SELLVOS

3H17

3H16

100R
3H15

3H14

LVDS
0P
0N
1P
1N
2P
RXE
2N
3P
3N
4P
4N

100R

100R
3H13

100R
3H12

100R
3H11

100R

100R
3H09

3H10

100R

100R
3H07

3H08

7H01-2
VPP1501BFG

CKP
CKN

0P
0N
1P
1N
2P
2N
3P
3N
LLV
4P
4N
5P
5N
6P
6N
7P
7N

TP

U16
U17

U7

RLV

B1
STH
B2

T13

1K0

LS

MISC

RESPI

U15
U14

F
VCC1V8

100R

J17

2K4

LLV6+
LLV6LLV5+
LLV5LLV4+
LLV4LLV3+
LLV3LLV2+
LLV2LLV1+
LLV1LLV0+
LLV0LLV7+
LLV7-

100n
3H19

3H05

F16
F17
G14
G15
G16
G17
H16
H17
K14
K15
K16
K17
L14
L15
L16
L17

2H47

ASIC_CS11

FH00

0P
0N
1P
1N
2P
2N
3P
3N
RLV
4P
4N
5P
5N
6P
6N
7P
7N

10u

ASIC_CS9

1
2
3
4
5
6
CS
7
8
9
10
11
12

2H51

ASIC_CS5
ASIC_CS7

FH02

M4

LDQS

RES

LCD

M16
M17
N16
N17
P16
P17
R14
R15
R16
R17
T14
T15

ASIC_CS1
ASIC_CS3

M1

TODT

60R

PX2A+
PX2APX2B+
PX2BPX2C+
PX2CPX2D+
PX2DPX2E+
PX2EPX2CLK+
PX2CLK-

TCKE

7H01-3
VPP1501BFG

L2
L1

5H04

3H25

1u0

TCK
TCK#

CS
RAS
CAS
WE

7H04
74LVC1G74DC
7
S
1
C1
2
1D
6
R

N2
M3
N1
M2

VCC1V8

3H26

50Hz_60Hz

TCS#
TRAS#
TCAS#
TWE#

100n
2H48

RES 1R0
RES 1R0

REV

B1

SCL-TCON
SDA-TCON

2H54

100R

A1

RESET

4H05

U_D_INV

3H23

GCK

7H01-1
VPP1501BFG

FH01

5
2

RESET

4
Q

4H04

REV

OSCOUT

100n
2H27

1M0

3H02
10p

2H41

VCC_3V3

RDIO1
RDIO2

OSCIN

100n
2H26

2H25

100n

100n
2H13

100n
2H10

100n
2H09

100n
2H08

100n
2H07

100n
2H06

100n
2H05

100n
2H04

100n
2H03

100n
2H02
10p

2H40
150K

3H03

RESET

LDIO1
LDIO2

7H05
74LVC1G86GW
2

TDQ0
TDQ1
TDQ2
TDQ3
TDQ4
TDQ5
TDQ6
TDQ7
TDQ8
TDQ9
TDQ10
TDQ11
TDQ12
TDQ13
TDQ14
TDQ15

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

7H03
74LVC1G74DC
7
S
1
C1
2
1D
6
R

J1

VSS

VDDL

60R

VGH_35V

VSSDL

VSS
VDD33IO

7H02-1
74LVC2G04
1

J7

C6
R6
R9
R12

2K2

H3
H2
K3
K2
K1
K4
H1
H4
D3
D2
F3
F2
F1
F4
D1
D4

0
1
2
3
4
5
6
DQ 7
8
9
10
11
12
13
14
15

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS
VDD33LVML

VCC_3V3
VCC_3V3

RES 3H22

10u

C8
C11
C13
E15
J15
N15
R13

VSS

3H21
33R

GSP2

DRAM
0
1
2
3
4
5
6 A
7
8
9
10
11
12

2H50

10u
10u

VDD3V3IO

VDD18PLL

GSP1

P4
R2
P3
T1
R4
T2
R3
U1
T4
U2
R1
T3
U3

A1
E1
J9
M9
R1

VDD3V3LVRS
5H02
2H45

VSS

OSCIN

TA0
TA1
TA2
TA3
TA4
TA5
TA6
TA7
TA8
TA9
TA10
TA11
TA12

A3
E3
J3
N1
P9

60R

2H46

VSS

27M

2H52

VDD18

VSS

OSCOUT

560R

VDD18

VSS

7H01-4
VPP1501BFG

3H01

VDD18

C7
C10
C12
G3

VCC_3V3

5H03

VDD18

VSS

VDD1V8PLL

5H01

60R

VDD18

VSS

4
3

100R

10u

2H44

VDD18

1H00
DSX321G
2 NC
1

3H18

10u

2H43

60R

VSS

100n

5H00

VDD18

DDR2VDD

2H42

VCC1V8

VSS

16K

VDD18

C3
C4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
E2
E4
E5
E8
E9
E12
E13
E14
F6
F7
F10
F11
G4
G6
G7
G10
G11
H5
H8
H9
H12
H13
J1
J2
J4
J5
J8
J9
J12
J13
J14
J16
K6
K7
K10
K11
L4
L6
L7
L10
L11
M5
M8
M9
M12
M13
N4
N5
N8
N9
N12
N13
N14
P5
P6
P8
P9
P10
P11
P12
P13
P14
U4

3H04

POWER

C5
C9
D15
E3
E6
E7
E10
E11
F5
F8
F9
F12
F13
G5
G8
G9
G12
G13
H6
H7
H10
H11
J3
J6
J7
J10
J11
K5
K8
K9
K12
K13
L3
L5
L8
L9
L12
L13
M6
M7
M10
M11
N3
N6
N7
N10
N11
P15
R5
R8
R11

2H01

7H01-5
VPP1501BFG
VDD1V8

100n
2H29

VDD3V3IO

VDD3V3LVRS

10

11

12

13

14

15

1H00 B5
2H01 A5
2H02 A5
2H03 A5
2H04 A5
2H05 A6
2H06 A6
2H07 A6
2H08 A6
2H09 A6
2H10 A7
2H13 A7
2H25 A10
2H26 A10
2H27 A10
2H28 A11
2H29 A11
2H30 A11
2H31 A12
2H32 A12
2H33 A13
2H34 A13
2H35 A13
2H36 A13
2H37 A13
2H38 A14
2H39 A14
2H40 C5
2H41 C5
2H42 D5
2H43 E2
2H44 E2
2H45 F2
2H46 F2
2H47 J15
2H48 J15
2H50 G13
2H51 G14
2H52 F13
2H53 F13
2H54 D10
3H00 E13
3H01 C6
3H02 C6
3H03 D5
3H04 D5
3H05 G8
3H06 H8
3H07 J4
3H08 J4
3H09 J5
3H10 J5
3H11 J5
3H12 J5
3H13 J8
3H14 J8
3H15 J8
3H16 J8
3H17 J9
3H18 J9
3H19 J16
3H20 I16
3H21 C7
3H22 C7
3H23 E8
3H25 H4
3H26 H4
3H27 H6
3H28 H6
4H04 D5
4H05 D11
5H00 D2
5H01 E2
5H02 F2
5H03 G2
5H04 E13
5H05 F13
5H06 F14
7H00 G13
7H01-1 H4
7H01-2 J6
7H01-3 F9
7H01-4 B14
7H01-5 A3
7H02-1 C8
7H02-2 D8
7H03 D9
7H04 D10
7H05 C11
FH00 G4
FH01 H4
FH02 H4
FH03 H4
FH04 I4
FH05 H5
FH06 H6
FH34 I16
FH35 H8

16
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_515_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 59

SSB: TCON DC/DC

6J06

5J06

6u8

SS34

15

16

17

8
7
6
5

RES 7J02
FDS9435A
8
7
3
6
2
5
1

FJ00

RES

4J01-1
4J01-2
4J01-3
4J01-4

14

FJ01
VLS_15V6
2u2

10u
2J48

1
2
3
4

VLS_15V6_B

2J03

2K2

10u
2J02

100n
3J00

2u2
2J01

10u
2J46

10u
2J47

8
7
6
5

7J01
FDS9435A
8
3
7
2
6
1
5
2J00

RES
47u 25V

RES

10u

RES

2J49

RES
2u2
2J45

2J44

+VDISP

4J00-1
4J00-2
4J00-3
4J00-4

13

12

10u
RES 2J10

1
2
3
4

11

10u
2J09

+VDISP

10

10n

RES
RES
RES
RES

RES
2J08

47u 25V
2J07

39K

RES
2J06

RES
3J02

10u

10u
2J05

B08B

2J04

TCON DC/DC

2u2

B08B

B
RES
3J05

1n0

39K

RES
2J11

3J03

10K

100K

3J01

VLS_15V6

2J23

1n0

3K3

RES
2J12

VGL_-6V

6J01
RB550EA
1
2
3

240K

5
4

FJ13

VCC_3V3

4u5

1u0

FJ14
VGL_-6V
100n

2K2

2K2
2J50

3J29

2u2

3J27

2J41

16V 22u

FJ11

RES
7J03
KTA1663 3

2u2

2K2
2J22

FJ10
FJ05

2
RES
2J24

VCC1V8

3J14

SGND1

SGND1

SGND1

57
56
55
54

DISPLAY INTERFACING - VDISP

VIA

VIA

53
52
51
50

RES

RES

1J00 RES

3.0A T
RES 5J07

RES 1J01

30R
RES 5J08

3.0A T

FJ55

+VDISP-INT

+VDISP
RES 2J42

2J27

RES

120p

2K2

RES

3J16

46
47
48
49

VIA

30R

1
2
3
4

LTST-C190KGKT

8
7
6
5

2K2

RES
3J20

2K2

RES
3J19

100n

27K

RES
2J28

3J17

4J04-1
4J04-2
4J04-3
4J04-4

6J07

3J28
2K2

SGND1

SGND1

FOR DEBUG ONLY


10u

VIA

VIA

2J43

42
43
44
45

22u

RES 3J13

4J03
+VDISP

SGND1

7J00-2
ISL97653AIRZ

VCC_3V3

1
SGND1

cK00

VLS_15V6_B

10K
13K

100p

31

41

TEMP

5J00

2J35
3J11
3J12

40
39

22u
RES
2J39

AGND

32
33
5
6
14

37

SUPN
12

PGND

220n

1n0
2J38

LDO-CTL
LDO-FB

SGND1

2J34

2J40
3J26

1n0

CM2

820p

3J24

SGND1

39K

RES 2J33

20K
RES
2J36

4n7

2
3
4
8

220n

3J25

2J21

VL

3J10

12K
RES
2J37

CB
1
LXL
2
FBL

2J32

10
11
13

SS24

4u7

CTL
CDEL

SGND1

6J05

2J20

VREF
FBN
NOUT

VLS_15V6
2K2
RES 2J16 100n

23
22

22u 16V

220n

P
C2
N

RES
3J09

FJ03

2J26

2K2

2J19

24
25

DRN
COM

SGND1
2K2

21
20

120p

17
18

P
C1
N

RES 3J06

28

2u2

100n

POUT
FBP

2J25

100n

2J18

RSET

EN
PROT

2K2

2J17

15
16

HVS

3J15

26
36

RES
3J08

FJ04

GSLOP

27

VCC_3V3

34
35
29

27K

SGND1

1
2
FBB

GND_HS

PVIN

COMP

10n

10K

4n7

LX
30

SGND1

38
1
SUPP

3J07

3J04

SGND1

7J00-1
ISL97653AIRZ

2J15

4u7

2J13

2u2

2J14

FJ02

8
7
6
5

SGND1

10K

3J22

RES
6J00
FJ09

4J05

RES
3J23

RES

VGH_35V

3K6

RES
3J21

100n

PMEG1030EJ

RES 7J04
2SB1767
2
3

FJ07

4J02-1
4J02-2
4J02-3
4J02-4

2K2

2J29

100p

1
2
3
4

2J30

6J02
RB550EA
1
2
3

4u7
RES
2J31

750K

3J18

FJ06

RES
7J05
2N7002
2

1
GSLOP

10

11

12

13

14

15

16

1J00 G15
1J01 G15
2J00 B7
2J01 B7
2J02 B7
2J03 B8
2J04 B9
2J05 B9
2J06 B10
2J07 B11
2J08 B11
2J09 B11
2J10 B12
2J11 B10
2J12 C10
2J13 C7
2J14 C6
2J15 D5
2J16 D8
2J17 D5
2J18 D5
2J19 E5
2J20 E5
2J21 E5
2J22 F6
2J23 E7
2J24 F8
2J25 F9
2J26 G9
2J27 G9
2J28 H8
2J29 I8
2J30 I10
2J31 I10
2J32 D9
2J33 E9
2J34 E9
2J35 E11
2J36 E13
2J37 F13
2J38 E13
2J39 E13
2J40 E13
2J41 E14
2J42 G14
2J43 G15
2J44 B5
2J45 B5
2J46 B5
2J47 B5
2J48 B5
2J49 B6
2J50 E15
3J00 B7
3J01 B7
3J02 B10
3J03 B10
3J04 C10
3J05 B10
3J06 D8
3J07 D5
3J08 E5
3J09 D10
3J10 E9
3J11 E8
3J12 E8
3J13 F6
3J14 F7
3J15 G8
3J16 G8
3J17 H7
3J18 I7
3J19 H10
3J20 H10
3J21 I11
3J22 I12
3J23 J11
3J24 E12
3J25 F12
3J26 E13
3J27 E14
3J28 G16
3J29 E14
4J00-1 A8
4J00-2 A8
4J00-3 A8
4J00-4 A8
4J01-1 A11
4J01-2 A11
4J01-3 A11
4J01-4 A11
4J02-1 I11
4J02-2 I11
4J02-3 I11
4J02-4 I11
4J03 F5
4J04-1 H15
4J04-2 H15
4J04-3 H15
4J04-4 H15
4J05 J7
5J00 E12
5J06 A9
5J07 G14
5J08 G14
6J00 I11
6J01 E14
6J02 I5
6J05 E12
6J06 A8
6J07 G16
7J00-1 C6
7J00-2 G6
7J01 A8
7J02 A11
7J03 E8
7J04 I11
7J05 J11
FJ00 A9
FJ01 A12
FJ02 C10
FJ03 D10
FJ04 E3
FJ05 F9
FJ06 I8
FJ07 I10
FJ09 J11
FJ10 F12
FJ11 E12
FJ13 E13
FJ14 E14
FJ55 G16
cK00 F6

17
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_516_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 60

SSB: P Gamma, VCOM & NVM

P Gamma, VCOM & NVM

B08C

10

11

12

13

14

INPCOM|DVR_OUT

OUT9
BANKSEL

10K

RES
3K46

10K

RES
3K45

10K

RES
3K44

10K

RES
3K60

6K8

6K8

3K40
10R

8
10R
3K11-1

10K
RES 2K26

1n0
3K50

10K
RES 2K25

1n0
3K51

3K49

10K
RES 2K24

1n0

19
22

FK47

VL0

SC0 NC 5
SC1

SCL

SDA

SD0 NC 4

I2 C
-BUS
CTRL

INP
FIL

SCL-TCON

SD1

SDA-TCON

SDA_VGA

VL127
VL95
VL31
VL63

VCC_3V3

10R

FK18

RES 4K14
RES 4K15
RES 4K16
4K03

BSH111
7K05

10R
3K12-4

INNCOM

10R
3K12-3

26

OUTCOM

25

INNCOM

3
VDD

SCL_VGA

VSS
6

24

OUT12

OUTCOM

100n

2K27

100n

100n
2K09

100n
2K08

7K03
PCA9540B

FK14
FK15
FK16
FK46

VIA

RES 4K17
RES 4K18
4K04
RES 4K19

FK19
FK20

RES 4K20
RES 4K21
4K05

FK22
FK23
FK24

U3

FK51

1
2
3
4

FK52

SSB-TCON EEPROM

CS_L

VCC_3V3
2K2

3K34

10R

VL191

6K00
100n

100n
2K17

100n
2K16

2K14

5K1 0.5%

VL31
VL159
VL127

10R
3K13-4

10R
3K13-3
3

7
10R
3K13-2

3K13-1
1

BSH111
7K06
3

FK35

2K28

3K16

FK08

VCOM

3K17

3K14

0R51

10u

OUTCOM

100n
2K15

7K01
PBSS4540X

68p

2K18

INNCOM

VL127
VL63
VL247
VL95

MSS1P4

4K06-1
4K06-2
4K06-3
4K06-4

8
7
6
5

+VDISP

100n

100n
2K13

100n
2K12

2K10

6
20

33

GND_HS

VCOM BUFFER

2K19

3K61

10R
3K11-2
2

6
10R
3K11-3

3K11-4
4

RES

FK07

I2C SWITCH (VGA VCOM) VCC_3V3

23

OUT11

GND

SELLVDS
R_L
U_D

VH127
VH63
VH247
VH95

VH127
VH95
VH31
VH63
VH0

10K

FK44

RES 4K11
RES 4K12
RES 4K13
4K02

17

OUT10
34
35
36
37
38
39
40
41

RES 4K08
RES 4K09
4K01
RES 4K10

18

INN8

V_THERM

RES

10R
3K12-2

10K

31

14

FK06

1
2
3

7K02
PBSS5330X

WC
SCL

ADR
SDA

6K8

3K54

6K8

FK37

WP_TCON

3K55

2K0

ROM_SCL

3K56

2K0

ROM_SDA

FK53

100R

3K62

0
1
2

3K53

3K15

0R51

100n

RES 2K21

2K20

22u 16V

(8K 8)
EEPROM

FK36

2K0

7K04
M24C64-WDW6

750R 0.5%

3K52

100n

3K41

10u

SET_COMP
OUT8

NC

FK42

15

INN7

3K12-1

30

16

NC

50Hz_60Hz

11

INN6

100n
2K07

OUT7

10

2K06

SCL
SDA

VH127
VH31
VH159

100n
2K11

13
12

VCC_3V3

FK11

4K00
RES 4K22
RES 4K07

3K3 0.5%
FK04
FK05

VH191

OUT5

OUT6

VH255

FK40

REFIN

SET

FK10

OUT4

INN5
28

2
3

10K
RES 2K30

OUT2

REFIN_INN

32

RES
3K08

2K05

3K05

OUT1

2K2

AVDD
VSD

OUT3

3K10

FK38
FK27
FK28
FK29

21

18K 0.5%

27

3K06

2K2 0.5%

100n

2K04

100n

2K03

22K 0.5%

2K02

3K03

100K 0.5%
6K2 0.5%

29

SCL-TCON
SDA-TCON

SDA-TCON
SCL-TCON

3K07

VLS_15V6

VLS_15V6

FK03
7K00
ISL24837IRZ-T13

10K 0.5%

3K02

FK01

VLS_15V6

FK02

3K04

1u0

3K00
3K01

1u0

2K01

2K00

VCC_3V3

VLS_15V6

100n

VREF_15V2

ASIC OPTIONS

VCC_3V3

FK00

15

1n0

B08C

10K

3K35

VCC_3V3

DEB

DEB
1K00
VCC_3V3

ROM_SCL
ROM_SDA

WP_TCON

BYPASS_MODE

FK33

RESET

10K

DEB
3K36

SCL-TCON
SDA-TCON

1
2
3
4
5
6
7
8
9
10
11
13

12

BM11B-SRSS-TBT

U3 F5
1K00 J14
2K00 B2
2K01 B2
2K02 B3
2K03 B4
2K04 B4
2K05 B5
2K06 D7
2K07 D7
2K08 D8
2K09 D8
2K10 E7
2K11 E7
2K12 E8
2K13 E8
2K14 G7
2K15 G7
2K16 G8
2K17 G8
2K18 G5
2K19 G4
2K20 G3
2K21 G4
2K24 C13
2K25 C13
2K26 C14
2K27 D13
2K28 G12
2K30 C12
3K00 B2
3K01 B2
3K02 C2
3K03 B3
3K04 C3
3K05 B5
3K06 D3
3K07 D5
3K08 D3
3K10 E3
3K11-1 C8
3K11-2 C8
3K11-3 C7
3K11-4 C7
3K12-1 E7
3K12-2 E7
3K12-3 E8
3K12-4 E8
3K13-1 G7
3K13-2 G7
3K13-3 G8
3K13-4 G8
3K14 G4
3K15 G4
3K16 G5
3K17 G5
3K34 G8
3K35 J13
3K36 K13
3K40 B11
3K41 B11
3K44 B13
3K45 B13
3K46 B14
3K49 C13
3K50 C14
3K51 C13
3K52 G13
3K53 G13
3K54 G14
3K55 H14
3K56 H14
3K60 B12

3K61 C12
3K62 H12
4K00 C9
4K01 C9
4K02 D9
4K03 E9
4K04 F9
4K05 F9
4K06-1 F4
4K06-2 F4
4K06-3 F4
4K06-4 F4
4K07 C9
4K08 C9
4K09 C9
4K10 C9
4K11 D9
4K12 D9
4K13 D9
4K14 E9
4K15 E9
4K16 E9
4K17 F9
4K18 F9
4K19 F9
4K20 F9
4K21 F9
4K22 C9
6K00 G12
7K00 B4
7K01 G4
7K02 H4
7K03 D13
7K04 G12
7K05 E13
7K06 F13
FK00 B2
FK01 C2
FK02 B3
FK03 B4
FK04 D3
FK05 D3
FK06 D3
FK07 F4
FK08 G4
FK10 C10
FK11 C10
FK14 D10
FK15 D10
FK16 D10
FK18 E10
FK19 F10
FK20 F10
FK22 F10
FK23 F10
FK24 F10
FK27 B15
FK28 B15
FK29 B15
FK33 J13
FK35 G12
FK36 H12
FK37 H13
FK38 B15
FK40 C10
FK42 C10
FK44 C10
FK46 D10
FK47 E10
FK51 F10
FK52 F10
FK53 H12

K
1

10

11

12

13

14

15
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_517_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 61

SSB: MPD

B08D

MPD

B08D
2

10

11

A
+VDISP
FL14
2
1

3L16

FL15

3L15

FL00

4L00-2
RES

4L00-1

FL02

CS3

FL03

CS4

4L01-4

FL04

CS5

NC
NC

RES
VCOM

4L01-3

FL05

CS6

17
RES
2

4L01-2

FL06

CS7

FL07

CS8

FL08

CS9

FL09

CS10

FL10

CS11

NC

OUT1
OUT2
OUT3
OUT4

REFH
REFL

OUT5
OUT6

INA
OUT7
INB

18

1
2
3
IN 4
5
6
7

OUTB
NC
VIA

RES
4L02-4

GND_HS
5

3L13

10
11
13
14
15
16

CS_L

34
35
36
37
38
39
40
41
42

GND

33

ASIC_CS1
ASIC_CS3
ASIC_CS5
ASIC_CS7
ASIC_CS9
ASIC_CS11

12

4L01-1

+
+
-

OUTA

RES
1

32
31
30
29
27
26
25

100n

1
2
3
4
5
6
7
8
19
20
21
22
23
24

2L13

CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
CS10
CS11
CS12

62K

CS2

3L12

FL01

RES

FL12

7L00
ISL24016IRTZ

28
6

RES
2

FL13

1n0

4L00-3

AVDD

2L12

22u 16V

CS1

RES

100n
2L15

2L14
4L00-4

1
3

33R 0.5%

33R 0.5%

1R0

3L17

+VDISP
7L01
NJM2125F
4

100n

3L14

82K 0.5%
2L16

VREF_15V2

10K 0.5%

7L02
2SC5886A
3

RES
3

4L02-3

RES
2

4L02-2

FOR 32" / 40"

RES
1

4L02-1

FL11

CS12

5
10R
100n

3L02-4

6
3

10R

100n
2L11

7
3L02-2
2

10R
3L02-3
100n
2L10

8
10R

3L02-1
1
2L08

100n
2L09

10R
100n

10R

6
3

4 3L01-4 5

100n
2L07

7
2

10R
3L01-3
100n
2L06

8
1

10R
3L01-2

3L01-1

100n
2L05

2L04

5
10R

4
100n

10R
3L00-4

3L00-3
3

10R

100n
2L02

100n
2L03

10R
3L00-2
2

1 3L00-1 8
2L00

100n
2L01

RES

10

2L00 G3
2L01 G3
2L02 G3
2L03 G3
2L04 G4
2L05 G4
2L06 G4
2L07 G4
2L08 G5
2L09 G5
2L10 G5
2L11 G5
2L12 D9
2L13 C11
2L14 C8
2L15 C8
2L16 B11
3L00-1 F3
3L00-2 F3
3L00-3 F3
3L00-4 F3
3L01-1 F4
3L01-2 F4
3L01-3 F4
3L01-4 F4
3L02-1 F5
3L02-2 F5
3L02-3 F5
3L02-4 F5
3L12 C10
3L13 C10
3L14 B10
3L15 B9
3L16 B9
3L17 B8
4L00-1 D2
4L00-2 C2
4L00-3 C2
4L00-4 C2
4L01-1 E2
4L01-2 E2
4L01-3 D2
4L01-4 D2
4L02-1 F2
4L02-2 F2
4L02-3 E2
4L02-4 E2
7L00 C8
7L01 B10
7L02 B8
FL00 C5
FL01 C5
FL02 C5
FL03 D5
FL04 D5
FL05 D5
FL06 E5
FL07 E5
FL08 E5
FL09 E5
FL10 F5
FL11 F5
FL12 C10
FL13 B10
FL14 A9
FL15 B8

11
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_518_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 62

SSB: Mini LVDS

B08E

Mini LVDS

B08E

10

11

12

FM98
81

1KA1
82

1KA2

CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
CS10
CS11
CS12
VCOM
VH255
VH247
VH191
VH159
VH127
VH95
VH63
VH31
VH0

1
2
3
4
4
1
2
3

RLV7+
RLV7RLV6+
RLV6-

RDIO2
R_L
RDIO1

RES 3M15

GSP2
GSP1
REV
LS

3M16

4M00-1
4M00-2
4M00-3
4M00-4
4M04-4
4M04-1
4M04-2
4M04-3

8
7
6
5
5
8
7
6

RES

FM30
FM31
FM32
FM33

RES
RES
RES

FM34
FM35
FM36

VCC_3V3

68R
68R

FM38
FM40
4M11

RLV5+
RLV5RLV4+
RLV4RLV3+
RLV3-

FM41
FM42
FM43
FM44
FM45
FM46

RCK+
RCK-

FM47
FM48

RLV2+
RLV2RLV1+
RLV1RLV0+
RLV0-

FM49
FM50
FM51
FM52
FM53
FM54

VLS_15V6
VL0
VL31
VL63
VL95
VL127
VL159
VL191
VL247

2M02 RES
100n

68R
68R
68R
68R

FM69
FM70
FM71
FM72

CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
CS10
CS11
CS12
VCOM
VH255
VH247
VH191
VH159
VH127
VH95
VH63
VH31
VH0
LLV5+
LLV5LLV4+
LLV4LLV3+
LLV3-

FM73
FM74
FM75
FM76
FM77
FM78

LCK+
LCK-

FM79
FM80

LLV2+
LLV2LLV1+
LLV1LLV0+
LLV0-

FM81
FM82
FM83
FM84
FM85
FM86

GSP2
GSP1
REV
LS

VCC_3V3

68R

RES 3M13
3M14

68R

FM87
1 4M08-1

FM89

LDIO2
R_L
LDIO1

2 4M08-2
3 4M08-3
4 4M08-4

7
6
5

FM90
FM91
FM92

LLV6+
LLV6-

1 4M13-1
2 4M13-2

8 RES
7 RES

FM93
FM94

LLV7+
LLV7-

3 4M13-3
4 4M13-4

6 RES
5 RES

FM95
FM96

VLS_15V6
VL0
VL31
VL63
VL95
VL127
VL159
VL191
VL247

196250-80041

E
2M01 RES
100n

196250-80041

RES

10u

2M04

20R

3M18

FM65

3M00
3M01
3M03
3M08

GSP2
GSP1
GCK
GOE
U_D

20R

68R
68R
68R
68R

82

3M17

3M02
3M07
3M09
3M10

GSP2
GSP1
GCK
GOE
U_D_INV

81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

10u

FM00
FM01
FM02
FM03
FM04
FM05
FM06
FM97

VGL_-6V
VGH_35V

VGL_-6V
VGH_35V

2M03

RES

10

11

1KA1 B10
1KA2 B5
2M01 E11
2M02 E6
2M03 H9
2M04 H5
3M00 B9
3M01 B9
3M02 B4
3M03 B9
3M07 B4
3M08 B9
3M09 B4
3M10 C4
3M13 E7
3M14 E7
3M15 E2
3M16 F2
3M17 H10
3M18 H5
4M00-1 E4
4M00-2 E4
4M00-3 E4
4M00-4 E4
4M04-1 E4
4M04-2 E4
4M04-3 E4
4M04-4 E4
4M08-1 F9
4M08-2 F9
4M08-3 F9
4M08-4 F9
4M11 F4
4M13-1 F9
4M13-2 F9
4M13-3 F9
4M13-4 F9
FM00 B5
FM01 B5
FM02 B5
FM03 B5
FM04 B5
FM05 B5
FM06 C5
FM30 E5
FM31 E5
FM32 E5
FM33 E5
FM34 E5
FM35 E5
FM36 E5
FM38 F5
FM40 F5
FM41 F5
FM42 F5
FM43 F5
FM44 F5
FM45 F5
FM46 F5
FM47 F5
FM48 F5
FM49 G5
FM50 G5
FM51 G5
FM52 G5
FM53 G5
FM54 G5
FM65 H5
FM69 B10
FM70 B10
FM71 B10
FM72 B10
FM73 D10
FM74 D10
FM75 D10
FM76 D10
FM77 D10
FM78 D10
FM79 E10
FM80 E10
FM81 E10
FM82 E10
FM83 E10
FM84 E10
FM85 E10
FM86 E10
FM87 E10
FM89 F10
FM90 F10
FM91 F10
FM92 F10
FM93 F10
FM94 F10
FM95 F10
FM96 F10
FM97 C5
FM98 B10

12
1

BR-M-50
PCB SB SSB DIGITIAL

2010-01-22

3140 123 6483


18980_519_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 63

7H02
4K18

2H41

3H08

3H09

3H01

3H07

3H10

3605

1H00

3H05

4L02

5H03

2H46
2H45

2H40

3602

3614

3707

2700

2701
3600

2514
5506

7600

1703

1F02 1707

7H00

4K04
4L01
4L00

3K08

3K10

2628
2608

1F00

2191

3H11

3H12

2609

3615

3741 2706

3782
2729

3612
3613

3607

4308
3609

3606

5310

3610

3608

2303

2376

5324

2322

2375

2321
2318

2319
2315

2310
5302

2309
2301

7301

2308 2312

2317

2304

3360
3350

3798

3355

5228

2286 2291

2288

2314

2B41
2B44
2717

1700

2311

2374
2372

2305
5301

7D00

2297
4209

1211

5213

3110
2B12

3B08 2B08

3B07 2B07

3B06 2B06

3B09 2B09

2B02

2B03

2B00

2B01

2E00

3B05 2B05

3B03

3B02

3B01

3B00

3E00

3E05
3E02

3B12

2C14

3C19

2C09

3C10

2C08
3C08

6C07

6C06

3C07

2F00 2F01

1F01

3767

3770

7709

7216

3414

3415

7405
7412 7413

6401

3411

2E04

3718

3B11 2B11

3709
3719

3717

2E05
2E02

2422
7403

3427
3428
3748

3735

5303 5305
2313 2316

7402

3749

7404

3356

6301

3788
3758
3787

3353

2B14 3B14
2B15

4701
4702

7411

6700

6701

2B55
2B59

2424 2425
3420 3421

3B51 3B53

2B58

2B51

6403

5403

3B41

3B50
3B40
2B52

7406

5229
5226

2285

2716

3711

6402
7407

3B48

3B52

2401

2B50

3B49

2B54

3B44 3B43

2B56 3B45
3B46
2B57

5230
5227

3715

3716

2409

2290

3796

2703

2407

2B43

2287

2549

2702

2173

2306

4309

3617
3618

3E04

5118

2B25

2289
3619

5700

7107

2174

2551

6125

2175

7700

2B40

7601

5119

2124

2302 2307

2B24

5307
5304 5306 2320

2196

2181

2182

3785 2719
37A8

2151

2406

2400

3H17

3H16

2195

2408

3436

3H18

3H15

3784 2720

2403

2402

7400

2411
2412

7K02

3H14

2803

3611

2164

2159

7117

2158

2162

6124
2123

6123

2168

2150
2405
5405

2416

C400

2404

4K06

2704

5404

1735
1403

2415 5402

7H01
3H02

2197

3806

3K15

5H02

1702

2170

5117

2K14

7K01

3K16

3K14

3K34

4K12
4K02
3K13

3K17

2K15

2K19

U3

3K06

2K16

3H13

1402

1M95

2148
2147

5116

4K09

2K10

2K04

2K03
3K05

2K18

2K00

2K01

3K00 3K01
3K02

2K02

5120
5121

5103

4K17
4K05
4K21

2K17

2K05

7801

7803
3805

4K11

2K12

2K11

2K13

7K04

1K00

3808 3807 3809

6800

4H05

4K19

4K22

3K07

7802
2807
3112

7800

7K03

4J04
3J28

6J07

2J39

1J01
1J00
2J42

4K13

3K12

2804
2806

2190

5104

2J43

2J35

2J38

2140 5J00

2J00

6J05

4K08

7H05

4M08 4M13
4M00 4M04

2J22
3J13
4J03

1KA1

3706

2J08
2J27 2J26

2J34

1KA2

3J16 3J15

3J09

3J19

2J16

3J08

3J06

2J19

3J03

2J11

3J04
2J12

2J17

CK00

7116

6103

2J18

7J00

2J13

3J01

2J02

2J01

2187

2186

2J14

5115

6122

2J44

2J46

2J49
2185

3J00

7J01

2J03

6J06
4J00

1M99

2J23

5J06

3791
2722

2724

2727

2723

2725

2J05
2J04

3790

3792

3793

3795

3794

2726

2728

1M20

3J07 2J15

Layout Small Signal Board (Top Side)

6C05

4306

2C07

2D14

2296

1D01

3A00

6914 6913

2A09
6E04

2E08
3E14
5E02

2E12
5E04

3905
3904

3923

7218
3268
3269

6916 6915

2A00
4A00

2901
3E20 2E14
2E15 3E19
3E22 3E21

3270
2293

3267

1201

3E25

3E27

7E01

3A09

5E05 2E11

3E24

2E16

6E05

3E18

4E04
3E23
3E26

2A04

2213

6E06

2B37

2B39

3B34
2B35

2A07
2E13

4307

7219

1902

3E15
5E01

6E02 6E03 6E01

7217

6917

1B05

1B01

1C01

1C18

1C19

1C17

3B32

2A10
3A15

4E02

3914

6900

2B36

6B00

7902

3B15

2B19

2B20

3B16

3900
2900

1C00
1C16

3B33 2B38

4900 4901

3924

3A10
2A05

3B31 2B34

6B01

3C18

3C17

3C24

2C15
3C06

3901 3902
2C06

5C02

3C25

2C05

3C22

6C10
6C04

5C05
3C05

3C16

2C16

3C23

6C03

3C04

3C20

5C04

5C01

5C00

6C09
3C02

3C14

6C02

2C17

3C21

5C03

2C04

2C02

2B31

6C08
3B28

3C01

3C13

6C01

2C03

2B30 3B27

2C18

2C19

2C00

6C20

2C20
3C00

3B29

2C21

3C12

2B32

2C01

6C19

6C00

3B30

3A03

2A11

2A01

1A03

2B33

6A00

2A06

1C03

1701

1A02

1705

1C09

1C10

1C15

1C02

1A01

1C07

1C08

1C14

1706

3A02

1C05

1901

1B02

1E01

3104 313 6483.1


18980_550_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 64

Layout Small Signal Board (Bottom Side)

2K20

I806

I800

3802
I805

2J33

2J40 3J10

3J26
3J27

6J01

FJ00

4J01
2J50

2J36 2J37

2J41

FJ14
FJ13

F755

F757

F758

FJ05

FJ11

7J03
2J25

FJ55

3J24 3J25

3J14
3J12

4805
4804
4803

I801

3804

I804

F754

2J24

FJ03

7K05

I807

F753

2J48

4802
4801
4800

FK07

3K03

3J02

2J47
2J45

FK37

2805

I809
FK00

FK02

2K21

2J32

FJ10

2J06

7J02

FJ06

2J28

F829

5J08
5J07

2K09

5802
5801
5800

2K08

4808
4807
4806

3L17

2L14
3L14

2L15

2L16

7L02

3L16

6J02

3J22 7J05

6K00
2K28

2K07

2K27

3L15

7L01
FL13

3J18
2J29 3J17

2K06

FK08

3L13

7J04

FK03

FK10

FL15

3J05

FJ07

FK01

FK27

FJ01

2J09
2J07

2J31 3J20

3J21

4J02

7K06

FK52
FL14

3K36 3K35

FK04

3K41

FK44

3K40

7K00

3L01

2L08

2L03

3J23 2J30

6J00

3K62

FK46

F800

2H30

2H26

2H31

2H43

5H00

FK36
FK35

FK06

2L07
2L06

2L05
2L04
2L02
2L01
2L00

2K24
3K44

5H06

5H04

3K54
FK53

FK05

FK18

7L00

5H01

2H44

2H38

5H05

3K51

4K15

3K55 3K53

3K11

FK51

3K04

3K49

2H08

2H39

F770

3M15

FK24

3L00

2H02

2L10
2L11

2H01

FM05

3K56 3K52

2K25

FK22

3K45

4K16

4K03
4K20

2L13
3L12
FL12

3L02

2H04

2H27

2H25

3M09

FK40

FK28

4K10
4K00
4K07
4K01

2L12

4K14

2H06

2H05
2H32

2H37

2H13

FM04

3M10

2L09

2H28

2H29

2H53

2H50

2H52

2H10

2H07

3M07

FM40

4M11

FK47

FJ04

FM02

FL04

3M16

3M00

FM38

FK19

2H03

2H36

3H20

3H19

FM01
FL00

FM69

FK23

3H00

37A3

FL01
FM30

FM70

3H03

4H04

FH01

3M01

3M08

3M03

FM72
FH06

FJ02

2J10

FL02

FL07

3M02

3H04

FH02

2H42

3H25

FH03

3H27

FH05

3H26

3H28

FH35

3M14

2H35

37A4

FM06
FL03
FL05

FM32
FM31

FL11

2H09

2H51

FM36

2M02

FM71

FK29

F766

F764

FM41

FJ09

FM81

FM80

2H48

37A2

FM42

FM43

FM03

3H06

37A1

FM44
FM48
FM46

FM75

FM87

3H23

3K61 2K26

7H04

3K60 3K46
2K30 3K50

2H54

FM76

FH00

2H33

FM51

3M13

FK38

FL06

FM33

FM34

FM00
FM54

2H34

FH34

FM35

FL08

2M04

FM53

FH04

2H47

FM45

FM47

FM49

3M18

FM65

FK16

FM90

FM91

3H21

3H22

2M03

7H03

FM52

FL09

FM97
FK11

FM73

FM79

3J11

FK42

FK15

FM83

2J21
4J05

FM74

FM77

FM82

2M01

FM94

2J20

FM78

FK14

FM93

3J29

FM84

FM85
FM96

FL10

FM86

FM89

FM92
FM95

3M17

FM50

FK20
FM98

3803

F771
I808

I802

I123
F808

F822

F818

2601

3F00

3775

3779

3778

3776
3777

2505

IE04

7703

F705

3713 3712

F708

F707

I708

IA01

FA06

FA09

2146

3145

2193 2166

2135

F116
F115

I130

3140 2163 2161 2155


2154 3138 3125 3122

3130

I125

2176

3144

7401

3438

3406

2432

5406

2420

3424

2419

2427

3425

2426

I405
F412

2421

5401

3437

F717

I443

IC05

3400 3401

3431

5400

7B01

3435

3430 2431

3731

3737

I417

3405

3413

I424

3408
3409
2423

3730
I755

6708

4904 3906

I745

3747 3728
3764 3734

3727

3744

I750

2C13

I420

2417

3C11

I418

2C12

U1

IC07

IC13

1C06

FC00

3A16 2A08

4A02
IA04

IA03

FE01

FE02

FE05

FB01

FE07

1E02 1E04

IE06

F759

FB00

IB00

IA00

FC15

FC10

1B04
IB01

FB06

IC10

IB04

F903

FA08

FE06

FC12

FC13

IB10

6A01

FE04

FC14

FC11

IC14

F900
IB08

IC09
FB02
FC09

I901

F901

7900

3912 3913
6906 6907

IB13
FC06
FB04

IB12
FC05

FC04

IC02
IB06

FC07

IB07
IC01

FC08

F904
F913

I900

F744

3910
3907
6905

1E03
1E00 1E05

4A01
2A02

7905

2E09

4E03

5E00

6E00

FA04

I902

3E10
3E17

IB05

IB09

7904

2E10
3E13

3A12

3E16

IB03

3911
3111

IA05

FE11

FE10

I254

IA10

IA09
IA02

5E03

4305

2E07

F719

7A00

IA08
IE00

FE08

5222

7414

F417

FA03

2283

2284

F235

3439

I410

2418

FF12

FF13

FE03

I220

F912

3266

2292

3264

F718

2C10

FC01

1B03

3920 4902

I221

I411

IB51

F406

I421

3A17
4A03

FE12

FE09

F201

3746

IB21
IB66

3A04

F237

F203

3265

I904

3921 4903

6911

7906

7907

3919

I903

3918 3922

3917

6909
I905

3916

6912

3915

3738

6709
3231
2228

7213

3232

2295
6910

I431

I416

F405

3422

I434

FA01

IB02

2229

F202

I222

I435

I414

I407

IB67

3255

I232

4208

F743

3432

7410 7409

F400
I403

F402

IC11

3A01

F227

7E00

F204

I441

I442

I401

F401

3423

IC03

1213

6901

4401

I438

7408

I413

IC08

2C11

FC03

FE00

F905

3418
F409

F404

I415

I255

FA07

3903

7903

I239

2240

F122

I419

F410

I406

3234

3A11

3246

F214
F240

IC06

FA02

I247

3236

2252

F121

2141

FC02
IC04

A225

F911

I440
I437

I436

I747

FA00

2235

3235

I249

F118

FB08

3A14

F906

FF11

3C09

I237

I251

2250

F241

F206

IB52

I228

3A13

F907

IB53
I429
IB19

2232
F215

3223

3244
3241

I235

2145

2413

I412

IB50

F414

IB48

3254

7212

I240

I230
F908

3B42

3416

7908

I737

3757

2414

2B53

F413

I430

3224

4211
4210

6902

7710

I433

I425

F416

2244

2230

F246

F243
I238

F244

3247

3230
2226

F245

F725

3412

I906

3729
3702

F213

2231

I243

2263
2262
3261

2282
F236

3228
2225
F207

2152
3135

F415

I231

F909

3751
I752

2233

I234
I245

2251

7901

FD02

2247

I242

I423

IB49

2236
2237

2294

I244

I233

1D03 1D00 1D02

FD03

3238

F209

2258

I738

F724

2246
2245

2156

6400

I432

3262

2243

FD00

5225
5207
F208

F411

3733

3263

2280

F119

I134

I126

2142

I741

3756

3769

2709
2710

I734

3771

6D02

6D01

6D00

A211

I725

A213

2281 2277

F114

I132

F704

F736

I744

I739

6707

IE03

FF10

A212

F113

F120

I138

I139

I907

I746

2721

I749

5212

2279 2278

2136
3129
2137

I128

F408

7701

IB23

3722 3724

A214

3136
2153

I422

2711

3E03

I502

2D11

5D00

3723

5504

2D16

2180

2627

F706

3714

4707

3768

I129

IE02

IE01

2593
2592 2E03

2D12

F111

I131

3133

I137

3433

IB32

FD06

A210

F110

2130

2143

F761

3761

F740

6706
IE05

IB30

FD01

3D10

F109

2129

2144

3786

F738

F745

F721

3D09

F108

2198

F123

CXXX

2568

2550
2705

3410

IB36

IB40

F132

3134

3417

IB46

3621

3107

2544

37A6
37A7

IB42

4708

IB33

IB28
IB34

IB44

2157

2160

F135

3710

2598

IB47

IB43

IB45
IB39

IB38

F739

2713

IB26

FD05

IB62

IB59

2629
3620

2623

2512
2541
2545

2540

F134

3703

2542

2531

2519
2520
2582

2510

2543

I735

I503

F501

2500

IB35

IB24

I135

2149

IB27

IB31

F216

F107

F117

2626

2625

2430 3434

IB29

3131

I127

7702

IB63

7708
3142

2533
2532

IB37

2624

2513 2630

2524
2565

IB25

IB61

2B17
2B16

IB41

2D15

2188 2189

I731

2509

2560
I504

I753

F601

3624
2508

2579

2516

2574

2622

2571
2588
5501

IB65

FD04

ID04

F756

F105

F112

2620

3789

IB64

F300

2535

2573

I733

5309
4310

2132
3128
2131

FF02

5F01

F104

F133

F602

3500

F306

3331
4304
4303
3332

I317

3352
3351

3F01

FF03
I727

2621

2561
2575

I754

F301

2527
2562
2563

I505

2580

5505
2595

I338

I316

2128

FF01

F103

I757

3622
2552
2553

2537

2597
F500

2558

I321

IB22

I507

I306

2133
3127

I106

F102

I756

2584

2526

2569

2577

5502

I305

5308

5323

2517

3354

I302

2341

2373

2518

2596

I310

3359

2504

2503

3623

2576

7302

I313

I320

2523
2564

37A5
2599 2570 2536
2525

3357

I322

I309

2340
2339

2377

2712

3108

2506

2559

2521

3783

IB15

I506

I714

I304

2338

I312

2378

I336

7315

I324

I311

I732

5705
I742

2167
I105

I726

3B38

5503
IB20

3B47
2538
2534
2528
2529
2530

3745

2522 2515
3B36

I716

3736

3743

7705

2581

4705

3742

3755
3754

3753
3752

I710

4706

F741

IB18

I300

3358

I700

I319

2337

2566

2567

3740
3781

3721 4704

I715

2336

3601

3603

2502
2501

I701

I323

I301

3604

F124
I107

2138

F502

3720 4703

F716

I327

I325

2606

I136

I707 3708

F302

I308

2335

F305

3B39

5311

4311
3336
I328

2605

2134
3126
2127

F760

5500

F503

IB14

F742

3349

3337

3335

4300

4301

2332

I315

3B35

IB16

I314

I318

I303
I337

2B42

3B37

3339

2333

1301

3344 3343
F303

I307

2603

I713

2126
2125

IB17

F205

2334

F242

FB03

3739

I711

3774

F823

3700 3704

I743

F824

3701 3705
FF05

3762

F125

5F00

FF00

I117

I122

I104

FF04

F807

F811

2604
FF06

3119 3139

3780

F805

F809

F813

F825

2165

I118

2192
I120

F106

F826

F814

F817

F819

F827

F812

F828
F737

F820

3726
4700

3772

F821
FK33

FF09

F763

2607

2139

3109

F810
F701

FF08

2600

F806

FF07

3F03

F600

3616

3760

3759

2602

F815

F702

3F02

F747

3426
3419

3773

F752

F723

F131

3763
F751

F801

F816

3765

1G51

F750

F746

3105 3106

F748

F749

I119

F831

I718

3143

F765

6903

F902

FB07

3908
6904

3104 313 6483.1


18980_551_100329.eps
100326

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 65

SSB: SRP List Explanation

Personal Notes:

Example
Net Name

Diagram

+12-15V
AP1 (4x)
+12-15V
AP4 (4x)
+12-15V
AP5 (12x)
+12-15V
AP6 (4x)
+12-15V
AP7 (8x)
+12V
AP1 (4x)
+12V_NF
AP1 (2x)
+12VAL
AP1 (2x)
+25VLP
AP1 (4x)
+25VLP
AP2 (1x)
+3V3-STANDBY
AP5 (3x)
+400V-F
AP1 (2x)
+400V-F
AP2 (2x)
+400V-F
AP3 (2x)
+5V2
AP1 (6x)
+5V2
AP2 (1x)
+5V2-NF
AP1 (1x)
+5V2-NF
AP2 (1x)
+5V-SW
AP1 (6x)
+5V-SW
AP2 (1x)
+8V6
AP1 (3x)
+AUX
AP1 (2x)
+AUX
AP2 (1x)
+DC-F
AP1 (2x)
+DC-F
AP3 (2x)
+SUB-SPEAKER
AP5 (1x)
+SUB-SPEAKER
AP6 (2x)
-12-15V
AP1 (4x)
-12-15V
AP4 (6x)
-12-15V
AP5 (14x)
-12-15V
AP6 (6x)
-12-15V
AP7 (8x)
AL-OFF
AP1 (2x)
AUDIO-L
AP4 (1x)
AUDIO-L
AP5 (1x)
AUDIO-PROT
AP5 (3x)
AUDIO-R
AP4 (1x)
AUDIO-R
AP5 (1x)
AUDIO-SW
AP5 (1x)
AUDIO-SW
AP7 (1x)
BOOST
AP1 (2x)
CPROT
AP4 (2x)
CPROT
AP5 (1x)
CPROT-SW
AP5 (1x)
CPROT-SW
AP6 (2x)
-DC-F
AP1 (2x)
-DC-F
AP3 (2x)
DC-PROT
AP1 (1x)
DC-PROT
AP5 (2x)
DIM-CONTROL
AP1 (2x)
FEEDBACK+SW
AP6 (2x)
FEEDBACK-L
AP4 (2x)
FEEDBACK-R
AP4 (2x)
FEEDBACK-SW
AP6 (2x)
GND-AL
AP1 (2x)
GNDHA
AP1 (40x)
GNDHA
AP2 (20x)
GNDHA
AP3 (2x)
GNDHOT
AP3 (2x)
GND-L
AP1 (2x)
GND-L
AP4 (4x)
GND-L
AP5 (34x)
GND-LL
AP4 (7x)
GND-LL
AP5 (1x)
GND-LR
AP4 (7x)
GND-LR
AP5 (1x)
GND-LSW
AP5 (1x)
GND-LSW
AP6 (15x)
GND-S
AP1 (11x)
GND-SA
AP4 (8x)
GND-SA
AP5 (2x)
GND-SA
AP6 (8x)
GND-SA
AP7 (6x)
GNDscrew
AP3 (2x)
GNDscrew
AP5 (2x)
GND-SSB
AP5 (3x)
GND-SSP
AP1 (51x)
GND-SSP
AP2 (15x)
IN+SW
AP6 (2x)
IN-L
AP4 (2x)
IN-R
AP4 (2x)
IN-SW
AP6 (2x)
INV-MUTE
AP4 (1x)
INV-MUTE
AP5 (1x)
INV-MUTE
AP6 (1x)
LEFT-SPEAKER
AP4 (1x)
LEFT-SPEAKER
AP5 (1x)
MUTE
AP4 (2x)
MUTE
AP5 (1x)
MUTE
AP6 (2x)
ON-OFF
AP1 (3x)
OUT
AP6 (1x)
OUT
AP7 (2x)
OUTN
AP6 (1x)
OUTN
AP7 (1x)
POWER-GOOD
AP1 (2x)
POWER-OK-PLATFORM AP1 (2x)
RIGHT-SPEAKER
AP4 (1x)
RIGHT-SPEAKER
AP5 (1x)
SOUND-ENABLE
AP5 (3x)
STANDBY
AP1 (5x)
STANDBY
AP2 (1x)
-SUB-SPEAKER
AP5 (1x)
-SUB-SPEAKER
AP6 (2x)
V-CLAMP
AP1 (1x)
V-CLAMP
AP3 (2x)

1.1.

Introduction
SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains
references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal
names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100%
correct. In addition, in the current crowded schematics there is often none or very little place for these references.
Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

1.2.

Non-SRP Schematics
There are several different signals available in a schematic:

1.2.1.

Power Supply Lines


All power supply lines are available in the supply line overview (see chapter 9). In the schematics (see chapter 10) is not
indicated where supplies are coming from or going to.
It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).
+5V

Outgoing
1.2.2.

+5V

Incoming

Normal Signals
For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.
B14b

1.2.3.

signal_name

Grounds
For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3.

SRP Schematics
SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used.
A reference is created for all signals indicated with an SRP symbol, these symbols are:
+5V

name

name

+5V

Power supply line.

name

Stand alone signal or switching line (used as less as possible).


name

Signal line into a wire tree.


name

name

Switching line into a wire tree.


name

Bi-directional line (e.g. SDA) into a wire tree.


name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets).
Remarks:

When there is a black dot on the signal direction arrow it is an SRP symbol, so there will be a reference to the signal
name in the SRP list.

All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep
it concise.
Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included

in the SRP reference list, but only with one reference.


Additional Tip:
When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the
schematics. In Adobe PDF reader:

Select the signal name you want to search for, with the Select text tool.

Copy and paste the signal name in the Search PDF tool.

Search for all occurrences of the signal name.

Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to
zoom in to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete
schematic.
PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.
10000_031_090121.eps
100323

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 66

SSB: SRP List


Netname

Diagram

+12VDISP
+12VDISP
+12VS
+12VS
+12VS
+12VS
+12VS
+12VS_1
+1V0_SW
+1V0_SW
+1V2_SW
+1V2_SW
+1V2_SW
+1V8_SW
+1V8_SW
+1V8_SW
+24VAUDIO
+24VAUDIO
+2V5_SW
+3V3_SW
+3V3_SW
+3V3_SW
+3V3_SW
+3V3_SW
+3V3_SW
+3V3STBY
+3V3STBY
+3V3STBY
+3V3STBY
+3V3STBY
+3V3STBY
+3V3STBY
+5V
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V_SW
+5V5_TUN
+5V5_TUN
+5VIF
+5VS
+5VTUN_DIGITAL
+VDISP
+VDISP
+VDISP
+VDISP-INT
+VDISP-INT
50Hz_60Hz
50Hz_60Hz
5V
A_STBY
AGND
AGND
AIN0_L
AIN0_L-AV1
AIN0_L-AV1
AIN0_R
AIN0_R-AV1
AIN0_R-AV1
AIN1_L
AIN1_L-AV2
AIN1_L-AV2
AIN1_R
AIN1_R-AV2
AIN1_R-AV2
AOUTL
AOUTL
AOUTR
AOUTR
ASIC_CS1
ASIC_CS1
ASIC_CS11

B02A
B05
B02A
B04A
B04D
B06C
B08A
B02A
B02A
B04B
B02A
B03
B04B
B02A
B04B
B04C
B02A
B04A
B03
B02A
B03
B04B
B04D
B06B
B06C
B02A
B04A
B04B
B04D
B05
B06A
B08A
B04D
B02A
B02B
B03
B04A
B04D
B05
B06A
B06E
B07
B08A
B02A
B02B
B02B
B02B
B02B
B08C
B08D
B08E
B05
B08C
B08B
B08D
B06E
B04A
B02B
B03
B06C
B06C
B06D
B06C
B06C
B06D
B06C
B06C
B06D
B06C
B06C
B06D
B04A
B06C
B04A
B06C
B08B
B08E
B08B

(1 )
(1 )
(3 )
(2 )
(1 )
(2 )
(1 )
(2 )
(1 )
(1 )
(1 )
(2 )
(2 )
(1 )
(1 )
(5 )
(1 )
(2 )
(3 )
(1 )
(5 )
(3 )
(25 )
(2 )
(2 )
(1 )
(3 )
(2 )
(10 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(6 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(4 )
(2 )
(2 )
(4 )
(1 )
(2 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(46 )
(17 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )

ASIC_CS11
ASIC_CS3
ASIC_CS3
ASIC_CS5
ASIC_CS5
ASIC_CS7
ASIC_CS7
ASIC_CS9
ASIC_CS9
ASPDIF_OUT
BACKLIGHT-BOOST
BACKLIGHT-BOOST
BACKLIGHT-PWM
BACKLIGHT-PWM
BP
BP
BYPASS_MODE
BYPASS_MODE
CS_L
CS_L
CS1
CS10
CS11
CS12
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
CVBS_AV3
CVBS_AV3
CVBS_RF
CVBS_RF
DC_5V
DC_PROT
DC_PROT
DDC_RESET
DDC_RESET
DDR2VDD
DGND
DIF_N
DIF_N
DIF_P
DIF_P
DVI_AUL_IN
DVI_AUR_IN
EDID_WC
EDID_WC
EDID_WC
FE_SCL
FE_SCL
FE_SDA
FE_SDA
GCK
GN
GN
GND_CVBS
GND_CVBS
GND-AUDIO
GND-AUDIO
GOE
GP
GP
GSLOP
GSLOP
GSP1
GSP2
HDMI_CEC
HDMI_CEC
HDMI_PLUGPWR1
HDMI_PLUGPWR2
HP_DET
HP_DET
HP_DETECT
HP_LOUT
HP_LOUT
HP_ROUT

B08E
B08B
B08E
B08B
B08E
B08B
B08E
B08B
B08E
B06C
B02A
B04D
B02A
B04D
B06C
B07
B04D
B08D
B08D
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B08E
B06C
B06D
B02B
B06C
B07
B04A
B04D
B04D
B06A
B08B
B03
B02B
B03
B02B
B03
B06C
B06C
B04D
B06A
B07
B02B
B03
B02B
B03
B08B
B06C
B07
B06C
B06D
B02A
B04A
B08B
B06C
B07
B08B
B08C
B08B
B08B
B04D
B06A
B06A
B06A
B04D
B06B
B04D
B04A
B06B
B04A

(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(1 )
(1 )
(1 )
(1 )
(4 )
(1 )
(1 )
(1 )
(1 )
(4 )
(32 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(4 )
(13 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(4 )
(4 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )

HP_ROUT
HPOUTL
HPOUTL
HPOUTR
HPOUTR
HSYNC
HSYNC
IF_AGC
IF_AGC
IF_AGC
IF_ATV
INNCOM
JTCK
JTDI
JTDO
JTMS
JTRST
KEYBOARD
LAMP-ON
LAMP-ON
LCD-PWR-ONn
LCD-PWR-ONn
LED-1
LED-2
LEFT_SPEAKER
LIGHT-SENSOR
LS
MUTE
MUTE
NAND_PALE
NAND_PARB
NAND_PCLE
NAND_PDD(0)
NAND_PDD(1)
NAND_PDD(2)
NAND_PDD(3)
NAND_PDD(4)
NAND_PDD(5)
NAND_PDD(6)
NAND_PDD(7)
NAND_POCE
NAND_POOE
NAND_POWE
OUTCOM
PB0P
PBS_HPL
PBS_HPL
PBS_HPR
PBS_HPR
PBS_SPI_CLK
PBS_SPI_CLK
PBS_SPI_DI
PBS_SPI_DI
POWER_DOWN
POWER-OK
POWER-OK
PR0P
PREAMPL
PREAMPR
PWR5V_1
PWR5V_2
PX1APX1APX1APX1A+
PX1A+
PX1A+
PX1BPX1BPX1BPX1B+
PX1B+
PX1B+
PX1CPX1CPX1CPX1C+
PX1C+
PX1C+
PX1CLK-

B06B
B06B
B06C
B06B
B06C
B06C
B07
B02B
B03
B04D
B02B
B08D
B04D
B04D
B04D
B04D
B04D
B04D
B02A
B04D
B04D
B05
B04D
B04D
B04A
B04D
B08B
B04A
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B04D
B08D
B06C
B06B
B08A
B06B
B08A
B04D
B08A
B04D
B08A
B04D
B02A
B04D
B06C
B06C
B06C
B06A
B06A
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05

(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(2 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(2 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )

PX1CLKPX1CLKPX1CLK+
PX1CLK+
PX1CLK+
PX1DPX1DPX1DPX1D+
PX1D+
PX1D+
PX1EPX1EPX1EPX1E+
PX1E+
PX1E+
PX2APX2APX2APX2A+
PX2A+
PX2A+
PX2BPX2BPX2BPX2B+
PX2B+
PX2B+
PX2CPX2CPX2CPX2C+
PX2C+
PX2C+
PX2CLKPX2CLKPX2CLKPX2CLK+
PX2CLK+
PX2CLK+
PX2DPX2DPX2DPX2D+
PX2D+
PX2D+
PX2EPX2EPX2EPX2E+
PX2E+
PX2E+
R_L
R_L
RC
RC1
RC1
RC1
RC2
RC2
RC2
RESET_DEMOD
RESET_DEMOD
REV
RF_AGC
RF_AGC
RF_AGC_SW
RF_AGC_SW
RIGHT_SPEAKER
ROM_SCL
ROM_SCL
ROM_SDA
ROM_SDA
RP
RP
SAV_L_IN
SAV_L_IN
SAV_R_IN
SAV_R_IN

B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B05
B06A
B08B
B08B
B08D
B04D
B04D
B06B
B08A
B04D
B06B
B08A
B03
B04D
B08B
B02B
B04D
B02B
B04D
B04A
B08B
B08D
B08B
B08D
B06C
B07
B06C
B06D
B06C
B06D

(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(2 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )
(1 )

SCL_VGA
SCL_VGA
SCL-DISP
SCL-LCD
SCL-LCD
SCL-MAIN
SCL-MAIN1
SCL-MAIN1
SCL-TCON
SCL-TCON
SDA_VGA
SDA_VGA
SDA-DISP
SDA-LCD
SDA-LCD
SDA-MAIN
SDA-MAIN1
SDA-MAIN1
SDA-TCON
SDA-TCON
SELLVDS
SELLVDS
SENSE+1V0_MT5363
SENSE+1V0_MT5363
SGND1
SIF_OUT
SIF_OUT
SIF_OUT_GND
SIF_OUT_GND
SOG
SOG
SOY0
SPB0P
SPB0P
SPB1P
SPB1P
SPR0P
SPR0P
SPR1P
SPR1P
STANDBY
STANDBY
STANDBYn
SW_MUTE
SW_MUTE
SY0N
SY0N
SY0P
SY0P
SY1N
SY1N
SY1P
SY1P
TSO_CLK
TSO_CLK
TSO_DATA0
TSO_DATA0
TSO_SYNC
TSO_SYNC
TSO_VALID
TSO_VALID
TUNER_SCL
TUNER_SCL
TUNER_SCL
TUNER_SDA
TUNER_SDA
TUNER_SDA
U_D
U_D
U_D_INV
UART_RX
UART_TX
USB_DM
USB_DM
USB_DP
USB_DP
USB_OCP
USB_OCP
USB_PWR_EN
USB_PWR_EN

B07 (1 )
B08D (1 )
B04D (1 )
B04D (1 )
B08A (1 )
B04D (4 )
B04D (1 )
B08A (1 )
B08B (1 )
B08D (4 )
B07 (1 )
B08D (1 )
B04D (1 )
B04D (1 )
B08A (1 )
B04D (4 )
B04D (1 )
B08A (1 )
B08B (1 )
B08D (4 )
B08B (1 )
B08D (1 )
B02A (1 )
B04B (1 )
B08C (15 )
B02B (1 )
B06C (1 )
B02B (1 )
B06C (1 )
B06C (1 )
B07 (1 )
B06C (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B02A (1 )
B04D (1 )
B04D (1 )
B04A (1 )
B04D (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B06C (1 )
B06D (1 )
B03 (1 )
B04D (1 )
B03 (1 )
B04D (1 )
B03 (1 )
B04D (1 )
B03 (1 )
B04D (1 )
B02B (1 )
B03 (1 )
B04D (1 )
B02B (1 )
B03 (1 )
B04D (1 )
B08B (1 )
B08D (1 )
B08B (1 )
B04D (2 )
B04D (2 )
B04D (1 )
B06E (1 )
B04D (1 )
B06E (1 )
B04D (1 )
B06E (1 )
B04D (1 )
B06E (1 )

VCC_3V3
VCC_3V3
VCC_3V3
VCC1V8
VCC1V8
VCOM
VCOM
VDD1V8
VDD1V8PLL
VDD3V3IO
VDD3V3LVRS
VGH_35V
VGH_35V
VGL_-6V
VH0
VH127
VH159
VH191
VH247
VH255
VH31
VH63
VH95
VIF1
VIF2
VL0
VL127
VL159
VL191
VL247
VL31
VL63
VL95
VLS_15V6
VLS_15V6
VLS_15V6_B
VREF_15V2
VREF_15V2
VSYNC
VSYNC
WP_TCON
Y0N
Y0P

B08B (4 )
B08C (3 )
B08D (8 )
B08B (4 )
B08C (1 )
B08D (1 )
B08E (1 )
B08B (2 )
B08B (2 )
B08B (2 )
B08B (2 )
B08B (1 )
B08C (1 )
B08C (2 )
B08D (1 )
B08D (3 )
B08D (1 )
B08D (1 )
B08D (1 )
B08D (1 )
B08D (2 )
B08D (2 )
B08D (2 )
B02B (2 )
B02B (2 )
B08D (1 )
B08D (3 )
B08D (1 )
B08D (1 )
B08D (1 )
B08D (2 )
B08D (2 )
B08D (2 )
B08C (3 )
B08D (4 )
B08C (2 )
B08D (1 )
B08E (1 )
B06C (1 )
B07 (1 )
B08D (1 )
B06C (1 )
B06C (1 )

SRP LIST PART 1

2010-01-22

3139 123 6483


18980_520_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 67

IR/LED Board

IR/LED board

+3.3V
R12
47
J1

+3.3V

R4
6.8k

U1
4
3
2

J2
3
2
1
2.0- 3pin

+3.3V
Keyboard
VSS

RED

10F

R6
0

C1

Q2*

VDD

2.0- 8pin

D2

VSS
R3
100

R9
LED2

OUT

B
10k

+5V
Keyboard
LED1
+3.3V
LED2
IR
VSS
LIGHT

BC847

GND
3

8
7
6
5
4
3
2
1

IR

R10

GND

10k

IRM-H636

VSS

VSS

IR/LED

2009-12-09

YKJ2035
18980_530_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 68

Layout IR/LED Board

Layout IR/LED Board (Top Side)

Layout IR/LED Board (Bottom Side)


12NC
XXXXXX-X0001
1

IR/LED

2009-12-09

YKJ2035
18970_531_100323.eps
100323

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 69

Keyboard Control Board

Keyboard Control Board

+3.3V
J1
3
2
1
R4
1.5k

CON3 VSS
C2
103

R5
3.9k

R6
5.6k

R7
18k

R8
8.2k

VSS

VSS

VSS

VSS

VSS

VSS

VSS

CH+

CH

HOME

VOL+

VOL

POWER

SIDE CONTROL

2009-09-10

SF2035/SF2037
18980_540_100329.eps
100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 70

Layout Keyboard Control Board

Layout Keyboard Control Board

SIDE CONTROL

2009-09-10

SF2035/SF2037
18970_541_100323.eps
100323

2010-Apr-06

Styling Sheets

LC10.1L LA

11.

EN 71

11. Styling Sheets


Styling Sheet Dali 32" - 40"

DALI 32"- 40"

0045
0021
0024

0012

0260

Pos No.
0004
0012
0021
0024
0045
0260
1085

0004

Description
Front Cabinet
Back Cover
I/O Bracket Side
I/O Bracket Bottom
Speaker bracket
Stand
Remote Control

Remarks

Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


18980_800_100329.eps
100329

2010-Apr-06

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