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Bao Cao LVTN TranQuoc Hoan0 PDF
Bao Cao LVTN TranQuoc Hoan0 PDF
Mc lc
Mc lc ............................................................................................................................1
Tm tt lun vn ..............................................................................................................4
Chng 1
TNG QUAN V B NGHCH LU P ....................................................................5
1. Gii thiu tng qut..............................................................................................5
1.1 B nghch lu p ...........................................................................................6
1.2 Phn loi b nghch lu p............................................................................6
2. Cc dng cu trc c bn ca b nghch lu p a bc........................................7
2.1 Cu trc dng Diode kp NPC (Diode Clamped Multilevel Inverter) .........7
2.2 Cu trc dng t in thay i (Flying Capacitor Multilevel Inverter)........9
2.3 Cu trc dng ghp tng (Cascade Inverter)...............................................10
2.4 So snh s linh kin s dng trong 3 dng nghch lu p a bc trn........12
3. Nhn xt..............................................................................................................12
Chng 2
CU TRC B NGHCH LU P A BC DNG CASCADE ............................13
1. B nghch lu p cu 1 pha ................................................................................13
2. B nghch lu p a bc dng cascade...............................................................14
Chng 3
IU KHIN B NGHCH LU P A BC DNG CASCADE PHNG
PHP IU CH RNG XUNG (Carrier based PWM).....................................17
1. Tng qut v k thut iu ch rng xung PWM ......................................17
1.1 Mt s ch tiu nh gi k thut PWM ca b nghch lu .......................17
1.2 Cc dng sng mang dng trong k thut PWM ........................................18
2. Phng php iu ch rng xung Sin (Sin PWM) ........................................20
2.1 Nguyn tc thc hin ..................................................................................20
2.2 M phng cho b nghch lu p cascade 5 bc ..........................................21
2.3 Kt qu m phng .......................................................................................26
2.4 Nhn xt ......................................................................................................29
SVTH: Trn Quc Hon 1/102
Lun Vn Tt Nghip GVHD: Ts Nguyn Vn Nh
Tm tt lun vn
Chng 1
TNG QUAN V B NGHCH LU P
1.1 B nghch lu p
Bng 1.2 so snh s linh kin c s dng trong mi pha ca 3 dng nghch lu
k trn. Ta thy, s cng tc IGBT v s diode mc i song c s dng trong mi
dng nghch lu cng bc l nh nhau. Diode kp th khng cn trong dng t thay i
v dng cascade inverter, trong khi t cn bng th khng cn cho dng diode kp
v cascade inverter. Tm li, dng cascade inverter l s dng t linh kin nht.
Bng 1.2: So snh s linh kin trong 1 pha ca 3 dng nghch lu.
Cu hnh
Diode kp NPC T thay i Cascade inverter
nghch lu
Cng tc IGBT 2(n-1) 2(n-1) 2(n-1)
Diode i song 2(n-1) 2(n-1) 2(n-1)
Diode kp (n-1)(n-2) 0 0
T trn ngun DC (n-1) (n-1) (n-1)/2
T cn bng 0 (n-1)(n-2)/2 0
3. Nhn xt
Chng 2
CU TRC B NGHCH LU P A BC DNG CASCADE
1. B nghch lu p cu 1 pha
Trng thi ng ngt cc cng tc trong 1 nhnh pha phi tha mn iu kin kch
ng i nghch:
S1x + S4x = 1; S2x + S3x = 1 (2.2)
S1x + S4x = 1; S2x + S3x = 1
Ty theo trng thi ng ngt, in p pha tm ngun DC (phase to pole
voltage) ca b nghch lu c tnh theo cng thc sau:
Vx out = Vxo = Vx 01 + Vx 02 (2.3)
Vi x = A, B, C
Chng 3
IU KHIN B NGHCH LU P A BC DNG
CASCADE PHNG PHP IU CH RNG
XUNG (Carrier based PWM)
I
j 1
2
( j)
THDI = (3.2)
I (1)
I
j =2
2
( j)
I 2 I (21)
THDI = = (3.3)
I (1) I (1)
Hai sng mang k cn lin tip nhau s b dch 180 - APOD (Alternative
Phase Opposition Disposition)
2.3 Kt qu m phng
2.4 Nhn xt
if(a>b)
{
if(a>c)
{
vmax = a;
if(b>c) { vmin = c;}
else { vmin = b;}
}
else { vmin = b; vmax = c;}
}
else
{
if(b>c)
{
vmax = b;
if(a>c) { vmin = c;}
else { vmin = a;}
}
else { vmax = c; vmin = a;}
}
voffset = (vmax + vmin)/2;
vasfo = a - voffset;
vbsfo = b - voffset;
vcsfo = c - voffset;
// Gan gia tri cho cac ngo ra
out[0] = vmax;
out[1] = vmin;
out[2] = voffset;
out[3] = vasfo;
out[4] = vbsfo;
out[5] = vcsfo;
}
}
3.1.2 Cc thng s m phng trong Psim
S m phng b nghch lu p 5 bc dng cascade theo phng php SFO
PWM (bn v A3). Cc thng s trong m phng:
Ch s iu ch m = 0.8.
Sng iu khin c tn s 50Hz, sng mang dng PD tn s 2000Hz.
Cc ngun DC c gi tr Vd = 200V.
Ti RL u dng sao c R = 5 , L = 0.01H (cos =0.85), hng s thi
L
gian = = 2 ms.
R
S dng khi DLL vi chng trnh nh trn.
3.2 Kt qu m phng
3.3 Nhn xt
Chng 4
IU KHIN B NGHCH LU P A BC DNG
CASCADE - PHNG PHP IU CH VECTOR
KHNG GIAN (Space Vector PWM)
Phng php iu ch vector khng gian (Space vector modulation hoc Space
vector PWM) xut pht t nhng ng dng ca vector khng gian trong my in
xoay chiu, sau c m rng trin khai trong cc h thng in ba pha. Phng
php iu ch vector khng gian v cc dng ci bin ca n c tnh hin i, gii
thut ch yu da vo k thut s v l cc phng php c s dng ph bin nht
hin nay trong lnh vc in t cng sut lin quan n iu khin cc i lng xoay
chiu ba pha nh iu khin truyn ng in xoay chiu, iu khin cc mch lc tch
cc, iu khin cc thit b cng sut trn h thng truyn ti in.
1.1 Vector khng gian v php bin hnh vector khng gian
va = Vm.cos(x- )
2
vb = Vm.cos(x- - )
3
4
vc = Vm.cos(x- - )
3
Vector khng gian theo nh ngha s l:
2
v = k.(va + a .vb + a .vc)
2 2 2 4
v = [Vm.cos(x- ) + a .Vm.cos(x- - ) + a .Vm.cos(x- - )]
3 3 3
ka = -2, -1, 0, 1, 2
kb = -2, -1, 0, 1, 2 (4.4)
kc = -2, -1, 0, 1, 2
Cc h s ka, kb, kc ph thuc vo cch ta quy c trc, cc quy c ny da vo
bng trng thi ng ngt. Chng hn, ta quy c nh sau:
ka = -2 khi S3a = S4a = S3a = S4a = 1
S1a = S 3a = S '3a = S '4a = 1
S 2a = S 4a = S '3a = S '4a = 1
ka = -1 khi
S 3a = S 4a = S '1a = S '3a = 1
S 3a = S 4a = S '2a = S '4a = 1
S1a = S 2a = S '3a = S '4a = 1
S 3a = S 4a = S '1a = S '2a = 1
S1a = S 3a = S '1a = S '3a = 1
ka = 0 khi (4.5)
S1a = S 3a = S '2a = S '4a = 1
S 2a = S 4a = S '1a = S '3a = 1
S 2a = S 4a = S '2a = S '4a = 1
S1a = S 2a = S '1a = S '3a = 1
S1a = S 2a = S '2a = S '4a = 1
ka = 1 khi
S1a = S 3a = S '1a = S '2a = 1
S 2a = S 4a = S '1a = S '2a = 1
ka = 2 khi S1a = S2a = S1a = S2a
tng t cho kb, kc.
Trong qu trnh ng ngt, quy lut ng ngt i nghch phi c tun th:
S1x + S4x = 1; S2x + S3x = 1
S1x + S4x = 1; S2x + S3x = 1 (4.6)
Vi x = a, b, c.
Theo nh ngha vector khng gian, tng ng 125 trng thi kch dn linh kin ta
thu c 61 v tr vector khng gian ca vector in p to thnh. Ti tm ca lc gic
c nm trng thi khc nhau cho cng v tr ti l vector khng. Cc v tr cn li
ng vi cc trng thi c biu din trong gin vector sau:
-221 021 -10-1 121 221 00-1 10-1 210 20-1 2-1-2
-121 010 -2-1-2 -1-1-2 110
-210 -110 0-1-2
-20-1 1-1-2
thc hin bng cch iu khin duy tr tc dng theo trnh t vector v1 trong thi gian
T1, vector v 2 trong thi gian T2 v vector v3 trong thi gian T3 theo h thc:
thi gian duy tr trng thi vector v1 , v 2 v v3 c th biu din di dng ma trn sau:
(4.8)
Vi V 1 , V 2 , V 3 ,V 1 , V 2 , V 3 l cc thnh phn theo trc ta v
(4.9)
Hay dng thi gian tng i: d j = T j / Ts ; j = 1, 2, 3
(4.10)
p dng c th vo bn din tch hnh tam gic trong gc phn su th nht ca
hnh lc gic, ch n vector c bn trong mi din tch trn, ta thu c kt qu:
Trong din tch (1), vector v bn v0 , v1 v v 4 :
d 1 = d v 0 = 1 - d 2 - d 3 = 1- m a .(sin + 3 .cos )
d 1 = d v1 = 2 - m a .(sin + 3 .cos )
d 3 = d v 4 = 1 + ma.(sin - 3 .cos )
d 1 = d v 4 = 2 ma.(sin + 3 .cos )
d 2 = d v 5 = -1 + 2.ma.sin (4.14)
d 3 = d v 3 = ma.(-sin + 3 .cos )
V
Vi V = V2 + V2 ; = (4.15)
V
3. Nhn xt
Phng php iu ch vector khng gian cho php iu khin tuyn tnh tt, hiu
qu cao, rt cn thit cho cc h t ng iu khin. N m ra mt l thuyt thc
hnh iu khin mi c cht lng cao cho vic chuyn i nng lng in t cc
ngun DC sang AC. Tuy nhin, phng php iu ch vector khng gian vn cn tn
ti mt s nhc im nh: i hi b vi x l c kh nng tnh ton cao v b nh
ln, vic tnh ton cng phc tp khi s bc ca b nghch lu tng ln, lp trnh gii
thut kh phc tp
Chng 5
IU KHIN B NGHCH LU P A BC DNG
CASCADE PHNG PHP IU CH VECTOR
KHNG GIAN DNG SNG MANG
1. Tng qut v phng php iu ch vector khng gian dng sng mang
Da trn c s l thuyt phn tch tng quan gia SVPWM v sng mang n
cc (carrier based unipolar PWM), phng php iu ch vector khng gian dng
sng mang thc cht l to ra mt sng iu ch mi c nhiu u im hn so vi cc
sng iu ch c.
Cc tc gi a ra gii thut iu ch da trn phn tch cho b nghch lu p
a bc dng diode kp NPC.
in p iu ch ca b nghch lu p a bc c th c phn tch thnh cc
thnh phn nh sau:
V x = v x .Vdc ; vi x = a, b, c (5.8)
T y ta s c cc tn hiu tng ng: vxref, vxref, vx12, v0ref, v0add.
Gii thut ca phng php iu ch vector khng gian dng sng mang c th
c biu din tng qut thng qua s khi sau:
L(x) = H(x) 1
Vi n(x) = Int(vxp) ; x = a, b, c
Thnh phn active voltages vx12 c th c suy ra t v tr ca vector
in p tng ng trong gin vector in p:
va12 = Vref.cos
vb12 = Vref.cos( 2 / 3 ) (5.12)
vc12 = Vref.cos( 4 / 3 )
Primitive common mode: nm trong gii hn ca v0max v v0min. Thnh
phn ny khng nh hng n in p ti, nhng n lm thay i
dng tn hiu iu ch v ng gp vo vic lm gim s ln chuyn
mch trong mt chu k.
Max = Max (va12, vb12, vc12)
Min = Min (va12, vb12, vc12) (5.13)
i vi b nghch lu p n bc, hai gi tr common mode cc tr l:
v0min = - Min
v0max = (n-1) Max (5.14)
Hai gi tr c th chn ca in p primitive common mode:
Medium common mode:
v0p = (v0max + v0min) / 2 (5.15)
Minimum common mode:
v0 max khi v0 max < (n 1) / 2
v0p = (n 1) / 2 khi v0 max (n 1) / 2 v0 min (5.16)
v v0 min > (n 1) / 2
0 min khi
Hnh 5.4: Thut ton ca primitive common mode v phase to pole voltages.
Minh ha mi quan h gia cc tn hiu in p v dng sng mang PD trong b
nghch lu p 5 bc dng diode kp NPC:
Hnh 5.6: Additional common mode i vi trng hp PWM lin tc, v0add = d0.
Discontinuous PWM methods (ch PWM gin on): sng iu ch
dng gin on. u im ca sng iu ch dng gin on l s ln
chuyn mch trong mt chu k b gim xung, do cng sut tn hao
do qu trnh ng ngt cng gim theo.
d min H khi d min H < d min L
v0add = (5.21)
d min L khi d min H > d min L
Lc = 3;
}
else
{
Hc = int(vcp) + 1;
Lc = Hc - 1;
}
vHc = Hc - vcp;
vcL = vcp - Lc;
// Tinh gia tri dminH
if(vHa < vHb)
{
if(vHa < vHc)
{
dminH = vHa;
}
else { dminH = vHc;}
}
else
{
if(vHb < vHc)
{
dminH = vHb;
}
else { dminH = vHc;}
}
// Tinh gia tri dminL
if(vaL < vbL)
{
if(vaL < vcL)
{
dminL = vaL;
}
else { dminL = vcL;}
}
else
{
if(vbL < vcL)
{
dminL = vbL;
}
else { dminL = vcL;}
}
// Tinh gia tri Additional common mode va Modulating signals
voadd = (dminH - dminL)/2;
vaSVM = vap + voadd;
vbSVM = vbp + voadd;
vcSVM = vcp + voadd;
// Gan gia tri cho cac ngo ra
out[0] = vap;
out[1] = vaSVM;
out[2] = vbp;
out[3] = vbSVM;
out[4] = vcp;
out[5] = vcSVM;
out[6] = vop;
SVTH: Trn Quc Hon 59/102
Lun Vn Tt Nghip GVHD: Ts Nguyn Vn Nh
out[7] = vomax;
out[8] = vomin;
out[9] = voadd;
}
}
3.1.2 Kt qu m phng
vomax = 4-Max;
vomin = -Min;
// Minimum common mode
if(vomax < 2) {vop = vomax;}
if((vomax >= 2)&&(vomin <= 2)) {vop = 2;}
if(vomin > 2) {vop = vomin;}
vap = a + vop;
vbp = b + vop;
vcp = c + vop;
// Tinh cac gia tri vHx, vxL
if (vap == 4)
{
Ha = 4;
La = 3;
}
else
{
La = int(vap);
Ha = La + 1;
}
vHa = Ha - vap;
vaL = vap - La;
if (vbp == 4)
{
Hb = 4;
Lb = 3;
}
else
{
Lb = int(vbp);
Hb = Lb + 1;
}
vHb = Hb - vbp;
vbL = vbp - Lb;
if (vcp == 4)
{
Hc = 4;
Lc = 3;
}
else
{
Lc = int(vcp);
Hc = Lc + 1;
}
vHc = Hc - vcp;
vcL = vcp - Lc;
// Tinh gia tri dminH
if(vHa < vHb)
{
if(vHa < vHc)
{
dminH = vHa;
}
else { dminH = vHc;}
}
else
SVTH: Trn Quc Hon 67/102
Lun Vn Tt Nghip GVHD: Ts Nguyn Vn Nh
{
if(vHb < vHc)
{
dminH = vHb;
}
else { dminH = vHc;}
}
// Tinh gia tri dminL
if(vaL < vbL)
{
if(vaL < vcL)
{
dminL = vaL;
}
else { dminL = vcL;}
}
else
{
if(vbL < vcL)
{
dminL = vbL;
}
else { dminL = vcL;}
}
// Tinh gia tri Additional common mode va Modulating signals
if(dminH < dminL) { voadd = dminH; }
if(dminL < dminH) { voadd = -dminL; }
if(dminH == dminL)
{
if(vop < 2) { voadd = dminH; }
else { voadd = -dminL; }
}
vaDPWM = vap + voadd;
vbDPWM = vbp + voadd;
vcDPWM = vcp + voadd;
// Gan gia tri cho cac ngo ra
out[0] = vap;
out[1] = vaDPWM;
out[2] = vbp;
out[3] = vbDPWM;
out[4] = vcp;
out[5] = vcDPWM;
out[6] = vop;
out[7] = vomax;
out[8] = vomin;
out[9] = voadd;
}
}
3.3.2 Kt qu m phng
4. Nhn Xt
Chng 6
IU KHIN B NGHCH LU A BC DNG CASCADE
VI NGUN DC KHNG CN BNG
K thut Carrier based PWM v Space Vector PWM trn y c pht trin trn
c s cc ngun DC n nh v cn bng, khi gin vector l h tnh bt bin.
Tuy nhin trong thc t, cc ngun DC thng khng cn bng v in p ca chng
khng n nh. Ly v d trong b nghch lu a bc cu hnh NPC, in p trn cc t
in lun dao ng theo thi gian v khi gin vector l mt h ng, bin thin
theo thi gian. Cn trong trng hp ca b nghch lu dng cascade, th khi in p
ngun cho cc b nghch lu cu mt pha c ly t h thng in thng qua cc b
chnh lu, th cc in p ny cng dao ng ty theo h thng cung cp. Do , vi
k thut iu khin ging nh trong trng hp ngun DC cn bng v n nh th s
cho ra kt qu dng in ti b mo dng v xut hin cc thnh phn sng hi bc
thp, nh hng n ph ti
1.2 Kt qu m phng
2.1 Nguyn l iu ch
E xref
xref = ; 0 xref 1 (6.13)
Vdx
Hnh 6.14: S gii thut ca phng php iu ch vector khng gian dng sng
mang trong trng hp ngun DC khng cn bng.
n gin ta thc hin cc php phn tch trn mt pha (v d pha A), cc pha
cn li tng t. Nh bit mi b nghch lu cu 1 pha c th to ra 3 mc in p
ng ra: b nghch lu H1 c th to c (-Va1, 0, +Va1) v b nghch lu H2 cng
c th to c (-Va2, 0, +Va2). Do khi 2 b nghch lu cu 1 pha vi ngun DC
khc nhau ghp ni tip th c th to ra ti a 9 bc in p, v d khi Va1 > Va2 ta
c:
a)
b)
Hnh 6.17: Mt s trng hp b tr sng mang v mc in p DC to c.
Trong lun vn ny chn cch b tr sng mang nh H6.17a, v theo cch b tr
sng mang ny s t c s cn bng cng sut gia 2 b nghch lu cu mt pha
( trnh by trong chng 3 phn 2.2.2).
Tng t nh trng hp ngun DC cn bng, vi cch phn b ca cc ngun
DC nh H6.17a th s gp kh khn trong vic xc nh cc bc in p H(x), L(x) v
SVTH: Trn Quc Hon 86/102
Lun Vn Tt Nghip GVHD: Ts Nguyn Vn Nh
cc mc in p VH(x), VL(x) khi thc hin phng php iu ch vector khng gian
dng sng mang trong vng iu ch c Vref < 0. Do , ta thc hin php bin i
tng ng sau:
Hnh 6.20: Biu din cc php bin i trong gii thut ca b nghch lu cacscade.
a = in[6];
b = in[7];
c = in[8];
// Tinh gia tri Primitive Phase to Pole Voltage Vxp
if(a>b)
{ if(a>c)
{ Max = a;
if(b>c) { Min = c;}
else { Min = b;}
}
else { Max = c; Min = b;}
}
else
{ if(b>c)
{ Max = b;
if(a>c) { Min = c;}
else { Min = a;}
}
else { Max = c; Min = a;}
}
vomax = 4-Max;
vomin = -Min;
// Tinh Medium Common Mode
vop = (vomax + vomin)/2;
vap = a + vop;
vbp = b + vop;
vcp = c + vop;
// Tinh cac muc dien ap trung binh
Vda = (Va1 + Va2)/2;
va1 = Va1/Vda;
va2 = Va2/Vda;
Vdb = (Vb1 + Vb2)/2;
vb1 = Vb1/Vdb;
vb2 = Vb2/Vdb;
Vdc = (Vc1 + Vc2)/2;
vc1 = Vc1/Vdc;
vc2 = Vc2/Vdc;
// Tinh Eha, Earef
if(vap<=va2) {Eha = va2-vap; Earef = vap;}
else if(vap<=2) {Eha = 2-vap; Earef = vap-va2;}
else if(vap<=(2+va1)) {Eha = 2+va1-vap; Earef = vap-2;}
else {Eha = 4-vap; Earef = vap-(2+va1);}
// Tinh Ehb, Ebref
if(vbp<=vb2) {Ehb = vb2-vbp; Ebref = vbp;}
else if(vbp<=2) {Ehb = 2-vbp; Ebref = vbp-vb2;}
else if(vbp<=(2+vb1)) {Ehb = 2+vb1-vbp; Ebref = vbp-2;}
else {Ehb = 4-vbp; Ebref = vbp-(2+vb1);}
// Tinh Ehc, Ecref
if(vcp<=vc2) {Ehc = vc2-vcp; Ecref = vcp;}
else if(vcp<=2) {Ehc = 2-vcp; Ecref = vcp-vc2;}
else if(vcp<=(2+vc1)) {Ehc = 2+vc1-vcp; Ecref = vcp-2;}
else {Ehc = 4-vcp; Ecref = vcp-(2+vc1);}
// Tinh EminH, EminL
if((Eha<=Ehb)&&(Eha<=Ehc)) {EminH = Eha;}
if((Ehb<=Eha)&&(Ehb<=Ehc)) {EminH = Ehb;}
if((Ehc<=Eha)&&(Ehc<=Ehb)) {EminH = Ehc;}
SVTH: Trn Quc Hon 90/102
Lun Vn Tt Nghip GVHD: Ts Nguyn Vn Nh
4. Nhn xt
Kt lun
[1] Nguyn Vn Nh, Gio trnh in t cng sut 1, Nh xut bn i hc Quc gia
Thnh ph H Ch Minh, 2002.
[2] Nguyn Vn Nh & Hong Hee Lee, Analysis of Carrier Based PWM Methods
Based on Optimization of Voltage Errors.
[3] Nguyn Vn Nh & Hong Hee Lee, Theoretical Analysis of Carrier Algorithms
For Multilevel Inverters with Unbalanced DC Voltages.
[4] Nguyn Vn Nh & Hong Hee Lee, Optimized Discontinuous PWM Algorithm
with Variable Load Power Factor for Multilevel Inverters.
[5] Nguyn Quang Tin, K thut PWM, Lun vn tt nghip i hc, Trng i
hc Bch Khoa Tp HCM, 2006.
[6] Nguyn B Mch, Nghin cu k thut iu ch PWM cho b nghch lu a bc
vi ngun p DC khng cn bng, Lun vn Thc s, Trng i hc S Phm K
Thut Tp HCM, 2006.
[7] Phm Xun H, So snh cc k thut iu ch gin on cho b nghch lu p a
bc, Lun vn Thc s, 2006.