ECEN 2350 - Digital Logic Peter Mathys, Fall 2016 Be Hs IN& Altera ModelSim: Functional Simulation Example “This page describes how to set up and run a functional simulation in era ModelSim v10.14 (bundled with Quartus I v13.0) We look at the folowing problem inthe boot 2.63 Write Verilog code to implement the function f (x1, 22,15) = m0, 1, 3,4, 5,6) using the continuous assignment. Start MogelSin-Altra by cieking on "‘ModelSimAtera 10,14 (Quartus I 13.0sp1)" under “Star [jenn a He nine Ey sino ip venison vt LT nen [ie ose Ni ewes Es Jo ware [e teinrs »D neers nates 1 Sets PB ccancse Ome 1 sontate sae Eee @ tested (Simkin . JS iro sat > a : Welcome to version 10.1d “This eleare wes the following licensing version! FLEXnel VIN 615, ‘Mentor Grophiss Liceusing MSL 201 L with MGLS 19 441 and PCLS 39.4.5. Access comprehensive ModelSim dostmentaton: Select Help > ModelSim PDF Bookcase ‘there —umestact_| ctu lek on “Jumpstart” and select "Creat roctory foreach new projec. Project”. Start by antoring a Project Name and a Project Location as shown below. is advisable to create a soparato— ss (Ffuodedsia azeraogeteia. int Orowem.| aoa ox | con | Click "OK". On the "Aad tems tothe Project” screen click “Create New Fle" and enter a fle name (same as module name) forthe Verllog medule tobe crated, 2.69 in his case. Be sure to add the fleas type "Verlag" as shown below. [ee ael tat [44-96-45 [seem ere Cahontnton ate ati 4 a =n festiog sl a "| Is soasingpechese rae an Fontes [Soten iam T Create a second naw Veriog fle named p2_63_tb, This wil be used fr the testbench modula that drives the functional simulation of he p2_63 modula. Then click on "Close": You should now see the Project Window withthe names ofthe Swo new files that were created. Right-click ona fla you wish to ec, e.g, p2_ 63.” as shown nextie EY cng cmuute Aa! ona Tony Laat Code Wan Tab [S-s8e01 um “WE wm] OAM] Pa Tee S|) mow wl Fontes [Semen iene [aoc | Enter the desired Verilog module code, «9, for module p2_63, ee eae oar dna ER B-sWSS sRAOSO-AE DM] GHAR] TAT gas Caine on ai [crue Fearniroemcr ape [Seti I ese Swit UMTemsorH 2 Vien 20 : Te GEO | Promina [atmos [econ To compile a module, right-click on isle name and solet “Compile Selected” as follows,es re eee nl Pent ae eee [5-856 .R8021C-ArR|| Shas] tarikas cobra Eis Ws 4-98-4 [zoe rene Fete RowiOm Oa ieaLe ‘tthe end ofthe simulation the resulting waveforms are dsplayed inthe wave montor as shown below. mt f Ed ei Yen cine Smuts ais Wore Toss uot seinete Unio hob 5-024) 4 RO 52 10-AEW) GHAR] tesim| wen daRamS wwe i XOX o) 8) % |] ee Famatace = si|)8-3-99-8)| 7 fet ale |] Vals a ones EH TAR Tes Gio otak a tas) gacinar = [rlveteee Ic [eter jane 8 Gorm tt: fre a) irae] fa) « arene iekiw Fone Mowltbre Dod re RAINS To viow the results in more deta rght-cck onthe wave meritor pare and select "Zoom fulFe Er Cpe Sr A Mire Toys eae Wee Oe 5-882S149892/0-AEw| S204] Gtes a ws me iaae oo fimace >| =l]) 8-8-9 8-8]) ee wl |] le a Belo RS 88888 mT e Qaeesur a Een Secure EAN Geer aie) iekiw Fone Mowltbre Dod re RAINS Now you can check the corractness of the output signal generat by the module under test. The vector of input bts s shown inthe count variable trace and the Irdivgual input sare shown inthe x1, x2, x3 aces. | Enoae i ed ei Yen cine Smuts ais Wore Toss uot seinete Unio hob 5-024) 4 RO 52 10-AEW) GHAR] tesim| wen daRamS wwe i XOX 2) 8) % |] me amare =| | s:3-98-S)/ Reis ale |] mls as cies Ber 4 & /aaaa Cemw@ioe i Bos Se Pa Sisexmnurs Feo ei Bom iha fre ra al Sco oS Tabi Fone Mowltbre Dod eR In this example fs supposed to be high forall input values except 010 and 11. tis easily sean in the wave monitor that tise true and thus the functional simulation Vested tha correctness of fe MUT p2_63. B® H2& N&