Digital signal processing algorithms typically require a large number of mathema

tical operations to be performed quickly and repeatedly on a series of data samp

les. Signals (perhaps from audio or video sensors) are constantly converted from
analog to digital, manipulated digitally, and then converted back to analog for
m. Many DSP applications have constraints on latency; that is, for the system to
work, the DSP operation must be completed within some fixed time, and deferred
(or batch) processing is not viable.
Most general-purpose microprocessors and operating systems can execute DSP algor
ithms successfully, but are not suitable for use in portable devices such as mob
ile phones and PDAs because of power efficiency constraints.[3] A specialized di
gital signal processor, however, will tend to provide a lower-cost solution, wit
h better performance, lower latency, and no requirements for specialised cooling
or large batteries.[citation needed]
Such performance improvements have led to the introduction of digital signal pro
cessing in commercial communications satellites where hundreds or even thousands
of analogue filters, switches, frequency converters and so on are required to r
eceive and process the uplinked signals and ready them for downlinking, and can
be replaced with specialised DSPs with a significant benefits to the satellites
weight, power consumption, complexity/cost of construction, reliability and flex
ibility of operation. For example, the SES-12 and SES-14 satellites from operato
r SES, both intended for launch in 2017, are being built by Airbus Defence and S
pace with 25% of capacity using DSP.[4]
The architecture of a digital signal processor is optimized specifically for dig
ital signal processing. Most also support some of the features as an application
s processor or microcontroller, since signal processing is rarely the only task
of a system. Some useful features for optimizing DSP algorithms are outlined bel
ow.