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    Umair Saif
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    LIST OF EXPERIMENTS Software: Xilinx ISE 1. Introduction to VHDL. 2. Design of basic Gates: NOT, AND, OR. 3. Design of Universal Gates. 4. Design of 2:1 MUX using basic gates. 5. Design of Half Adder, Full Adder Half Substractor. 6. Design of binary to gray code converter 7. Design of 3:8 Decoder. 8. Design of all Flip-Flops. 9. Design of counters. 10. Design of Synchronous Johnson Counter.

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    LIST OF EXPERIMENTS Software: Xilinx ISE 1. Introduction to VHDL. 2. Design of basic Gates: NOT, AND, OR. 3. Design of Universal Gates. 4. Design of 2:1 MUX using basic gates. 5. Design of Half Adder, Full Adder Half Substractor. 6. Design of binary to gray code converter 7. Design of 3:8 Decoder. 8. Design of all Flip-Flops. 9. Design of counters. 10. Design of Synchronous Johnson Counter.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    11 views1 page

    Ece 4th Semester Lab Btec407

    Uploaded by

    Umair Saif
    LIST OF EXPERIMENTS Software: Xilinx ISE 1. Introduction to VHDL. 2. Design of basic Gates: NOT, AND, OR. 3. Design of Universal Gates. 4. Design of 2:1 MUX using basic gates. 5. Design of Half Adder, Full Adder Half Substractor. 6. Design of binary to gray code converter 7. Design of 3:8 Decoder. 8. Design of all Flip-Flops. 9. Design of counters. 10. Design of Synchronous Johnson Counter.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    ECE 4TH SEMESTER LAB

    (BTEC-407)

    LIST OF EXPERIMENTS

    Software: Xilinx ISE

    1. Introduction to VHDL.

    2. Design of basic Gates: NOT, AND, OR.

    3. Design of Universal Gates.

    4. Design of 2:1 MUX using basic gates.

    5. Design of Half Adder, Full Adder Half Substractor.

    6. Design of binary to gray code converter

    7. Design of 3:8 Decoder.

    8. Design of all Flip-Flops.

    9. Design of counters.

    10. Design of Synchronous Johnson Counter.

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