Am2716B/Am2732B 2048 x 8-Bit/4096 x 8-Bit EPROM ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS ‘© Fast access times —as low as 100 ns © Low-power dissipation © Programming voltage — 12.5 V © Single +5:V power supply (© TTLcompatible inputs and outputs ‘© £10% power-supply tolerance avaliable GENERAL DESCRIPTION The Am2716B and Am27328 are ultraviolet Erasable Programmable ReadOnly Memories (EPROMs) and aro organized a8 2048 x8 bits, and 4096 x8 bits, respectivoy. Al standard EPROMs offer access times of 250 rs, ‘allowing operation with high-speed microprocessors with- ‘out any Wait states. Some of AMD's EPROMs have accoss. times of as fast 28 100 ns, o eliminate bus contention on a multiple-bus microproces: s0r system, all AMD EPROM offer separate output enable (OE) and chip enable (CE) controls. ‘Al signals ere TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, of at random. To reduce programming time, AMD's EPROMS may be programmed using 1-ms pulses. BLOCK DIAGRAM =e Ti PRODUCT SELECTOR GUIDE Famiy Part No. ‘Am27168/Am27328 [Bert of ‘Ordering Part Noe 45% Veo | 27168-105 | 27168-155 | z7168-205 | 27168 27168-905 | 27168-455 Tolerance | 27328-105 | 27928-155_| 27928-2058 _| 27328 27s26-905_| 27326-455, £10% Veo [27168-100 | 27168-150 | 27168-200 | 27168-260 | 27168-900 | 27160-4656 | Tolerance _| 27328-100_| 27328-150_| 27328-200_| 27398-260_| 27328-900_| 27328-4556" tace (ra) _| 100 150 200 250 300 450 toe (00) | 100 150. 200 250 300 250 toe (ne) | 75 75. 7% 100 i10 150 Bec Amendment oo A 70 “1 Issue Dato: May 1986 azeuzwy/astzzuyCONNECTION DIAGRAMS Top View LOGIC SYMBOLS Am27168 Am2764B so02se1 Lsooes71 ezORDERING INFORMATION (Cont'd.) Standard Products AMD standard products aro available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: A. Device Number B. Speed Option (if applicable) LL er Blank = Standard processing 0. TEMPERATURE RANGE. = Bwtonded (86 10 + 125°0) ©. PACKAGE TYPE D= 24m Coramic DIP (COvE2A) 2 S2-Fn Rectangular Cerame Loedioss Crp anor (CLES) B. SPEED OPTION ‘See Product Selector Guido A. DEVICE NUMBER/DESCRIPTION Amz?168 = 248 EPROM ‘Amzrae8 = 488 EPROM Valid Combinations 5% Vee Tolerance Valid Combinations. TAMET6B-105 Valid Combinations list configurations planned to bo [AM2T16B-155 supported in volume for this devico. Consult the local AMD ’AM27 168-205 sales office to confirm availability of specific valid AMETIEB ‘combinations, o check on newly released valid combinations, ears ‘and to obtain additonal data on AMD's standard miltary [AMET 165-455 CT eared ’AM27929-105 [Cameraaeies ——] TAMET200-155 (AM2T920-205 AM27928 AMe7520-505 ANZTO20-455 “H10% Veg Tolerance “AM27 168-100 AMET 6E-180 2c, "AM27329-100 tou “AME 7S28- 150 "AM27 169-200 “AM27 165-250 "AM27165-300 "AM27 68-480 1, DL. DF, "AM27S28-200 caine ‘AM27928-250 ‘AMET920-300 ‘AM2920-450 5B egORDERING INFORMATION APL Products AMD products for Aerospace and Defense appications are avalabe in several packages and operating rangos, APL (Approved Products List) products ere tuly complant with MIL-STO-882C requirements. CPL (Controlled Products Lis!) products are processed n accordance with MIL-STO-889C, but are inherenty non-compliant bocause of package, soldrabilty, or surtace Treatment exceptions to those specications. The order number (Vaid Combination) for APL products is formed by a combination of: A. Device Number Speed Option (it appicable) ©. Device Class D. Package Type E. Lead Finish tL. LEAD Fist Re Hot Solder OP D. PACKAGE TYPE J 2ePn Carame DIP (COVO2) .C, DEVICE CLASS (= Class SPEED OPTION Ste0 = 150 ne 7200 = 200 ne T2s0 = 280 1a 300 = 300 ns TAS0 = 480 m8 A. DEVICE NUMBER/DESCRIPTION ‘mer68 = 2x8 EPROM ‘Am2r228 = 4x8 EPROM Valid Combinations: Valld Combinations: 10% Vee Tolerance Valid Combinations list configurations planned to be ‘AMETI6B-150 supported in volume for this device. Consult the local AMD "A¥27168-200 sales office to confirm availability of specific valid = combinations or to check for newly re a combinations. “AM2T 165-500 ‘AMET 168-450 om TAMET920-150 ‘AMETI26-200 (AM27928-280 ‘AM27226-900 ‘AM2TO20-450FUNCTIONAL DESCRIPTION Erasing the EPROMs | order to clear all iocations of their programmed contents, itis necessary to expose tho EPROMS to an ultraviolet light ‘source. A dosage of 15 W seconds/om? is required to ‘compietely erase an EPROM. This dosage can be obtainod by exposure to an ultraviolet lamp — wavelength of 2537 ‘Angstroms (A)—with intensity of 12,000 uW/em? for fitean to twenty minutes. The EPROM should be about ‘rectly under and about one inch trom the source and all filers should be removed from the ultraviolat light source rior 10 erasure. {tis important to note that the EPROMs will erase with light ‘sources having wavelengths shorter than 4000 A. Although ‘erasure times will be much longer than with ultraviolet sources at 2537 A, nevertholess, tho exposure to fluores- Ccont light and sunight will eventually erase the EPROMS ‘and exposure to them should be prevented to realize ‘maximum system reliability. if used in such an environment, the package window should be covered by an opaque label or substance. Programming the EPROMs Upon delivery, or after each erasure, the EPROM has all bits in the "1", or HIGH state. Zeros ("0s") are loaded into the EPROM through the procedure of programming, The programming mode is entered when a voltage greater than 12.0, but less than 13.3 V is applied to the Vep pin (GE/Vpp for 22k) and CE/PGM is given a TTL-LOW pulse. ‘The data to be programmed is applied 8 bits in parallel to the Data 1/0 (00h) pins. The flowchart (Figure 1) in the Programming section ofthis document shows the AMD-preterred intoractive program- ming algorithm. Interactive algorithms raquices less pro- {gramming time than most other algorithms. This does not Precude the use of other algorithms, including the conven- tional S0-ms pulse, as long as the maximum spectications ‘are not violated. ‘The AMD-preterred algorithm reduces programming time by using short (1 ms) program pulses and giving each ‘address only as many pulsos as is necessary in order to reliably program the data. After each pulse is applied to a Given address, data in that addross is verified. the data does not verity, an additonal pulse is spplied for a ‘maximum of 15\pulses. This process is repaated while ‘Sequencing through each addross of the EPROM. The interactive section of the algorithm is programmed and verified at Voc = 6.0 V, +5% ‘The overprogram section of the algorithm programs the contre array by cycling through each address and applying {an adeitional 2-ms program pulse. This section is dono at Voo= 50 V, #5%. Ator the final address is completed, the entire EPROM is verified to the data-shoot specifications of Voc= 50 V, 25%, ‘Auto Select Mode ‘The Auto Select mode allows the reading out of a binary ‘code from an EPROM that wil identify ts manufacturer and type. This mode is intended for use by programming equipment for the purpose of automaticaly matching the device to be programmed with its corresponding program. ‘ming algorithm. This mode is functional in the 25°C 25°C. ambienttemperature range required when programming the EPROMs. To activate this mode, the programming equpment must force 12.0 V #0.5 V on addrass ine Ag, Two identifier bytes may then be sequenced from the device outputs. by ‘toggling address line Ag from Vi, to Vix. All other addross lines must be held at Vi. during Auto Select mode. Byte 0 (Ag = Vit. 009-007) represents the manufacturer ode, and byte 1 (Ap = Vir, DG - DQ), the device identi- fier code. These identifier bytes are given in Table 2. All identifiers tor manufacturer and device codes will possess ‘odd parity, with the most significant bt (MSE), 07, defined as the parity bit Read Mode AMD EPROM have two control functions, beth of which ‘must be logically satistiod in order to obtain data at the ‘outputs. Chip Enable (CE) is the power control and should ‘be used for device selection. Output Enable (OE) is the ‘output control and should be used to gate data to the ‘output pins, independent of device selection. Assuming that addresses are slable, address access time (taco) s equal to the delay trom CE to output (ice). Datais avalable atthe ‘outputs tog attor the faling edge of OE, assuming that CE thas been LOW and addresses have been stable for atleast taco toe: ‘Standby Mode ‘AMD EPROMs have a standby mode which reduces the ‘active power dissipation up to 80%. The EPROM is placed in the standby mode by applying a TTL HIGH signal to the FE input. When in standby modo, the outputs are ina high- impedance state, independent of the OE input. Output OR-Tieing To accomodate muttiple momory connedtions, @ two-ine Control function is provided to allow for: 1) low-memory power dissipation, and 2) assurance that output-bus con- tention will not occur tis recommended that CE be decoded and used as the primary device-sslecting function, while OE be made a common connection to all devices in the array, and Connected to the Read line from the system control bus. ‘This assures that all desolected memory devices are in their low-power standby mode and that the output pins are ‘only active when data is desired from a particular memory doves Program inhibit Programming of multiple EPROM in parallel with different data is also easily accomplished. Except tor CE/PGM, all {ko inputs (including OE and Vpp) of the parallel EPROMs ‘may be common. For the Am2716B, a LOW-iovel CE/PGM input inhibits the other EPROMS trom being programmed, For the Am2792B, a HIGH-level CE/PGM input inhibits the other PROMS trom being programmed. Program Verity AA verity should be performed on the programmed bits to otormine that they were correctly programmed. Data for al the EPROMs should be verified tog after the {aling edge ot OE, Vep may comain at 12.5 V for the 27168 during program verity, but forthe 27328, OE/Vpp must be a TTL low level ‘System Applications During the switch Between active and standby condition ‘ransient current peaks are produced on the rising and falling edges of Chip Enable, Tho magnitude of these transient current peaks is dependent on the output capact- 65‘ance loading of the device. A 0.1-uF ceramic capacitor ‘waces on EPROM arrays, a 47-uF bulk elecrotyic capack ‘high-frequency, low-inherent inductance) should be used tor should be used betwoen Vcc and GND for each eight fon each device between Voc and GND to minimize devices. The location of the capacitor should be close to ‘ransiont effects. In addition, to overcome the voltage drop ‘whore the power supply is connected to tho ary. caused by the Inductive effects of the printed eircut-board FUNCTION TABLES TABLE 1. Am2716B MODE SELECT PINS] Er T ‘MODE PGM | OE | Ao | Vep_| OUTPUTS Road TLL Lx [vec | Sour Output Diabla ToL x [vec | Hz Standty wx [vec | wz Progam a Program Verity L u x _| Vee Dout, Progam nt | t | H| x | ver | Wz Fito Sect Coe bvec | cone TABLE 2. Am2732B MODE SELECT (oo — | BE ‘MODE PGM | Vpp | Ao OUTPUTS Fed Tt Lx | Sour Output Deeb [enn exe|anz Standby wpe Dx | we Program is Ver | x On Progam Verty che [our Program innit | H_| vee | x | HZ ‘Auto Sect cbt bun [ cove key: L= LOW HoHIGH X-=Can be eithor LOW or HIGH Var 120 V 208 V 66ABSOLUTE MAXIMUM RATINGS ‘Storage Temperature cove M65 10 +150°C ‘Ambient Temporature with Power Applied .-65 to +135°C. ‘Supply Voltage with respect to Ground ‘on all Inputs except Ag and Vpp.......+6.25 to -06 V 07 AQ vente omen # 13,60 10 06 V (on Vee +13.60 to -08 V Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device fel. Functionality at or above thess limits is not implied. Exposure to absolute ‘maximum ratings for extended periods may affect device rolabilty, OPERATING RANGES ‘Commercial (C) Devices Temporature (To) on: 0 to +70°C Supply Voltage (Ved) « (Notes 1 & 2) Industrial (1) Devices ‘Temperature (To). 40 to +85°C ‘Supply Voltage (Voc)... (Notes 1 & 2) Extended Commercial (E) Devioes Temperate (TO) one. -85 to +1250 Supply Voltage (Voc) . (Notes 1 & 2) ‘Miltary (M) Devices Temperature (To). 1-85 to + 125°C ‘Supply Voltage (Vcc) (Notes 1 & 2) Notes: 1. For -105, ~155, -205, blank, ~305, and -455 versions, Voc=+4.75 to +6.25 V, 2, For ~100, ~150, ~200, ~250, ~300, and -450 versions, Voc = +4.50 to +550 V. Operating ranges define those limits between which the functionality of the device is guaranteed. DC CHARACTERISTICS over operating range unless otherwise specified (Notes 1, 2, & 4)* Parameter Parameter ‘Symbol Description Test Conditions min, | Max. | Unite Vou ‘Output HIGH Voltage Ton = 400 WA 24 Vv You ‘Output LOW Voltage lou= 21 mA oas | V Vi Input HIGH Voltage 20 [Voo+i| Vv Vi Input LOW Voltage =o1 | +08 | Vv tu Input Load Gurrent Vine 0 to +65 V 100 | HA ho Output Leakage Current Vout =0 10-55 V 100 | HA Veo Standby Current cers = for Amz716B (Note 6) E/M Devices 40 lect Voc Standby Current Che le (or Ama7328 & M Devices Voc Active Current — ental loca for Am27168 Cea Vy, an 100 | ma and Am2732B eee ram Curent 1 top oa eeeeees Vpp= 5.5 V Saige so | oma C1, ‘era pp Read Current Vpp= 5.5 V 1 5 mA 4M Devices Notes: See notes following the Capacitance table on next Page. "Soe the last page of this spec for Group A Subgroup Testing information erCAPACITANCE (Notes 2 & 3) Parameter Parameter 7 Symbol Description Test Conditions typ._|_max._| units ‘Ow Input Capacitance Vw=0V iain era oe Cout Output Capacitance Vour=0¥ olan rai ee, DE/pp owe Input Capacitance oe TEM Varo a Cre Input Capectance L eee ‘Notes: 1. Voc must be applied simuttaneously or botore Vpp, and removed simultanoously or after Voc: 2. Typical values are for nominal supply voltages. ‘3, This parameter {s only sampled and not 100% tested. A, Caution, The EPROMs must not be removed from or inserted into_a socket or board whan Vep oF Vac is applied. 5. Ver may be connected to Vcc drecty except during programming. The supply would then be the sum of lac and ip. 6. oct Max. ia 40 mA for ~4XX devices. KEY TO SWITCHING WAVEFORMS: SWITCHING TEST CIRCUITS ‘Tovote SHE i 5000010 SWITCHING TEST WAVEFORMS. ‘and 0.4 V for a logic "0". Input pulse rise and fall [AC Testing: Inputs are driven at 2.4 V for a logic times are § ns,SWITCHING CHARACTERISTICS over operating range unless otherwise specified* (Notes 1 & 3) oF (Note 2) | to Output Float (Table 1 of 2) 105 100 | = 186,180 | -208,- ‘Parameter Parameter ‘Test deat) No. ‘Symbol Description Conditions (Note 4) | Min. | Max. | Min. | Max.| Min. | Max. | Units To [ce | Rigas One Tee oe = 100 wo] | 20 | ea oe ‘00 10 0 | 2 [oe | Seer Eun 5 % 75 | 7 Ouput Enaio HGH eulrciler kalea iailce ‘Output Hol trom s | tH Adérosses, TE, or (ote 2) | OE, whichever ° ° ° ns occured frst (Table 2 of 2) Blank, ~260 | ~308, ~300 | ~4s5, -450 Parameter | Parameter Tost Symbol Deserition | Conattions (note 4) | win. [ wax. | win. [ Max. | win. | sax. | Unite ‘Address to Output 7 + | thee oe CE = OE =v 250 300 450 | ns Chip Enable 0 2 | te cama 250 2300 450 | ns Output Enable 10 9 | te oma oaey | 100 110 150 | ns ‘oF ‘Output Enablo HIGH 4 | tote 2) | to Ouput Float oje i} oye }ola|s ‘Output Hold from 5 | tom Actresses, CE, or a c . a (ote 2) | OE, whichever occured fist Notes: 1. Voc must be applod simultaneously oF before Vpp, and removed simutaneously or ater Vep 2. This parameter is only samplod and not 100% tostod 3. Caution: The EPROMs must not be removed from or inserted ino @ socket of board when Vep oF Voc is sepied. 4. Output Load: 1 TTL gate and O, » 100 pF, Input Riso and Fell Times: <20 ns, Input Puiso Levels: 0.46 to 2.4 V, Timing Measurement Reference Level— Inputs: 1 V and 2V ‘Outputs: 0.8 V and 2 V. "See the last page of this spec for Group A Subgroup Testing information, 69SWITCHING WAVEFORMS 1. DE may be delayed up t0 tAcc toe alter the faling edge of OE without Impact on tacc: 2. tor is specified trom OE or CE, whichever occurs first 10PROGRAMMING This section covers Identifier bytes, interactive Flowcharts, and Interactive Programming Algorithms fer DC Programming and Switching Programming Characteristics. —— oom ooan Se wreahewe a ie Kum ieomaes= PRET LOCATE! OVERPROGRAM Yon eS¥ ‘SECTION Tr ean oe nae | a 001720, Figure 1, Interactive Programming Flow Chart enTABLE 4, IDENTIFIER BYTES Pine] —T Hox dentitier Ao_| G7 | 005 | 005 | Day | DOs Day Data Manufacturer code | Vn | 0 | o | o | o | 0 (om |nike axon] ‘Am27168 eantilel eet (eo) | 0. || 20 || sc tere |e ce | o: ) (ee) ‘An27928 Coa vwfoyete|ele ay ace, INTERACTIVE PROGRAMMING ALGORITHM DC (Notes 1, 2, and 4) Notes: 1. Ag= 120 V 205 V 2. Al other Addross Lines = CE = OE = Vit PROGRAMMING CHARACTERISTICS [Paramater Parameter J 4 Soe Seserion eat condone | wan | wex_| vote 1s Toa Soren Ts Tarev ow ao 9a Vi input LOW Level (All Inputs) 04 08 Vv We it Wa 2 [Vee et] —¥ Te Saar LOW vas ang Woy EE et vn Sat LOW Vege ng Ve igs 007K 7 a Me Spy Caro] Fr AB ‘cca WearrsNrin _| oo Kner wo [om i Toe Sy Coot Poway WereT 5 Vo tage oot vs pes |v Totos: See notes following the inoractve Programming Algorithm Swiching Programming Characteristics table. INTERACTIVE PROGRAMMING ALGORITHM SWITCHING PROGRAMMING CHARACTERISTICS (Notes 1, 2, 3, and 4) | | Parameter Parameter No. ‘Symbols Description win | Max | Units 1 TS. ‘aaaross Setup Time 2 a 2 Toes GE Soup Tine 2 1 3 ‘os, Data Setup Time 2 1 4 aH “Address Hold Time a 2 8 5 to Data Hold Timo 2 7 6 ‘oe ‘Chip Enable to Output Float Delay o 730 7 ‘ves. Ver Setup Time 20 a 3 ‘ves Vos Setup Time 2 = 2 ew TFGH inital Program Pulse Width | 105 me io oo FEM Overprogram Pulse Width (Note 2) ve | 88 6, 1 ces EE Soup Time 2 = % Toe, Data Vaid trom OF 159, 3 Toes | Tao FEE AEG,Vog= 80 ¥ #025 in jP09 9 | 2 VAS must bo applied Simultaneously or botore Vpp and removed simultaneously or after Vrp. 5 Wada programming the EPROMS, a 0,/-uF capacio’ Is roqured across Vpp and ground to Suppress spurious voltage, transients which may damage the device. 4, Homemming charattensice ere gudotnes which must be folowed. They are not 100% tested to worst-case His. 61INTERACTIVE PROGRAMMING ALGORITHM WAVEFORMS AM2716B (Notes 1 and 3) wroo0ses Am2732B (Notes 1 and 2) ee ep ats | — toa] i Notes: 1. The input timing reference level is 0.8 V for Vi. and 2 V for Vi. 2. tog and tpF are characteristics of the dovice, but must be accommodated by the programmer 3. tog and trp are characteristics of the device, but must be accommodated by the programmer. 613GROUP A SUBGROUP TESTING DC CHARACTERISTICS Parameter Symbol _| Subgroups Vor 12.3 Vou 12.3 Yui 123 Vit 12.9 iu 23 ho 123 loon 12.3 loo2 3 [eter ‘pa. Cw Cour wna Gin 4 “For DG Programming Characteristics, only Subgroup 1 apples. SWITCHING CHARACTERISTICS Parameter No. Symbol_| Subgroups 1 tao 9,10, 11 2 ce 9, 10, tt 3 toe 9,10, 1 4 or @ 5 ToH 2 MILITARY BURN-IN Miltary burn-in is in accordance with the current revision of MIL-STD-889, Test Method 1015, Conditions A through &. Test Conditions are selected at AMD's option. one