SPRING -2017 CAO Assignment-2 Submit: Monday Next week

Q1. A digital computer has a memory unit with 24 bits per word. The
instruction set consists
of 150 different operations. All instructions have an operation code part
(op-code) and an address part (allowing for only one address). Each
instruction is stored in one word of memory.

A ) How many bits are needed for the op-code?

5bit
B ) How many bits are left for the address part of the instruction?
4
C ) What is the maximum allowable size for memory?
32k16
D ) What is the largest unsigned binary number that can be accommodated
in one word of memory? Draw figure to show instruction format.

Q2.. The memory unit of a computer has 256K words of 32 bits each. The
computer has
an instruction format with 4 fields: an op-code field; a mode field to specify 1
of 7
Addressing modes; a register address field to specify 1 of 60 registers; and a
memory
Address field. Assume an instruction is 32 bits long. Answer the following:

A ) How large must the mode field be?

B ) How large must the register field be?
C ) How large must the address field be?
18 bit
D ) How large is the op-code field? Draw figure to show instruction format.
8bit
Q3. An Accumulator Architecture CPU has 18 instructions in its instruction
set. It supports 16K16 Main memory.
What will be the format of instructions of the following instructions?
14 bit address
4bit op code
Write Fetch decode, execute micro steps also for.
a. Load X ; Load direct mode, where X is an operand address in
memory
b. Loadi X ; Load indirect mode
c. Load-imm X ; where X is immediate mode value
SPRING -2017 CAO Assignment-2 Submit: Monday Next week

Q4. A General purpose Architecture CPU has 32 instructions in its

instruction set. It supports 64K16 Main memory. It has four general purpose
registers A, B ,C , D
What will be the format of instructions of the following instructions?
Write Fetch decode , execute micro steps also for.
a. Load-dir Reg, X ; Load direct mode, where X is an operand
address in memory
b. Load-indr Reg , X ; Load indirect mode ; value from address
X is loade into register
c. Load-imm Reg , X ; where X is immediate mode value