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HT12D (F Penerima PDF
HT12D (F Penerima PDF
Features
Operating voltage: 2.4V~12V Address/Data number combination
Low power and high noise immunity CMOS - HT12D: 8 address bits and 4 data bits
Applications
Burglar alarm system Car alarm system
Smoke and fire alarm system Security system
Garage door controllers Cordless telephones
Car door controllers Other remote control systems
General Description
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The 2 decoders are a series of CMOS LSIs for their local addresses. If no error or unmatched
remote control system applications. They are codes are found, the input data codes are de-
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paired with Holteks 2 series of encoders (re- coded and then transferred to the output pins.
fer to the encoder/decoder cross reference ta- The VT pin also goes high to indicate a valid
b l e ) . F or p r op er op er a t i on, a p a i r o f transmission.
encoder/decoder with the same number of ad- 12
The 2 series of decoders are capable of decod-
dresses and data format should be chosen. ing informations that consist of N bits of ad-
The decoders receive serial addresses and data dress and 12-N bits of data. Of this series, the
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from a programmed 2 series of encoders that HT12D is arranged to provide 8 address bits
are transmitted by a carrier using an RF or an and 4 data bits, and HT12F is used to decode 12
IR transmission medium. They compare the se- bits of address information.
rial input data three times continuously with
Selection Table
Function Address Data
VT Oscillator Trigger Package
Part No. No. No. Type
HT12D 8 4 L RC oscillator DIN active Hi 18 DIP/20 SOP
HT12F 12 0 RC oscillator DIN active Hi 18 DIP/20 SOP
Block Diagram
O S C 2 O S C 1
O s c illa to r D iv id e r
D a ta S h ift D a ta
L a tc h C ir c u it
R e g is te r
D IN B u ffe r D a ta D e te c to r
S y n c . D e te c to r C o m p a ra to r C o m p a ra to r C o n tr o l L o g ic
T r a n s m is s io n G a te C ir c u it B u ffe r V T
A d d re s s V D D V S S
Note: The address/data pins are available in various combinations (see the address/data table).
Pin Assignment
8 -A d d re s s 8 -A d d re s s 1 2 -A d d re s s 1 2 -A d d re s s
4 -D a ta 4 -D a ta 0 -D a ta 0 -D a ta
N C 1 2 0 N C N C 1 2 0 N C
A 0 1 1 8 V D D A 0 2 1 9 V D D A 0 1 1 8 V D D A 0 2 1 9 V D D
A 1 2 1 7 V T A 1 3 1 8 V T A 1 2 1 7 V T A 1 3 1 8 V T
A 2 3 1 6 O S C 1 A 2 4 1 7 O S C 1 A 2 3 1 6 O S C 1 A 2 4 1 7 O S C 1
A 3 4 1 5 O S C 2 A 3 5 1 6 O S C 2 A 3 4 1 5 O S C 2 A 3 5 1 6 O S C 2
A 4 5 1 4 D IN A 4 6 1 5 D IN A 4 5 1 4 D IN A 4 6 1 5 D IN
A 5 6 1 3 D 1 1 A 5 7 1 4 D 1 1 A 5 6 1 3 A 1 1 A 5 7 1 4 A 1 1
A 6 7 1 2 D 1 0 A 6 8 1 3 D 1 0 A 6 7 1 2 A 1 0 A 6 8 1 3 A 1 0
A 7 8 1 1 D 9 A 7 9 1 2 D 9 A 7 8 1 1 A 9 A 7 9 1 2 A 9
V S S 9 1 0 D 8 V S S 1 0 1 1 D 8 V S S 9 1 0 A 8 V S S 1 0 1 1 A 8
H T 1 2 D H T 1 2 D H T 1 2 F H T 1 2 F
1 8 D IP 2 0 S O P 1 8 D IP 2 0 S O P
Pin Description
Internal
Pin Name I/O Description
Connection
NMOS
Input pins for address A0~A11 setting
A0~A11 I TRANSMISSION
They can be externally set to VDD or VSS.
GATE
D8~D11 O CMOS OUT Output data pins
DIN I CMOS IN Serial data input pin
VT O CMOS OUT Valid transmission, active high
OSC1 I OSCILLATOR Oscillator input pin
OSC2 O OSCILLATOR Oscillator output pin
VSS I Negative power supply (GND)
VDD I Positive power supply
N M O S
T R A N S M IS S IO N C M O S O U T C M O S IN O S C IL L A T O R
G A T E
E N O S C 2
O S C 1
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maxi-
mum Ratings may cause substantial damage to the device. Functional operation of this de-
vice at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage 2.4 5 12 V
5V 0.1 1 mA
ISTB Standby Current Oscillator stops
12V 2 4 mA
IDD No load
Operating Current 5V 200 400 mA
fOSC=150kHz
Data Output Source VOH=4.5V
5V -1 -1.6 mA
Current (D8~D11)
IO
Data Output Sink VOL=0.5V
5V 1 1.6 mA
Current (D8~D11)
VT Output Source Current VOH=4.5V -1 -1.6 mA
IVT 5V
VT Output Sink Current VOL=0.5V 1 1.6 mA
VIH H Input Voltage 5V 3.5 5 V
VIL L Input Voltage 5V 0 1 V
fOSC Oscillator Frequency 5V ROSC=51kW 150 kHz
Functional Description
Operation Flowchart
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The 2 series of decoders provides various com- The oscillator is disabled in the standby state
binations of addresses and data pins in differ- and activated when a logic high signal applies
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ent packages so as to pair with the 2 series of to the DIN pin. That is to say, the DIN should be
encoders. kept low if there is no signal input.
The decoders receive data that are transmitted
by an encoder and interpret the first N bits of P o w e r o n
L a tc h d a ta
Part Data Address Output Operating to o u tp u t &
No. Pins Pins Type Voltage a c tiv a te V T
Decoder timing
E n c o d e r
T r a n s m is s io n
E n a b le
< 1 w o rd
E n c o d e r
D O U T
4 w o rd s T r a n s m itte d 4 w o rd s
1 4
C o n tin u o u s ly 1 4
2 c lo c k s 2 c lo c k s
D e c o d e r V T
c h e c k c h e c k
L a tc h e d
D a ta O u t
Address/Data sequence
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The following table provides address/data sequence for various models of the 2 series of decoders. A
correct device should be chosen according to the requirements of the individual addresses and data.
Address/Data Bits
Part No.
0 1 2 3 4 5 6 7 8 9 10 11
HT12D A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11
HT12F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
fo s c
(S c a le )
R o s c (9 )
4 .0 0
2 7 k
3 .5 0
3 0 k
3 3 k
3 .0 0
3 6 k
3 9 k
4 3 k
2 .5 0
4 7 k
5 1 k
2 .0 0 5 6 k
6 2 k
6 8 k
7 5 k
1 .5 0 8 2 k
1 0 0 k
1 2 0 k
(1 0 0 k H z )1 .0 0
1 5 0 k
1 8 0 k
2 2 0 k
0 .5 0
0 .2 5
2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 V D D (V D C )
Application Circuits
R e c e iv e r C ir c u it R e c e iv e r C ir c u it
V D D V D D
1 1 8 1 1 8
A 0 V D D A 0 V D D
2 1 7 2 1 7
A 1 V T A 1 V T
3 1 6 3 1 6
A 2 O S C 1 A 2 O S C 1
4 1 5 R O S C 4 1 5 R O S C
A 3 O S C 2 A 3 O S C 2
5 1 4 5 1 4
A 4 D IN A 4 D IN
6 1 3 6 1 3
A 5 D 1 1 A 5 A 1 1
7 1 2 7 1 2
A 6 D 1 0 A 6 A 1 0
8 1 1 8 1 1
A 7 D 9 A 7 A 9
9 1 0 9 1 0
V S S D 8 V S S A 8
H T 1 2 D H T 1 2 F