Bai Giang VXL-VDK Chuan - 2011-07 - (Ban Dep, Link)

TRNG I HC K THUT CNG NGHIP
KHOA IN T
B MN K THUT MY TNH
BI GING PHT CHO SINH VIN

(LU HNH NI B)
Theo chng trnh 150 TC thay 180 TC hoc tng ng
S dng cho nm hc 2011 2012
Tn bi ging: Vi x l Vi iu khin
S tn ch: 03
BI GING PHT CHO SINH VIN
(LU HNH NI B)
Theo chng trnh 150 TC thay 180 TC hoc tng ng
S dng cho nm hc 2011 2012
Tn bi ging: Vi x l Vi iu khin
S tn ch: 03
Thi Nguyn, ngy 01 thng 07 nm 2011

Trng b mn Trng khoa in T
Ths. Nguyn Tun Linh PGS. TS. Nguyn Hu Cng

MC LC
CHNG 1. TNG QUAN V VI X L VI IU KHIN ...................... 9
1.1 GII THIU CHUNG V VI X L VI IU KHIN.....................................10
1.1.1 Tng quan ..............................................................................................................10
1.1.2 Lch s pht trin ca cc b x l........................................................................11
1.1.3 Vi x l v vi iu khin .......................................................................................12
1.1.4 ng dng ca Vi x l vi iu khin .................................................................13
1.2 Cu trc chung ca h vi x l...................................................................................15
1.2.1 Khi x l trung tm (CPU) ..................................................................................16
1.2.2 H thng bus..........................................................................................................17
1.3 nh dng d liu v biu din thng tin trong h vi x l vi iu khin ...........18
1.3.1 Cc h m ............................................................................................................18
1.3.2 M k t - Alphanumeric CODE (ASCII, EBCDIC)............................................20
1.3.3 Cc php ton s hc trn h m nh phn ..........................................................22
CHNG 2. H VI X L INTEL 80x86....................................................... 23
2.1 Cu trc phn cng ca b vi x l 8086 ..................................................................24
2.1.1 Tng quan ..............................................................................................................24
2.1.2 Cu trc bn trong v s hot ng.......................................................................24
2.1.3 M t chc nng cc chn .....................................................................................31
2.2 Ch a ch...............................................................................................................31
2.2.1 Khi nim ch a ch .......................................................................................31
2.2.2 Cc ch a ch..................................................................................................34
2.3 Tp lnh Assembly ......................................................................................................37
2.3.1 Gii thiu chung ....................................................................................................37
2.3.2 Cc nhm lnh .......................................................................................................38
2.4 Lp trnh hp ng (Assembly) cho vi x l 80x86....................................................54
2.4.1 Gii thiu chung v hp ng .................................................................................54
2.4.2 Cc bc khi lp trnh ...........................................................................................55
2.4.3 Cu trc chung ca chng trnh hp ng ............................................................57
2.4.4 Cc cu trc iu khin c bn..............................................................................69
2.4.5 Ngt trong Assembly .............................................................................................72
2.4.6 Cc v d................................................................................................................74
2.5 Ghp ni b nh v thit bi ngoi vi ..........................................................................80
2.5.1 Ghp ni b nh ....................................................................................................80
2.5.2 Gii m a ch.......................................................................................................81
2.5.3 Ghp ni thit b ngoi vi ......................................................................................84
2.5.4 Cc kiu giao tip vo / ra .....................................................................................84
2.5.5 Gii m a ch cho thit b vo / ra.......................................................................84
2.5.6 Cc mch cng n gin .......................................................................................85
Vi mch cht 74LS373:.........................................................................................................85
2.6 Cu hi v bi tp........................................................................................................86
CHNG 3. H VI IU KHIN 8051........................................................... 89
3.1 Gii thiu chung ..........................................................................................................90
3.1.1 ng dng ca vi iu khin...................................................................................91
3.1.2 Hot ng ca vi iu khin..................................................................................91
3.1.3 Cu trc chung ca vi iu khin ..........................................................................92
3.2 Kin trc vi iu khin 8051.......................................................................................97
3.2.1 Chun 8051............................................................................................................97
3.2.2 Chn vi iu khin 8051........................................................................................99
3.2.3 Cng vo/ra .........................................................................................................100
3.2.4 T chc b nh 8051...........................................................................................104
3.2.5 Cc thanh ghi chc nng c bit (SFRs - Special Function Registers) ............ 109
3.2.6 B m v b nh thi ....................................................................................... 113
3.2.7 Truyn thng khng ng b (UART)................................................................ 113
3.2.8 Ngt vi iu khin 8051 ...................................................................................... 114
3.3 Lp trnh hp ng cho 8051 ..................................................................................... 114
3.3.1 Cc ch a ch ............................................................................................... 114
3.3.2 Tp lnh trong 8051 ............................................................................................ 116
3.3.3 Cu trc chung chng trnh hp ng cho 8051................................................. 123
3.4 B m v b nh thi ............................................................................................. 126
3.5 Truyn thng ni tip................................................................................................ 133
3.6 X l ngt ................................................................................................................... 140
3.7 Cu hi v bi tp cui chng................................................................................ 147
CHNG 4. NG DNG ................................................................................. 151
4.1 Nhp nhy dy LED n .......................................................................................... 152
4.2 Timer .......................................................................................................................... 155
4.3 S dng Timer T2 ..................................................................................................... 157
4.4 Dng ngt ngoi......................................................................................................... 158
4.5 Lp trnh ngt ngoi theo sn xung. ................................................................... 159
4.6 S dng LED 7 thanh ............................................................................................... 160
4.6.1 Hin th s trn 1 LED 7 thanh ........................................................................... 160
4.6.2 Hin th trn nhiu LED 7 thanh ......................................................................... 161
4.7 Thng bo bng vn bn trn mn hnh LCD........................................................ 164
4.8 Nhn d liu qua UART........................................................................................... 169
4.9 Truyn d liu qua UART........................................................................................ 170
4.10 Chng trnh con phc v truyn thng ni tip................................................... 172
4.11 Truyn thng UART cho 8051 bng phn mm..................................................... 172
4.12 Ghp ni 8051 vi ADC0804, chuyn i ADC 8-bit ............................................. 175
4.13 Ghp ni vi iu khin vi bn phm....................................................................... 177
4.14 Ghp ni vi iu khin vi step motor..................................................................... 179
CHNG 5. CC H VI IU KHIN TIN TIN................................... 191
5.1 Atmel AVR................................................................................................................. 192
5.1.1 Lch s h AVR .................................................................................................. 192
5.1.2 Tng quan v thit b........................................................................................... 192
5.1.3 Kin trc thit b.................................................................................................. 193
5.1.4 Program Memory (Flash) .................................................................................... 193
5.1.5 EEPROM............................................................................................................. 193
5.1.6 Chng trnh thc thi .......................................................................................... 194
5.1.7 Tp lnh............................................................................................................... 194
5.1.8 Tc MCU........................................................................................................ 195
5.1.9 Nhng c tnh .................................................................................................... 195
5.2 Vi iu khin PIC ...................................................................................................... 197
5.3 ARM ........................................................................................................................... 200
Ti liu tham kho ................................................................................................ 205
PH LC A: Tp lnh trong 8051....................................................................... 206
PH LC B: Chi tit cc thanh ghi chc nng trong 8051 ................................. 210
PH LC C: Ngt ................................................................................................ 216
Danh mc hnh nh ............................................................................................... 218
Danh mc m ngun ............................................................................................. 220
Danh mc bng ..................................................................................................... 220
Ch mc ....................................................................................................... 221
I HC THI NGUYN CNG HO X HI CH NGHA VIT NAM
TRNG I HC c lp - T do - Hnh phc
K THUT CNG NGHIP
CHNG TRNH GIO DC I HC

NGNH O TO: IN IN T, SPKT IN TIN, C IN T
CHUYN NGNH: KHI NGNH IN IN T
CNG CHI TIT HC PHN:

VI X L VI IU KHIN
(Hc phn bt buc)
1. Tn hc phn: Vi x l vi iu khin.
2 . S tn ch: 03; 3(3; 1,5; 6)/12
3. Trnh cho sinh vin nm th: 3 (in, in t, SPKT in, SPKT Tin)
hoc 4 (C in t).
4. Phn b thi gian
- Ln lp l thuyt: 3 (tit/tun) x 12 (tun) = 36 tit.
- Tho lun: 1,5 (tit/tun) x 12 (tun) = 18 tit.
5. Cc hc phn hc trc
K thut in t s.
6. Hc phn thay th, hc phn tng ng
Vi x l vi iu khin (trong cc chng trnh 180 TC v 260 VHT)
7. Mc tiu ca hc phn
Sau khi hc xong hc phn sinh vin phi nm c cu trc phn cng ca
cc b vi x l vi iu khin tiu biu: x86, 8051; T chc b nh, tp lnh, ch
a ch v lp trnh cho chng; Bit cch ghp ni vi b nh v thit b ngoi vi;
Bit khai thc kh nng ngt v nh thi. C kh nng thit k v xy dng modul
(bao gm c phn cng v phn mm) s dng vi iu khin cho bi ton c th.
8. M t vn tt ni dung hc phn
Tng quan v cc h m v biu din thng tin trong cc h vi x l vi
iu khin. Vi x l: Tng quan v kin trc h vi x l; t chc phn cng ca
CPU h Intel 80x86, cc ch nh a ch, tp lnh, lp trnh hp ng (assembly)
cho 80x86 vi nhng bi ton n gin; mt s vi mch ph tr trong h vi x l.
Vi iu khin: Cu trc h vi iu khin onchip MCS 8051; lp trnh hp ng cho
vi iu khin; hot ng nh thi, ngt v truyn thng ni tip; gii thiu mt s
h vi x l thng dng khc. Gii thiu mt s bi ton ng dng tiu biu.
9. Nhim v ca sinh vin
1. D lp 80 % tng s thi lng ca hc phn.
2. Chun b tho lun.
3. Bi tp, Bi tp ln (di): Khng
10. Ti liu hc tp
- Sch, gio trnh chnh:
[1] Bi ging Vi x l vi iu khin
- Sch tham kho:
[1] Vn Th Minh, K thut vi x l, NXB KHKT, 1997.
[2] Tng Vn On, H vi iu khin 8051, NXB KH&KT, 2005.
[3] Nguyn Tng Cng, Phan Quc Thng, Cu trc v lp trnh h vi iu
khin 8051, NXB KH&KT, 2004.
[4] Michael Hordeski, Personal Computer Interfaces, Mc. Graw Hill, 1995.
[5] http://picat.dieukhien.net
11. Tiu chun nh gi sinh vin v thang im
11.1. Cc hc phn l thuyt
Tiu chun nh gi
1. Chuyn cn;
2. Tho lun, bi tp;
3. Bi tp ln (di);
4. Kim tra gia hc phn;
5. Thi kt thc hc phn;
6. Khc.
Thang im
- im nh gi b phn chm theo thang im 10 vi trng s nh sau:
+ Kim tra gia hc phn: 20 %.
+ im thi kt thc hc phn: 80 %.
12. Ni dung chi tit hc phn v lch trnh ging dy
Ngi bin son: ThS. Nguyn Tun Anh
ThS. Nguyn Tun Linh
ThS. Nguyn Vn Huy
Th.S Tng Cm Nhung
Th.S Phng Th Thu Hin
ThS. Nguyn Tin Duy
Ti liu
Hnh
Tun hc tp,
Ni dung thc
th tham
hc
kho
Chng I: Tng quan v vi x l vi iu khin
1.1. Gii thiu chung v vi x l vi iu khin
1.1.1. Tng quan
1.1.2. Lch s pht trin ca cc b x l
1.1.3. Vi x l v vi iu khin
1.2. Cu trc chung ca h vi x l
1.2.1. Khi x l trung tm (CPU)
1 1.2.2. B nh (Memory) [1] - [4] Ging
1.2.3. Khi phi ghp vo/ra (I/O)
1.2.4. H thng bus
1.3. nh dng d liu v biu din thng tin trong
h vi x l vi iu khin
1.3.1. Cc h m
1.3.2. Biu din s v k t
1.3.3. Cc php ton s hc trn h m nh phn
Chng II: H vi x l Intel 80x86
2.1. Cu trc phn cng ca b vi x l 8086
2 2.1.1. Tng quan [1] - [4] Ging
2.1.2. Cu trc bn trong v s hot ng
2.1.3. Cc ch a ch
2.2. Tp lnh
2.2.1. Gii thiu chung
3 [1] - [4] Ging
2.2.2. Cc nhm lnh
2.3. Biu thi gian ghi/c
2.4. Lp trnh hp ng (Assembly) cho vi x l
80x86
4 [1] - [4] Ging
2.4.1. Gii thiu chung v hp ng
2.4.2. Cu trc ca chng trnh hp ng
2.4.3. Cc cu trc iu khin c bn
2.4.4. Cc bc khi lp trnh
2.4.5. Cc bi tp v d
5 Tho lun
Chng III: H vi iu khin onchip MCS 8051
3.1. Gii thiu chung v vi iu khin
3.1.1. Gii thiu chung
6 [1] - [4] Ging
3.1.2. Khi nim vi iu khin
3.1.3. Cu trc chung ca vi iu khin
3.2. Kin trc vi iu khin 8051
7 Kin trc vi iu khin 8051 (tip) [1] - [4] Ging
8 Kim tra gia k
3.3. Tp lnh 8051 v lp trnh hp ng cho 8051
9 3.3.1. Tp lnh 8051 [1] - [4] Ging
3.3.2. Thnh phn ngn ng assembly
10 3.4. Kin trc vi iu khin 8051 [1] - [4] Ging
Tho
11 Tho lun [1] - [4]
lun
12 Kin trc vi iu khin 8051 (tip) [1] - [4] Ging
Chng IV: ng dng Tho
13 [1] - [4]
Tho lun lun
14 Chng V: Cc h VK tin tin [1] - [4] Ging
Tho
15 Tho lun [1] - [4]
lun
Bi ging Chng 1
Vi x l - Vi iu khin Tng quan v vi x l vi iu khin
CHNG 1.
TNG QUAN V VI X L VI IU KHIN
Mc tiu:
Gip sinh vin hiu v lch s ra i ca h vi x l vi iu khin; khi nim,
cu to v nguyn l ca h vi x l vi iu khin; n li kin thc v cc h
thng s m.
Tm tt chng:
Chng chia lm 3 phn:
Gii thiu chung v vi x l vi iu khin
Tng quan
Lch s pht trin ca cc b x l
Vi x l v vi iu khin
Cu trc chung ca h vi x l
Khi x l trung tm (CPU)
B nh (Memory)
Khi phi ghp vo/ra (I/O)
H thng bus
nh dng d liu v biu din thng tin trong h vi x l vi iu khin
Cc h m
Biu din s v k t
Cc php ton s hc trn h m nh phn
B mn K thut my tnh Khoa in t 9

Trng H K thut Cng nghip
Bi ging Chng 1
1.1 GII THIU CHUNG V VI X L VI IU KHIN
1.1.1 Tng quan
Vi x l (vit tt l P hay uP), i khi

cn c gi l b vi x l, l mt linh kin
in t c ch to t cc tranzito thu nh
tch hp ln trn mt vi mch tch hp n.
Khi x l trung tm (CPU) l mt b vi x
l c nhiu ngi bit n nhng ngoi ra
nhiu thnh phn khc trong my tnh cng
c b vi x l ring ca n, v d trn card
Hnh 1-1.B vi x l Intel
mn hnh (video card) chng ta cng c mt 80486DX2
b vi x l.
Trc khi xut hin cc b vi x l, cc CPU c xy dng t cc mch tch

hp c nh ring bit, mi mch tch hp ch cha khong vo chc tranzito. Do ,
mt CPU c th l mt bng mch gm hng ngn hay hng triu vi mch tch hp.
Ngy nay, cng ngh tch hp pht trin, mt CPU c th tch hp ln mt hoc
vi vi mch tch hp c ln, mi vi mch tch hp c ln cha hng ngn hoc hng
triu tranzito. Nh cng sut tiu th v gi thnh ca b vi x l gim ng
k.
Vi iu khin l mt my tnh c tch hp trn mt chp, n thng c s
dng iu khin cc thit b in t. Vi iu khin, thc cht, l mt h thng
bao gm mt vi x l c hiu sut dng v gi thnh thp (khc vi cc b vi x
l a nng dng trong my tnh) kt hp vi cc khi ngoi vi nh b nh, cc m
un vo/ra, cc m un bin i s sang tng t v tng t sang s,... my tnh
th cc m un thng c xy dng bi cc chp v mch ngoi.
Vi iu khin thng c dng xy dng cc h thng nhng. N xut hin
kh nhiu trong cc dng c in t, thit b in, my git, l vi sng, in thoi,
u c DVD, thit b a phng tin, dy chuyn t ng, v.v.
Hu ht cc vi iu khin ngy nay c xy dng da trn kin trc Harvard,
kin trc ny nh ngha bn thnh phn cn thit ca mt h thng nhng. Nhng
thnh phn ny l li CPU, b nh chng trnh (thng thng l ROM hoc b
nh Flash), b nh d liu (RAM), mt hoc vi b nh thi v cc cng vo/ra
giao tip vi cc thit b ngoi vi v cc mi trng bn ngoi - tt c cc khi ny
c thit k trong mt vi mch tch hp. Vi iu khin khc vi cc b vi x l a
nng ch l n c th hot ng ch vi vi vi mch h tr bn ngoi.
10 B mn K thut my tnh Khoa in t

Bi ging Chng 1
1.1.2 Lch s pht trin ca cc b x l
Hnh 1-2. Lch s pht trin ca VXL

- Th h 1 (1971 - 1973): vi x l 4 bit, i din l 4004, 4040, 8080 (Intel) hay
IPM-16 (National Semiconductor).
+ di word thng l 4 bit (c th ln hn).
+ Tc 10 - 60 s / lnh vi tn s xung nhp 0.1 - 0.8 MHz. + Tp lnh n gin
v phi cn nhiu vi mch ph tr.
- Th h 2 (1974 - 1977): vi x l 8 bit, i din l 8080, 8085 (Intel) hay Z80 .
+ Tp lnh phong ph hn.
+ a ch c th n 64 KB. Mt s b vi x l c th phn bit 256 a ch cho
thit b ngoi vi.
+ S dng cng ngh NMOS hay CMOS.
+ Tc 1 - 8 s / lnh vi tn s xung nhp 1 - 5 MHz
- Th h 3 (1978 - 1982): vi x l 16 bit, i din l 68000/68010 (Motorola) hay
8086/ 80286/ 80386 (Intel)
+ Tp lnh a dng vi cc lnh nhn, chia v x l chui.
+ a ch b nh c th t 1 - 16 MB v c th phn bit ti 64KB a ch cho
ngoi vi
+ S dng cng ngh HMOS.
+ Tc 0.1 - 1 s / lnh vi tn s xung nhp 5 - 10 MHz.
- Th h 4: vi x l 32 bit 68020/68030/68040/68060 (Motorola) hay 80386/80486
(Intel) v vi x l 32 bit Pentium (Intel)
+ Bus a ch 32 bit, phn bit 4 GB b nh. + C th dng thm cc b ng x l
(coprocessor). + C kh nng lm vic vi b nh o.
+ C cc c ch pipeline, b nh cache.
+ S dng cng ngh HCMOS.
- Th h 5: vi x l 64 bit
Bi ging Chng 1
1.1.3 Vi x l v vi iu khin
Khi nim vi x l (microprocessor) v vi iu khin (microcontroller).
V c bn hai khi nim ny khng khc nhau nhiu, vi x l l thut ng
chung dng cp n k thut ng dng cc cng ngh vi in t, cng ngh
tch hp v kh nng x l theo chng trnh vo cc lnh vc khc nhau. Vo
nhng giai on u trong qu trnh pht trin ca cng ngh vi x l, cc chip (hay
cc vi x l) c ch to ch tch hp nhng phn cng thit yu nh CPU cng
cc mch giao tip gia CPU v cc phn cng khc. Trong giai on ny, cc phn
cng khc (k c b nh) thng khng c tch hp trn chip m phi ghp ni
thm bn ngoi. Cc phn cng ny c gi l cc ngoi vi (Peripherals). V sau,
nh s pht trin vt bc ca cng ngh tch hp, cc ngoi vi cng c tch hp
vo bn trong IC v ngi ta gi cc vi x l c tch hp thm cc ngoi vi l
cc vi iu khin.
Vi x l c cc khi chc nng cn thit ly d liu, x l d liu v xut
d liu ra ngoi sau khi x l. V chc nng chnh ca Vi x l chnh l x l d
liu, chng hn nh cng, tr, nhn, chia, so snh.v.v... Vi x l khng c kh nng
giao tip trc tip vi cc thit b ngoi vi, n ch c kh nng nhn v x l d liu
m thi.
vi x l hot ng cn c chng trnh km theo, cc chng trnh ny
iu khin cc mch logic v t vi x l x l cc d liu cn thit theo yu cu.
Chng trnh l tp hp cc lnh x l d liu thc hin tng lnh c lu tr
trong b nh, cng vic thc hnh lnh bao gm: nhn lnh t b nh, gii m lnh
v thc hin lnh sau khi gii m.
thc hin cc cng vic vi cc thit b cui cng, chng hn iu khin
ng c, hin th k t trn mn hnh .... i hi phi kt hp vi x l vi cc mch
in giao tip vi bn ngoi c gi l cc thit b I/O (nhp/xut) hay cn gi l
cc thit b ngoi vi. Bn thn cc vi x l khi ng mt mnh khng c nhiu hiu
qu s dng, nhng khi l mt phn ca mt my tnh, th hiu qu ng dng ca Vi
x l l rt ln. Vi x l kt hp vi cc thit b khc c s trong cc h thng
ln, phc tp i hi phi x l mt lng ln cc php tnh phc tp, c tc
nhanh. Chng hn nh cc h thng sn xut t ng trong cng nghip, cc tng
i in thoi, hoc cc robot c kh nng hot ng phc tp v.v...
B Vi x l c kh nng vt bc so vi cc h thng khc v kh nng tnh
ton, x l, v thay i chng trnh linh hot theo mc ch ngi dng, c bit
hiu qu i vi cc bi ton v h thng ln. Tuy nhin i vi cc ng dng nh,
tm tnh ton khng i hi kh nng tnh ton ln th vic ng dng vi x l cn
cn nhc. Bi v h thng d ln hay nh, nu dng vi x l th cng i hi cc
khi mch in giao tip phc tp nh nhau. Cc khi ny bao gm b nh cha
d liu v chng trnh thc hin, cc mch in giao tip ngoi vi xut nhp v
iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc hin c

Bi ging Chng 1
cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng
v cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh
phc tp, chim nhiu khng gian, mch in phc tp v vn chnh l trnh
ngi thit k. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp
p dng cho cc h thng nh.
V mt s nhc im trn nn cc nh ch to tch hp mt t b nh v mt
s mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht c gi l
Microcontroller-Vi iu khin. Vi iu khin c kh nng tng t nh kh nng
ca vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu.
Vi iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm
vng mt khi lng kin thc qu ln nh ngi dng vi x l, kt cu mch in
dnh cho ngi dng cng tr nn n gin hn nhiu v c kh nng giao tip trc
tip vi cc thit b bn ngoi. Vi iu khin tuy c xy dng vi phn cng dnh
cho ngi s dng n gin hn, nhng thay vo li im ny l kh nng x l b
gii hn (tc x l chm hn v kh nng tnh ton t hn, dung lng chng
trnh b gii hn). Thay vo , Vi iu khin c gi thnh r hn nhiu so vi vi x
l, vic s dng n gin, do n c ng dng rng ri vo nhiu ng dng c
chc nng n gin, khng i hi tnh ton phc tp.
Vi iu khin c ng dng trong cc dy chuyn t ng loi nh, cc robot
c chc nng n gin, trong my git, t v.v...
Nm 1976 Intel gii thiu b vi iu khin (microcontroller) 8748, mt chip
tng t nh cc b vi x l v l chip u tin trong h MCS-48. phc tp,
kch thc v kh nng ca Vi iu khin tng thm mt bc quan trng vo nm
1980 khi intel tung ra chip 8051, b Vi iu khin u tin ca h MCS-51 v l
chun cng ngh cho nhiu h Vi iu khin c sn xut sau ny. Sau rt
nhiu h Vi iu khin ca nhiu nh ch to khc nhau ln lt c a ra th
trng vi tnh nng c ci tin ngy cng mnh.
Trong ti liu ny, ranh gii gia hai khi nim vi x l v vi iu khin
thc s khng cn phi phn bit r rng. Chng ti s dng thut ng vi x l
khi cp n cc khi nim c bn ca k thut vi x l ni chung v s dng
thut ng vi iu khin khi i su nghin cu mt h chip c th.
1.1.4 ng dng ca Vi x l vi iu khin

Vi x l, chnh l chip ca cc loi my tnh ngy nay, nn hn cc bn bit
rt r n c nhng ng dng g. y, ti ch ni n ng dng ca vi iu khin.
Vi iu khin c th dng trong thit k cc loi my tnh nhng. My tnh nhng
c trong hu ht cc thit b t ng, thng minh ngy nay. Chng ta c th dng vi
iu khin thit k b iu khin cho cc sn phm nh:

Bi ging Chng 1
Trong cc sn phm dn dng:

o Nh thng minh:
Ca t ng
Kha s
T ng iu tit nh sng thng minh (bt/tt n theo thi gian,
theo cng nh sng,...)
iu khin cc thit b t xa (qua iu khin, qua ting v tay,...)
iu tit hi m, iu tit nhit , iu tit khng kh, gi
H thng v sinh thng minh,...
o Trong qung co:
Cc loi bin qung co nhy ch
Qung co ma trn LED (mt mu, 3 mu, a mu)
iu khin my cun bt qung co,...
o Cc my mc dn dng
My iu tit m cho vn cy
Bung p trng g/vt
ng h s, ng h s c iu khin theo thi gian
o Cc sn phm gii tr
My nghe nhc
My chi game
u thu k thut s, u thu set-top-box,...
Trong cc thit b y t:
o My mc thit b h tr: my o nhp tim, my o ng huyt, my o
huyt p, in tim , in no ,
o My ct/mi knh
o My chp chiu (city, X-quang,...)
Cc sn phm cng nghip:
o iu khin ng c
o iu khin s (PID, m,...)
o o lng (o in p, o dng in, p sut, nhit ,...)
o Cn bng ti, cn toa xe, cn t,...
o My cn thp: iu khin ng c my cn, iu khin my qun thp,..
o Lm b iu khin trung tm cho RoBot
o n nh tc ng c
o m sn phm ca 1 nh my, x nghip,
o My vn hnh t ng (dng CNC)
o ...

Bi ging Chng 1
1.2 Cu trc chung ca h vi x l

S khi mt my tnh c in
Hnh 1-3. S khi mt my tnh c in

- ALU (n v logic s hc): thc hin cc bi ton cho my tnh bao gm: +,
*, /,-, php ton logic,
- Control (iu khin): iu khin, kim sot cc ng d liu gia cc
thnh phn ca my tnh.
- Memory (b nh): lu tr chng trnh hay cc kt qu trung gian.
- Input (nhp), Output (Xut): xut nhp d liu (cn gi l thit b ngoi vi).
V c bn kin trc ca mt vi x l gm nhng phn cng sau:

- n v x l trung tm CPU (Central Processing Unit).
- Cc b nh (Memories).
- Cc cng vo/ra (song song (Parallel I/O Ports), ni tip (Serial I/O
Ports))
- Cc b m/b nh thi (Timers).
- H thng BUS (a ch, d liu, iu khin)
Ngoi ra vi mi loi vi iu khin c th cn c th c thm mt s phn
cng khc nh b bin i tng t-s ADC, b bin i s-tng t DAC, cc
mch iu ch dng sng WG, iu ch rng xung PWMB no ca mi vi x
l chnh l CPU, cc phn cng khc ch l cc c quan chp hnh di quyn ca
CPU. Mi c quan ny u c mt c ch hot ng nht nh m CPU phi tun
theo khi giao tip vi chng.

Bi ging Chng 1
Hnh 1-4. S khi h vi x l

c th giao tip v iu khin cc c quan chp hnh (cc ngoi vi), CPU
s dng 03 loi tn hiu c bn l tn hiu a ch (Address), tn hiu d liu (Data)
v tn hiu iu khin (Control). V mt vt l th cc tn hiu ny l cc ng nh
dn in ni t CPU n cc ngoi vi hoc thm ch l gia cc ngoi vi vi nhau.
Tp hp cc ng tn hiu c cng chc nng gi l cc bus. Nh vy ta c cc
bus a ch, bus d liu v bus iu khin.
1.2.1 Khi x l trung tm (CPU)

CPU c cu to gm c n v x l s hc v lgic (ALU), cc thanh ghi, cc
khi lgic v cc mch giao tip. Chc nng ca CPU l tin hnh cc thao tc tnh
ton x l, a ra cc tn hiu a ch, d liu v iu khin nhm thc hin mt
nhim v no do ngi lp trnh a ra thng qua cc lnh (Instructions).

Bi ging Chng 1
Hnh 1-5. Khi x l trung tm
1.2.2 H thng bus

Bus a ch - Address bus
L cc ng tn hiu song song 1 chiu ni t CPU n b nh
rng bus: l s cc ng tn hiu, c th l 8, 18, 20, 24, 32 hay 64.
CPU gi gi tr a ch ca nh cn truy nhp (c/ghi) trn cc ng tn
hiu ny.
1 CPU vi n ng a ch s c th a ch ho c 2n nh. V d, 1 Cpu
c 16 ng a ch c th a ch ho c 216 hay 65,536 (64K) nh.
Bus d liu - Data bus
rng Bus: 4, 8, 16, 32 hay 64 bits
L cc ng tn hiu song song 2 chiu, nhiu thit b khc nhau c th c
ni vi bus d liu; nhng ti mt thi im, ch c 1 thit b duy nht c th c
php a d liu ln bus d liu.
Bt k thit b no c kt ni n bus d liu phi c u ra dng 3 trng
thi, sao cho n c th trng thi treo (tr khng cao) nu khng c s dng.
Bus iu khin - Control bus
Bao gm 4 n 10 ng tn hiu song song.
CPU gi tn hiu ra bus iu khin cho php cc u ra ca nh hay cc
cng I/O c a ch ho. Cc tn hiu iu khin thng l: c/ ghi b nh -
memory read, memory write, c/ ghi cng vo/ra - I/O read, I/O write.
V d, c 1 byte d liu t nh s cn n cc hot ng sau:

Bi ging Chng 1
CPU a ra a ch ca nh cn c ln bus a ch.

CPU a ra tn hiu c b nh - Memory Read trn bus iu khin.
Tn hiu iu khin ny s cho php thit b nh c a ch ho a byte
d liu ln bus d liu. Byte d liu t nh s c truyn ti qua bus d liu n
CPU.
1.3 nh dng d liu v biu din thng tin trong h vi x l vi iu

khin
1.3.1 Cc h m
H thp phn - Decimal
H nh phn - Binary
H16 - Hexadecimal
M BCD (standard BCD, gray code): (Binary Coded Decimal)
Trong thc t, i vi mt s ng dng nh m tn, o in p, ng ra
dng s thp phn, ta dng m BCD. M BCD dng 4 bit nh phn m ho
cho mt
s thp phn 0..9. Nh vy, cc s hex A..F khng tn ti trong m BCD.
M BCD gm c 2 loi:
- M BCD khng nn (unpacked): biu din mt s BCD bng 8 bit nh phn
- M BCD nn (packed): biu din mt s BCD bng 4 bit nh phn
VD: S thp phn 5 2 9
S BCD khng nn 0000 0101b 0000 0010b 0000 1001b
S BCD nn 0101b 0010b 1001b
M hin th 7 on (7-segment display code)
Hnh 1-6.LED 7 thanh v cch m ha

Bi ging Chng 1
Cc m h m thng dng
H 10 H 2 H 8 H 16 Binary-Coded Decimal Gray Code 7-Segment
8421 BCD EXCESS-3 abcdefg Display
0 0000 0 0 0000 0011 0011 0000 111111 0
1 0001 1 1 0001 0011 0100 0001 011000 1
2 0010 2 2 0010 0011 0101 0011 110110 2
3 0011 3 3 0011 0011 0110 0010 111100 3
4 0100 4 4 0100 0011 0111 0110 011001 4
5 0101 5 5 0101 0011 1000 0111 101101 5
6 0110 6 6 0110 0011 1001 0101 101111 6
7 0111 7 7 0111 0011 1010 0100 111000 7
8 1000 10 8 1000 0011 1011 1100 111111 8
9 1001 11 9 1001 0011 1100 1101 111001 9
10 1010 12 A 0001 0000 0100 0011 1111 111110 A
11 1011 13 B 0001 0001 0100 0100 1110 001111 B
12 1100 14 C 0001 0010 0100 0101 1010 000110 C
13 1101 15 D 0001 0011 0100 0110 1011 011110 D
14 1110 16 E 0001 0100 0100 0111 1001 110111 E
15 1111 17 F 0001 0101 0100 1000 1000 100011 F
Bng 1-1. Gi tr tng ng gia cc h s

Bi ging Chng 1
1.3.2 M k t - Alphanumeric CODE (ASCII, EBCDIC)
Hnh 1-7. Bng m ASCII

Bi ging Chng 1
Hnh 1-8. Bng m ASCII c c k t trong phn m rng

Bi ging Chng 1
1.3.3 Cc php ton s hc trn h m nh phn

Php cng nh phn Php tr nh phn
Vo Ra Vo Ra
A B BIN D BOUT A B BIN D BOUT
0 0 0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 1 1 1
0 1 0 1 0 0 1 0 1 1
0 1 1 0 1 0 1 1 0 1
1 0 0 1 0 1 0 0 1 0
1 0 1 0 1 1 0 1 0 0
1 1 0 0 1 1 1 0 0 0
1 1 1 1 1 1 1 1 1 1
Php tr nh phn, chnh l php cng nh phn vi s b 2 ca s tr, trng

hp kt qu dng:
Trng hp kt qu m:
Php nhn, php chia, ngh sinh vin t nghin cu.

Bi ging Chng 2
Vi x l - Vi iu khin H vi x l Intel 80x86
CHNG 2.
H VI X L INTEL 80x86
Mc tiu:
Hiu c cu trc phn cng ca h vi x l; hiu v vn dng c cc ch
a ch; nm c tp lnh v lp trnh cho h vi x l 80x86
Tm tt chng:
Cu trc phn cng ca b vi x l 8086

Ch a ch
Tp lnh
Cc mch ph tr
Biu thi gian ghi/c
Lp trnh hp ng (Assembly) cho vi x l 80x86

Bi ging Chng 2
2.1 Cu trc phn cng ca b vi x l 8086
2.1.1 Tng quan
Hnh 2-1.Tng quan v phn cng b x l

Control Unit (CU) to ra tt c cc tn hiu iu khin trong CPU. N khi
to cc thanh ghi khi m ngun, to ra cc tn hiu ly lnh cho ALU.
Khi iu khin c th c thc hin hon ton bi phn cng (iu khin
cng, v d nh s dng mt b m trng thi v mt mng logic kh lp
trinh) hay kt hp gia cc lnh phn mm (vi lnh c lu tr trong CPU)
v phn cng (b iu khin vi chng trnh. C hai h vi x l Intel 8086
v Motorola 68000 u s dng cc b iu khin vi chng trnh.
Registers l cc b nh nh, nhanh, thng c s dng lu d liu v
a ch gn vi (tng ng vi) cc m lnh ca chng trnh.
ALU thc hin cc php ton s hc v logic
2.1.2 Cu trc bn trong v s hot ng

Trong s khi Hnh 2-2.S hot ng ca CPU ta thy trong CPU 8086
c hai khi chnh: khi phi ghp bus (bus interface unit, BIU) v khi thc hin
lnh (execution unit, EU). Vic chia CPU thnh hai phn ng thi c lin h vi
nhau qua m lnh lm tng ng k tc x l ca CPU. Cc bus bn trong CPU
c nhim v chuyn ti tn hiu ca cc khi khc. Trong s cc bus c bus d liu
16 bit ca ALU, bus cc tn hiu iu khin EU v bus trong ca h thng BIU.
Trc khi i ra bus ngoi hoc i vo bus trong ca b vi x l, cc tn hiu truyn
trn bus thng c cho i qua cc b m nng cao tnh tng thch cho ni
ghp hoc nng cao kh nng phi ghp.

Bi ging Chng 2
Hnh 2-2.S hot ng ca CPU

BIU c nhim v a ra a ch, c m lnh t b nh, c/ghi d liu t/vo
cng hoc b nh. Bn trong BIU cn c b nh m lnh (cn gi l hng i
lnh) dng cha cc lnh c c nm sn ch EU x l. EU c nhim v
cung cp a ch cho BIU khi ny c lnh v d liu, cn bn thn n th gii
m lnh v thc hin lnh. M lnh c vo t b nh c a n u vo ca b
gii m (nm trong khi iu khin CU), cc thng tin thu c t u ra ca b
gii m s c a n mch to xung iu khin to ra cc dy xung khc
nhau (ty tng lnh) iu khin hot ng ca cc b phn bn trong v bn ngoi
CPU. Trong EU cn c khi tnh ton s hc v logic ALU dng thc hin cc
thao tc khc nhau vi cc ton hng ca lnh.
2.1.2.1 S khi bn trong ca 8086

n v giao tip Bus (BIU)
BIU bao gm cc thanh ghi on (segment registers: CS, DS, SS, ES), con tr
lnh IP (instruction pointer) v b iu khin logic bus (bus control logic, BCL).
n v giao din BIU cn c b nh m cho m lnh. B nh ny c chiu di 4
byte (trong 8088) v 6 byte (trong 8086). B nh m m lnh c ni vi khi
iu khn CB (control block) ca n v thc hin lnh EU. B nh ny lu tr tm
thi m lnh trong mt dy gi l hng i lnh. Hng i lnh cho php b vi x l
c kh nng x l xen k lin tc dng m lnh (pipelining). Hot ng ca b CPU
c chia lm ba giai on: c m lnh (operation code fetching), gii m lnh
(decording) v thc hin lnh (execution).

Bi ging Chng 2
BIU a ra a ch, c m lnh t b nh, c/ghi d liu t cc cng vo hoc
b nh. Ni cch khc BIU chu trch nhim a a ch ra bus v trao i d liu
vi bus.
Hnh 2-3.S khi bn trong 8086

n v x l lnh (EU)
Trong EU c khi iu khin (control unit, CU). Chnh ti bn trong khi
iu khin ny c mch gii m lnh. M lnh c vo t b nh c a n u
vo ca b gii m, cc thng tin thu c t u ra ca n s c a n mch
to xung iu khin, kt qu thu c l cc dy xung khc nhau tu theo m lnh,
iu khin hot ng ca cc b phn bn trong v bn ngoi CPU.
Trong EU c khi s hc v lgic (arithmatic and logic unit, ALU) chuyn
thc hin cc php tnh s hc v logic m ton t ca n nm trong cc thanh ghi
a nng. Kt qu thng c t v thanh ghi AX.
Ngoi ra trong EU cn c cc thanh ghi a nng (registers: AX, BX, CX,
DX, SP, BP, SI, DI), thanh ghi c FR (flag register).
Tm li, khi CPU hot ng EU s cung cp thng tin v a ch cho BIU
khi ny c lnh v d liu, cn bn thn n th gii m v thc hin lnh.

Bi ging Chng 2
Nhm cc thanh ghi
Vi x l 8086 c tt c 14 thanh ghi ni. Cc thanh ghi ny c th phn nhm
nh sau:
- Thanh ghi d liu (data register)
- Thanh ghi ch s v con tr (index & pointer register)
- Thanh ghi on (segment register)
- Thanh ghi c
Cc thanh ghi d liu
Cc thanh ghi d liu gm c cc thanh ghi 16 bit AX, BX, CX v DX trong
na cao v na thp ca mi thanh ghi c th nh a ch mt cch c lp. Cc
na thanh ghi ny (8 bit) c tn l AH v AL, BH v BL, CH v CL, DH v DL.
Cc thanh ghi ny c s dng trong cc php ton s hc v logic hay trong
qu trnh chuyn d liu.
Trong :
AX (ACC Accumulator): thanh ghi tch lu
BX (Base): thanh ghi c s
CX (Count): m
DX (Data): thanh ghi d liu
Bng 2-1. Cc thanh ghi ch ra ng dng ca cc thanh ghi d liu trong cc
php ton nh sau
Thanh ghi Mc ch
AX MUL, IMUL (ton hng ngun kch thc word)
DIV, IDIV (ton hng ngun kch thc word)
IN (nhp word)
OUT (xut word)
CWD
Cc php ton x l chui (string)
AL MUL, IMUL (ton hng ngun kch thc byte)
DIV, IDIV (ton hng ngun kch thc byte)
IN (nhp byte)
OUT (xut byte)
XLAT
AAA, AAD, AAM, AAS (cc php ton ASCII)
CBW (i sang word)
DAA, DAS (s thp phn)

Bi ging Chng 2
Thanh ghi Mc ch
Cc php ton x l chui (string)
AH MUL, IMUL (ton hng ngun kch thc byte)
DIV, IDIV (ton hng ngun kch thc byte)
CBW (i sang word)
BX XLAT
CX LOOP, LOOPE, LOOPNE
Cc php ton string vi tip du ng REP
CL RCR, RCL, ROR, ROL (quay vi s m byte)
SHR, SAR, SAL (dch vi s m byte)
CX MUL, IMUL (ton hng ngun kch thc word)
DIV, IDIV (ton hng ngun kch thc word)
Bng 2-1. Cc thanh ghi
Cc thanh ghi ch s v con tr
Bao gm cc thanh ghi 16 bit SP, BP, SI v DI, thng cha cc gi tr offset
( lch) cho cc phn t nh a ch trong mt phn on (segment). Chng c th
c s dng trong cc php ton s hc v logic. Hai thanh ghi con tr (SP Stack
Pointer v BP Base Pointer) cho php truy xut d dng n cc phn t ang
trong ngn xp (stack) hin hnh. Cc thanh ghi ch s (SI Source Index v DI
Destination Index) c dng truy xut cc phn t trong cc on d liu v
on thm (extra segment). Thng thng, cc thanh ghi con tr lin h n on
stack hin hnh v cc thanh ghi ch s lin h n don d liu hin hnh. SI v DI
dng trong cc php ton chui.
Cc thanh ghi on
Bao gm cc thanh ghi 16 bit CS (Code segment), DS (Data segment), SS
(stack segment) v ES (extra segment), dng nh a ch vng nh 1 MB bng
cch chia thnh 16 on 64 KB.
Tt c cc lnh phi trong on m hin hnh, c nh a ch thng qua
thanh ghi CS. Offset ( lch) ca m c xc nh bng thanh ghi IP. D liu
chng trnh thng c t on d liu, nh v thng qua thanh ghi DS. Stack
nh v thng qua thanh ghi SS. Thanh ghi on thm c th s dng nh a ch
cc ton hng, d liu, b nh v cc phn t khc ngoi on d liu v stack hin
hnh.
Do Bus a ch ca vi x l 8086 c kch thc l 20 bit, nhng cc thanh
ghi con tr v thanh ghi ch s ch rng 16 bit nn khng th nh a ch cho ton
b nh vt l ca my tnh l (220B = 1.048.576B = 1Mbyte). V vy trong ch
thc (real mode) b nh c chia lm nhiu on mt thanh ghi con tr 16 bit

Bi ging Chng 2
c th qun l c. Cc thanh ghi on 16 bit s ch ra a ch u ca 4 on
trong b nh, dung lng ln nht ca mi on nh s di 216 = 64 Kbyte v ti
mt thi im nht nh b vi x l ch lm vic c vi 4 on nh 64Kbyte ny.
Vic thay i gi tr ca cc thanh ghi on lm cho cc on c th dch chuyn
linh hot trong khng gian 1 Mbyte, v vy cc on c th nm cch nhau khi
thng tin cn lu trong chng i hi dung lng 64 Kbyte hoc cng c th
nm chng nhau do c nhng on khng dng ht di 64 Kbyte v v th cc
on khc c th bt u ni tip ngay sau . a ch ca nh nm u on
c ghi trong mt thanh ghi on 16 bit, a ch ny gi l a ch c s. Mi su
bit ny tng ng vi cc ng dy a ch t A4 n A20. Nh vy gi tr vt l
ca a ch on l gi tr trong thanh ghi on dch sang tri 4 v tr. iu ny
tng ng vi php nhn vi 24 = 16. a ch ca cc nh khc nm trong on
tnh c bng cch cng thm vo a ch c s mt gi tr gi l a ch lch hay
lch (offset), gi nh th v n ng vi khong lch ca to mt nh c th
no so vi u on. lch ny c xc nh bi cc thanh ghi 16 bit khc
ng vai tr thanh ghi lch (offset register). Nguyn tc ny dn n cng thc tnh
a ch vt l (physical address) t a ch on (segment) trong thanh ghi on v
a ch lch (offset) trong thanh ghi con tr nh sau:
a ch vt l = Thanh ghi on x 16 + Thanh ghi lch
Thanh ghi c
Cc c ch th tnh trng ca b vi x l cng nh iu khin s hot ng ca
n.
Mt thanh ghi c l 1 flip-flop m n ch th mt s tnh trng c to bi vic
thc thi 1 lnh hay cc hot ng iu khin c th ca EU. Thanh ghi c 16-bit
trong EU c 9 c.
- Cc c iu kin - conditional flags: C 6 c c gi l c iu kin.
Chng c lp hay xo l bi EU, da trn kt qu ca cc php ton s
hc.
- C iu khin - control flags : 3 c cn li trong thanh ghi c c s
dng iu khin mt s hot ng ca vi x l. Chng c gi l cc
c iu khin.
Bit pos 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Func x x x x OF DF IF TF SF ZF x AF x PF x CF
- Carry Flag (CF)- set by carry out of MSB.
- Parity Flag (PF)- set if result has even parity.
- Auxiliary carry Flag (AF)- for BCD
- Zero Flag (ZF)- set if results = 0

Bi ging Chng 2
- Sign Flag (SF) = MSB of result
- TF- single step trap flag
- IF- interrupt enable flag
- DF- string direction flag
- Overflow Flag (OF)- overflow flag
Cc c iu kin
- C nh - Carry flag (CF) C ny c t ln 1 khi tnh ton mt s
khng du b trn. V d khi cng dng byte: 255+1 (kt qu khng nm
trong vng 0..255). Khi khng trn, c ny t bng 0
- C chn l - parity flag (PF) C PF=1 khi s lng bit 1 trong kt
qu l chn, PF=0 khi s lng bit 1 l l.
- C nh ph - auxiliary carry flag (AF)- c ngha quan trng i vi
php cng v php tr cc s BCD; AF=1 khi nhm 4 bit thp (khng
du) trn. Ch c s dng vi lnh thao tc vi s BCD.
- C khng - zero flag (ZF)- ch th rng kt qa ca php ton s hc hay
logic l bng 0.
- C du - sign flag (SF) - ch th du s hc ca kt qu sau 1 php ton
s hc. Nu s l m (MSB=1) th SF=1 v ngc li SF=0 khi MSB=0
- C trn - overflow flag (OF)- C trn OF=1 khi tnh ton trn s m. V
d khi tnh bi 2 byte: 100+50 (kt qu ngoi khong -128..127)
Cc c iu khin
Cc c iu khin c lp hay xo thng qua cc lnh c bit trong chng
trnh ngi dng. Ba c iu khin l:
- C by - trap flag (TF) Khi c TF=1, CPU s ch ngt t thit b ngoi.
- C ngt - interrupt flag (IF) - c s dng cho php hay cm ngt ca
cc chng trnh;
- C hng - direction flag (DF) - c s dng vi cc lnh chui, mng d
liu, nu DF=0 thc thi theo hng tin, DF=1 th thi theo hng li.
Khng c lnh ring lp c TF.

Bi ging Chng 2
2.1.3 M t chc nng cc chn
Hnh 2-4. S chn 8086/8088

8088 v 8086 l gn tng t nh nhau, ch khc ch 8088 c 8bit d liu cn
8086 c 16 bit d liu ngoi.
C 2 b x l u c:
- rng bus d liu ni l 16 bit
- 20 ng a ch (16 address/data + 4 address/status), cho php a ch
ho khng gian b nh ti a l 1Mbyte ch dn knh address/data
pins (8088 only multiplexes 8 pins)
- 2 ch hot ng (maximum v minimum mode)
- Cng 1 tp lnh
2.2 Ch a ch
2.2.1 Khi nim ch a ch

Trc khi i vo cc ch a ch ca Vi x l 8086 ta ni qua v cch m ho
lnh trong vi x l 8086.
Lnh ca b vi x l c ghi bng cc k t di dng gi nh ngi s
dng d nhn bit. i vi bn thn b vi x l th lnh cho n c m ho di
dng cc s 0 v 1 (cn gi l m my) v l dng biu din thng tin duy nht
m my c th hiu c. V lnh cho b vi x l c cho di dng m nn sau
khi nhn lnh, b vi x l phi thc hin gii m lnh ri sau mi thc hin lnh

Bi ging Chng 2
Mt lnh c th c di mt vi byte tu theo b vi x l. i vi vi x l
8086 mt lnh c di t 1 n 6 byte. Ta s dng lnh MOV gii thch cch
ghi lnh ni chung ca 8086.
Byte 1 Byte 2 Byte 3 Byte 4
1 0 0 0 1 0
DispL DispH
Opcode D W MOD REG R/M
Hoc
Disp: Displacement (dch chuyn) a ch trc tip a ch trc tip

phn thp phn cao
Dng thc cc byte m lnh ca lnh MOV

T y ta thy m ho lnh MOV cn t nht 2 byte. Trong 6 bit u dng
cha m lnh, 6 bit ny lun l 100010. i vi cc thanh ghi on th iu ny
li khc. Bit W dng ch ra rng mt byte (W=0) hoc mt t (W=1) s c
chuyn i. Trong thao tc chuyn d liu, mt ton hng lun bt buc phi l thanh
ghi. B vi x l s dng 2 hoc 3 bit (REG) m ho cc thanh ghi trong CPU
nh sau:
Thanh ghi M Thanh ghi on M
W=1 W=0 CS 01
AX AL 000 DS 11
BX BL 011 ES 00
CX CL 001 SS 10
DX DL 010
SP AH 100
DI BH 111
BP CH 101
SI DH 110
Bit D l hng i ca d liu. D = 1 th d liu n thanh ghi, D = 0 th d liu
i ra t thanh ghi.
Hai bit MOD (ch ) cng vi ba bit R/M (thanh ghi/b nh) to ra 5 bit dng
ch ra ch a ch cho cc ton hng ca lnh. Bng 2.2 cho ta thy cch m
ho cc ch a ch.
MOD
00 01 10 11
R/M
W=0 W=1
000 [BX+SI] [BX+SI]+d8 [BX+SI]+d16 AL AX
001 [BX+DI] [BX+DI]+d8 [BX+DI]+d16 CL CX
010 [BP+SI] [BP+SI]+d8 [BP+SI]+d16 DL DX
011 [BP+DI] [BP+DI]+d8 [BP+DI]+d16 BL BX

Bi ging Chng 2
MOD
00 01 10 11
R/M
W=0 W=1
100 [SI] [SI]+d8 [SI]+d16 AH SP
101 [DI] [DI]+d8 [DI]+d16 CH BP
110 D16(/c trc tip) [BP]+d8 [BP]+d16 DH SI
111 [BX] [BX]+d8 [BX]+d16 BH DI
Bng 2-2.Phi hp MOD v R/M to ra cc ch a ch
V d 1: MOV CL, [BX]
Byte 1 Byte 2
1 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1
Opcode D W MOD REG R/M
M lnh MOV: 100010

D = 1: Chuyn ti thanh ghi
W = 0: Chuyn 1 byte
MOD: ch 00 v R/M l 111
REG: 001 m ho CL
V d 2: MOV AH, 2Ah
Byte 1 Byte 2 Byte 3
1 0 0 0 1 0 1 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 1 0
Opcode D W MOD REG R/M 2Ah
M lnh MOV: 100010

W = 0: Chuyn 1 byte
MOD: ch 00 v R/M l 110: a ch trc tip
REG: 100 m ho AH
2Ah = 00101010 d liu cn chuyn ti AH
V d 3: MOV CX, [BX][SI]+DATA
DATA l mt bin trong b nh, l a ch lch v l mt hng (v d nh
0BFF).
Lnh ny s s dng 4 byte t chc nh sau:
1 0 0 0 1 0 1 1 1 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 0 1 1
Opcode D W MOD REG R/M FFh 0Bh
M lnh MOV: 100010

Bi ging Chng 2
W =1: Chuyn 1 Word
MOD: ch 10 (offset 16 bit) v R/M l 000 (s dng thanh ghi c s
BX v thanh ghi ch s SI).
REG: 001 m ho thanh ghi CX.
Nh vy trong k hiu nh phn v hexa ta c.
10001011 10001000 11111111 00001011
8Bh 88h FFh 0Bh
2.2.2 Cc ch a ch
Ch a ch (addressing mode) l cch CPU tm thy ton hng cho cc
lnh ca n khi hot ng. Mt b vi x l c th c nhiu ch a ch. Cc ch
a ch ny c xc nh ngay t khi ch to v khng th thay i c. B vi
x l 8086/8088 c 9 ch a ch sau:
- Ch a ch thanh ghi.
- Ch a ch tc th.
- Ch a ch trc tip.
- Ch a ch gin tip qua thanh ghi.
- Ch a ch tng i c s.
- Ch a ch tng i ch s.
- Ch a ch tng i c s ch s.
- Ch a ch chui (String) mng.
- Ch a ch cng (Port).
- Ch a ch khc.
CH A CH THANH GHI
Trong ch a ch ny ngi ta s dng cc thanh ghi c sn trong CPU nh
l cc ton hng cha d liu cn thao tc, v vy khi thc hin c th t tc
truy nhp cao hn so vi cc lnh truy nhp n b nh.
V d:
MOV BX, DX ;copy noi dung DX vao BX
ADD AX, BX ;AX=AX+BX
CH A CH TC TH
Trong ch ny ton hng ch l mt thanh ghi hay mt nh, cn ton hng
ngun l mt hng s. Ta c th dng ch a ch ny np d liu cn thao tc
vo bt k thanh ghi no (tr thanh ghi on v thanh ghi c) v bt k nh no
trong on d liu DS.

Bi ging Chng 2
V d:
MOV CL, 100 ;chuyen 100 vao CL.
MOV AX, 0BC8h ;chuyen 0BC8h vao AX de roi
MOV DS, AX ;copy noi dung AX vao DS (vi
;khong duoc chuyen truc tiep vao thanh ghi doan).
MOV [BX], 20 ;chuyen 20 vao o nho tai dia chi DS:BX.
CH A CH TRC TIP
Trong ch a ch ny mt ton hng cha a ch lch ca nh dng cha
d liu, cn ton hng kia c th l thanh ghi m khng c l nh.
V d:
MOV AL, [0243H];chuyen noi dung o nho DS:0243 vao AL
MOV [4320], CX ;chuyen noi dung CX vao hai o nho
;lien tiep DS:4320 va DS:4321
CH A CH GIN TIP QUA THANH GHI

Trong ch a ch ny mt ton hng l mt thanh ghi c s dng cha
a ch lch ca nh d liu, cn ton hng kia ch c th l thanh ghi m khng
c l nh. V d:
MOV AL, [BX] ;copy noi dung o nho co dia chi DS:BX
MOV [SI], CL ;copy noi dung CL vao o nho co dia ch
;DS:SI
MOV [DI], AX ;copy noi dung AX vao hai o nho lien
;tiep co dia chi DS:DI va DS:(DI+1)
CH A CH TNG I C S
Trong ch a ch ny cc thanh ghi c s nh BX v BP v cc hng
s biu din cc gi tr dch chuyn c dng tnh a ch hiu dng ca
ton hng trong cc vng nh DS v SS. V d:
MOV CX, [BX]+10 ;copy noi dung hai o nho lien tiep
;co dia chi DS:BX+10 va DS:BX+11
;vao CX
MOV CX, [BX+10] ;cach viet khac cua lenh tren
MOV CX, 10+[BX] ;cach viet khac cua lenh tren
MOV AL, [BP]+5 ;chuyen noi dung o nho co dia chi
;SS:BP+5 vao AL
Quan st trn ta thy: 10 v 5 l cc dch chuyn ca cc ton hng tng
ng. BX+10, BP+5 gi l a ch hiu dng.
DS:BX+10, SS:BP+5 chnh l a ch logic ng vi a ch vt l.
CH A CH TNG I CH S
Trong ch a ch ny cc thanh ghi ch s nh SI v DI v cc hng s biu
din cc gi tr dch chuyn c dng tnh a ch hiu dng ca ton hng
trong cc vng nh DS. V d
Bi ging Chng 2
MOV CX, [SI]+10 ;copy noi dung hai o nho lien tiep
;co dia chi DS:SI+10 va DS:SI+11 vao CX
MOV CX, [SI +10] ;cach viet khac cua lenh tren
MOV CX, 10+[SI] ;cach viet khac cua lenh tren
MOV AL, [DI]+5 ;chuyen noi dung o nho co dia chi
;DS:DI+5 vao AL
CH A CH TNG I CH S C S
Kt hp hai ch a ch ch s v c s ta c ch a ch ch s c s.
Trong ch ny ta dng c hai thanh ghi c s ln thanh ghi ch s tnh a ch
ca ton hng. Nu ta dng thm c thnh phn biu din s dch chuyn ca a
ch th ta c ch a ch tng hp nht: Ch a ch tng i ch s c s.
V d: MOV BX, [BX]+[SI]+10 ;chuyen noi dung hai o nho
;lien tiep co dia chi DS:BX+SI+10 va DS:BX+SI+11 vao CX
MOV AL, [BP+DI+5] ;copy ni dung th: DS:BP+DI+5 vao AL
Cc ch a ch trnh by trn c th tm tt li trong bng sau:
Ch a ch Ton hng Thanh ghi on ngm nh
Thanh ghi Reg
Tc th Data
Trc tip [offset] DS
[BX] DS
Gin tip qua thanh ghi [SI] DS
[DI] DS
[BX]+Disp DS
Tng i c s
[BP]+Disp SS
[DI]+Disp DS
Tng i ch s
[SI]+Disp DS
[BX]+[DI]+Disp DS
[BX]+[SI]+Disp DS
Tng i ch s c s
[BP]+[DI]+Disp SS
[BP]+[SI]+Disp SS
Bng 2-3. Cc ch a ch
Ch : Reg: Thanh ghi, Data: D liu tc th, Disp: Dch chuyn.
CH A CH CHUI (STRING) MNG
Mt chui (string) l mt dy cc byte hoc word lin tip trong b nh. Cc
lnh thao tc vi chui khng s dng bt k mt ch a ch no trn. Mt
chui c th c di ti a ln ti 64K-bytes (mt segments). Ch a ch chui
s dng cc thanh ghi SI, DI, DS v ES. Vi tt c cc lnh thao tc chui u s
dng SI tr vo byte u tin ca chui ngun v DI tr vo byte u tin ca
chui ch.

Bi ging Chng 2
V d: Gi s: DS=1000h, ES=2000h, SI=10h, DI=20h)
MOVSB ;Sao chp chui t 10010h n 20020h
CH A CH CNG (PORT)
Trong h vi x l 80x86 ca Intel c khng gian a ch cho b nh v cng
vo/ra l tch bit nhau. Khng gian a ch cng c th ln n 65536 cng (64K-
ports).
a ch ca mt cng c th c xc nh bi mt hng gi tr kiu byte
(phm vi = 0..255)
V d:
IN AL, 40h ;c cng sao chp ni dung ti
;cng c a ch 40h v thanh ghi AL
OUT 80h, AL ;Ghi cng gi d liu trong thanh
;ghi AL ti cng c a ch 80h
a ch ca cng cng c th c xc nh gin tip qua thanh ghi (Khi
ny phm vi ti s l 65536 cng).
V d:
IN AL, DX ;c cng c a ch l ni dung ca
;thanh ghi DX
OUT DX, AX ;Ghi mt word trong AX ti cng c a
;ch l ni dung ca thanh ghi DX.
2.3 Tp lnh Assembly
2.3.1 Gii thiu chung

Tp lnh ca h vi x l 80x86 m bo tng thch th h sau vi th h trc.
iu c ngha l cc chng trnh vit cho 8086 vn chy c trn cc b vi x
l mi hn m khng phi thay i (khng m bo th t ngc li). Tp lnh ca
mt b vi x l thng c rt nhiu lnh (hng trm lnh), v th m vic tip cn
v lm ch chng l trng i kh khn.
C nhiu cch trnh by tp lnh ca b vi x l: Trnh by theo nhm lnh hoc
theo th t abc. c th nhanh chng v d dng s dng cc lnh c bn v lp
trnh c ngay, ta s tip cn tp lnh ca b vi x l theo nhm cc thao tc c
bn trong qu trnh x l v iu khin. Vi mi thao tc ni trn, ta lm quen vi
mt vi lnh tiu biu (c gi c th tra cu thm cc lnh khc trong phn ph
lc). Cc chc nng c bn ca mt b vi x l thng gm:
- Nhm cc lnh vn chuyn (sao chp) d liu.
- Nhm cc lnh tnh ton s hc.
- Nhm cc lnh tnh ton logic.
- Nhm cc lnh dch, quay ton hng.
- Nhm cc lnh nhy (r nhnh).

Bi ging Chng 2
- Nhm cc lnh lp.
- Nhm cc lnh iu khin, c bit khc.
2.3.2 Cc nhm lnh
2.3.2.1 Nhm cc lnh vn chuyn (sao chp) d liu

1. MOV MOV a byte or word (chuyn mt byte hay t)
Dng lnh: MOV ch, Ngun
M t: chNgun
Trong ton hng ch v Ngun c th tm c theo cc ch a ch
khc nhau, nhng phi c cng di v khng c php ng thi l hai nh
hoc hai thanh ghi on.
Cc c b thay i: khng.
V d:
MOV AL, AH ;ALAH
MOV CX, 50 ;CX50
MOV DL, [SI] ;DL{DS:SI}
2. OUT Output a byte or a work to a port.
Dng lnh: OUT Port, Acc
M t: Acc{Port}
Trong {port} l d liu ca cng c a ch port. Port l a ch 8 bit ca
cng, n c th l cc gi tr trong khong 00...FFH. Nh vy c th c cc kh
nng sau y.
- Nu Acc l AL th d liu 8 bit c a ra cng Port.
- Nu Acc l AX th d liu 16 bit c a ra cng Port v Port + 1.
C mt cch khc cha a ch cng l thng qua thanh ghi DX. Khi dng
thanh ghi DX cha a ch cng ta c kh nng a ch ho cng mm do hn.
Lc ny a ch cng nm trong di 0000H FFFFH v vit lnh theo dng:
OUT DX, Acc
V d:
OUT 45H, AL ;dua du lieu tu AL ra cong 45H
MOV DX, 0 ;xoa DX
MOV DX, 00FFH ;nap dia chi cong vao DX
OUT DX, AX ;dua du lieu tu AX ra 00FFH
3. IN Input data from a port (c d liu t cng vo thanh ghi Acc).
Dng lnh: IN Acc, a_ch_cng

Bi ging Chng 2
Lnh IN truyn mt byte hoc mt t t mt cng vo ln lt ti thanh
ghi AL hoc AX. a ch ca cng c th c xc nh l mt hng tc th kiu
byte cho php truy nhp cc cng t 0255 hoc thng qua mt s c a
ra trc trong thanh ghi DX m cho php truy nhp cc cng t 065535.
V d:
IN AL, 45H ;doc mot byte tu mot cong duoc xac
;dinh trong che do tuc thi
IN AX, 0046H ;doc hai byte tu mot cong duoc xac
;dinh trong che do tuc thi
IN AX, DX ;doc mot tu tu mot cong dang bien
4. POP Pop word from top of Stack (ly li 1 t vo thanh ghi t nh ngn xp)
Dng lnh: POP ch
M t:
ch{SP}
SPSP+2
Ton hng ch ch c th l cc thanh ghi a nng, thanh ghi on (nhng
khng c l thanh ghi on m CS) hoc nh.
V d:
POP DX ;lay 2 byte tu dinh ngan xep dua vao DX
5. PUSH Push word on the Stack (ct 1 t vo ngn xp)
Dng lnh: PUSH Ngun
M t:
SPSP-2
Ngun{SP}
Ton hng ch ch c th l cc thanh ghi a nng, thanh ghi on(k c
CS) hoc nh.
V d:
PUSH BX
;cat BX vao ngan xep tai vi tri do SP chi ra
2.3.2.2 Nhm cc lnh tnh ton s hc

6. ADC Add with Carry (cng c nh)
Dng lnh: ADC ch, Ngun
M t: ch ch + Ngun + CF

Bi ging Chng 2
Cng hai ton hng ch v Ngun vi c CF kt qu lu vo ch.
Cc c b thay i: AF, CF, OF, PF, SF, ZF.
V d:
ADC AL, 74H ;ALAL+74+CF
ADC CL, BL ;CLCL+BL+CF
ADC DL, [SI] ;DLDL+(DS:SI)+CF
7. ADD Add (cng hai ton hng)
Dng lnh: ADD ch, Ngun
M t: ch ch + Ngun
Cng hai ton hng ch v Ngun kt qu lu vo ch.
V d:
ADD DX, CX ;DXDX+CX
ADD AX, 400 ;AXAX+400
8. DEC Decrement (gim byte hay word i mt gi tr)
Dng lnh: DEC ch
DEC tr ton hng ch i 1. Ton hng ch c th l byte hay word.
Cc c b thay i: AF, OF, PF, SF, ZF.
V d:
MOV BX, 1200H ;chuyen 1200H vao BX
DEC BX ;BX=11FFH
9. DIV Division (chia khng du)
Dng lnh: DIV Ngun
Ton hng Ngun l s chia. Tu theo di ton hng Ngun ta c hai
trng hp b tr php chia.
- Nu Ngun l l s 8 bit: AX/Ngun, thng vo AL, s d vo AH
- Nu Ngun l s 16 bit: DXAX/Ngun, thng vo AX, s d vo DX
Nu thng khng phi l s nguyn n c lm trn theo s nguyn st
di. Nu Ngun bng 0 hoc thng thu c ln hn FFH hoc FFFFH (tu theo
di ca ton hng Ngun) th 8086 thc hin lnh ngt INT 0.
V d:
MOV AX, 0033H ;chuyen 0033H vao AX
MOV BL, 25
DIV BL ;AL=02H va AH=01H
10. INC Increment (tng ton hng ln 1)
Dng lnh: INC ch
Bi ging Chng 2
M t: ch ch + 1
Lnh ny tng ch ln 1, tng ng vi vic ADD ch, 1 nhng chy
nhanh hn.
Cc c b thay i: AF, OF, PF, SF, ZF.
V d:
INC AL
INC BX
11. MUL Multiply unsigned byte or word (nhn s khng du)
Dng lnh: MUL Ngun
Thc hin php nhn khng du vi ton hng Ngun ( nh hoc thanh
ghi) vi thanh ghi tng.
- Nu Ngun l s 8 bit: AL*Ngun. S b nhn phi l s 8 bit t trong
AL, sau khi nhn tch lu vo AX
- Nu Ngun l s 16 bit: AX*Ngun. S b nhn phi l s 16 bit t
trong AX, sau khi nhn tch lu vo DXAX.
Nu byte cao (hoc 16 bit cao) ca 16 (hoc 32) bit kt qu cha 0 th
CF=OF=0.
Cc c b thay i: CF, OF.
V d:
MUL CX ;AXxCX DXAX
MUL BL ;ALxBL AX
12. NEG Negation (ly b hai ca mt ton hng, o du ca mt ton hng).
Dng lnh: NEG ch
M t: ch0-ch
NEG ly 0 tr cho ch (c th l 1 byte hoc 1 t) v tr li kt qu cho
ton hng ch, nu ta ly b hai ca -128 hoc -32768 ta s c kt qu khng
i nhng OF=1 bo l kt qu b trn v s dng ln nht biu din c l
+127 v +32767.
Cc c b thay i: AF, CF, OF, PF, SF, ZF
V d:
NEG AL ;AL0-(AL)
13. SUB Substract (tr hai ton hng)
Dng lnh: SUB ch, Ngun
M t: chch - Ngun
Ton hng ch vo Ngun phi cha cng mt loi d liu v khng
c ng thi l hai nh, cng khng c l thanh ghi on.

Bi ging Chng 2
V d:
SUB AL, 78H ;ALAL-78H
SUB BL, CL ;BLBL-CL
SUB DL, [SI] ;DLDL-{DS:SI}
2.3.2.3 Nhm cc lnh tnh ton logic

14. AND (php v logic)
Dng lnh: AND ch, Ngun
M t: ch ch ^ Ngun
Thc hin php v logic hai ton hng v lu kt qu vo ton hng ch.
Ngi ta thng s dng che i/gi li mt vi bit no ca mt ton hng
bng cch nhn logic ton hng vi ton hng tc th c cc bit 0/1 cc v
tr cn che i/gi li tng ng.
Cc c b thay i: CF, OF, PF, SF, ZF.
V d:
AND DX, CX ;DXDX AND CX theo tung bit
AND AL, 0FH ;che 4 bit cao cua AL
15. NOT Logical Negation (ph nh logic)
Dng lnh: NOT ch
NOT o cc gi tr ca cc bit ca ton hng ch.
V d:
MOV AL, 02H ;AL=(0000 0010)B
NOT AL ;AL=(1111 1101)B
16. OR Logic OR (php hoc logic)
Dng lnh: OR ch, Ngun
M t: ch = ch Ngun
Ton hng ch v Ngun phi cha d liu cng di v khng c
php ng thi l hai nh v cng khng c l thanh ghi on. Php OR
thng dng lp mt vi bit no ca ton hng bng cch cng logic ton
hng vi cc ton hng tc thi c cc bit 1 ti v tr tng ng cn thit lp.
V d:
OR AX, BX ;AXAXBX theo tung bit
OR CL, 30H ;lap bit b4 va b5 cua CL len 1

Bi ging Chng 2
2.3.2.4 Nhm cc lnh dch, quay ton hng
17. RCL Rotate though CF to the Left (quay tri thng qua c nh)
Dng lnh: RCL ch, CL
M t:
CF MSB LSB
Lnh ny quay ton hng sang tri thng qua c CF, CL phi c
cha sn s ln quay. Trong trng hp quay 1 ln c th vit RCL ch, 1
Nu s ln quay l 9 th ton hng khng i v cp CF v ton hng
quay ng mt vng (nu ton hng ch l 8 bit).
Sau lnh RCL c CF mang gi tr c ca MSB, cn c OF1 nu sau
khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng
c xc nh sau nhiu ln quay.
Cc c b thay i: CF, OF, SF, ZF, PF. V d:
MOV CL, 3 ;so lan quay la 3
RCL AL, CL
Trc khi thc hin lnh: AL = 01011110, CF = 0.
Sau khi thc hin lnh: AL = 11110001, CF = 0.
18. RCR Rotate though CF to the Right (quay phi thng qua c nh)
Dng lnh: RCR ch, CL
M t:
CF MSB LSB
Lnh ny quay ton hng sang phi thng qua c CF, CL phi c
cha sn s ln quay. Trong trng hp quay 1 ln c th vit RCR ch, 1
Nu s ln quay l 9 th ton hng khng i v cp CF v ton hng
quay ng mt vng (nu ton hng ch l 8 bit).
Sau lnh RCR c CF mang gi tr c ca LSB, cn c OF1 nu sau khi
quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng c
xc nh sau nhiu ln quay.
Cc c b thay i: CF, OF, SF, ZF, PF.
V d:
RCR AL, CL

Bi ging Chng 2
Trc khi thc hin lnh: AL = 11000010, CF = 1.
Sau khi thc hin lnh: AL = 01110000, CF = 1.
19. ROL Rotate all bit to the Left (quay vng sang tri).
Dng lnh: ROL ch, CL.
M t:
CF MSB LSB
Lnh ny dng quay vng ton hng sang tri, MSB c a sang c
CF v LSB. CL phi cha sn s ln quay mong mun. Trong trng hp quay
1 ln c th vit ROL ch, 1. Nu s ln quay l 8 (CL=8) th ton hng khng
i v ton hng quay ng mt vng (nu ton hng ch l 8 bit), cn nu
CL=4 th 4 bit cao i ch cho 4 bit thp.
Sau lnh ROL c CF mang gi tr c ca MSB, cn c OF1 nu sau
khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng
c xc nh sau nhiu ln quay. Lnh ny thng dng to c CF t gi tr
ca MSB lm iu kin cho lnh nhy c iu kin.
V d:
ROL AL, CL
Trc khi thc hin lnh: AL = 11001100, CF = 1
Sau khi thc hin lnh: AL = 00110011, CF = 1
20. ROR Rotate all bit to the Left (quay vng sang phi).
Dng lnh: ROR ch, CL
M t:
MSB LSB CF
Lnh ny dng quay vng ton hng sang phi, LSB c a sang c
CF v MSB. CL phi cha sn s ln quay mong mun. Trong trng hp quay
1 ln c th vit ROR ch, 1. Nu s ln quay l 8 (CL=8) th ton hng khng
i v ton hng quay ng mt vng (nu ton hng ch l 8 bit), cn nu
CL=4 th 4 bit cao i ch cho 4 bit thp.
Sau lnh ROR c CF mang gi tr c ca LSB, cn c OF1 nu sau khi
quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng c

Bi ging Chng 2
xc nh sau nhiu ln quay. Lnh ny thng dng to c CF t gi tr ca
LSB lm iu kin cho lnh nhy c iu kin.
V d:
ROR AL, CL
21. SAL/SHL - Shift Arithmetically Left (dch tri s hc)/Shift Logically Left
(dch tri logic).
Dng lnh:
SAL ch, CL
SHL ch, CL
M t:
CF MSB LSB 0
Hai lnh ny c tc dng dch tri s hc ton hng (cn gi l dch tri
logic). Mi ln dch MSB c a vo CF cn 0 c a vo LSB. CL phi
cha sn s ln quay mong mun. Trong trng hp quay 1 ln c th vit SAL
ch, 1
Sau lnh SAL hoc SHL c CF mang gi tr c ca MSB, cn c OF1
nu sau khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s
khng c xc nh sau nhiu ln quay. Lnh ny thng dng to c CF t
gi tr ca MSB lm iu kin cho lnh nhy c iu kin.
Cc c b thay i: SF, ZF, CF, OF, PF.
V d:
SAL AL, CL
22. SHR Shift logically Right (dch phi logic)
Dng lnh: SHR ch, CL
M t:
0 MSB LSB CF

Bi ging Chng 2
Lnh ny c tc dng dch phi logic ton hng. Mi ln dch LSB c a
vo CF cn 0 c a vo MSB. CL phi cha sn s ln quay mong mun. Trong
trng hp quay 1 ln c th vit SHR ch, 1
Sau lnh SHR c CF mang gi tr c ca LSB, cn c OF1 nu sau khi
quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng c xc
nh sau nhiu ln quay. Lnh ny thng dng to c CF t gi tr ca LSB lm
iu kin cho lnh nhy c iu kin.
Cc c b thay i: SF, ZF, CF, OF, PF.
V d:
SHR AL, CL
23. XOR Exclusive OR (lnh logic XOR (hoc o)).
Dng lnh: XOR ch, Ngun
M t: chchNgun.
Lnh XOR thc hin logic XOR (hoc o) gia hai ton hng v kt qu
c lu vo trong ch, mt bit kt qu c t bng 1 nu nu cc bit tng ng
hai ton hng l i nhau. Nu ton hng ch trng ton hng Ngun th kt qu
bng 0, do lnh ny cn c dng xo thanh ghi v 0 km theo cc c CF v
OF cng b xo.
V d:
XOR AX, AX
XOR BX, BX
MOV AX, 5857H
MOV BX, 58A8H
XOR AX, BX
Trc khi thc hin lnh XOR Sau khi thc hin lnh XOR
AX=5857H AX=00FFH
BX=58A8H BX=58A8H
2.3.2.5 Nhm cc lnh so snh

24. CMP Compare (so snh)
Dng lnh: CMP ch, Ngun
CMP tr ton hng ch cho ton hng Ngun, chng c th l cc byte hoc
cc t, nhng khng lu tr kt qu. Cc ton hng khng b thay i. Kt qu ca

Bi ging Chng 2
lnh ny dng cp nht cc c v c th c dng lm iu kin cho cc lnh
nhy c iu kin tip theo.
Cc c chnh theo quan h ch v Ngun khi so snh hai s khng du.
So snh CF ZF
ch = Ngun 0 1
ch > Ngun 0 0
ch < Ngun 1 0
2.3.2.6 Nhm cc lnh nhy (r nhnh)

25. JA/JNBE Jump if Above/Jump if Not Below or Equal (nhy nu cao
hn/nhy nu khng thp hn hoc bng).
Dng lnh:
JA NHAN
JNBE NHAN
M t: IPIP+dch chuyn
Hai lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN
nu CF + ZF = 0. Quan h cao hn/thp l quan h dnh cho vic so snh (do
lnh CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt
khong -128+127 byte so vi lnh tip theo sau lnh JA/JNBE. Chng trnh
s cn c vo v tr NHAN xc nh gi tr dch chuyn.
V d:
CMP AX, 12ABH ;so sanh AX voi 12ABH
JA THOI ;nhay den THOI neu AX cao hon 12ABH
26. JAE/JNB/JNC Jump if Above or Equal/Jump if Not Below/Jump if No
Carry (nhy nu ln hn hoc bng/nhy nu khng thp hn/nhy nu
khng c nh).
Dng lnh:
JAE NHAN
JNB NHAN
JNC NHAN
M t: IPIP+dch chuyn
Ba lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN
nu CF = 0. Quan h cao hn/thp l quan h dnh cho vic so snh (do lnh
CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt khong
Bi ging Chng 2
-128+127 byte so vi lnh tip theo sau lnh JAE/JNB/JNC. Chng trnh s
cn c vo v tr NHAN xc nh gi tr dch chuyn.
V d:
CMP AL, 10H ;so sanh AL voi 10H
JAE THOI ;nhay den THOI neu AL cao hon hoac bang 10H
27. JB/JC/JNAE Jump if Below/Jump if Carry/Jump if Not Above or Equal
(nhy nu thp hn/nhy nu c nh/nhy nu khng cao hn hoc bng).
Dng lnh:
JB NHAN
JC NHAN
JNAE NHAN
M t: IPIP+dch chuyn
Ba lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN nu
CF = 1. Quan h cao hn/thp l quan h dnh cho vic so snh (do lnh CMP thc
hin) ln hai s khng du. NHAN phi nm cch xa mt khong -128+127
byte so vi lnh tip theo sau lnh JB/JC/JNAE. Chng trnh s cn c vo v tr
NHAN xc nh gi tr dch chuyn.
V d:
JB THOI ;nhay den THOI neu AL thap hon 10H
28. JBE/JNA Jump if Below or Equal/Jump if Not Above (nhy nu thp hn
hoc bng/nhy nu khng cao hn).
Dng lnh:
JBE NHAN
JNA NHAN
M t: IPIP+dch chuyn
Hai lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN nu
CF +ZF = 1. Quan h cao hn/thp l quan h dnh cho vic so snh (do
lnh CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt
khong -128+127 byte so vi lnh tip theo sau lnh JBE/JNA. Chng trnh s
cn c vo v tr NHAN xc nh gi tr dch chuyn.
Cc c b thay i: khng. V d:
JBE THOI ;nhay den THOI neu AL thap hon hoac
;bang 10H

Bi ging Chng 2
29. JE/JZ Jump if Equal/Jump if Zero (nhy nu bng nhau/nhy nu kt qu
bng khng)
Dng lnh:
JE NHAN
JZ NHAN
M t: IPIP+dch chuyn
Lnh trn biu din thao tc nhy c iu kin ti NHAN nu ZF = 1.
NHAN phi nm cch xa mt khong -128+127 byte so vi lnh tip theo sau
lnh JE/JZ. Chng trnh s cn c vo v tr NHAN xc nh gi tr dch
chuyn.
V d:
SUB AL, 10H ;tru AL cho 10H
JE THOI ;nhay den THOI neu AL bang 10H
30. JMP Unconditional Jump (lnh nhy khng iu kin).
JMP trao quyn iu khin cho vng mc tiu mt cch khng iu kin.
Lnh ny c cc ch ging nh lnh CALL v n cng phn bit nhy gn,
nhy xa.
Dng lnh: Sau y l nhng cch vit lnh khng iu kin.
JMP NHAN
Lnh mi ny bt u a ch ng vi NHAN. Chng trnh s cn c
vo khong dch gia NHAN v lnh nhy xc nh xem n l:
+ Nhy ngn: Trong trng hp ny NHAN phi nm cch xa (dch i
mt khong).
-128127 byte so vi lnh tip theo sau lnh JMP. Chng trnh dch s
cn c vo v tr NHAN xc nh gi tr dch chuyn. Do
IPIP+dch chuyn
y l lnh nhy trc tip v dch chuyn trc tip trong m lnh.
nh hng cho chng trnh dch lm vic nn vit lnh di dng:
JMP SHORT NHAN
+ Nhy gn: Trong trng hp ny NHAN phi nm cch xa (dch i mt
khong)
-32768+32767 byte so vi lnh tip theo sau lnh JMP. Chng trnh
dch s cn c vo v tr NHAN xc nh gi tr dch chuyn. Do
IPIP+dch chuyn
y l lnh nhy trc tip v dch chuyn trc tip trong m lnh.

Bi ging Chng 2
nh hng cho chng trnh dch lm vic nn vit lnh di dng:
JMP NEAR NHAN
+ Nhy xa: Trong trng hp ny NHAN nm on m khc so vi
lnh tip theo sau lnh JMP. Chng trnh s cn c vo v tr NHAN xc
nh gi tr a ch nhy n (CS:IP ca NHAN). Sau :
IPIP ca NHAN
CSCS ca NHAN
JMP BX
y l lnh nhy gn, trc BX phi cha a ch lch ca lnh nh
nhy n trong on CS. Khi thc hin lnh ny th IPBX. y l lnh nhy
gin tip v a ch lch nm trong thanh ghi. nh hng cho chng trnh
dch lm vic ta nn vit lnh di dng:
JMP NEAR PTR BX
JMP [BX]
y l lnh nhy gn. IP mi c ly t ni dung 2 nh do BX v
BX+1 ch ra trong on DS (SI, DI c th dng thay ch ca BX). y l lnh
nhy gin tip v a ch lch trong nh. nh hng cho chng trnh
dch lm vic ta nn vit lnh di dng:
JMP WORD PTR [BX]
Mt bin dng khc ca lnh trn thu c khi ta vit lnh di dng:
JMP DWORD PTR [BX]
y l lnh nhy xa. a ch nhy n ng vi CS:IP. Gi tr gn cho IP v
CS c cha trong 4 nh do BX v BX+1 (cho IP), BX+2 v BX+3 cho (CS) ch
ra trong on DS (SI, DI c th s dng thay ch ca BX)
y cng l lnh nhy gin tip v a ch lch v a ch c s nm trong nh.
31. JNE/JNZ Jump if Not Equal/Jump if Not Zero (nhy nu khng bng
nhau/nhy nu kt qu khng rng).
Dng lnh:
JNE NHAN
JNZ NHAN
M t: IPIP+dch chuyn
Hai lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN nu
ZF = 0. NHN phi nm cch xa (dch i mt khong) -128127 byte so vi lnh
tip theo sau lnh JNE/JNZ. Chng trnh dch s cn c vo v tr NHAN xc
nh dch chuyn.

Bi ging Chng 2
V d:
JNE THOI ;nhay den THOI neu AL khac 10H
2.3.2.7 Nhm cc lnh lp

32. LOOP Loop if CX is not 0 (lp nu CX 0)
Dng lnh: LOOP NHAN
M t: Lnh ny dng lp li on chng trnh (gm cc lnh nm trong
khong t NHAN n ht lnh LOOP NHAN) cho n khi s ln lp CX=0. iu
ny c ngha l trc khi vo vng lp ta phi a s ln lp mong mun vo CX,
v sau mi ln lp th CX t ng gim i 1.
NHAN phi nm cch xa (dch i mt khong) ti a -128 byte so vi lnh
tip theo sau lnh LOOP.
V d:
MOV AL, 0 ;xoa AL
MOV CX, 10 ;nap so lan lap vao CX
LAP: INC AL ;tang AL len 1
LOOP LAP ;lap lai 10 lan, AL=10
33. LOOPE/LOOPZ Loop while CX=0 or ZF=0 (lp li on chng trnh cho
n khi CX=0 hoc ZF=0).
Dng lnh:
LOOPE NHAN
LOOPZ NHAN
M t: Lnh ny dng lp li on chng trnh (gm cc lnh nm trong
khong t NHAN n ht lnh LOOPE NHAN hoc LOOPZ NHAN) cho n khi
s ln lp CX=0 hoc c ZF=0. iu ny c ngha l trc khi vo vng lp ta phi
a s ln lp mong mun vo CX, v sau mi ln lp th CX t ng gim i 1.
NHAN phi nm cch xa (dch i mt khong) ti a -128 byte so vi
lnh tip theo sau lnh LOOPE/LOOPZ.
V d:
MOV AL, AH ;AL=AH
LAP: INC AL ;tang AL
COMP AL, 16 ;so sanh AL voi 16
LOOPE LAP ;lap lai cho den khi AL16 hoac CX=0

Bi ging Chng 2
34. LOOPNE/LOOPNZ Loop while CX=0 or ZF=1 (lp li on chng trnh
cho n khi CX=0 hoc ZF=1).
Dng lnh:
LOOPNE NHAN
LOOPNZ NHAN
M t: Lnh ny dng lp li on chng trnh (gm cc lnh
nm trong khong t NHAN n ht lnh LOOPNE NHAN hoc LOOPNZ
NHAN) cho n khi s ln lp CX=0 hoc c ZF=1. iu ny c ngha l
trc khi vo vng lp ta phi a s ln lp mong mun vo CX, v sau
mi ln lp th CX t ng gim i 1.
NHAN phi nm cch xa (dch i mt khong) ti a -128 byte so vi
lnh tip theo sau lnh LOOPNE/LOOPNZ.
Cc c b thay i: khng. V d:
MOV AL, AH ;AL=AH
LAP: INC AL ;tang AL
COMP AL, 16 ;so sanh AL voi 16
LOOPNE LAP ;lap lai cho den khi AL=16 hoac CX=0
2.3.2.8 Nhm cc lnh iu khin, c bit khc

35. CALL Call a procedure (gi chng trnh con)
Dng lnh: CALL Th_tc
M t: Lnh ny dng chuyn hot ng ca vi x l t chng trnh
chnh (CTC) sang chng trnh con (ctc). Nu ctc nm trong cng mt on m vi
CTC ta c gi gn (near call). Nu ctc v CTC nm hai on m khc nhau ta c
gi xa (far call).
- Nu gi gn: Lu vo Stack gi tr IP ca a ch tr v (v CS khng i) v
cc thao tc khi gi ctc din ra nh sau:
+ Ni dung thanh ghi SP gim i 2 byte, SPSP 2.
+ Ni dung thanh ghi IP c ct vo ngn xp (lu a ch tr v)
{SP}IP.
+ a ch lch ca ctc (ln ti 32K) c lu vo thanh ghi IP.
+ Khi gp lnh RET cui ctc th VXL ly li a ch tr v IP t Stack
v tng SP ln 2 byte.
- Nu gi xa: Lu vo Stack gi tr IP v CS ca a ch tr v v cc
thao tc khi gi ctc din ra nh sau:
+ Ni dung thanh ghi SP gim i 2 byte, SPSP 2 v CS c
lu vo ngn xp.
Bi ging Chng 2
+ Ni dung ca CS c thay bng a ch on ca ctc c gi.
+ Ni dung thanh ghi SP li gim i 2 byte v IP c ct vo ngn
xp.
+ a ch lch ca ctc c lu vo thanh ghi IP.
+ Khi gp lnh RET cui ctc th VXL ly li a ch tr v IP t
Stack v tng SP ln 2 byte sau tip tc ly li CS v tng SP
ln 2 byte.
V d:
CALL NEAR
CALL FAR
36. INT Interrupt (lnh gi ngt)
Dng lnh: INT N (N=0FFH)
Cc thao tc ca 8086 khi chy lnh: INT N
- To a ch mi ca Stack, ct thanh ghi c vo Stack: SPSP-2, {FR}SP.
- Cm cc ngt khc tc ng vo vi x l, cho vi x l chy ch tng lnh:
IF0, TF0.
- To a ch mi ca Stack, ct a ch on ca a ch tr v vo Stack:
SPSP-2, SPCS.
- To a ch mi ca Stack, ct a ch lch ca a ch tr v vo Stack: SPSP-
2, SPIP.
- Vi x l ly lnh ti a ch mi, a ch con tr ngt c tnh ton nh sau:
{Nx4}IP, {Nx4+2}CS
V d: vi N = 8 th CS{0022H} v IP{0020H}
37. IRET Interrupt Return (tr v CTC t ctc phc v ngt)
Dng lnh: IRET
Tr v chng trnh chnh t chng trnh con phc v ngt. Tr li quyn
iu khin cho chng trnh ti v tr xy ra ngt bng cch ly li cc gi tr thanh
ghi IP, CS v cc c t vng Stack.
- {SP}IP, SPSP+2
- {SP}CS, SPSP+2
- {SP}FR, SPSP+2
Cc c b thay i: tt c cc c (c phc hi nh trc khi din ra ngt).
38. NOP No Operation (CPU khng lm g)
Dng lnh: NOP

Bi ging Chng 2
Lnh ny khng thc hin mt cng vic g ngoi vic lm tng ni dung ca
IP v tiu tn 3 chu k ng h. N thng c dng tnh thi gian tr trong
cc vng tr hoc chim ch cc lnh cn thm vo chng trnh sau ny m
khng lm nh hng dn di chng trnh.
39. RET Return from Procedure to Calling Program (tr v chng trnh chnh t
chng trnh con).
Dng lnh: RET hoc RET N (N l s nguyn dng)
M t: RET c t cui ctc vi x l ly li a ch tr v, m n
c t ng ct ti ngn xp khi c lnh gi ctc. c bit nu dng lnh RET n th
sau khi ly li c a ch tr v (ch c IP hoc c IP v CS) th SPSP+n
(dng nhy qua m khng ly li cc thng s khc ca chng trnh cn li
trong ngn xp.
40. STC Set the Carry Flag (lp c nh)
Dng lnh: STC
M t: CF1
STC thit lp c nh bng 1 v khng nh hng n cc c khc.
Cc c b thay i: CF=1.
2.4 Lp trnh hp ng (Assembly) cho vi x l 80x86

Tham kho [12]
2.4.1 Gii thiu chung v hp ng

Hp ng (assembly language) l mt ngn ng cp thp dng vit cc
chng trnh my tnh. Cch dng cc thut nh (mnemonics) thn thin vit
chng trnh thay th cch lp trnh trc tip ln my tnh bng m my dng s
(numeric machine code) - tng p dng cho nhng my tnh u tin - vn rt mt
nhc, d gy li v tn nhiu thi gi. Mt chng trnh vit bng hp ng s c
dch sang ngn ng my bng mt tin ch gi l trnh hp dch. Lu rng, trnh
hp dch khc hon ton vi trnh bin dch, vn dng bin dch cc ngn ng
cp cao sang cc ch th lnh cp thp m sau s c trnh hp dch chuyn i
sang ngn ng my. Cc chng trnh hp ng thng ph thuc cht ch vo mt
kin trc my tnh xc nh, n khc vi ngn ng cp cao thng c lp i vi
cc nn tng kin trc phn cng. Nhiu trnh hp dch phc tp ngoi cc tnh nng
c bn cn cung cp thm cc c ch gip cho vic vit chng trnh, kim sot qu
trnh dch cng nh vic g ri c d dng hn. Hp ng tng c dng rng
ri trong tt c cc kha cnh lp trnh, nhng ngy nay n c xu hng ch c

Bi ging Chng 2
dng trong mt s lnh vc hp, ch yu giao tip trc tip vi phn cng hoc
x l cc vn lin quan n tc cao in hnh nh cc trnh iu khin thit b,
cc h thng nhng cp thp v cc ng dng thi gian thc..
2.4.2 Cc bc khi lp trnh

Lp trnh trn phn mm emu8086
- Bc 1: M chng trnh emu8086, chn file \ new Vi cc la chn:
New com template, new exe template, new bin template, new boot
template.
- Bc 2: Vit m ngun
- Bc 3: dch v g ri (bm F5)
- Bc 4: to file t chy: assembler \ Compile
Dch, lin kt, chy v chn li chng trnh t du nhc DOS:
Cn c cc file: tasm.exe (dch), tlink.exe (lin kt), td.exe (chn li). Cc bc nh
sau:
B1. Thit lp ng dn
path = %path%;<ng dn n th mc cha cc file k trn>
B2. Bin dch t file .ASM sang file .OBJ

Tasm <tn file chng trnh>.ASM
B3. Bin dch t file .OBJ sang file .EXE

Tlink <tn file>.OBJ
B4: chy chng trnh:

<tn file>.EXE
B5: chn li (nu cn thit)
Td <tn file>.EXE
t ng ha, ta c th to file .BAT cha cc lnh trn.
V d:
To file RunASM.bat trong cng th mc vi tp tin .ASM vi ni dung nh
sau :
tasm %1
tlink %1
%1
(%1 l ly tham s th nht trong command line)
Sau bin dch, lin kt v thc thi chng trnh hello.ASM ta ch cn
g :
RunASM hello

Bi ging Chng 2
Chng trnh emu8086:
Chng trnh emu8086 l chng trnh lp trnh m phng cho 8086 (tng
thch Intel v AMD) bao gm b dch ASM v gio trnh (ting anh) cho ngi mi
bt u. Chng trnh c th chy ht hoc chy tng bc, ta c th nhn thy cc
thanh ghi, b nh, stack, bin,
Hnh 2-5. Emu8086 - Mi trng son tho
Hnh 2-6. Emu8086 - Gi tr cc c v mn hnh hin th

Bi ging Chng 2
Hnh 2-7. Emu8086 - Mn hnh Debug chng trnh
2.4.3 Cu trc chung ca chng trnh hp ng
2.4.3.1 Cu trc ca mt lnh hp ng

Tham kho [9]
Mt dng lnh trong chng trnh hp ng gm c cc trng sau:
Tn Lnh Ton hng Ch thch
A: Mov AH, 10h ; a gi tr 10h vo thanh ghi AH
Trng tn cha nhn, tn bin hay tn th tc. Cc tn nhn c th cha

ti a 31 k t, khng cha k t trng (space) v khng c bt u bng s. Cc
nhn c kt thc bng du ':'.
Trng lnh cha cc lnh s thc hin. Cc lnh ny c th l cc lnh
tht (MOV) hay cc lnh gi (PROC). Cc lnh tht s c dch ra m my.
Trng ton hng cha cc ton hng cn thit cho lnh (AH,10h).
Trng ch thch phi c bt u bng du ';'. Trng ny ch dng cho
ngi lp trnh ghi cc li gii thch cho chng trnh. Chng trnh dch s b
qua cc tt c nhng g nm pha sau du ;

Bi ging Chng 2
. Cu trc thng thng ca mt chng trnh hp ng dng file *.exe
TITLE Chng trnh hp ng
.MODEL Kiu kch thc b nh ; Khai bo quy m s dng b nh
.STACK Kch thc ; Khai bo dung lng on stack
.DATA ; Khai bo on d liu
msg DB 'Hello$'
.CODE ; Khai bo on m main PROC
CALL Subname ; Gi chng trnh con
main ENDP
Subname PROC ; nh ngha chng trnh con
RET
Subname ENDP
END main
Quy m s dng b nh:
Thng thng, cc ng dng n gin ch i hi m chng trnh khng qu

64 KB v d liu cng khng ln hn 64 KB nn ta s dng dng Small:
.MODEL SMALL
CPU 8086 c th truy nhp ti a 1MB b nh RAM. Dung lng ny l
tha s dng cho bt k loi my tnh no.
Bn b nh ca my tnh
IBM PC
Gii thch vn tt
a ch vt l ca vng nh
(HEX)
Vector ngt. B mo phng s load file ny:
00000 - 00400
c:\emu8086\INT_VECT ti a ch vt l 000000
00400 - 00500 Vng thng tin h thng.
Mt vng nh t do. Mi khi l 654,080 byte. Ti y c
00500 - A0000
th load chng trnh
Vng nh mn hnh cho VGA, monochrome, v cho cc b
A0000 - B1000
iu hp khc
B1000 - B8000 D tr

Bi ging Chng 2
Bn b nh ca my tnh
IBM PC
Gii thch vn tt
a ch vt l ca vng nh
(HEX)
32kb nh mn hnh cho ch ha mu (CGA). B m
phng s dng vng nh ny lu 8 trang vng nh mn
hnh. Mn hnh m phng c th thay i kch thc, nn
B8000 - C0000
b nh ti thiu c yu cu cho mi trang, mc d b
m phng lun lun s dng 1000h (4096 byte) cho mi
trang (xem ngt 10h, AH=05h)
C0000 - F4000 D tr
ROM BIOS v m rng. B m phng ti file BIOS_ROM
F4000 - 10FFEF ti a ch vt l 0F4000h. a ch ca bng vector ngt ch
ti vng nh ny to hm ngt m phng.
Bng vector ngt (vng nh t 00000h n 00400h)

S hiu a ch a ch ca chng trnh con BIOS
ngt (HEX) vector ngt (address of BIOS sub-program )
00 00x4 = 00 F400:0170 CPU to, li chia
04 04x4 = 10 F400:0180 - CPU to, pht hin INTO trn
10 10x4 = 40 F400:0190 Hm video
11 11x4 = 44 F400:01D0 Nhn danh sch thit b BIOS
12 12x4 = 48 F400:01A0 Nhn kch thc b nh
13 13x4 = 4C F400:01B0 - Cc hm v a
15 15x4 = 54 F400:01E0 Cc hm BIOS
16 16x4 = 58 F400:01C0 - Cc hm bn phm
17 17x4 = 5C F400:0400 My in
19 19x4 = 64 FFFF:0000 Khi ng li
1A 1Ax4 = 68 F400:0160 Hm thi gian
1E 1Ex4 = 78 F400:AFC7 vector tham s a
20 20x4 = 80 F400:0150 Hm DOS: Kt thc chng trnh
21 21x4 = 84 F400:0200 Cc hm ca DOS
33 33x4 = CC F400:0300 Cc hm chut
Cc hm khc ??x4 = ?? F400:0100 Cc ngt mc nh
Vng thng tin h thng (B nh t 00400h to 00500h)

a ch (HEX) Kch thc Gii thch
Danh sch thit b BIOS
Trng bit BIOS tm thy phn cng c ci:

0040h:0010 WORD
bit(s) Gii thch
15-14 S thit b song song
13 D tr

Bi ging Chng 2
Bn b nh ca my tnh
IBM PC
Gii thch vn tt
a ch vt l ca vng nh
(HEX)
12 Cng game c ci
11-9 S thit b ni tip
8 D tr
7-6 S a mm (tr 1):
00 a mm n;
01 Hai da mm;
10 Ba a mm;
11 Bn a mm;
5-4 Khi to ch Video:
00 EGA,VGA,PGA, hoc on-board video BIOS
khc;
01 40x25 CGA mu.
10 80x25 CGA mu (M phng mc nh).
11 80x25 en trng.
3 D tr.
2 Chut PS/2.
1 B x l ton hc;
0 c ci khi khi ng t a mm.
kilobytes bt u vng nh lin tip ti a ch 00000h
0040h:0013 WORD t ny cng c tr v AX bi INT 12h
gi tr ny c t l 0280h (640KB)
S ct trn mn hnh.
0040h:004A WORD
Mc nh l 0032h (50 ct)
a ch bt u trang mn hnh hin hnh trong b nh mn
0040h:004E WORD hnh (sau 0B800:0000)
Gi tr mc nh: 0000h
Bao gm v tr hng v ct cho con tr trong mi ca tm
0040h:0050 8 WORD trang nh mn hnh.
Gi tr mc nh: 00h (cho tt c 8 t (words)
S trang mn hnh hin hnh
0040h:0062 BYTE
Mc nh: 00h (trang u tin)
Hng trn mn hnh tr 1
0040h:0084 BYTE
Gi tr mc nh: 13h (19+1=20 ct)
Bng 2-4. Bn b nh, a ch ngt ca 8086
Khai bo kch thc stack:
Khai bo stack dng dnh ra mt vng nh dng lm stack (ch yu phc v
cho chng trnh con), thng thng ta chn khong 256 byte l s dng (nu
khng khai bo th chng trnh dch t ng cho kch thc stack l 1 KB):
.STACK 256

Bi ging Chng 2
Khai bo on d liu:
on d liu dng cha cc bin v hng s dng trong chng trnh.
Khai bo on m:
on m dng cha cc m lnh ca chng trnh. on m bt u bng mt
chng trnh chnh v c th c cc lnh gi chng trnh con (CALL).
Mt chng trnh chnh hay chng trnh con bt u bng lnh PROC v kt
thc bng lnh ENDP (y l cc lnh gi ca chng trnh dch). Trong chng
trnh con, ta s dng thm lnh RET tr v a ch lnh trc khi gi chng
trnh con.
Chng trnh c kt thc bng lnh END trong tn chng trnh pha sau
lnh END s xc nh l chng trnh chnh. Nu sau lnh END khng ch ra
chng trnh no c th s ly chng trnh con u on m lm chng trnh
chnh.
V d: Chng trnh sau in ra mn hnh dng ch Hello !
.model small
.stack 100h
.data
s DB Hello !$ ; khai bo xu k t cn in
.code
mov AX,@data ; ly a ch data segment ghi vo DS
mov DS,AX ; V model small, y cng l a ch
; segment ca xu s. ; xut chui:
mov DX, OFFSET s ; ly a ch offset ghi vo DX
mov AH , 9
int 21h ; gi hm 9, ngt 21h in
mov AH, 4Ch ; Thot khi chng trnh
int 21h
end
Lu :
- Mi chng trnh u phi c on CODE thot khi chng trnh, nu
khng chng trnh s khng dng khi ht chng trnh ca mnh.
2.4.3.2 Khung chng trnh dch ra .exe

Cc tp tin .EXE v .COM
DOS ch c th thi hnh c cc tp tin dng .COM v .EXE. Tp tin .COM
thng dng xy dng cho cc chng trnh nh cn .EXE dng cho cc chng
trnh ln.
Tp tin .EXE
- Nm trong nhiu on khc nhau, kch thc thng thng ln hn 64 KB.
- C th gi c cc chng trnh con dng near hay far.
- Tp tin .EXE cha mt header u tp tin cha cc thng tin iu khin cho
tp tin.
Bi ging Chng 2
data segment
; add your data here!
pkey db "press any key to exit ...$"
ends
stack segment
dw 128 dup(0)
ends
CODE segment
start:
; set segment registers:
MOV ax, data
MOV ds, ax
MOV es, ax
; add your CODE here
lea dx, pkey

MOV ah, 9
int 21h ; output string at ds:dx
; wait for any key....

MOV ah, 1
int 21h
MOV ax, 4c00h ; exit to operating system.

int 21h
ends
END start ; set entry point and stop the assembler.
2.4.3.3 Khung chng trnh dch ra .com

- Tp tin .COM ch c mt on nn kch thc ti a ca mt tp tin loi ny l 64
KB.
- Tp tin .COM c np vo b nh v thc thi nhanh hn tp tin .EXE nhng ch
p dng c cho cc chng trnh nh.
- Ch c th gi cc chng trnh con dng near.
Khi thc hin tp tin .COM, DOS nh v b nh v to vng nh di 256
byte v tr 0000h, vng ny gi l PSP (Program Segment Prefix), n s cha cc
thng tin cn thit cho DOS. Sau , cc m lnh trong tp tin s c np vo sau
PSP v tr 100h v a gi tr 0 vo stack. Nh vy, kch thc ti a thc s ca
tp tin .COM l 64 KB 256 byte PSP 2 byte stack.
Tt c cc thanh ghi on u ch n PSP v thanh ghi con tr lnh IP ch
n 100h, thanh ghi SP c gi tr 0FFFEh.

Bi ging Chng 2
; You may customize this and other start-up templates;
; The location of this template is
;c:\emu8086\inc\0_com_template.txt
CSEG SEGMENT ; code segment starts here.
org 100h
; add your CODE here
ret
Khai bo d liu
Khi khai bo d liu trong chng trnh, nu s dng s nh phn, ta phi dng
thm ch B cui, nu s dng s thp lc phn th phi dng ch H cui. Ch
rng i vi s thp lc phn, nu bt u bng ch A..F th phi thm vo s 0
pha trc.
V d:
1011b ; S nh phn
1011 ; S thp phn
1011d ; S thp phn
1011h ; S thp lc phn
Khai bo hng, bin

C php:
<tn bin> D<Kiu DL> <gi tr khi to>
hoc
<tn bin> D<Kiu DL> <s phn t> dup(<gi tr khi to>)
Cc kiu d liu: B (1 byte), W (2 bytes), D (4 bytes)

Nu khng khi to, dng du hi ?
V d:
Khai bo trong C Khai bo bin trong hp ng
char ch; ch DB ?
char ch = a; ch DB a
char ch = 5; ch DB 5
Char s[]=\nhello world! s DB 10,13,hello world!$
int i=100; i DW 100
long L; L DD ?
char a[] = {1,2,3}; a DB 1,2,3
char a[100]; a DB 100 dup(?)
char a[100][50]; a DB 100 dup(50 dup(?))

Bi ging Chng 2
Hng s:
Khai bo hng s trong chng trnh hp ng bng lnh EQU.
V d:
A1 EQU 02, 11
A2 EQU 19, 81
Ton t trong hp ng
Ton t s hc
Trong bt, bt1, bt2 l cc biu thc hng, n l s nguyn.

Ton t logic: Bao gm cc ton t AND, OR, NOT, XOR
Ton t quan h: Cc ton t quan h so snh 2 biu thc, cho gi tr true (1) nu
iu kin tho v false (0) nu khng tho.
Ton t cung cp thng tin:

- Ton t SEG: SEG bt ; Ton t SEG xc nh a ch on ca biu thc bt.
bt c th l bin, nhn, hay cc ton hng b nh.
- Ton t OFFSET: OFFSET bt ;Ton t OFFSET xc nh a ch offset ca
biu thc bt. bt c th l bin, nhn, hay cc ton hng b nh.
VD: MOV AX,SEG A ; Np a ch on v a ch offset
MOV DS,AX ; ca bin A vo cp thanh ghi
MOV AX,OFFSET A ; DS:AX
- Ton t ch s [ ]: (index operator) Ton t ch s thng dng vi ton hng
trc tip v gin tip.

Bi ging Chng 2
- Ton t (:) (segment override operator) Segment:bt ; Ton t : quy nh cch
tnh a ch i vi segment c ch. Segment l cc thanh ghi on CS, DS, ES,
SS.
Ch rng khi s dng ton t : kt hp vi ton t [ ] th segment: phi t ngoi
ton t [ ].
VD: Cch vit [CS:BX] l sai, ta phi vit CS:[BX]
- Ton t TYPE:
TYPE bt ;Tr v gi tr biu th dng ca biu thc bt.
Nu bt l bin th s tr v 1 nu bin c kiu byte, 2 nu bin c kiu word, 4 nu
bin c kiu double word. Nu bt l nhn th tr v 0FFFFh nu bt l near v
0FFFEh nu bt l far. Nu bt l hng th tr v 0.
- Ton t LENGTH:
LENGTH bt ;Tr v s n v b nh cp cho bin bt
- Ton t SIZE:
SIZE bt ;Tr v tng s cc byte cung cp cho bin bt
VD: A DD 100 DUP(?)
MOV AX,LENGTH A ; AX = 100
MOV AX,SIZE A ; AX = 400
Cc ton t thuc tnh:
- Ton t PTR:
Loai PTR bt ; Ton t ny cho php thay i dng ca biu thc bt.
Nu bt l bin hay ton hng b nh th Loai l byte, word hay dword. Nu bt l
nhn th Loai l near hay far.
VD: A DW 100 DUP(?)
B DD ?
MOV AH,BYTE PTR A ; a byte u tin trong mng A vo ;thanh ghi AH
MOV AX,WORD PTR B ; a 2 byte thp trong bin B vo thanh ;ghi AX
- Ton t HIGH, LOW:
HIGH bt
LOW bt
Cho gi tr ca byte cao v thp ca biu thc bt, bt phi l mt hng.
VD: A EQU 1234h
MOV AH,HIGH A ; AH 12h
MOV AH,LOW A ; AH 34h
Chng trnh con

Chng trnh con (PROC) l mt phn ca m ngun m c th gi chng trong
chng trnh ca bn lm mt vi nhim v nht nh no . Chng trnh con
lm cho chng trnh c cu trc hn v d hiu hn. Thng thng, chng trnh
con tr li ngay sau im gi n.
Cu trc mt chng trnh con nh sau:

Bi ging Chng 2
TN PROC
; y l m lnh ca chng trnh con
RET
TN ENDP
TN l tn ca chng trnh con, tn phi ging nhau trn v di ca chng
trnh con, l cch kim tra im kt thc ca chng trnh con.
Hu nh chc chn, bn bit rng lnh RET c s dng tr v h iu hnh.
Lnh tng t cng c s dng tr v t chng trnh con (thc s, OS coi
chng trnh ca chng ta nh mt chng trnh con c bit)
PROC v ENDP l cc nh hng chng trnh dch, nn chng khng c dch
ra m my. Chng trnh dch nh a ch ca chng trnh con.
Lnh CALL c s dng gi chng trnh con
y l mt v d:
ORG 100h
CALL ta
MOV AX, 2
RET ; Tr v OS
ta PROC
MOV BX, 5
RET ; Tr v sau im gi.
ta ENDP
END
V d trn gi chng trnh con ta, thc hin lnh MOV BX, 5 , v tr v sau
lnh gi n MOV AX, 2
C vi cch truyn tham s cho chng trnh con, cch n gin nht l s dng
cc thanh ghi, di y l mt v d khc v cch gi chng trnh con v cch
truyn tham s cho n qua thanh ghi AL v BL, nhn hai tham s vi nhau v tr
kt qu v trong thanh ghi AX:
ORG 100h
MOV AL, 1
MOV BL, 2
CALL m2
CALL m2
CALL m2
CALL m2
RET ; Tr v HH
m2 PROC
MUL BL ; AX = AL * BL.
RET ; Tr v sau im gi n.
m2 ENDP
END

Bi ging Chng 2
Trong v d trn, gi tr ca thnh ghi AL c cp nht mi ln chng trnh con
c gi, thanh ghi BL khng thay i, nn thut ton trn l tnh 24, kt qu lu
trong AX l 16 (hay 10h)
Di y l mt v d khc, s dng chng trnh con in xu
PICAT.dieukhien.net :
ORG 100h
LEA SI, tbao_tw ; Ly a ch ca msg vo SI.
CALL In_Xau
RET ; tr v h iu hnh.
;=================================================
; Chng trnh ny in 1 xu, xu phi kt thc
; bng k t null (phi c 0 cui xu)
; a ch ca xu phi c t trong thanh ghi SI:
In_Xau PROC
next_char:
CMP b.[SI], 0 ; kim tra nu = 0 th dng
JE stop ;
MOV AL, [SI] ; ly k t tip theo.
MOV AH, 0Eh ; s hiu in k t.
INT 10h ; s dng ngt in k t trong AL.
ADD SI, 1 ; Tng con tr cn in ln 1.
JMP next_char ; tr li, in k t tip.
stop:
RET ; tr v sau im gi.
print_me ENDP
; ===================================================
tbao_tw DB 'PICAT.dieukhien.net',0; xu kt thc: null.
END
Tip u ng b. trc [SI] ngha l so snh byte, khng phi t. Nu bn cn so
snh t, bn dng tip u ng w. thay th vo. Khi mt ton hng nm trong
thanh ghi, n khng yu cu na.
Lnh b (Macro)
Macro tng t nh chng trnh con nhng khng thc s l chng trnh con.
Macro nhn c v nh chng trnh con, nhng chng ch tn ti cho n khi
chng trnh c dch, sau khi chng trnh c dch tt c cc macro c thay
th bng lnh thc s. Nu bn khai bo mt macro v khng bao gi s dng
chng trong m ngun, chng trnh dch s b qua n.
Khai bo:
name MACRO [tham s,...]
<Lnh>
ENDM

Bi ging Chng 2
Khng nh chng trnh con, macro phi khai bo bn trn on m ngun gi n,

v d:
MyMacro MACRO p1, p2, p3
MOV AX, p1
MOV BX, p2
MOV CX, p3
ENDM
ORG 100h
MyMacro 1, 2, 3
MyMacro 4, 5, DX
RET
on m ngun trn s c m rng thnh:
MOV AX, 0001h
MOV BX, 0002h
MOV CX, 0003h
MOV AX, 0004h
MOV BX, 0005h
MOV CX, DX
Vi iu thc s quan trng v Macro v chng trnh con:

Khi mun s dng mt chng trnh con, bn phi s dng t kha CALL,
v d:
Call TA_Proc
Khi bn s dng mt Macro, bn ch cn g tn ca chng, v d:
Ta_Macr
Chng trnh con c nh v ti mt a ch c th trong b nh, v nu
bn s dng 100 ln chng trnh con , CPU ch chuyn iu khin n
vng nh ca chng trnh con thi. iu khin s tr li chng trnh
khi gp lnh RET. Stack c s dng gi a ch tr v. Lnh CALL ch
tn ht 3 byte, nn kch thc ca chng trnh thc thi nh, khng quan
trng vic gi chng trnh con bao nhiu ln.
Macro m rng trc tip cc lnh ca n vo m ngun, nu macro m rng
100 ln (gi 100 ln) s lm cho chng trnh thc thi ln hn rt nhiu,
cng ln khi macro c gi cng nhiu.
Bn phi s dng Stack hoc bt k thanh ghi no truyn tham s cho
chng trnh con
truyn tham s cho maco, bn ch cn g chng sau tn ca macro khi
gi, v d:
TA_mac 1, 2, 3
nh du kt thc macro, ch cn t kha ENDM l

Bi ging Chng 2
nh du kt thc chng trnh con bn cn phi nh tn ca chng
trnh con trc t kha ENDP
Macro c m rng trc tip trong m ngun ca bn, v th nu bn c nhiu
nhn ging nhau trong khai bo macro bn c th nhn thng bo li Khai bo
trng lp khi macro c s dng 2 ln hoc nhiu hn. loi b li ny, bn
dng t kha LOCAL khai bo rng nhn sau n l nhn cc b, nhn cc b c
th l bin, nhn, hoc chng trnh con.
V d:
MyMacro2 MACRO
LOCAL label1, label2
CMP AX, 2
JE label1
CMP AX, 3
JE label2
label1: INC AX
label2: ADD AX, 2
ENDM
ORG 100h
MyMacro2
MyMacro2
RET
Nu bn c k hoch s dng macro nhiu ln, mt hay l nn t tt c cc
macro trong mt file. V t file trong th mc INC v s dng ch th
INCLUDE <Tn-file> c th s dng macro .
2.4.4 Cc cu trc iu khin c bn

2.3.4.1 Cu trc tun t
Cu trc tun t l cu trc n gin nht. Trong cu trc tun t, cc lnh c sp
xp tun t, lnh ny tip theo lnh kia, mi lnh mt dng.
Lnh 1
Lnh 2

Lnh n
VD: Cng 2 gi tr ca thanh ghi BX v CX, ri nhn i kt qu, kt qu cui cng
cha trong AX
MOV AX,BX
ADD AX,CX ; Cng BX vi CX
SHL AX,1 ; Nhn i
2.3.4.2 Cu trc IF THEN, IF THEN ELSE
IF <iu kin> THEN <Cng vic>
IF <iu kin> THEN <Cng vic1> ELSE <Cng vic2>
VD: Gn BX = |AX|
Bi ging Chng 2
CMP AX,0 ; AX > 0?
JNL DUONG ; AX dng
NEG AX ; Nu AX < 0 th o du
DUONG: MOV BX,AX
NEXT:
VD: Gn CL gi tr bit du ca AX
CMP AX,0 ; AX > 0?
JNS AM ; AX m
MOV CL,1 ; CL = 1 (AX dng)
JMP NEXT
AM: MOV CL,0 ; CL = 0 (AX m)
NEXT:
2.3.4.3 Cu trc CASE
CASE <Biu thc>
Gi tr 1: Cng vic 1
Gi tr 2: Cng vic 2

Gi tr n: Cng vic n
END
VD: Nu AX > 0 th BH = 0, nu AX < 0 th BH = 1. Ngc li BH = 2
CMP AX,0
JL AM
JE KHONG
G DUONG
DUONG: MOV BH,0
JMP NEXT
AM: MOV BH,1
JMP NEXT
KHONG: MOV BH,2
NEXT:
2.3.4.4 Cu trc FOR
FOR <S ln lp> DO <Cng vic>
VD: Cho vng nh M di 200 bytes trong on d liu, chng trnh m s ch A
trong vng nh M nh sau:
MOV CX,200 ; m 200 bytes
MOV BX,OFFSET M ; Ly a ch vng nh
XOR AX,AX ; AX = 0
NEXT: CMP BYTE PTR [BX],'A'; So snh vi ch A
JNZ ChuA ; Nu khng phi l ch A th tip
INC AX ; tc, ngc li th tng AX
ChuA: INC BX
LOOP NEXT
2.3.4.5 Cu trc lp WHILE
WHILE <iu kin> DO <Cng vic>

(TRONG KHI <iu kin = True> LM <Cng vic>)
Bi ging Chng 2
VD: Chng trnh c vng nh bt u ti a ch 1000h vo thanh ghi AH, n
khi gp k t '$' th thot:
MOV BX,1000h
CONT: CMP AH,'$'
JZ NEXT
MOV AH,DS:[BX]
JMP CONT
NEXT:
2.3.4.6 Cu trc lp REPEAT
REPEAT <Cng vic> UNTIL <iu kin>
(LP <Cng vic> N KHI <iu kin=True th dng>)
VD: Chng trnh c vng nh bt u ti a ch 1000h vo thanh ghi AH, n

khi gp k t '$' th thot:
MOV BX,1000h
CONT: MOV AH,DS:[BX]
CMP AH,'$'
JZ NEXT
JMP CONT
NEXT:
V d:
org 100h
mov bx, 0 ; total step counter.
mov cx, 5
k1: add bx, 1
mov al, '1'
mov ah, 0eh
int 10h
push cx
mov cx, 5
k2: add bx, 1
mov al, '2'
mov ah, 0eh
int 10h
push cx
mov cx, 5
k3: add bx, 1
mov al, '3'
mov ah, 0eh
int 10h
loop k3 ; internal in internal loop.
pop cx
loop k2 ; internal loop.
pop cx
loop k1 ; external loop.
Ret

Bi ging Chng 2
2.4.5 Ngt trong Assembly
Ngt c th hiu l s ca cc hm. Cc hm hy lm cho vic lp trnh n
gin hn, thay v vit m ngun in ra k t bn c th n gin l gi ngt v n
s t lm mi vic cho bn. Cng c cc hm ngt (chng trnh con ngt) lm vic
vi a v cc phn cng khc. Chng ta gi l ngt mm.
Ngt cng c th c gi t cc phn cng. y chng ta ch cp n
ngt mm.
to ngt mm, c cch l chng ta gi lnh INT, cu trc rt n gin:
INT <gi tr>
Trong <gi tr> c th l cc s t 0 n 255 (hoc 0..0FFh). Chng ta
thng dng s h 16.
Bn c th hiu l ch c 256 hm ngt, iu l khng ng. Mi hm
ngt c th c s hiu ngt. Vi mi s hiu ngt, ta li c mt chng trnh con
ngt ring.
ch ra s hiu ngt, thanh ghi AH phi c thit lp trc khi gi ngt.
Mi ngt c th c ti a 256 s hiu ngt (nn chng ta c 256*256=65536)
Ngoi ra, chng ta c th dng cc thanh ghi khc truyn tham s cho
ngt.
V d sau in ra mt k t ra mn hnh:
mov ah, 2
mov dl, 'a'
int 21h
Trong , chng ta dng hm ngt th 21h (INT 21h), s hiu ngt l 2
(ah=2), v tham s cn in truyn vo thanh ghi dl (dl=a).
Di y l mt s s hiu ngt thng dng:
Ngt 21h:
AH ngha
1 c 1 k t t bn phm, KQ lu trong AL, nu cha bm, ch bng c
2 In 1 k t ra mn hnh, DL=K t cn in, sau khi in: AL=DL
mov ah, 2
mov dl, 'a'
int 21h
6 - Nhp, Nu DL=255: ZF=1,AL=0 nu khng c phm no c bm, tri li:
ZF=0, AL=K t bm, xa b m bn phm.
- In k t, nu DL=0..254: DL=k t cn in, in xong: AL=DL,
9 In mt xu k t, c tr bi DX,
xu k t phi kt thc bng $
org 100h
mov dx, offset msg
mov ah, 9
int 21h

Bi ging Chng 2
Ngt 21h:
AH ngha
ret
msg db "hello world $"
10 Nhp mt xu k t vo: DS:DX, Byte u tin l kch thc b m, Byte th 2 l

k t thc t nhp. Hm ny khng thm $ vo cui xu.
in c xu, cn thm k t $ vo cui, v bt u in t a ch DS:DX+2
V d:
org 100h
mov dx, offset buffer
mov ah, 0ah
int 21h
jmp print
buffer db 10,?, 10 dup(' ')
print:
xor bx, bx
mov bl, buffer[1]
mov buffer[bx+2], '$'
mov dx, offset buffer + 2
mov ah, 9
int 21h
ret

Bi ging Chng 2
2.4.6 Cc v d
V d 1. Hello word n gin (COM file)
; Vit ra mn hnh dng ch "hello, world!"
; Su dung .com
name "hi"
org 100h
JMP start ; jump over string declaration
msg db "hello, world!", 0Dh,0Ah, 24h
start: lea dx, msg ; load effective address of
;msg into dx.
MOV ah, 09h ; print function is 9.
int 21h ; do it!
MOV ah, 0
int 16h ; wait for any key any....
RET ; return to operating system.
V d 2. Hello Word (EXE file)

; a tiny example of multi segment executable file.
; data is stored in a separate segment, segment registers must be
set correctly.
name "testexe"
data segment
msg db "hello, world!", 0dh,0ah, '$'
ends
stack segment
db 30 dup(0)
ends
CODE segment
start:
; set segment registers:
MOV ax, data
MOV ds, ax
MOV es, ax
; print "hello, world!":
lea dx, msg
MOV ah, 09h
int 21h
; wait for any key...
MOV ah, 0
int 16h
; return control to os:
MOV ah, 4ch
int 21h
ends
END start ; set entry point and stop the assembler.

Bi ging Chng 2
V d 3. Tnh: Tng, hiu, tch, thng:
org 100h
mov cl,8
mov dl,3
Call Tong
Call hieu
Call tich
Call thuong
ret
Tong proc
mov al,cl
add al,dl
ret
Hieu proc
mov al,cl
sub al,dl
ret
Tich proc
mov al,cl
mul dl
ret
Thuong proc
mov al,cl
div dl
ret
end
V d 4. In mt s nh phn ra mn hnh:
name "add-sub"
org 100h
MOV al, 5 ; bin=00000101b
MOV bl, 10 ; hex=0ah or bin=00001010b
; 5 + 10 = 15 (decimal) or hex=0fh or bin=00001111b
add bl, al
; 15 - 1 = 14 (decimal) or hex=0eh or bin=00001110b
sub bl, 1
; print result in binary:
MOV cx, 8
print: MOV ah, 2 ; print function.
MOV dl, '0'
test bl, 10000000b ; test first bit.
jz zero
MOV dl, '1'
zero: int 21h
shl bl, 1

Bi ging Chng 2
loop print
; print binary suffix:
MOV dl, 'b'
int 21h
; wait for any key press:
MOV ah, 0
int 16h
ret
V d 5. In mt s h 10 ra mn hnh:
name "Print Decimal function, tuananhvxl@gmail.com"
Enter Macro
mov ah,2
mov dl, 0ah ; new line.
int 21h
mov dl, 0dh ; carrige return.
int 21h
endm
org 100h ; directive make tiny com file.
; print result in decimal:
mov al, 123
call Print_dec8AL
Enter
mov al, 45
call Print_dec8AL
; wait for any key press:
mov ah, 0
int 16h
ret
Print_dec8AL proc
cmp al, 0
jne Print_dec8AL_r
push ax
mov dl, '0'
mov ah, 2
int 21h
pop ax
ret
Print_dec8AL_r:
pusha
mov ah, 0
cmp ax, 0
je pn_done
mov dl, 10
div dl
call Print_dec8AL_r
mov dl, ah
Bi ging Chng 2
add dl, 30h
mov ah, 2h
int 21h
jmp pn_done
pn_done:
popa
ret
endp
V d 6. In xu ra mn hnh:
name "Print_String"
Print_String macro str

mov dx, offset str
mov ah, 9
int 21h
endm
org 100h
Print_String Thongbao1
Print_String Thongbao2
ret
Thongbao1 db "Xin chao", 0Dh,0Ah, "$"

Thongbao2 db "Cac ban", 0Dh,0Ah, "$"
V d 7. Nhp mt s h 10, nhn vi 2 ri in ra mn hnh

name "Input Number [tuananhktmt@gmail.com]"
Enter Macro
pusha
mov ah,2
mov dl, 0ah ; new line.
int 21h
mov dl, 0dh ; carrige return.
int 21h
popa
endm
org 100h
; Nhap - start:
mov dx, offset msg
mov ah, 9
int 21h
;------------------------------------
xor cl,cl

Bi ging Chng 2
wait_for_key: ; Cho` bam phim:
mov ah, 1
int 21h
cmp al,0Dh;| Bam ENTER thi ket thuc:
jz exit ;|
; Tinh CL=CL*10+AL
sub al,'0'
push ax
xor ah,ah
mov al,cl ;|
mov dl,10 ;| CL=CL*10
mul dl ;|
mov cl,al ;|
pop ax
add cl,al ; CL=CL+AL (0..9)
jmp wait_for_key
exit:
mov AX,0
mov DL,2
mov AL, CL
Mul DL
Enter
call Print_dec8AL
mov ah, 0
int 16h
ret
;-----------------------
Print_dec8AL proc
cmp al, 0
jne Print_dec8AL_r
push ax
mov al, '0'
mov ah, 0eh
int 10h
pop ax
ret
Print_dec8AL_r:
pusha
mov ah, 0
cmp ax, 0
je pn_done
mov dl, 10
div dl
call Print_dec8AL_r
mov al, ah

Bi ging Chng 2
add al, 30h
mov ah, 0eh
int 10h
jmp pn_done
pn_done:
popa
ret
endp
;-----------------------------------------------
msg db "Moi ngai nhap vao 1 so 8 bit:", 0Dh,0Ah
db "N=$"
end
V d 8. Cng 2 mng di 4 byte
name "add-2 array"
org 100h
jmp start
vec1 db 1, 2, 5, 6
vec2 db 3, 5, 6, 1
vec3 db ?, ?, ?, ?
start:
lea si, vec1
lea bx, vec2
lea di, vec3
mov cx, 4
sum:
mov al, [si]
add al, [bx]
mov [di], al
inc si
inc bx
inc di
loop sum
ret
V d 9. Nhp mt chui k t v chuyn ch thng thnh ch hoa

.MODEL SMALL
.STACK 100h
.DATA
m1 DB 81
DB ?
DB 81 DUP(?)
m2 DB 'Chuoi da doi:$'
.CODE
main PROC
MOV AX,@DATA
MOV DS,AX ; Khoi dong thanh ghi DS
MOV ES,AX

Bi ging Chng 2
LEA DX,m1
MOV AH,0Ah ; Nhap chuoi
INT 21h
LEA SI,m1
ADD SI,2
MOV DI,SI
Next: LODSB ; Lay ky tu
CMP AL,0Dh ; Neu la ky tu Enter thi ket thuc
JE quit
CMP AL,'a' ; Neu ky tu nhap khong phai la ky tu thuong tu a
toi z thi bo qua
JB cont
CMP AL,'z'
JA cont
SUB AL,20h ; Chuyen ky tu thuong thanh ky tu hoa
STOSB ; Luu ky tu
DEC DI ; Neu la ky tu thuong thi dung lenh STOSB nen DI tang
len 1 ta phai giam DI
cont: INC DI ;
JMP next
quit: MOV AL,'$'
STOSB
MOV AX,02h ; Xoa man hinh
INT 10h
LEA DX,m2
MOV AH,09h
INT 21h
LEA DX,m1+2
MOV AH,09h
INT 21h
MOV AH,4Ch
INT 21h
main ENDP
END main
2.5 Ghp ni b nh v thit bi ngoi vi
2.5.1 Ghp ni b nh
2.5.1.1 Giao tip bus c bn

- Cc bit a ch thp (gi s 13 ng A0 A12) ni trc tip n chip b
nh (gi s RAM c dung lng 8K 8)
- Cc bit a ch cao (gi s A13 A19) ni vi b gii m a ch (address
nh mi chip b nh thuc vng a ch no. Tp hp cc vng ny theo
bng gi l bng b nh (memory map).

Bi ging Chng 2
Hnh 2-8. Giao tip bus c bn

Quan h gia gii m a ch v bng b nh:
Hnh 2-9. Quan h gia gii m a ch v b nh
2.5.2 Gii m a ch
2.5.2.1 Dng 74LS138
Dng nhiu 74LS138

Bi ging Chng 2
Hnh 2-10. Mc ni tng nhiu 74LS138
2.5.2.2 nh thi b nh
Thi gian truy xut (access time):
- Vi chu k c: thi gian truy xut l thi gian tnh t lc a ch mi xut
hin b nh cho n khi c d liu ng ng ra ca b nh.
- Vi chu k ghi: thi gian truy xut l thi gian tnh t lc a ch mi xut
hin b nh cho n khi d liu a vo b nh.
Thi gian chu k (cycle time): l thi gian t lc bt u chu k b nh
n khi bt u chu k k tip. Ngoi ra, P c th s dng thm mt s trng
thi ch khi c b nh.
tdbuf: thi gian tr b m d liu (data buffer)

tabuf: thi gian tr b m a ch (address buffer)
tOE: thi gian p ng ca b nh vi tn hiu cho php ng ra (ouput
enable)
tCS: thi gian b nh truy xut t Chip Select
tACC: thi gian b nh truy xut t a ch, thng thng tACC = tcs
tdec: thi gian tr b gii m (decoder)
Hnh 2-11. Ghp ni VXL vi b nh

Bi ging Chng 2
nh thi c b nh:
Thi gian truy xut tng cng ca h thng b nh chnh l tng thi gian
tr trong cc b m v thi gian truy xut (access time) b nh.
Hiu gia thi gian truy xut cn thit bi P vi thi gian truy xut tht s
ca b nh gi l bin nh thi (timing margin).
tDS (Data Setup): thi gian thit lp d liu cung cp bi h thng b nh
tDH (Data Hold): thi gian gi d liu cung cp bi h thng b nh
Hnh 2-12. nh thi ghi b nh
Hnh 2-13. nh thi c b nh

Bi ging Chng 2
taw: thi gian truy xut ghi (access write)
twp: rng xung ghi ti thiu (write pulse)
tAS: thi gian a ch hp l trc khi WR = 0
Thng thng, ta khng quan tm n a ch cho n khi xc nhn CS
nn thng tcw = taw.
2.5.3 Ghp ni thit b ngoi vi
2.5.4 Cc kiu giao tip vo / ra

Thit b ngoi vi c a ch tch ri vi b nh
Trong cch giao tip ny, b nh dng ton b khng gian 1 MB. Cc thit b ngoi
vi s c mt khng gian 64 KB cho mi loi cng. Trong kiu giao tip ny, ta phi
dng tn hiu IO/M v cc lnh trao i d liu thch hp.
B nh: IO/M = 0, dng lnh MOV
Ngoi vi: IO/M = 1, dng lnh IN (nhp) hay OUT (xut)
Thit b ngoi vi v b nh c chung khng gian a ch
Trong kiu giao tip ny, thit b ngoi vi s chim mt vng no trong khng
gian a ch 1 MB v ta ch dng lnh MOV thc hin trao i d liu.
2.5.5 Gii m a ch cho thit b vo / ra

Vic gii m a ch cho thit b ngoi vi cng tng t vi vic gii m a ch cho
b nh. Thng thng, cc cng c a ch 8 bit A0 A7. Tuy nhin, trong mt s
h vi x l, cc cng s c a ch 16 bit.
Ta c th dng mch NAND to tn hiu chn cng nhng mch ny ch c th
gii m cho 1 cng. Trong trng hp cn nhiu tn hiu chn cng, ta c th dng
b gii m 74LS138 gii m cho 8 cng khc nhau.
a. Gii m cho cng vo
b. Gii m cho cng ra

Hnh 2-14. Gii m cho cc cng
Bi ging Chng 2
2.5.6 Cc mch cng n gin
Cc mch cng c th c xy dng t cc mch cht 8 bit (74LS373: kch theo
mc, 74LS374: kch theo cnh), cc mch m 8 bit (74LS245). Chng c dng
trong cc giao tip n gin P v ngoi vi hot ng tng thch vi nhau.
Vi mch m 74LS245:
Inputs Function
Outputs
G DIR A bus B bus
L L Output Input A=B
L H Input Output B=A
H X High Impedance Z
Hnh 2-15. Vi mch 74LS245

Vi mch 74LS245 cho tn hiu vo ra 2 chiu dng m s liu trong my
tnh PC/XT (VXL 8086). Vi mch ny c 2 ng iu khin chnh, tn hiu /G l
tn hiu cho php vi mch hot ng, khi /G mc cao, cc chn d liu ca vi
mch trng thai tr khng cao.
Tn hiu DIR xc nh chiu truyn d iu. DIR = 1 d liu c truyn t A
sang B, ngc li, khi DIR = 0 d liu c truyn t B sang A
Vi mch cht 74LS373:
Hnh 2-16. Vi mch cht 74LS373

Vi mch bao gm cc vi mch cht v cc vi mch cng 3 trng thi. Vi mch
ny thng c dng cht a ch trong my PC/XT v cht d liu trong cc
ng dng ghp ni my tnh. C 2 ng tn hiu iu khin l /OE v LE. Tn
hiu /OE l tn hiu cho php hot ng ca vi mch. Khi /OE mc cao, cc cng
ca vi mch trng thi tr khng cao. Tn hiu LE l tn hiu cho php cht, tn
hiu ny tch cc mc dng. i vi 74LS373, khi LE mc cao, tn hiu a
vo t cng D c a ra cng Q. Khi LE chuyn sang mc thp, tn hiu cng
Q c cht li.
Bi ging Chng 2
2.6 Cu hi v bi tp
Bi 1. Vit CT nhp vo 1 k t, xut ra k t

V d:
Moi ban nhap 1 ky tu: b
Ky tu va nhp: b
Bi 2. Vit chng trnh xut ra mn hnh mt s dng.
V d:
De chay duoc 1 CT hop ngu ban can thuc hien cac buoc sau:
Dich file ASM thanh file OBJ
Lien ket file OBJ thanh file EXE
Chay file EXE
Bi 3. Vit CT nhp vo 1 k t, xut ra k t lin trc v lin sau.
V d:
Ky tu lien truoc: a
Ky tu lien sau: c
Bi 4. Vit CT nhp vo 1 k t thng. In ra k t Hoa

V d:
Ky tu Hoa: B
Bi 5. Vit CT nhp vo 1 k t hoa. In ra k t thng

V d:
Moi ban nhap 1 ky tu: B
Ky tu thng: b
Bi 6. Vit chng trnh nhp vo 2 s nguyn dng x1, x2 (1 x2 < x1 < 9).
Xut ra kt qu cc php tnh: x1-1, x1 +2, x1+x2, x1-x2
V d:
x1 = 5
x2 = 3
x1 1 = 4
x1 + 1 = 6
x1 + x2 = 8
x1 x2 = 7

Bi ging Chng 2
M rng
1. T tm hiu xem hm no trong ngt 21h dng nhp mt xu k t ?
Ngoi ngt 21h, cn ngt no c th dng nhp xut t bn phm ? (dng
NortonGuide hoc TechHelp).
2. Vit chng trnh nhp tn v in ra mn hnh cu Hello + tn nhp.
3. Tm hiu xem ti sao khng c lnh MOV x1, x2 (x1,x2 l hai bin trong
b nh)
4. Hai lnh INC AX v ADD AX, 1 khc nhau ch no ?
Hng dn
Bi 1. nhp 1 mt k t s dng hm 1 ca ngt 21h, xut, s dng hm 2.
V d:
MOV AH,1
int 21h ; kt qu trong AL
MOV DL,AL ; k t cn xut trong DL

MOV AH,2
int 21h
Bi 2. Cp k t xung dng l 10,13. C th khai bo nhiu xu k t hoc chung
mt xu.
V d:
Msg3 DB 10,13,9,1. Dich file ASM thanh file OBJ.$
Msg4 DB 10,13,9,2. Lien ket file OBJ thanh file EXE.$
Hoc
Msg34 DB 10,13,9,1. Dich file ASM thanh file OBJ.

DB 10,13,9,2. Lien ket file OBJ thanh file EXE.$
Bi 3, 4. K t hoa v k t thng ca cng mt ch ci ting Anh cch nhau 20h.

Do , chuyn i ch hoa thnh ch thng v ngc li, ch cn dng lnh
ADD, SUB.
Bi 5. chuyn i cc k t 0 9 thnh s 0 9 ch cn thc hin php tr i

48 (m ca 0). Sau khi thc hin php tnh, chuyn i thnh k t v in ra mn
hnh (c th dng biu din Hex).

Bi ging Chng 2
(Trang ny nn b trng)

Bi ging Chng 3
Vi x l - Vi iu khin H Vi iu khin 8051
CHNG 3.
H VI IU KHIN 8051
Mc tiu:
Gip sinh vin hiu c cu trc phn cng, s chn v cc mch ph tr

ca h vi iu khin 8051; nm c v bit cch vn dng cc ch a ch trong
lp trnh; nm c tp lnh v phng php lp trnh cho h vi iu khin 8051.
Tm tt hc phn:
Cu trc phn cng v t chc b nh

Gii thiu chung
S cu trc
M t chc nng cc chn
Hot ng Reset
T chc b nh
Cc ch nh a ch
Tp lnh
Lp trnh hp ng (Assembly) cho vi iu khin 8051
Trnh dch hp ng
Cng vo/ra v lp trnh
B m/nh thi v lp trnh
Lp trnh ngt

Bi ging Chng 3
3.1 Gii thiu chung

B Vi x l c kh nng vt bc so vi cc h thng khc v kh nng tnh
ton, x l, v thay i chng trnh linh hot theo mc ch ngi dng, c bit
hiu qu i vi cc bi ton v h thng ln.Tuy nhin i vi cc ng dng nh,
tm tnh ton khng i hi kh nng tnh ton ln th vic ng dng vi x l cn
cn nhc. Bi v h thng d ln hay nh, nu dng vi x l th cng i hi cc
khi mch in giao tip phc tp nh nhau. Cc khi ny bao gm b nh cha
d liu v chng trnh thc hin, cc mch in giao tip ngoi vi xut nhp v
iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc hin c
cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng v
cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh phc
tp, chim nhiu khng gian, mch in phc tp v vn chnh l trnh ngi
thit k. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp p dng
cho cc h thng nh.
V mt s nhc im trn nn cc nh ch to tch hp mt t b nh v mt
s mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht c gi l
Microcontroller-Vi iu khin. Vi iu khin c kh nng tng t nh kh nng ca
vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu. Vi
iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm vng
mt khi lng kin thc qu ln nh ngi dng vi x l, kt cu mch in dnh
cho ngi dng cng tr nn n gin hn nhiu v c kh nng giao tip trc tip
vi cc thit b bn ngoi. Vi iu khin tuy c xy dng vi phn cng dnh cho
ngi s dng n gin hn, nhng thay vo li im ny l kh nng x l b gii
hn (tc x l chm hn v kh nng tnh ton t hn, dung lng chng trnh b
gii hn). Thay vo , Vi iu khin c gi thnh r hn nhiu so vi vi x l, vic
s dng n gin, do n c ng dng rng ri vo nhiu ng dng c chc
nng n gin, khng i hi tnh ton phc tp.
Vi iu khin c ng dng trong cc dy chuyn t ng loi nh, cc robot
c chc nng n gin, trong my git, t v.v...
Nm 1976 Intel gii thiu b vi iu khin (microcontroller) 8748, mt chip
tng t nh cc b vi x l v l chip u tin trong h MCS-48. phc tp, kch
thc v kh nng ca Vi iu khin tng thm mt bc quan trng vo nm 1980
khi intel tung ra chip 8051, b Vi iu khin u tin ca h MCS-51 v l chun
cng ngh cho nhiu h Vi iu khin c sn xut sau ny. Sau rt nhiu h Vi

Bi ging Chng 3
iu khin ca nhiu nh ch to khc nhau ln lt c a ra th trng vi tnh
nng c ci tin ngy cng mnh.
3.1.1 ng dng ca vi iu khin

V c bn, vi iu khin rt n gin. Chng ch bao gm ti thiu mt s
thnh phn sau:
- Mt b vi x l ti gin c s dng nh b no ca h thng
- Ty theo cng ngh ca mi hng sn xut, c th c thm b nh, cc chn
nhp/xut tn hiu, b m, b nh thi, cc b chuyn i tng t/s
(A/D),
- Tt c chng c t trong mt v chp tiu chun.
- Mt phn mm n gin c th iu khin c ton b hot ng ca vi iu
khin v c th d dng cho ngi s dng nm bt.
Da trn nguyn tc c bn trn, rt nhiu h vi iu khin c pht trin
v ng dng mt cch thm lng nhng mnh m vo mi mt ca i sng ca con
ngi. Mt s ng dng c bn thnh cng c th k ra sau y:
- Nhng thnh phn in t c nhng vo vi iu khin c th trc tip hoc
qua cc thit b vo ra (cng tc, nt bm, cm bin, LCD, r le, ) iu
khin rt nhiu thit b v h thng nh thit b t ng trong cng nghip,
iu khin nhit , dng in, ng c,
- Gi thnh rt thp khin cho chng c nhng vo rt nhiu thit b thng
minh trong i sng con ngi nh ti vi, my git, iu ha nhit , my
nghe nhc,
3.1.2 Hot ng ca vi iu khin.

Mc d c rt nhiu h vi iu khin c pht trin cng nh nhiu chng
trnh iu khin to ra cho chng, nhng tt c chng vn c mt s im chung c
bn. Do nu ta hiu cn k mt h th vic tm hiu thm mt h vi iu khin
mi l hon ton n gin. Mt kch bn chung cho hot ng ca mt vi iu khin
nh sau:
1. Khi khng c ngun in cung cp, vi iu khin ch l mt con chip c
chng trnh np sn vo trong v khng c hot ng g xy ra.
2. Khi c ngun in, mi hot ng bt u c xy ra vi tc cao. n v
iu khin logic c nhim v iu khin tt c mi hot ng. N kha tt c
cc mch khc, tr mch giao ng thch anh. Sau mini giy u tin tt c
sn sng hot ng.

Bi ging Chng 3
3. in p ngun nui t n gi tr ti a ca n v tn s giao ng tr nn
n nh. Cc bit ca cc thanh ghi SFR cho bit trng thi ca tt c cc mch
trong vi iu khin. Ton b vi iu khin hot ng theo chu k ca chui
xung chnh.
4. Thanh ghi b m chng trnh (Program Counter) c xa v 0. Cu lnh
t a ch ny c gi ti b gii m lnh sau c thc thi ngay lp tc.
5. Gi tr trong thanh ghi PC c tng ln 1 v ton b qu trnh c lp li
vi triu ln trong mt giy.
Hnh 3-1. Cu trc chung h VK
3.1.3 Cu trc chung ca vi iu khin

Nh ta thy, tt c cc hot ng trong cc vi iu khin c thc hin tc cao
v kh n gin, nhng vi iu khin chnh n s khng c tht s hu ch nu
khng c mch c bit lm cho n hon thin. C mt s mch c th sau y.
Read Only Memory (ROM)
Read Only Memory (ROM) l mt loi b nh c s dng lu vnh vin cc
chng trnh c thc thi. Kch c ca chng trnh c th c vit ph thuc vo
kch c ca b nh ny. ROM c th c tch hp trong vi iu khin hay thm vo
nh l mt chip gn bn ngoi, ty thuc vo loi vi iu khin. C hai ty chn c
mt s nhc im. Nu ROM c thm vo nh l mt chip bn ngoi, cc vi iu
khin l r hn v cc chng trnh c th tn ti lu hn ng k. Nhng ng thi,
lm gim s lng cc chn vo/ra vi iu khin s dng vi mc ch khc.

Bi ging Chng 3
ROM ni thng l nh hn v t tin hn, nhng l ghim thm c sn kt ni
vi mi trng ngoi vi. Kch thc ca dy ROM t 512B n 64KB
Random Access Memory (RAM)
Random Access Memory (RAM) l mt loi b nh s dng cho cc d liu lu
tr tm thi v kt qu trung gian c to ra v c s dng trong qu trnh hot
ng ca b vi iu khin. Ni dung ca b nh ny b xa mt khi ngun cung cp
b tt.
Electrically Erasable Programmable ROM (EEPROM)
EEPROM l mt kiu c bit ca b nh ch c mt s loi vi iu khin. Ni
dung ca n c th c thay i trong qu trnh thc hin chng trnh (tng t
nh RAM), nhng vn cn lu gi vnh vin, ngay c sau khi mt in (tng t
nh ROM). N thng c dng lu tr cc gi tr c to ra v c s dng
trong qu trnh hot ng (nh cc gi tr hiu chun, m, cc gi tr m, v.v..),
m cn phi c lu sau khi ngun cung cp ngt. Mt bt li ca b nh ny l
qu trnh ghi vo l tng i chm.
Hnh 3-2 Giao tip b nh

Bi ging Chng 3
Cc thanh ghi chc nng c bit (SFR)
Thanh ghi chc nng c bit (Special Function Registers) l mt phn ca b nh
RAM. Mc ch ca chng c nh trc bi nh sn xut v khng th thay i
c. Cc bit ca chng c lin kt vt l ti cc mch trong vi iu khin nh b
chuyn i A/D, modul truyn thng ni tip, Mi s thay i trng thi ca cc
bit s tc ng ti hot ng ca vi iu khin hoc cc vi mch.
B m chng trnh (PC:Program Counter)
B m chng trnh cha a ch ch n nh cha cu lnh tip theo s c
kch hot. Sau mi khi thc hin lnh, gi tr ca b m c tng ln 1. V l do
nn chng trnh ch thc hin c c tng lnh trong mt thi im.
Central Processor Unit (CPU)
y l mt n v c nhim v iu khin v gim st tt c cc hot ng bn
trong vi iu khin v ngi s dng khng th tc ng vo hot ng ca n. N
bao gm mt s n v con nh hn, trong quan trng nht l:
- Instruction decoder is a part of the electronics which recognizes program
instructions and runs other circuits on the basis of that. The abilities of this
circuit are expressed in the "instruction set" which is different for each
microcontroller family.
- B gii m lnh c nhim v nhn dng cu lnh v iu khin cc mch
khc theo lnh gii m. Vic gii m pcj thc hin nh c tp lnh
instruction set. Mi h vi iu khin thng c cc tp lnh khc nhau.
- Arithmetical Logical Unit (ALU) Thc thi tt c cc thao tc tnh ton s
hc v logic.
- Thanh ghi tch ly (Accumulator) l mt thanh ghi SFR lin quan mt
thit vi hot ng ca ALU. N lu tr tt c cc d liu cho qu trnh
tnh ton v lu gi tr kt qu chun b cho cc tnh ton tip theo. Mt
trong cc thanh ghi SFR khc c gi l thanh ghi trng thi (Status
Register) cho bit trng thi ca cc gi tr lu trong thanh ghi tch ly.
Cc cng vo/ra (I/O Ports)
vi iu khin c th hot ng hu ch, n cn c s kt ni vi cc thit b
ngoi vi. Mi vi iu khin s c mt hoc mt s thanh ghi (c gi l cng) c
kt ni vi cc chn ca vi iu khin.

Bi ging Chng 3
Hnh 3-3. Vo ra vi thit b ngoi vi

Chng c gi l cng vo/ra (I/O port) bi v chng c th thay i chc nng,
chiu vo/ra theo yu cu ca ngi dng.
B dao ng (Oscillator)
Hnh 3-4 ghp ni b dao ng
B dao ng ng vai tr nhc trng lm nhim v ng b ha hot ng ca tt

c cc mch bn trong vi iu khin. N thng c to bi thch anh hoc gm
n nh tn s. Cc lnh khng c thc thi theo tc ca b dao ng m thng

Bi ging Chng 3
chm hn, bi v mi cu lnh c thc hin qua nhiu bc. Mi loi vi iu
khin cn s chu k khc nhau thc hin lnh.
B nh thi/m (Timers/Counters)
Hu ht cc chng trnh s dng cc b nh thi trong hot ng ca mnh. Chng

thng l cc thanh ghi SFR 8 hoc 16 bit, sau mi xung dao ng clock, gi tr ca
chng c tng ln. Ngay khi thanh ghi trn, mt ngt s c pht sinh.
Hnh 3-5. B nh thi/m

Truyn thng ni tip
Hnh 3-6. Truyn nhn ni tip

Kt ni song song gia vi iu khin v thit b ngoi vi c thc hin qua cc
cng vo/ra l gii php l tng vi khong cch ngn trong vi mt. Tuy nhin khi
cn truyn thng gia cc thit b khong cch xa th khng th dng kt ni song
song, v vy truyn thng ni tip l gii php tt nht.
Ngy nay, hu ht cc vi iu khin c mt s b iu khin truyn thng ni tip
nh mt trang b tiu chun. Chng c s dng ph thuc vo nhiu yu t khc
nhau nh:
Bi ging Chng 3
- Bao nhiu thit b vi iu khin mun trao i d liu
- Tc trao i d liu
- Khong cch truyn
- Truyn/nhn d liu ng thi hay khng?
Chng trnh
Khng ging nh cc mch tch hp, ch cn kt ni cc thnh phn vi nhau v
bt ngun, vi iu khin cn phi lp trnh trc. vit mt chng trnh cho vi
iu khin, c mt vi ngn ng lp trnh bc thp c th s dng nh Assembly, C
hay Basic. Vit mt chng trnh bao gm vic vit cc cu lnh n gin theo mt
th t chng c th thc thi. C rt nhiu phn mm chy trn mi trng
Windows cho php xy dng cc chng trnh hon chnh cho cc h vi iu khin
3.2 Kin trc vi iu khin 8051
3.2.1 Chun 8051

H vi iu khin MCS-51 do Intel sn xut u tin vo nm 1980 l cc IC thit
k cho cc ng dng hng iu khin. Cc IC ny chnh l mt h thng vi x l
hon chnh bao gm cc cc thnh phn ca h vi x l: CPU, b nh, cc mch
giao tip, iu khin ngt.
MCS-51 l h vi iu khin s dng c ch CISC (Complex Instruction
Set Computer), c di v thi gian thc thi ca cc lnh khc nhau. Tp lnh
cung cp cho MCS-51 c cc lnh dng cho iu khin xut/nhp tc ng n
tng bit. MCS-51 bao gm nhiu vi iu khin khc nhau, b vi iu khin u
tin l 8051 c 4KB ROM, 128 byte RAM v 8031, khng c ROM ni, phi
s dng b nh ngoi. Sau ny, cc nh sn xut khc nh Siemens, Fujitsu,
cng c cp php lm nh cung cp th hai.
MCS-51 bao gm nhiu phin bn khc nhau, mi phin bn sau tng
thm mt s thanh ghi iu khin hot ng ca MCS-51.
Hnh 3-7.Kin trc vi iu khin 8051

Bi ging Chng 3
AT89C51 l vi iu khin do Atmel sn xut, ch to theo cng ngh CMOS c
cc c tnh nh sau:
- 4 KB PEROM (Flash Programmable and Erasable Read Only Memory), c
kh nng ti 1000 chu k ghi xo
- Tn s hot ng t: 0Hz n 24 MHz
- 3 mc kha b nh lp trnh
- 128 Byte RAM ni.
- 4 Port xut /nhp I/O 8 bit.
- 2 b Timer/counter 16 Bit.
- 6 ngun ngt.
- Giao tip ni tip iu khin bng phn cng.
- 64 KB vng nh m ngoi
- 64 KB vng nh d liu ngoi.
- Cho php x l bit.
- 210 v tr nh c th nh v bit.
- 4 chu k my (4 s i vi thch anh 12MHz) cho hot ng nhn hoc chia.
- C cc ch ngh (Low-power Idle) v ch ngun gim (Power-down).
- Ngoi ra, mt s IC khc ca h MCS-51 c thm b nh thi th 3 v 256
byte RAM ni.

Bi ging Chng 3
3.2.2 Chn vi iu khin 8051
Hnh 3-8. S chn VK AT89C51

Chip AT89C51 c cc tn hiu iu khin cn phi lu nh sau:
Tn hiu vo /EA trn chn 31 thng t ln mc cao ( +5V) hoc mc
thp (GND). Nu mc cao, 8951 thi hnh chng trnh t ROM ni trong khong
a ch thp (4K hoc ti a 8k i vi 89C52). Nu mc thp, chng trnh c
thi hnh t b nh m rng (ti a n 64Kbyte). Ngoi ra ngi ta cn dng /EA
lm chn cp in p 12V khi lp trnh EEPROM trong 8051.
Chn PSEN (Program store enable):
PSEN l chn tn hiu ra trn chn 29. N l tn hiu iu khin cho php chng
trnh m rng, PSEN thng c ni n chn /OE (Output Enable) ca mt
EPROM hoc ROM cho php c cc bytes m lnh.
Hy nh rng : bnh thng chn /PSEN s c th trng ( No Connect).Ch khi
no cho /EA mc thp th lc : /PSEN s mc thp trong thi gian ly lnh.
Cc m nh phn ca chng trnh c ly t EPROM qua bus d liu v c cht
vo thanh ghi lnh ca 8951 gii m lnh. /PSEN mc th ng (mc cao) nu
thi hnh chng trnh trong ROM ni ca 8951.

Bi ging Chng 3
CC CHN NGUN:
AT89C51 hot ng ngun n +5V. Vcc c ni vo chn 40, v Vss (GND)
c ni vo chn 20.
3.2.3 Cng vo/ra

Tt c cc vi iu khin 8051 u c 4 cng vo/ra 8 bit c th thit lp nh cng
vo hoc ra. Nh vy c tt c 32 chn I/O cho php vi iu khin c th kt ni vi
cc thit b ngoi vi.
Hnh 3-9. Cng vo/ra

Bi ging Chng 3
Hnh 3-10. Xut mc 0

Chn vo/ra (I/O)
Hnh trn m t s n gin ca mch bn trong cc chn vi iu khin tr
cng P0 l khng c in tr ko ln (pull-up).
Hnh 3-11. Tr treo ni ti chn

Chn ra
Mt mc logic 0 t vo bit ca thanh ghi P lm cho transistor m, ni chn
tng ng vi t.
Hnh 3-12. xut mc 1

Chn vo
Mt bit 1 t vo mt bit ca thanh ghi cng, transistor ng v chn tng ng
c ni vi ngun Vcc qua tr ko ln.

Bi ging Chng 3
Port 0
Port 0 l port c 2 chc nng cc chn 32 39 ca AT89C51:
-Chc nng I/O (xut/nhp): dng cho cc thit k nh. Tuy nhin, khi
dng chc nng ny th Port 0 phi dng thm cc in tr ko ln
(pull-up), gi tr ca in tr ph thuc vo thnh phn kt ni vi Port.
- Khi dng lm ng vo, Port 0 phi c set mc logic 1 trc .
- Chc nng a ch / d liu a hp: khi dng cc thit k ln, i hi
phi s dng b nh ngoi th Port 0 va l bus d liu (8 bit) va l
bus a ch (8 bit thp).
Ngoi ra khi lp trnh cho AT89C51, Port 0 cn dng nhn m khi lp trnh
v xut m khi kim tra (qu trnh kim tra i hi phi c in tr ko ln).
Port 1:
Port1 (chn 1 8) ch c mt chc nng l I/O, khng dng cho mc ch khc (ch
trong 8032/8052/8952 th dng thm P1.0 v P1.1 cho b nh thi th 3). Ti
Port 1 c in tr ko ln nn khng cn thm in tr ngoi.
Port 1 c kh nng ko c 4 ng TTL v cn dng lm 8 bit a ch thp
trong qu trnh lp trnh hay kim tra.
Khi dng lm ng vo, Port 1 phi c set mc logic 1 trc .
Port 2:
Port 2 (chn 21 28) l port c 2 chc nng:
- Chc nng I/O (xut / nhp)
- Chc nng a ch: dng lm 8 bit a ch cao khi cn b nh ngoi c
a ch 16 bit. Khi , Port 2 khng c dng cho mc ch I/O.
- Khi dng lm ng vo, Port 2 phi c set mc logic 1 trc .
- Khi lp trnh, Port 2 dng lm 8 bit a ch cao hay mt s tn hiu iu
khin.
Port 3:
Port 3 (chn 10 17) l port c 2 chc nng:
- Chc nng I/O. Khi dng lm ng vo, Port 3 phi c set mc logic 1
trc .
- Chc nng khc: m t nh sau:

Bi ging Chng 3
Bit Tn Chc nng

P3.0 RxD Ng vo port ni tip
P3.1 TxD Ng ra port ni tip
P3.2 INT0 Ngt ngoi 0
P3.3 INT1 Ngt ngoi 1
P3.4 T0 Ng vo ca b nh thi 0
P3.5 T1 Ng vo ca b nh thi 1
P3.6 WR Tn hiu iu khin ghi d liu ln b nh ngoi.
P3.7 RD Tn hiu iu khin c t b nh d liu ngoi.
Bng 3-1. Chc nng cc chn ca Port 3
Cc chn ngun:
Chn 40: VCC = 5V 20%
Chn 20: GND
/PSEN (Program Store Enable):
/PSEN (chn 29) cho php c b nh chng trnh m rng i vi cc ng
dng s dng ROM ngoi, thng c ni n chn /OC (Output Control)
ca ROM c cc byte m lnh. /PSEN s mc logic 0 trong thi gian
AT89C51 ly lnh.Trong qu trnh ny, / PSEN s tch cc 2 ln trong 1 chu k
my.
M lnh ca chng trnh c c t ROM thng qua bus d liu (Port0) v
bus a ch (Port0 + Port2).
Khi 8051 thi hnh chng trnh trong ROM ni, PSEN s mc logic 1.
ALE/ PROG (Address Latch Enable / Program):
ALE/ PROG (chn 30) cho php tch cc ng a ch v d liu ti Port 0 khi
truy xut b nh ngoi. ALE thng ni vi chn Clock ca IC cht (74373,
74573). Cc xung tn hiu ALE c tc bng 1/6 ln tn s dao ng trn chip v
c th c dng lm tn hiu clock cho cc phn khc ca h thng. Xung ny
c th cm bng cch set bit 0 ca SFR ti a ch 8Eh ln 1. Khi , ALE ch c
tc dng khi dng lnh MOVX hay MOVC. Ngoi ra, chn ny cn c dng
lm ng vo xung lp trnh cho ROM ni ( /PROG ).
EA /VPP (External Access) :
EA (chn 31) dng cho php thc thi chng trnh t ROM ngoi. Khi ni chn
31 vi Vcc, AT89C51 s thc thi chng trnh t ROM ni (ti a 8KB), ngc li
th thc thi t ROM ngoi (ti a 64KB).
Ngoi ra, chn /EA c ly lm chn cp ngun 12V khi lp trnh cho ROM.

Bi ging Chng 3
RST (Reset):
RST (chn 9) cho php reset AT89C51 khi ng vo tn hiu a ln mc 1
trong t nht l 2 chu k my.
X1, X2:
Ng vo v ng ra b dao ng, khi s dng c th ch cn kt ni thm
thch anh v cc t nh hnh v trong s . Tn s thch anh thng
s dng cho AT89C51 l 12Mhz.
Gi tr C1, C2 = 30 pF 10 pF
Hnh 3-13 S kt ni thch anh
3.2.4 T chc b nh 8051
B nh trong B nh ngoi
ROM 4KB
0000h 0FFFh B nh chng trnh 64 KB
0000h FFFFh
iu khin bng PSEN
RAM 128 byte
00h 7Fh
B nh d liu 64 KB
SFR 0000h FFFFh
80h 0FFh iu khin bng RD v WR
Hnh 3-14. Cc vng nh trong AT89C51

B nh ca h MCS-51 c th chia thnh 2 phn: b nh trong v b nh
ngoi. B nh trong bao gm 4 KB ROM v 128 byte RAM (256 byte trong
8052). Cc byte RAM c a ch t 00h 7Fh v cc thanh ghi chc nng c bit
(SFR) c a ch t 80h 0FFh c th truy xut trc tip. i vi 8052, 128 byte
RAM cao (a ch t 80h 0FFh) khng th truy xut trc tip m ch c th truy
xut gin tip (xem thm trong phn tp lnh).

Bi ging Chng 3
B nh ngoi bao gm b nh chng trnh (iu khin c bng tn hiu
PSEN ) v b nh d liu (iu khin bng tn hiu RD hay WR cho php
c hay ghi d liu). Do s ng a ch ca MCS-51 l 16 bit (Port 0 cha 8 bit
thp v Port 2 cha 8 bit cao) nn b nh ngoi c th gii m ti a l 64KB.
3.2.4.1 T chc b nh trong

B nh trong ca MCS-51 gm ROM v RAM. RAM bao gm nhiu vng c
mc ch khc nhau: vng RAM a dng (a ch byte t 30h 7Fh v c thm
vng 80h 0FFh ng vi 8052), vng c th a ch ha tng bit (a ch byte
t 20h 2Fh, gm 128 bit c nh a ch bit t 00h 7Fh), cc bank thanh
ghi (t 00h 1Fh) v cc thanh ghi chc nng c bit (t 80h 0FFh).
Cc thanh ghi chc nng c bit (SFR Special Function Registers):
a C th Khng nh a
ch nh a
ch bit
byte ch bit
F8h
F0h B
E8h
E0h ACC
D8h
D0h PSW
C8h (T2CON) (RCAP2L) (RCAP2H) (TL2) (TH2)
C0h
B8h IP SADEN
B0h P3
A8h IE SADDR
A0h P2
98h SCON SBUF BRL BDRCON
90h P1
88h TCON TMOD TL0 TH0 TL1 TH1 AUXR CKCON
80h P0 SP DPL DPH PCON
Bng 3-2. Cc thanh ghi chc nng c bit
Cc thanh ghi c th nh a ch bit s c a ch bit bt u v a ch byte
trng nhau. V d nh: thanh ghi P0 c a ch byte l 80h v c a ch bit bt
u t 80h (ng vi P0.0) n 87h (ng vi P0.7). Chc nng cc thanh ghi ny
s m t trong phn sau.

Bi ging Chng 3
RAM ni:
chia thnh cc vng phn bit: vng RAM a dng (30h 7Fh), vng RAM
c th nh a ch bit (20h 2Fh) v cc bank thanh ghi (00h 1Fh).
a ch byte a ch bit Chc nng

7F
Vng RAM a dng
30
2F 7F 7E 7D 7C 7B 7A 79 78
2E 77 76 75 74 73 72 71 70
2D 6F 6E 6D 6C 6B 6A 69 68
2C 67 66 65 64 63 62 61 60
2B 5F 5E 5D 5C 5B 5A 59 58
2A 57 56 55 54 53 52 51 50
29 4F 4E 4D 4C 4B 4A 49 48
28 47 46 45 44 43 42 41 40
Vng c th nh a ch bit
27 3F 3E 3D 3C 3B 3A 39 38
26 37 36 35 34 33 32 31 30
25 2F 2E 2D 2C 2B 2A 29 28
24 27 26 25 24 23 22 21 20
23 1F 1E 1D 1C 1B 1A 19 18
22 17 16 15 14 13 12 11 10
21 0F 0E 0D 0C 0B 0A 09 08
20 07 06 05 04 03 02 01 00
1F
Bank 3
18
17
Bank 2 Cc bank thanh ghi
10
1F
Bank 1
08
07
Bank thanh ghi 0 ( mc nh cho R0-R7)
00
Bng 3-3. a ch RAM ni 8051
RAM a dng:
RAM a dng c 80 byte t a ch 30h 7Fh c th truy xut mi ln 8 bit
bng cch dng ch a ch trc tip hay gin tip.
Cc vng a ch thp t 00h 2Fh cng c th s dng cho mc ich nh trn
ngoi cc chc nng cp nh phn sau.
RAM c th nh a ch bit:
Vng a ch t 20h 2Fh gm 16 byte (= 128 bit) c th thc hin ging nh
vng RAM a dng (mi ln 8 bit) hay thc hin truy xut mi ln 1 bit bng cc
lnh x l bit. Vng RAM ny c cc a ch bit bt u ti gi tr 00h v kt thc
ti 7Fh.

Bi ging Chng 3
Nh vy, a ch bt u 20h (gm 8 bit) c a ch bit t 00h 07h; a ch
kt thc 2Fh c a ch bit t 78h Fh.
Cc bank thanh ghi:
Vng a ch t 00h 1Fh c chia thnh 4 bank thanh ghi: bank 0 t 00h-
07h, bank 1 t 08h 0Fh, bank 2 t 10h 17h v bank 3 t 18h 1Fh. Cc
bank thanh ghi ny c i din bng cc thanh ghi t R0 n R7. Sau khi khi
ng h thng th bank thanh ghi c s dng l bank 0.
Do c 4 bank thanh ghi nn ti mt thi im ch c mt bank thanh ghi c
truy xut bi cc thanh ghi R0 n R7. Vic thay i bank thanh ghi c th thc
hin thng qua thanh ghi t trng thi chng trnh (PSW). Cc bank thanh ghi
ny cng c th truy xut bnh thng nh vng RAM a dng ni trn.
3.2.4.2 T chc b nh ngoi

MCS-51 c b nh theo cu trc Harvard: phn bit b nh chng trnh v d
liu. Chng trnh v d liu c th cha bn trong nhng vn c th kt ni
vi 64KB chng trnh v 64KB d liu. B nh chng trnh c truy xut
thng qua chn PSEN cn b nh d liu c truy xut thng qua chn WR hay
RD .
Lu rng vic truy xut b nh chng trnh lun lun s dng a ch 16 bit
cn b nh d liu c th l 8 bit hay 16 bit tu theo cu lnh s dng. Khi dng b
nh d liu 8 bit th c th dng Port 2 nh l Port I/O thng thng cn khi dng
ch 16 bit th Port 2 ch dng lm cc bit a ch cao.
Port 0 c dng lm a ch thp/ d liu a hp. Tn hiu /ALE tch
byte a ch v a vo b cht ngoi.
Trong chu k ghi, byte d liu s tn ti Port 0 va trc khi /WR tch cc
v c gi cho n khi /WR khng tch cc.Trong chu k c, byte nhn c
chp nhn va trc khi /RD khng tch cc.
B nh chng trnh ngoi c x l 1 trong 2 iu kin sau:
- Tn hiu /EA tch cc ( = 0).
- Gi tr ca b m chng trnh (PC Program Counter) ln hn kch
thc b nh.

Bi ging Chng 3
PCH: Program Counter High PCL: Program Counter Low

DPH: Data Pointer High DPL: Data Pointer Low
Hnh 3-15. Thc thi b nh chng trnh ngoi
B nh chng trnh ngoi:
Qu trnh thc thi lnh khi dng b nh chng trnh ngoi c th m t nh
Hnh 3-15. Thc thi b nh chng trnh ngoi. Trong qu trnh ny, Port 0 v
Port 2 khng cn l cc Port xut nhp m cha a ch v d liu. S kt ni vi
b nh chng trnh ngoi m t nh Hnh 3-14. Cc vng nh trong AT89C51.
Trong mt chu k my, tn hiu ALE tch cc 2 ln. Ln th nht cho php
74HC573 m cng cht a ch byte thp, khi /ALE xung 0 th byte thp v byte
cao ca b m chng trnh u c nhng ROM cha xut v PSEN cha tch cc,
khi tn hiu ALE ln 1 tr li th Port 0 c d liu l m lnh. ALE tch cc ln
th hai c gii thch tng t v byte 2 c c t b nh chng trnh. Nu
lnh ang thc thi l lnh 1 byte th CPU ch c Opcode, cn byte th hai b qua.

Bi ging Chng 3
B nh d liu ngoi:
B nh d liu ngoi c truy xut bng lnh MOVX thng qua cc thanh ghi
xc nh a ch DPTR (16 bit) hay R0, R1 (8 bit).
Qu trnh thc hin c hay ghi d liu c cho php bng tn hiu RD hay
WR (chn P3.7 v P3.6).
B nh chng trnh v d liu dng chung:
Trong cc ng dng pht trin phn mm xy dng da trn AT89C51, ROM s
c lp trnh nhiu ln nn d lm h hng ROM. Mt gii php t ra l s dng
RAM cha cc chng trnh tm thi. Khi , RAM va l b nh chng trnh
va l b nh d liu. Yu cu ny c th thc hin bng cch kt hp chn RD v
chn PSEN thng qua cng AND. Khi thc hin c m lnh, chn /PSEN tch
cc cho php c t RAM v khi c d liu, chn RD s tch cc.
Gii m a ch
Trong cc ng dng da trn AT89C51, ngoi giao tip b nh d liu, vi iu
khin cn thc hin giao tip vi cc thit b khc nh bn phm, led, ng c,
Cc thit b ny c th giao tip trc tip thng qua cc Port. Tuy nhin, khi s lng
cc thit b ln, cc Port s khng thc hin iu khin. Gii php a ra l
xem cc thit b ny ging nh b nh d liu. Khi , cn phi thc hin qu trnh
gii m a ch phn bit cc thit b ngoi vi khc nhau. Qu trnh gii m a ch
thng c thc hin thng qua cc IC gii m nh 74139 (2 -> 4), 74138 ( 3 -> 8),
74154 (4 -> 16). Ng ra ca cc IC gii m s c a ti chn chn chip ca RAM
hay b m khi iu khin ngoi vi.
3.2.5 Cc thanh ghi chc nng c bit (SFRs - Special Function Registers)
Thanh ghi tch lu (Accumulator)
Thanh ghi tch lu l thanh ghi s dng nhiu nht trong AT89C51, c
k hiu trong cu lnh l A. Ngoi ra, trong cc lnh x l bit, thanh ghi tch lu
c k hiu l ACC.
Thanh ghi tch lu c th truy xut trc tip thng qua a ch E0h (byte) hay
truy xut tng bit thng qua a ch bit t E0h n E7h.
VD: Cu lnh:
MOV A,#1
MOV 0E0h,#1
c cng kt qu. Hay:

SETB ACC.4
SETB 0E4h
cng tng t.
Thanh ghi B
Thanh ghi B dng cho cc php ton nhn, chia v c th dng nh mt

Bi ging Chng 3
thanh ghi tm, cha cc kt qu trung gian.
Thanh ghi B c a ch byte F0h v a ch bit t F0h F7h c th truy
xut ging nh thanh ghi A.
Thanh ghi t trng thi chng trnh (PSW - Program Status Word)
Thanh ghi t trng thi chng trnh PSW nm ti a ch D0h v c cc
a ch bit t D0h D7h, bao gm 7 bit (1 bit khng s dng) c cc chc nng
nh sau:
Bit 7 6 5 4 3 2 1 0
Chc
CY AC F0 RS1 RS0 OV F1 P
nng
CY (Carry): c nh, thng c dng cho cc lnh ton hc khng

du (C = 1 khi c nh trong php cng hay mn trong php tr)
AC (Auxiliary Carry): c nh ph (thng dng cho cc php ton BCD).
F0 (Flag 0): c s dng tu theo yu cu ca ngi s dng.
RS1, RS0: dng chn bank thanh ghi s dng. Khi reset h thng, bank
0 s c s dng.
RS1 RS0 Bank thanh ghi
0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
OV (Overflow): c trn. C OV = 1 khi c hin tng trn s hc xy ra

(dng cho s nguyn c du).
F1 (Flag 1): c s dng tu theo yu cu ca ngi s dng.
P (Parity): kim tra parity (l). C P = 1 khi tng s bit 1 trong thanh ghi
A l s l (ngha l tng s bit 1 ca thanh ghi A cng thm c P l s
chn). V d nh: A = 10101010b c tng cng 4 bit 1 nn P = 0. C P
thng c dng kim tra li truyn d liu.
Thanh ghi con tr stack (SP Stack Pointer)
Con tr stack SP nm ti a ch 81h v khng cho php nh a ch bit. SP dng
ch n nh ca stack. Stack l mt dng b nh lu tr dng LIFO (Last In First
Out) thng dng lu tr a ch tr v khi gi mt chng trnh con. Ngoi ra, stack
cn dng nh b nh tm lu li v khi phc cc gi tr cn thit.
i vi AT89C51, stack c cha trong RAM ni (128 byte i vi
8031/8051 hay 256 byte i vi 8032/8052). Mc nh khi khi ng, gi tr ca SP
l 07h, ngha l stack bt u t a ch 08h (do hot ng lu gi tr vo stack yu
cu phi tng ni dung thanh ghi SP trc khi lu). Nh vy, nu khng gn gi tr
cho thanh ghi SP th khng c s dng cc bank thanh ghi 1, 2, 3 v c th lm sai
d liu. i vi cc ng dng thng thng khng cn dng nhiu n stack, c th

Bi ging Chng 3
khng cn khi ng SP m dng gi tr mc nh l 07h. Tuy nhin, nu cn, ta c
th xc nh li vng stack cho MCS-51.
Con tr d liu DPTR (Data Pointer)
Con tr d liu DPTR l thanh ghi 16 bit bao gm 2 thanh ghi 8 bit:
DPH (High) nm ti a ch 83h v DPL (Low) nm ti a ch 82h. Cc
thanh ghi ny khng cho php nh a ch bit. DPTR c dng khi truy xut n
b nh c a ch 16 bit.
Cc thanh ghi port
Cc thanh ghi P0 ti a ch 80h, P1 ti a ch 90h, P2, ti a ch A0h, P3 ti a
ch B0h l cc thanh ghi cht cho 4 port xut / nhp (Port 0, 1, 2, 3). Tt c cc thanh
ghi ny u cho php nh a ch bit trong a ch bit ca P0 t 80h 87h, P1 t
90h 97h, P2 t A0h A7h, P3 t B0h B7h. Cc a ch bit ny c th thay th
bng ton t a ch.
V d nh: 2 lnh sau l tng ng:
SETB P0.0
SETB 80h
Thanh ghi port ni tip (SBUF - Serial Data Buffer)

Thanh ghi port ni tip ti a ch 99h thc cht bao gm 2 thanh ghi: thanh ghi
nhn v thanh ghi truyn. Nu d liu a ti SBUF th l thanh ghi truyn, nu
d liu c c t SBUF th l thanh ghi nhn. Cc thanh ghi ny khng cho
php nh a ch bit.
Cc thanh ghi nh thi (Timer Register)
Cc cp thanh ghi (TH0, TL0), (TH1, TL1) v (TH2, TL2) l cc thanh ghi dng
cho cc b nh thi 0, 1 v 2 trong b nh thi 2 ch c trong 8032/8052. Ngoi
ra, i vi h 8032/8052 cn c thm cp thanh ghi (RCAP2L, RCAP2H) s dng
cho b nh thi 2 (s tho lun trong phn hot ng nh thi).
Cc thanh ghi iu khin
Bao gm cc thanh ghi IP (Interrupt Priority), IE (Interrupt Enable), TMOD
(Timer Mode), TCON (Timer Control), T2CON (Timer 2 Control), SCON (Serial
port control) v PCON (Power control).
- Thanh ghi IP ti a ch B8h cho php chn mc u tin ngt khi c 2
ngt xy ra ng thi. IP cho php nh a ch bit t B8h BFh.
- Thanh ghi IE ti a ch A8h cho php hay cm cc ngt. IE c a ch
bit t A8h AFh.
- Thanh ghi TMOD ti a ch 89h dng chn ch hot ng cho
cc b nh thi (0, 1) v khng cho php nh a ch bit.

Bi ging Chng 3
-Thanh ghi TCON ti a ch 88h iu khin hot ng ca b nh thi
v ngt. TCON c a ch bit t 88h 8Fh.
- Thanh ghi T2CON ti a ch C8h iu khin hot ng ca b nh thi
2. T2CON c a ch bit t C8h CFh.
- Thanh ghi SCON ti a ch 98h iu khin hot ng ca port ni tip.
SCON c a ch bit t 98h 9Fh.
Cc thanh ghi ni trn s c tho lun thm cc phn sau.
Thanh ghi iu khin ngun PCON
Thanh ghi PCON ti a ch 87h khng cho php nh a ch bit bao gm
cc bit nh sau:
Bit 7 6 5 4 3 2 1 0
Chc
SMOD1 SMOD0 - POF GF1 GF0 PD IDL
nng
SMOD1 (Serial Mode 1): = 1 cho php tng gp i tc port ni tip

trong ch 1, 2 v 3.
SMOD0 (Serial Mode 0): cho php chn bit SM0 hay FE trong thanh ghi
SCON ( = 1 chn bit FE).
POF (Power-off Flag): dng nhn dng loi reset. POF = 1 khi m
ngun. Do , xc nh loi reset, cn phi xo bit POF trc .
GF1, GF0 (General purpose Flag): cc bit c dnh cho ngi s dng.
PD (Power Down): c xo bng phn cng khi hot ng reset xy ra.
Khi bit PD = 1 th vi iu khin s chuyn sang ch ngun gim. Trong ch
ny:
- Ch c th thot khi ch ngun gim bng cch reset.
- Ni dung RAM v mc logic trn cc port c duy tr.
- Mch dao ng bn trong v cc chc nng khc ngng hot ng.
- Chn ALE v PSEN mc thp.
- Yu cu Vcc phi c in p t nht l 2V v phc hi Vcc = 5V t nht 10
chu k trc khi chn RESET xung mc thp ln na.
IDL (Idle): c xo bng phn cng khi hot ng reset hay c ngt
xy ra. Khi bit IDL = 1 th vi iu khin s chuyn sang ch ngh. Trong ch
ny:
- Ch c th thot khi ch ngun gim bng cch reset hay c ngt xy
ra.
- Trng thi hin hnh ca vi iu khin c duy tr v ni dung cc thanh
ghi khng i.
- Mch dao ng bn trong khng gi c tn hiu n CPU.
- Chn ALE v PSEN mc cao.

Bi ging Chng 3
Lu rng cc bit iu khin PD v IDL c tc dng chnh trong tt c cc IC h
MSC-51 nhng ch c th thc hin c trong cc phin bn CMOS.
3.2.6 B m v b nh thi
nh thi l s hot ng kim sot thi gian thc thi cc cu lnh trong qu
trnh x l ca vi iu khin.
8051 c hai b nh thi/ b m. Chng c th c dng nh cc b nh thi
to mt b tr thi gian hoc nh cc b m m cc s kin xy ra bn ngoi
b VK. Cc timer ny u l timer 16bit, gi tr m c tnh t 0 n 216 (m
t 0 n 65535).
Hai timer c nguyn l hot ng hon ton ging nhau v c lp. Sau khi cho
php chy, mi khi c thm mt xung ti u vo m, gi tr ca timer s t ng
c tng ln 1 n v, c nh vy cho n khi gi tr tng ln vt qu gi tr 65535
m thanh ghi m c th biu din th gi tr m li c a tr v gi tr 0
Vic cho timer chy/dng c thc hin bi cc bit TR trong thanh ghi TCON
(nh a ch n tng bit).
Cc timer c th hot ng theo nhiu ch , c quy nh bi cc bit trong
thanh ghi TMOD.
3.2.7 Truyn thng khng ng b (UART)

8051 c 1 cng UART lm vic chun TTL, mc nh sau khi khi ng tt
cc cng ca 8051 du lm vic ch vo ra s, v th c th s dng UART
cn phi cu hnh cho cng ny lm vic thng qua cc thanh ghi iu khin v ghp
ni tng thch vi chun rs232.
Hnh 3-16 - Ghp ni RS232 vi 8051

Cng ni tip trong 8051 ch yu c dng trong cc ng dng c yu cu
truyn thng vi my tnh, hoc vi mt vi iu khin khc. Lin quan n cng ni
Bi ging Chng 3
tip ch yu c 2 thanh ghi: SCON v SBUF. Ngoi ra, mt thanh ghi khc l thanh
ghi PCON (khng nh a ch bit) c bit 7 tn l SMOD quy nh tc truyn ca
cng ni tip c gp i ln (SMOD = 1) hay khng (SMOD = 0).
D liu c truyn nhn ni tip thng qua hai chn cng P3.0(RxD) v
P3.1(TxD).
3.2.8 Ngt vi iu khin 8051

8051 h tr 5 loi ngt, mi ngt c mt vector ngt ring, l mt a ch
c nh nm trong b nh chng trnh. Khi xy ra ngt CPU s t ng nhy n
thc hin lnh thuc a ch ny.
Lin quan n ngt ch yu c hai thanh ghi l thanh ghi IE v thanh ghi IP.
Thanh ghi IE l thanh ghi nh a ch bit, do c th dng cc lnh tc
ng bit tc ng ring r ln tng bit m khng lm nh hng n gi tr cc bit
khc. cho php mt ngt, bit tng ng vi ngt v bit EA phi c t bng
1.
3.3 Lp trnh hp ng cho 8051

Lp trnh cho vi iu khin cng tng t nh lp trnh cho my tnh, bn
cht l ta gia lnh cho vi iu khin thc hin 1 danh sch cc lnh c bn c sp
xp theo mt trnh t no c th hon thnh mt nhim v ra. V tt c
nhng lnh m vi iu khin c th hiu c g l tp lnh. Cc vi iu khin tng
thch vi 8051 c 255 lnh.
3.3.1 Cc ch a ch
a) a ch tc thi
Trong ch nh a ch ny ton hng ngun l mt hng s. V nh tn
gi ca n th khi mt lnh c hp dch ton hng i tc thi ngay sau m lnh.
Lu rng trc d liu tc thi phi c t du (#) ch nh a ch ny c
th c dng np thng tin vo bt k thanh ghi no k c thanh ghi con tr d
liu DPTR. V d:
MOV A, # 25H ; Np gi tr 25H vo thanh ghi A
MOV R4, #62 ; Np gi tr 62 thp phn vo R4
MOV DPTR, #4521H ; Np 4512H vo con tr d liu DPTR
b) a ch theo thanh ghi
Ch nh a ch theo thanh ghi lin quan n vic s dng cc thanh ghi
lu d liu cn c thao tc v cc cc ton hng l 1 trong cc thanh ghi Ri ca
cc bank c chn. V d :
MOV A, R0 ; Sao ni dung thanh ghi R0 vo thanh ghi A
MOV R2, A ; Sao ni dung thanh ghi A vo thanh ghi R2

Bi ging Chng 3
c) a ch trc tip
B nh RAM c gn cc a ch t 00 n FFH v c phn chia nh sau:
1. Cc ngn nh t 00 n 1FH c gn cho cc bng thanh ghi v ngn xp.
2. Cc ngn nh t 20H n 2FH c dnh cho khng gian nh a ch theo bit
lu cc d liu 1 bit.
3. Cc ngn nh t 30H n 7FH l khng gian lu d liu c kch thc
1byte.
Ton hng l tn hoc a ch ca cc thanh ghi trong vng RAM thp (0-127)
v vng cha cc thanh ghi chc nng c bit SFR.
V d :
MOV R0, 40H; Lu ni dung ca ngn nh 40H ca RAM vo R0
MOV 56H, A; Lu ni dung thanh ghi A vo ngn nh 56H ca RAM
Cc ngn nh dnh cho bng ghi c truy cp bng thanh ghi theo cc tn
gi ca chng l R0 - R7. Nn cc thanh ghi c th c truy cp theo hai cch sau:
V d: Hai lnh sau u sao ni dung thanh ghi R4 vo A
MOV A, 4
MOV A, R4
d) a ch gin tip
Trong ch ny, mt thanh ghi c s dng nh mt con tr n d liu.
Ton hng c th nm trong c vng RAM thp v cao, hoc RAM ngoi, khng
dng cho vng SFR. a ch ca ton hng cha trong thanh ghi con tr (R0 hoc R1
vi RAM trong, DPTR i vi RAM ngoi). c im nhn ra ch ny l lun c
k t @ ng trc ton hng.
V d:
MOV A, @ R0 ; Chuyn ni dung ca ngn nh RAM c
;a ch trong RO v A
e) a ch ch s
Ch nh a ch theo ch s c s dng rng ri trongvic truy cp cc
phn t d liu ca bng trong khng gian ROM/RAM chng trnh ca 8051 trong
di 64KB.
Lnh c dng cho mc ch ny l
MovC A, @ A + DPTR v
MovX A, @ A + DPTR.
Thanh ghi 16 bit DPTR l thanh ghi A c dng to ra a ch ca phn t d
liu c lu trong b nh (trong hoc ngoi 8051).
Thay lnh Mov bng MovC/MovX do cc phn t d liu c ct trong khng
gian m (chng trnh) ca Flash ROM trong/ngoi chip ca 8051. Trong lnh ny

Bi ging Chng 3
th ni dung ca A c b xung vo thanh ghi 16 bit DPTR to ra a ch 16 bit
ca d liu cn thit
3.3.2 Tp lnh trong 8051

Phn loi tp lnh
Ty thuc vo cch v chc nng ca mi lnh, c th chia ra thnh 5 nhm lnh
nh sau:
- Cc lnh ton hc
- Cc lnh iu khin chng trnh
- Cc lnh vn chuyn d liu
- Cc lnh logic
- Cc lnh thao tc bit
Cu trc chung ca mi lnh:
M_lnh Ton_hng1, Ton_hng2, Ton_hng3
Trong :
- M_lnh: Tn gi nh cho chc nng ca lnh. (VD nh add cho addition)
- Ton_hng1, Ton_hng2, Ton_hng3: L cc ton hnh ca lnh, ty thuc
vo mi lnh s ton hng c th khng c, c 1, 2 hoc 3.
VD:
- RET (Kt thc chng trnh con) Lnh ny khng c ton hng
- JZ TEMP (Chuyn con tr chng trnh n v tr TEMP) Ch c 1 ton
hng
- ADD A, R3; (A = A + R3) C 2 ton hng
- CJNE A, #20, LOOP (So snh A vi 20, nu khng bng th chuyn con
tr chng trnh n nh LOOP) C 3 ton hng
Cc k hiu s dng m t lnh
K hiu M t
A: Thanh ghi cha (Accumulator).
B: Thanh ghi B.
Thanh ghi R0 hoc R1 ca bt k bng thanh ghi no trong 4 bng
Ri:
thanh ghi trong RAM.
Rn: bt k thanh ghi no ca bt k bng thanh ghi no trong 4
Rn:
bng thanh ghi trong RAM.

Bi ging Chng 3
K hiu M t
thanh ghi con tr d liu (c rng 16bit c kt hp t 2 thanh
Dptr:
ghi 8 bit l DPH v DPL).
Direct: l mt bin 8 bit(hay chnh l nh) bt k trong RAM (tr
Direct:
32 thanh ghi Rn u RAM).
#data: mt hng s 8 bit bt k.
#data16: mt hng s 16 bit bt k
<rel>: a ch bt k nm trong khong [PC-128 ; PC+127]
a ch bt k nm trong khong 0 2Kbyte tnh t a ch ca lnh
<addr11>:
tip theo.
<addr16>: a ch bt k trong khng gian 64K (p dng cho c khng gian
nh chng trnh v khng gian nh d liu).
bit bt k c th nh a ch c (khng dng cho cc bit khng

<bit>:
nh c a ch).
Bng 3-4. k hiu s dng m t lnh
Cc lnh ton hc
Cc k hiu dng trong vic m t tp lnh
Thc hin cc php tnh c bn nh +, -, *, /, Kt qu sau khi thc hin
lnh c lu vo ton hng u tin trong lnh
Cc lnh ton hc nh: ADD, ADDC, SUBB, INC, DEC, MUL, DA. V d1 :
MOV A, # 0F5H ; A = F5H
MOV A, # 0BH ; A = F5 + 0B = 00
Sau php cng, thanh ghi A (ch) cha 00 v cc c s nh sau:
CY = 1 v c php nh t D7
PF = 1 v s cc s 1 l 0 (mt s chn) c PF c t ln 1.
AC = 1 v c php nh t D3 sang D4. V d 2:
MOV A, #47H ; A = 47H l ton hng BCD u tin
MOV B, #25H ; B = 25H l ton hng BCD th hai
ADD A, B ; Cng cc s hex (nh phn) A = 6CH
DA A ; iu chnh cho php cng BCD (A = 72H)
Sau khi chng trnh c thc hin thanh ghi A s cha 72h (47 + 25 = 72).
V d 3: thc hin php nhn
MOV A, #25H ; Np vo A gi tr 25H
MOV B, 65H ; Np vo B gi tr 65H
MUL AB ; 25H*65H = E99 vi B = 0EH v A = 99H
Cc lnh s hc xem chi tit trong phn ph lc

Bi ging Chng 3
Cc lnh logic
Thc hin cc php ton logic, cc lnh bao gm:
ANL: php ton and logic
ORL: php ton or logic
XRL: php ton xor logic
CLR: php ton v logic
CPL: php ton b
RL: php quay bit sang tri
RR: php quay bit sang phi
RLC: : php quay tri c nh
RRC: php quay phi c nh
SWAP: lnh trao i thanh ghi
V d 1:
MOV A, #35H ; Gn A = 35H
ANL A, #0FH ; Thc hin php v A vi 0FH
Kt qu: A=05h
V d 2:
MOV A, #04 ; A = 04
ORL A, #68H ; A = 6C
V d 3:
MOV A, #54H ; A= 54H
XRL A, #78H ; A=2CH
V d 4:
MOV A, #55H
CPL A ;kt qa thanh ghi A l AAH
V d 5: cc lnh quay
RR: MOV A, #36H ; A = 0011 0110
RR A ; A = 0001 1011
RR A ; A = 1000 1101
RR A ; A = 1100 0110
RR A ; A = 0110 0011
RRC: MOV A #26H ; A = 0010 0110
RRC A ; A = 0001 0011 CY = 0
RRC A ; A = 0000 1001 CY = 1
RCC A ; A = 1000 0100 CY = 1
V d 6:
MOV A, #72H ; A = 72H
SWAP A ; A = 27H

Bi ging Chng 3
Cc lnh s hc xem chi tit trong phn ph lc
Cc lnh vn chuyn d liu
Di chuyn d liu t nh ny n nh khc, hoc gia hai thanh ghi,
thanh ghi nh.
Cc lnh vn chuyn d liu bao gm:
MOV: chuyn d liu gia thanh ghi vi thanh ghi, thanh ghi vi nh, mt hng s
n thanh ghi, mt hng s n nh, v ngc li
MOVC: Sao chp m ngun (d liu c t trong vng m ngun)
C php S
S
STT M t chu
M lnh Ton hng byte
k
1 MOV A,Rn 1 1
2 MOV A,direct 2 1
3 MOV A,@Ri 1 1
4 MOV A,#data 2 1
5 MOV Rn,A 1 1
6 MOV Rn,direct 2 2
7 MOV Rn,#data Copy gi tr ca ton hng bn 2 1
8 MOV Direct,A phi cho vo ton hng bn tri 2 1
9 MOV Direct,Rn (cc ton hng u l 8bit) 2 2
10 MOV Direct,direct 3 2
11 MOV Direct,@Ri 2 2
12 MOV Direct,#data 3 2
13 MOV @Ri,A 1 1
14 MOV @Ri,direct 2 1
15 MOV @Ri,#data 2 1
a gi tr 16bit vo thanh
16 MOV Dptr,#data16 3 2
ghi DPTR
c gi tr b nh chng trnh
ti a ch =
17 MOVC A,@A+dptr 1 2
A + DPTR, ct kt qu
vo A
c gi tr b nh chng trnh
18 MOVC A,@A+PC ti a ch = 1 2
A + PC, ct kt qu vo A
c vo A gi tr ca b nh
19 MOVX A,@Ri 1 2
ngoi ti a ch = Ri
c vo A gi tr ca b nh
20 MOVX A,@dptr 1 2
ngoi ti a ch = DPTR
Ghi gi tr ca A vo b nh
21 MOVX @dptr,A 1 2
ngoi ti a ch = DPTR

Bi ging Chng 3
C php S
S
STT M t chu
M lnh Ton hng byte
k
Ghi gi tr ca A vo b nh
22 MOVX @dptr,A ngoi ti a ch = 2 2
DPTR
Ct ni dung ca bin trong
23 PUSH Direct RAM vo nh ngn 2 2
xp
Ly byte nh ngn xp
24 POP Direct 2 2
cho vo bin trong RAM
25 XCH A,Rn 1 1
Hon i gi tr ca A v gi tr
26 XCH A,direct 2 1
cn li
27 XCH A,@Ri 1 1
Hon i 4 bit thp giaA v
28 XCHD A,@Ri mt nh trong Ram ti a ch 1 1
= Ri
Bng 3-5. Cc lnh vn chuyn d liu
Cc lnh thao tc bit v c cng: Cc lnh thao tc bit:
Lnh Chc nng
SETB bit Thit lp bit (bit bng 1)
CLR bit Xo bit v khng (bit = 0)
CPL bit B bit (bit = NOT bit)
JB bit, ch Nhy v ch nu bit = 1
JNB bit, ch Nhy v ch nu bit = 0
JBC bit, ch Nhy v ch nu bit = 1 v sau xo bit
Lnh chc nng
SETB C Thc hin (to) CY = 1
CLR C Xo bit nh CY = 0
CPL C B bit nh
MOV b, C Sao chp trng thi bit nh vo v tr bit b = CY
MOV C, b Sao chp bit b vo trng thi bit nh CY = b
JNC ch Nhy ti ch nu CY = 0
JC ch Nhy ti ch nu CY = 1
ANL C. bit Thc hin php AND vi bit b v lu vo CY
ANL C./ bit Thc hin php AND vi bit o v lu vo CY
ORL C. bit Thc hin php OR vi bit v lu vo CY
ORL C./ bit Thc hin php OR vi bit o v lu vo CY
Bng 3-6. Cc lnh thao tc bit v c cng

Bi ging Chng 3
Cc lnh thao tc bit xem chi tit trong phn ph lc
V d: vit chng trnh lu cc bit P1.2 vo v tr bit 06 v trng thi P1.3 vo v
tr bit 07
CLR 06 ;Xo a ch bit 06
CLR 07 ; Xo a ch bit 07
JNB P1.2, OVER ;Kim tra bit P1.2 nhy v OVER nu P1.2 = 0
SETB 06 ; Nu P1.2 th thit lp v tr bit 06 = 0
OVER: JNB P1.3, NEXT ;Kim tra bit P1.3 nhy v NEXT nu n = 0
SETB 07 ;Nu P1.3 = 1th thit lp v tr bit 07 = 1
NEXT: ....
Lnh c cng
Trong vic c cng th mt s lnh c trng thi ca cc chn cng, cn mt
s lnh khc th c mt s trng thi ca cht cng trong. Do vy, khi c cc cng
th c hai kh nng:
1. c trng thi ca cng vo.
Lnh V d M t
MOV A, PX MOV A, P2 Chuyn d liuj chn P2 vo ACC
JNB PX.Y, ... JNB P2.1, ch Nhy ti ch nu, chn P2.1 = 0
JB PX.Y, JB P1.3, ch Nhy ch nu, chn P1.3 = 1
MOV C, PX.Y MOV C, P2.4 Sao trng thi chn P2.4 vo CY
Bng 3-7. Lnh c cng
2. c cht trong ca cng ra.
Lnh V d
ANL PX ANL P1, A
ORL PX ORL P2, A
XRL PX XRL P0, A
JBC PX.Y, ch JBC P1.1, ch
CPL PX CPL P1.2
INC PX INC P1
DEC PX DEC P2
DJN2 PX.Y, ch DJN2 P1, ch
MOV PX.Y, C MOV P1.2, C
CLR PX.Y CLR P2.3
SETB PX.Y SETB P2.3
Bng 3-8. c cht trong ca cng ra
Cc lnh iu khin chng trnh (r nhnh)
Nhm lnh iu khin chng trnh c th chia thnh 2 loi:
1. Nhy v iu kin
2. Nhy c iu kin:
Nhy v iu kin: Chuyn con tr chng trnh n v tr khc
Lnh Hot ng
JZ Nhy nu A = 0
JNZ Nhy nu A 0

Bi ging Chng 3
Lnh Hot ng
DJNZ Gim v nhy nu A = 0
CJNE A, byte Nhy nu A byte
CJNE re, # data Nhy nu Byte data
JC Nhy nu CY = 1
JNC Nhy nu CY = 0
JB Nhy nu bit = 1
JNB Nhy nu bit = 0
JBC Nhy nu bit = 1 v xo n
Bng 3-9. Nhy v iu kin
V d: Hy tm tng ca cc gi tr 79H, F5H v E2H. t vo trong cc thanh ghi
R0 (byte thp) v R5 (byte cao).
MOV A, #0 ; Xo thanh ghi A = 0
MOV R5, A ; Xo R5
ADD A #79H ; Cng 79H vo A (A = 0 + 79H = 79H)
JNC N-1 ; Nu khng c nh cng k tip
INC R5 ; Nu CY = 1, tng R5
N-1: ADD A, #0F5H ; Cng F5H vo A (A = 79H + F5H = 6EH)

;v CY = 1
JNC N-2 ; Nhy nu CY = 0
INC R5 ; Nu CY = 1 tng R5 (R5 = 1)
N-2: ADD A, #0E2H ; Cng E2H vo A (A = 6E + E2 = 50)
; v CY = 1
JNC OVER ; Nhy nu CY = 0
INC R5 ; Nu CY = 1 tng R5
OVER:MOV R0, A ; By gi R0 = 50H v R5 = 02
Nhy c iu kin: Ch chuyn con tr chng trnh n v tr khc t v tr hin
thi nu th mn iu kin. Trong 8051 c hai lnh nhy khng iu kin l:
LJMP - nhy xa v SJMP - nhy gn.
- Nhy xa LJMP: Nhy xa LJMP l mt lnh 3 byte trong byte u tin l
m lnh cn hai byte cn li l a ch 16 bit ca ch. a ch ch 02 byte
c php mt php nhy n bt k v tr nh no trong khong 0000 -
FFFFH.
- Nhy gn SJMP: Trong 2 byte ny th byte u tin l m lnh v byte th
hai l ch tng i ca a ch ch. ch ch tng i trong phm vi 00 -
FFH c chia thnh cc lnh nhy ti v nhy li: Ngha l -128 n +127
byte ca b nh tng i so vi a ch hin thi ca b m chng trnh.
Nu l lnh nhy ti th a ch ch c th nm trong khong 127 byte t
gi tr hin thi ca b m chng trnh. Nu a ch ch pha sau th n
c th nm trong khong -128 byte t gi tr hin hnh ca PC.
Cc lnh gi: Mt lnh chuyn iu khin khc l lnh CALL c dng
gi mt chng trnh con. Cc chng trnh con thng c s dng thc thi
cc cng vic cn phi c thc hin thng xuyn. iu ny lm cho chng trnh

Bi ging Chng 3
tr nn c cu trc hn ngoi vic tit kim c thm khng gian b nh. Trong
8051 c 2 lnh gi l: Gi xa CALL v gi tuyt i ACALL
- Lnh gi xa LCALL: Trong lnh 3 byte ny th byte u tin l m lnh,
cn hai byte sau c dng cho a ch ca chng trnh con ch.
- Lnh gi tuyt i ACALL (Absolute call): Lnh ACALL l lnh 2 byte
khc vi lnh LCALL di 3 byte. Do ACALL ch c 2 byte nn a ch ch
ca chng trnh con phi nm trong khong 2k byte a ch v ch c 11bit
ca 2 byte c s dng cho a ch.
3.3.3 Cu trc chung chng trnh hp ng cho 8051

a) Cc thnh phn c bn ca ngn ng Assembly:
- Lables: Nhn nh du cho mt on lnh

- Orders: Lnh
- Directives: nh hng chng trnh dch
- Comments: Cc li ch thch
Mt dng lnh trong chng trnh hp ng gm c cc trng sau:
Tn Lnh Ton hng Ch thch
A: Mov AH, 10h ; a gi tr 10h vo thanh ghi AH
c th dch thnh file m my dng HEX-Code trc khi download vo Chip th
mt chng trnh assembly phi tun th cc nguyn tc sau:
- Mi dng lnh khng vt qu 255 k t
- Mi dng lnh phi bt u bng 1 k t, nhn, lnh hoc ch th nh hng
chng trnh dch
- Mi th sau du ; c xem l li gii thch v chng trnh dch s b qua.
- Cc thnh phn ca mi dng lnh cch bit nhau t nht bng mt du cch.
b) Khai bo trong lp trnh hp ng cho 8051
Khai bo bin
Ten_bien DB Gia_Tri_Khoi_Tao
DB l mt ch lnh d liu c s dng rng ri nht trong hp ng. N
c dng nh ngha d liu 8 bit. Khi DB c dng nh ngha byte
d liu th cc s c th dng thp phn, nh phn, Hex hoc dng thc
ASCII. i vi d liu thp phn th cn t ch D sau s thp phn, i
vi s nh phn th t ch B v i vi d liu dng Hex th cn t ch
H.
Khi d liu c kch thc l 2byte s dng: DW khai bo bin kiu nguyn
V d
DATA1: DB 2D ; S thp phn
DATA2: DB 00110101B ; S nh phn (35 dng Hex)
DATA3: DB 39H ; S dng Hex
DATA4 DB Ky thuat may tinh ; Cc k t ASCII

Bi ging Chng 3
Khai bo hng
Ten_Hang EQU Gia_tri

c dng nh ngha mt hng s m khng chim ngn nh no. Ch
lnh EQU khng dnh ch ct cho d liu nhng n gn mt gi tr hng s vi nhn
d liu sao cho khi nhn xut hin trong chng trnh gi tr hng s ca n s c
thay th i vi nhn
V d:
COUNT EQU 25
MOV R3, #count ; Khi thc hin ln MOV R3, #COUNT
;th thanh ghi R3 s c np gi tr 25
Cc ton t
K hiu Thc hin V d Kt qu

+ Cng 10+5 15
- Tr 25-17 8
* Nhn 7*4 28
/ Chia nguyn 7/4 1
MOD Chia ly d 7 MOD 4 3
SHR Dch phi 1000B SHR 2 0010B
SHL Dch tri 1010B SHL 2 101000B
NOT o NOT 1 1111111111111110B
AND And bit 1101B AND 0101B 0101B
OR Or bit 1101B OR 0101B 1101B
XOR Xor 1101B XOR 0101B 1000B
LOW Ly byte thp LOW(0AADDH) 0DDH
HIGH Ly byte cao HIGH(0AADDH) 0AAH
EQ, = So snh bng 7 EQ 4 or 7=4 0 (false)
NE,<> SS Khng bng 7 NE 4 or 7<>4 0FFFFH (true)
GT, > SS ln hn 7 GT 4 or 7>4 0FFFFH (true)
GE, >= SS nh hn hoc bng 7 GE 4 or 7>=4 0FFFFH (true)
LT, < SS nh hn 7 LT 4 or 7<4 0 (false)
LE,<= SS nh hn hoc bng 7 LE 4 or 7<=4 0 (false)
Bng 3-10. Cc ton t
Tn
Thay v phi nh tn tng thanh ghi, hay tng bit, ta c th gn cho n mt

ci nh gi nh tng ngs vi chc nng ca n, assembly h tr vic t tn theo
quy tc sau:
- Tn c t hp t cc k t (A-Z, a-z), cc s (0-9), cc k t c bit (?
V _) v khng ph bit ch ci v ch thng.

Bi ging Chng 3
- di tn ti a l 255 k t, nhng ch 32 k t u c dng phn bit
- Tn phi bt u bng k t.
- Khng c trng vi cc t kha sau:

A AB ACALL ADD JZ LCALL LE LJMP
ADDC AJMP AND ANL LOW LT MOD MOV
AR0 AR1 AR2 AR3 MOVC MOVX MUL NE
AR4 AR5 AR6 AR7 NOP NOT OR ORG
BIT BSEG C CALL ORL PC POP PUSH
CJNE CLR CODE CPL R0 R1 R2 R3
CSEG DA DATA DB R4 R5 R6 R7
DBIT DEC DIV DJNZ RET RETI RL RLC
DPTR DS DSEG DW RR RRC SET SETB
END EQ EQU GE SHL SHR SJMP SUBB
GT HIGH IDATA INC SWAP USING XCH XCHD
ISEG JB JBC JC XDATA XOR XRL XSEG
JMP JNB JNC JNZ JZ LCALL LE LJMP
LOW LT MOD MOV
c) Cu trc mt chng trnh hp ng

ORG (V tr bt u con tr chng trnh )
..
<on chng trnh chnh>
..
<cc chng trnh con>
..
END.(Kt thc chng trnh)
V d:
ORG 00H ;(con tr chng trnh bt u t 00h)
LJMP MAIN ; nhy ti v tr c nhn l MAIN)
; (v tr bt u chng trnh chnh MAIN):
ORG 0030H
MAIN:
MOV R1,#10 ;(np cho R1 gi tr l 10).
LAP1:
DJNZ R1,LAP1
END ; (Kt thc chng trnh.)
Con tr: v tr m vi iu khin bt u thc thi ti . Thng khi bt u con tr c
a ch thp nht l 00h, tuy nhin ngi lp trnh cng c th quy nh cho n lm
vic ti mt v tr bt k
V d:
ORG 00H ; Bt u ti v tr 00h
ORG 0030H ; Bt u ti v tr 0030h

Bi ging Chng 3
Chng trnh con:
Nhn:
.................
Cc cu lnh
.....
RET
V d:
ORG 00H
LJMP MAIN
ORG 0030H
MAIN:
MOV R1,#10
LCALL LAP1 ;gi chng trnh con
LAP1:
DJNZ R1,LAP1
RET ; kt thc chng trnh con
END
3.4 B m v b nh thi
8051 c hai b nh thi l Timer 0 v Timer1, phn ny chng ta bn v cc
thanh ghi ca chng v sau trnh by cch lp trnh chng nh th no to ra
cc tr thi gian.
Cc thanh ghi c s ca b nh thi.
C hai b nh thi Timer 0 v Timer 1 u c di 16 bt c truy cp nh
hai thanh ghi tch bit byte thp v byte cao. Chng ta s bn ring v tng thanh
ghi.
Cc thanh ghi ca b Timer 0.
Thanh ghi 16 bt ca b Timer 0 c truy cp nh byte thp v byte cao. Thanh
ghi byte thp c gi l TL0 (Timer 0 bow byte) v thanh ghi byte cao l TH0
(Timer 0 High byte). Cc thanh ghi ny c th c truy cp nh mi thanh ghi khc
chng hn nh A, B, R0, R1, R2 v.v... V d, lnh MOV TL0, #4FH l chuyn gi
tr 4FH vo TL0, byte thp ca b nh thi 0. Cc thanh ghi ny cng c th c
c nh cc thanh ghi khc. V d MOV R5, TH0 l lu byte cao TH0 ca Timer
0 vo R5.
TH0 TL0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Hnh 3-17. Cc thanh ghi ca b Timer 0

Bi ging Chng 3
Cc thanh ghi ca b Timer 1.
B nh thi gian Timer 1 cng di 16 bt v thanh ghi 16 bt ca n c chia ra
thnh hai byte l TL1 v TH1. Cc thanh ghi ny c truy cp v c ging nh
cc thanh ghi ca b Timer 0 trn.
TH1 TL1
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Hnh 3-18. Cc thanh ghi ca b Timer 1
Thanh ghi TMOD (ch ca b nh thi).
C hai b nh thi Timer 0 v Timer 1 u dng chung mt thanh ghi c gi
l IMOD thit lp cc ch lm vic khc nhau ca b nh thi. Thanh ghi
TMOD l thanh ghi 8 bt gm c 4 bt thp c thit lp dnh cho b Timer 0 v 4
bt cao dnh cho Timer 1. Trong hai bt thp ca chng dng thit lp ch
ca b nh thi, cn 2 bt cao dng xc nh php ton. Cc php ton ny s
c bn di y.
TMOD Register
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0
Timer1 Timer0
Hnh 3-19. Timer TMOD
Cc bt M1, M0:
L cc bt ch ca cc b Timer 0 v Timer 1. Chng chn ch ca cc b
nh thi: 0, 1, 2 v 3. Ch 0 l mt b nh thi 13, ch 1 l mt b nh thi
16 bt v ch 2 l b nh thi 8 bt. Chng ta ch tp chung vo cc ch
thng c s dng rng ri nht l ch 1 v 2. Chng ta s sm khm ph ra
cc c tnh c cc ch ny sau khi khm phn cn li ca thanh ghi TMOD. Cc
ch c thit lp theo trng thi ca M1 v M0 nh sau:
M1 M0 Ch Ch hot ng
0 0 0 B nh thi 13 bt gm 8 bt l b nh thi/ b m 5 bt
t trc
0 1 1 B nh thi 16 bt (khng c t trc)
1 0 2 B nh thi 8 bt t np li
1 1 3 Ch b nh thi chia tch
Bng 3-11. Ch hot ng ca Timer/Counter
C/ T (ng h/ b nh thi).
Bt ny trong thanh ghi TMOD c dng quyt nh xem b nh thi c
dng nh mt my to tr hay b m s kin. Nu bt C/T = 0 th n c dng
nh mt b nh thi to ch thi gian. Ngun ng h cho ch tr thi gian l

Bi ging Chng 3
tn s thch anh ca 8051. phn ny ch bn v la chn ny, cng dng ca b
nh thi nh b m s kin th s c bn phn k tip.
V d : Hy cho bit ch no v b nh thi no i vi cc trng hp sau:
a) MOV TMOD, #01H b) MOV TMOD, #20H c) MOV TMOD,
#12H
Li gii: Chng ta chuyn i gi tr t s Hex sang nh phn v i chiu vi tng
bt trong thanh ghi TMOD ta c:
a) TMOD = 0000 0001, ch 1 ca b nh thi Timer 0 c chn.
b) TMOD = 0010 0000, ch 1 ca b nh thi Timer 1 c chn.
c) TMOD = 0001 0010, ch 1 ca b nh thi Timer 0 v ch 1 ca Timer 1
c chn.
Ngun xung ng h cho b nh thi:
Nh chng ta bit, mi b nh thi cn mt xung ng h gi nhp. Vy
ngun xung ng h cho cc b nh thi trn 8051 ly u? Nu C/T = 0 th tn
s thch anh i lin vi 8051 c lm ngun cho ng h ca b nh thi. iu
c ngha l ln ca tn s thch anh i km vi 8051 quyt nh tc nhp ca
cc b nh thi trn 8051. Tn s ca b nh thi lun bng 1/12 tn s ca thch
anh gn vi 8051.
V d:
Hy tm tn s ng b v chu k ca b nh thi cho cc h da trn 8051 vi cc
tn s thch anh sau:
a) 12MHz B dao ng Tn s ng h ca b
12 nh thi
b) 16MHz thch anh
c) 11,0592MHz
Li gii:
1 1
a) 12MHz = 1MHz v T = = 1s
12 1 / 1MHz
1 1
b) 16MHz = 1,111Mz v T = = 0,75s
12 1,333MHz
1 1
c) 11,0592MHz = 921,6kHz v T = = 1,085s
12 0,9216MHz
Mc d cc h thng da trn 8051 khc vi tn s thch anh t 10 n 40MHz,

song ta ch tp chung vo tn s thch anh 11,0592MHz. L do ng sau mt s l
nh vy l phi lm vic vi tn sut baud i vi truyn thng ni tip ca 8051.
Tn s XTAL = 11,0592MHz cho php h 8051 truyn thng vi IBM PC m khng
c li.

Bi ging Chng 3
Bt cng GATE.
Mt bt khc ca thanh ghi TMOD l bt cng GATE. trn thanh ghi TMOD
ta thy c hai b nh thi Timer0 v Timer1 u c bt GATE. Vy bt GATE dng
lm g? Mi b nh thi thc hin im khi ng v dng. Mt s b nh thi
thc hin iu ny bng phn mm, mt s khc bng phn cng v mt s khc va
bng phn cng va bng phn mm. Cc b nh thi trn 8051 c c hai. Vic
khi ng v dng b nh thi c khi ng bng phn mm bi cc bt khi
ng b nh thi TR l TR0 v TR1. iu ny c c nh cc lnh SETB TR1
v CLR TR1 i vi b Timer1 v SETB TR0 v CLR TR0 i vi b
Timer0. Lnh SETB khi ng b nh thi v lnh CLR dng dng n. Cc lnh
ny khi ng v dng cc b nh thi khi bt GATE = 0 trong thanh ghi TMOD.
Khi ng v ngng b nh thi bng phn cng t ngun ngoi bng cch t bt
GATE = 1 trong thanh ghi TMOD. Tuy nhin, trnh s ln ln ngay t by gi ta
t GATE = 0 c ngha l khng cn khi ng v dng cc b nh thi bng phn
cng t bn ngoi. s dng phn mm khi ng v dng cc b nh thi
phn mm khi ng v dng cc b nh thi khi GATE = 0. Chng ta ch cn
cc lnh SETB TRx v CLR TRx.
V d:
Tm gi tr cho TMOD nu ta mun lp trnh b Timer0 ch 2 s dng
thch anh XTAL 8051 lm ngun ng h v s dng cc lnh khi ng v
dng b nh thi.
Li gii:
TMOD = 0000 0010: B nh thi Timer0, ch 2 C/T = 0 dng ngun
XTAL GATE = 0 dng phn mm trong khi ng v dng b nh thi.
Cc ch ca b m/nh thi (Timer Mode)
Nh vy, by gi chng ta c hiu bit c bn v vai tr ca thanh ghi TMOD,
chng ta s xt ch ca b nh thi v cch chng c lp trnh nh th no
to ra mt tr thi gian. Do ch 1 v ch 2 c s dng rng ri nn ta i
xt chi tit tng ch mt.

Bi ging Chng 3
Hnh 3-20. Timer 0 Mode 0

Bi ging Chng 3

Ngt timer.
Cc ngt timer c a ch Vector ngt l 000BH (timer 0) v 001BH (timer 1). Ngt
timer xy ra khi cc thanh ghi timer (TLx ITHx) trn v set c bo trn (TFx) ln 1.
Cc c timer (TFx) khng b xa bng phn mm. Khi cho php cc ngt, TFx t
ng b xa bng phn cng khi CPU chuyn n ngt.
V d 1:
Trong chng trnh di y ta to ra mt sng vung vi y xung 50%
(cng t l gia phn cao v phn thp) trn chn P1.5. B nh thi Timer0 c
dng to tr thi gian. Hy phn tch chng trnh ny.
MOV TMOD, #01 ; S dng Timer0 v ch 1(16 bt)
HERE: MOV TL0, #0F2H ; TL0 = F2H, byte thp
MOV TH0, #0FFH ; TH0 = FFH, byte cao
CPL P1.5 ; S dng chn P1.5
ACALL DELAY
SJMP HERE ; Np li TH, TL
; delay using timer0.
DELAY:
SETB TR0 ; Khi ng b nh thi Timer0
AGAIN: JNB TF0, AGAIN ; Hin th c b nh thi cho n
; khi n vt qua FFFFH.
CLR TR0 ; Dng b Timer
CLR TF0 ; Xo c b nh thi 0
RET
Li gii:
Trong chng trnh trn y ch cc bc sau:
1. TMOD c np.
2. Gi tr FFF2H c np v TH0 - TL0
3. Chn P1.5 c chn dng cho phn cao thp ca xung.

Bi ging Chng 3
4. Chng trnh con DELAY dng b nh thi c gi.
5. Trong chng trnh con DELAY b nh thi Timer0 c khi ng bi
lnh SETB TR0
6. B Timer0 m ln vi mi xung ng h c cp bi my pht thch anh.
Khi b nh thi m tng qua cc trng thi FFF3, FFF4 ... cho n khi t
gi tr FFFFH. V mt xung na l n quay v khng v bt c b nh thi
TF0 = 1. Ti thi im ny th lnh JNB hn xung.
7. B Timer0 c dng bi lnh CLR TR0. Chng trnh con DELAY kt
thc v qu trnh c lp li.
Lu rng lp li qu trnh trn ta phi np li cc thanh ghi TH v TL v khi
ng li b nh thi vi gi thit tn s XTAL = 11, 0592MHz.
FFF2 FFF3 FFF4 FFFF 0000
TF = 0 TF = 0 TF = 0 TF = 0 TF = 1
V d 2.
Chng trnh di y to ra mt sng vung trn chn P2.5 lin tc bng vic s
dng b Timer1 to ra tr thi gian. Hy tm tn s ca sng vung nu tn s
XTAL = 11.0592MHz. Trong tnh ton khng a vo tng ph ca cc lnh vng
lp:
MOV TMOD, #01H ; Chn Timer0, ch 1 (16 bt)

HERE: MOV TL1, #34H ; t byte thp TL1 = 34H
MOV TH0, #76H ; t byte cao TH1 = 76H
; (gi tr b nh thi l 7634H)
SETB TR1 ; Khi ng b Timer1
AGAIN: JNB TF1, BACK ; li cho n khi
;b nh thi m qua 0
CLR TR1 ; Dng b nh thi.
CPL P1.5 ; B chn P1.5 nhn Hi, L0
CLR TF ; Xo c b nh thi
SJMP AGAIN ; Np li b nh thi do ch 1
; khng t ng np li .
Li gii:
Trong chng trnh trn y ta lu n ch ca SJMP. ch 1 chng
trnh phi np li thanh ghi. TH v TL mi ln nu ta mun c sng dng lin tc.
Di y l kt qu tnh ton:
V FFFFH - 7634H = 89CBH + 1 = 89CCH v 90CCH = 35276 l s ln
m xung ng h, tr l 35276 1.085s = 38274ms v tn s l Error!
Objects cannot be created from editing field codes.
Cng rng phn cao v phn thp ca xung sng vung l bng nhau.
Trong tnh ton trn y l cha k n tng ph cc lnh vng lp.
Bi tp:
Hy kim tra chng trnh sau v tm tr thi gian theo giy, khng tnh
n tng ph cc lnh trong vng lp.
MOV TMOD, #10H ; Chn b Timer1, ch 1 (16 bt)
AGAIN: MOV R3, #200 ; Chn b m gi chm ln

Bi ging Chng 3
MOV TL1, #08 ; Np byte thp TL1 = 08
MOV TH1, #08 ; Np byte cao TH1 = 01
SETB TR1 ; Khi ng Timer1
BACK: JNB TF1, BACK ; gi nguyn cho n khi
;b nh thi quay v 0
CLR TR1 ; Dng b nh thi.
CLR TF1 ; Xo c b nh thi TF1
DJNZ R3, AGAIN ; Nu R3 khng bng
;khng th np li b nh thi.
3.5 Truyn thng ni tip

Cc my tnh truyn d liu theo hai cch: Song song v ni tip. Trong truyn
d liu song song thng cn 8 hoc nhiu ng dy dn truyn d liu n mt
thit b ch cch xa vi bc. V d ca truyn d liu song song l cc my in v cc
cng, mi thit b s dng mt ng cp vi nhiu dy dn. Mc d trong cc
trng hp nh vy th nhiu d liu c truyn i trong mt khong thi gian
ngn bng cch dng nhiu dy dn song song nhng khong cch th khng th ln
c. truyn ddx liu i xa th phi s dng phng php truyn ni tip.
Trong truyn thng ni tip d liu c gi i tng bt mt so vi truyn song song
th mt hoc nhiu byte c truyn i cng mt lc. Truyn thng ni tip ca 8051
l ch ca chng ny. 8051 c ci sn kh nng truyn thng ni tip, do
vy c th truyn nhnh d liu vi ch mt s t dy dn.
Cc c s ca truyn thng ni tip.
Khi mt b vi x l truyn thng vi th gii bn ngoi th n cp d liu
di dng tng khc 8 bt (byte) mt. Trong mt s trng hp chng hn nh cc
my in th thng tin n gin c ly t ng bus d liu 8 bt v c gi i ti
bus d liu 8 bt ca my in. iu ny c th lm vic ch khi ng cp bus khng
qu di v cc ng cp di lm suy gim thm ch lm mo tn hiu. Ngoi ra,
ng d liu 8 bt gi thng t. V nhng l do ny, vic truyn thng ni tip
c dng truyn d liu gia hai h thng cch xa nhau hng trm n hng
triu dm. Hnh 3-24. Truyn thng l s truyn ni tip so vi s truyn song
song.
Hnh 3-24. Truyn thng

Thc t l trong truyn thng ni tip l mt ng d liu duy nht c dng
thay cho mt ng d liu 8 bt ca truyn thng song song lm cho n khng ch

Bi ging Chng 3
r hn rt nhiu m n cn m ra kh nng hai my tnh cch xa nhau c truyn
thng qua ng thoi.
i vi truyn thng ni tip th lm c cc byte d liu phi c
chuyn i thnh cc bt ni tip s dng thanh ghi giao dch vo - song song - ra -
ni tip. Sau n c th c truyn quan mt ng d liu n. iu ny cng
c ngha l u thu cng phi c mt thanh ghi vo - ni tip - ra - song song
nhn d liu ni tip v sau gi chng thnh tng byte mt. Tt nhin, nu d liu
c truyn qua ng thoi th n phi c chuyn i t cc s 0 v 1 sang m
thanh dng sng hnh sin. Vic chuyn i ny thc thi bi mt thit b c tn gi
l Modem l ch vit tt ca Modulator/ demodulator (iu ch/ gii iu ch).
Khi c ly truyn ngn th tn hiu s c th c truyn nh ni trn, mt dy
dn n gin v khng cn iu ch. y l cch cc bn PC v IBM truyn d liu
n bo mch m. Tuy nhin, truyn d liu i xa dng cc ng truyn chng
hn nh ng thoi th vic truyn thng d liu ni tip yu cu mt modem
iu ch (chuyn cc s 0 v 1 v tn hiu m thanh) v sau gii iu ch
Trong RS232 th mc 1 c biu din bi - 3v n 25v trong khi mc 0 th
ng vi in p + 3v n +25v lm cho in p - 3v n + 3v l khng xc nh. V
l do ny kt ni mt RS232 bt k n mt h vi iu khin th ta phi s dng
cc b bin i in p nh MAX232 chuyn i cc mc l-gc TTL v mc
in p RS232 v ngc li. Kt ni RS232 n MAX232 c nh Hnh 3-16 - Ghp
ni RS232 vi 8051.
8051 c hai chn c dng chuyn cho truyn v nhn d liu ni tip. Hai
chn ny c gi l TxD v RxD v l mt phn ca cng P3 ( l P3.0 v P3.1).
chn 11 ca 8051 l P3.1 c gn cho TxD v chn 10 (P3.0) c dng cho RxD.
Cc chn ny tng thch vi mc l-gch TTL. Do vy chng i hi mt b iu
khin ng truyn chng tng thch vi RS232. Mt b iu khin nh vy l
chp MAX232.
Trong phn ny chng ta s nghin cu v cc thanh ghi truyn thng ni tip
ca 8051 v cch lp trnh chng truyn v nhn d liu ni tip. V cc my tnh
IBM PC v tng thch c s dng rt rng ri truyn thng vi cc h da
trn 8051, do vy ta ch yu tp trung vo truyn thng ni tip ca 8051 vi cng
COM ca PC. cho php truyn d liu gia my tn PC v h thng 8051 m
khng c bt k li no th chng ta phi bit chc rng tc baud ca h 8051
phi ph hp vi tc baud ca cng COM my tnh PC c cho trong Bng 3-12.
Mt s gi tr thng dng trong truyn thng ni tip.
Tham kho [1]

Cc thanh ghi cn nghin cu: SCON, SBUF, TMOD, TH1, TL1, ...

Bi ging Chng 3
8051 c 1 cng UART lm vic chun TTL, mc nh sau khi khi ng tt
cc cng ca 8051 u lm vic ch vo ra s, v th c th s dng UART
cn phi cu hnh cho cng ny lm vic thng qua cc thanh ghi iu khin v ghp
ni tng thch vi chun rs232.
Hnh 3-25. Ghp ni RS232 vi 8051

Cc thanh ghi iu khin trong ch d UART:
a) SBUF: Vng m truyn thng d liu ra/vo cng ni tip.
- Vic truyn d liu tng ng vi vic np cho SBUF mt gi tr

- D liu nhn t RxD cng c lu vo SBUF
b) SCON: Thanh ghi iu khin hot ng cng ni tip
Trong :
Bit M t
SM0
SM1 La chn mode lm vic
SM2
REN = 1: Cho php nhn
= 0: Ch truyn
TB8 (=1) Bit truyn thng th 8, c s dng khi truyn thng ch 9 bit
RB8 (=1) Bit truyn thng th 8, h thng s t t n =1 nu pht hin khung
truyn l 9bit

Bi ging Chng 3
TI C ngt truyn. Khi mt byte trong SBUF c truyn thnh cng th
TI=1. Trc khi truyn byte khc bit ny cn phi c xa bng phn
mm
RI C ngt nhn, Khi nhn thnh cng 1 byte vo SBUF th RI=1. Sau khi
c SUBF, RI cn phaic xa bng phn mm
La chn mode lm vic

SM0 SM1 Mode Description Baud Rate
0 0 0 Thanh ghi dch 8 bit 1/12 tn s clock

0 1 1 8-bit UART Cu hnh qua timer1
1 0 2 9-bit UART 1/32 tn s clock (hoc 1/64)
1 1 3 9-bit UART Cu hnh qua timer 1
Mode 0
y l ch thanh ghi dch 8 bit, khng c bit start/stop, ch ny RxD
l chn truyn nhn, cn TxD pht xung ng b.
Hnh 3-26. Truyn thng ni tip Mode 0

- Qu trnh truyn bt u khi ghi gi tr vo SBUF, kt thc c bo qua TI

Bi ging Chng 3
Hnh 3-27. Gin thi gian truyn ni tip Mode 0

- Qu trnh nhn t ng bi h thng v kt thc khi RI=1
Hnh 3-28. Gin thi gian nhn ni tip Mode 0

Mode 1
Truyn thng bt ng b vi frame truyn 10 bit, gm 1 start, 8 bit d liu
v 1 stop. TxD thc hin truyn, RxD nhn d liu, tc truyn ci t qua Timer
1
Hnh 3-29. Truyn nhn ni tip Mode 1

- Qu trnh truyn:

Bi ging Chng 3
- Qu trnh nhn

Mode 2
Truyn thng bt ng b vi frame truyn 11 bit, gm 1 start, 8 bit d liu, 1
bit lp trnh c(nu truyn l TB8, nhn l RB8) v 1 bit stop. TxD thc hin
truyn, RxD nhn d liu, tc truyn ci t qua Timer 1. Bit th 9 thng c
dng l bit pht hin li party.
- Qu trnh truyn

- Qu trnh nhn:

Mode 3
Mode 3 tng t mode 2 v mi mt ngoi tr tc baud
Tc Baud
Trong mt s mode hot ng ca cng ni tip th tc baud ph thuc vo timer
1. ci t cn qua cc bc sau:
- Cho php timer 1 hot ng v cho php ngt trn timer 1
- Cu hnh cho timer 1 lm vic ch t np li
Cng thc tnh:

Bi ging Chng 3
- t gi tr cho thanh ghi TH1 ty thuc vo tc mong mun theo bng

di
Baud Tn s thch anh Bit
Rate SMOD
11.0592 12 14.7456 16 20
150 40 h 30 h 00 h 0
300 A0 h 98 h 80 h 75 h 52 h 0
600 D0 h CC h C0 h BB h A9 h 0
1200 E8 h E6 h E0 h DE h D5 h 0
2400 F4 h F3 h F0 h EF h EA h 0
4800 F3 h EF h EF h 1
4800 FA h F8 h F5 h 0
9600 FD h FC h 0
9600 F5 h 1
19200 FD h FC h 1
38400 FE h 1
76800 FF h 1
Bng 3-12. Mt s gi tr thng dng trong truyn thng ni tip
Mt s v d v bi tp:
V d 1:
Gi s tn s XTAL = 11.0592MHz cho chng trnh di y, hy pht biu a)
chng trnh ny lm g? b) hy tnh ton tn s c Timer1 s dng t tc
baud? v c) hy tm tc baud truyn d liu.
MOV A, PCON ; Sao ni dung thanh ghi PCON vo thanh ghi ACC
SETB ACC.7 ; t D7 = 0
MOV PCON, A ; t SMOD = 1 tng gp i tn
;s baud vi tn s XTAL c nh
MOV TMOD, #20H ; Chn b Timer1, ch 2, t ng np li
MOV TH1, - 3 ; Chn tc baud 19200

Bi ging Chng 3
;(57600/3=19200) v SMOD = 1
MOV SCON, #50H ; ng khung d liu gm 8 bt
;d liu, 1 Stop v cho php RI.
SETB TR1 ; Khi ng Timer1
MOV A, #B ; Truyn k t B
A_1: CLR TI ; Khng nh TI = 0
MOV SBUF, A ;Truyn n
H_1: JNB TI, H_1 ; Ch y cho n khi bt cui c gi i
SJMP A_1 ; Tip tc gi B
Li gii:
a) Chng trnh ny truyn lin tc m ASCII ca ch B ( dng nh phn l 0100
0010)
b) Vi tn s XTAL = 11.0592MHz v SMOD = 1 trong chng trnh trn ta c:
11.0592MHz/12 = 921.6kHz l tn s chu trnh my, 921.6kHz/16 = 57.6kHz
l tn s c Timer1 s dng t tc baud
c) 57.6kHz/3 = 19.200 l tc cn tm
V d 2:
Tm gi tr TH1 ( dng thp phn v hex) t tc baud cho cc trng
hp sau.
a) 9600 b) 4800 nu SMOD = 1 v tn s XTAL = 11.0592MHz
Li gii:
Vi tn s XTAL = 11.0592MHz v SMOD = 1 ta c tn s cp cho Timer1 l
57.6kHz.
a) 57.600/9600 = 6 do vy TH1 = - 6 hay TH1 = FAH
b) 57.600/4800 = 12 do vy TH1 = - 12 hay TH1 = F4H
SMOD=1
11.0592MHz
57600Hz To
16 timer1
28800Hz
XTAL 12 to set
28800Hz
oscillator 921.6kHz 32 baud
SMOD=0
Bi tp:
Hy tm tc baud nu TH1 = -2, SMOD = 1 v tn s XTAL = 11.0592MHz. Tc
ny c c h tr bi cc my tnh IBM PC v tng thch khng?
3.6 X l ngt
Mt ngt l mt s kin bn trong hoc bn ngoi lm ngt b vi iu khin
bo cho n bit rng thit b cn dch v ca n. Trong chng ny ta tm hiu khi
nim ngt v lp trnh ngt.
Mt b vi iu khin c th phc v mt vi thit b, c hai cch thc hin
iu ny l s dng cc ngt v thm d (polling). Trong phng php s dng
cc ngt th mi khi c mt thit b bt k cn n dch v ca n th n bao cho b

Bi ging Chng 3
vi iu khin bng cch gi mt tn hiu ngt. Khi nhn c tn hiu ngt th b vi
iu khin ngt tt c nhng g n ang thc hin chuyn sang phc v thit b.
Chng trnh i cng vi ngt c gi l trnh dch v ngt ISR (Interrupt Service
Routine) hay cn gi l trnh qun l ngt (Interrupt handler). Cn trong phng
php thm d th b vi iu khin hin th lin tc tnh trng ca mt thit b cho
v iu kin tho mn th n phc v thit b. Sau n chuyn sang hin th tnh
trng ca thit b k tip cho n khi tt c u c phc v. Mc d phng php
thm d c th hin th tnh trng ca mt vi thit b v phc v mi thit b khi cc
iu kin nht nh c tho mn nhng n khng tn dng ht cng dng ca b
vi iu khin. im mnh ca phng php ngt l b vi iu khin c th phc v
c rt nhiu thit b (tt nhin l khng ti cng mt thi im). Mi thit b c
th nhn c s ch ca b vi iu khin da trn mc u tin c gn cho n.
i vi phng php thm d th khng th gn mc u tin cho cc thit b v n
kim tra tt c mi thit b theo kiu hi vng. Quan trng hn l trong phng php
ngt th b vi iu khin cng cn c th che hoc lm l mt yu cu dch v ca
thit b. iu ny li mt ln na khng th thc hin c trong phng php thm
d. L do quan trng nht l phng php ngt c u chung nht l v phng
php thm d lm lng ph thi gian ca b vi iu khin bng cch hi d tng thit
b k c khi chng khng cn n dch v.
V d trong cc b nh thi, ta dng lnh JNB TF, ch v i cho n
khi b nh thi quay tr v 0. Trong v d , trong khi ch i th ta c th lm
vic c g khc c ch hn, chng hn nh khi s dng phng php ngt th b vi
iu khin c th i lm cc vic khc v khi c TF bt ln n s ngt b vi iu
khin cho d n ang lm bt k iu g.
Trnh phc v ngt.
i vi mi ngt th phi c mt trnh phc v ngt ISR hay trnh qun l
ngt. khi mt ngt c gi th b vi iu khin phc v ngt. Khi mt ngt c gi
th b vi iu khin chy trnh phc v ngt. i vi mi ngt th c mt v tr c
nh trong b nh gi a ch ISR ca n. Nhm cc v tr nh c dnh ring
gi cc a ch ca cc ISR c gi l bng vc t ngt, xem Hnh 3-35. Bng
vector ngt v v d
8051 h tr 5 loi ngt, c th cho php hoc cm ngt vi tng loi thng qua
thanh ghi iu khin ngt IE, hoc c th cm tt c cc ngt thng qua bit EA.
Cc tn hiu iu khin ngt c th c m t nh hnh di

Bi ging Chng 3
Hnh 3-34. Cc tn hiu iu khin ngt

hnh trn ch c 1 im ch l hai tn hiu IT0 v IT1, hai bit ny la
chn nguyn nhn ngt cho 2 ngt ngoi INTR0 v INTR1. Nu =1 th ngt ti sn
m, =0 ngt ti sn dng
Thanh ghi iu khin ngt IE
Trong :
Bit M t
EA Cho php/cm ngt ton cc
= 0: Cm tt c cc ngt
= 1: Cho php cc ngt
ES = 0: Cm ngt truyn thng ni tip
= 1: Cho php ngt truyn thng ni tip
ET1 = 0: Cm ngt Timer 1
= 1: Cho php ngt Timer 1
EX1 = 0: Cm ngt ngoi vi INT0
= 1: Cho php ngt ngoi v INT0
ET0 = 0: Cm ngt Timer 0
= 1: Cho php ngt timer 0
EX0 = 0: Cm ngt ngoi vi INT1
= 1: Cho php

Bi ging Chng 3
Cc bc khi thc hin mt ngt.
Khi kch hot mt ngt b vi iu khin i qua cc bc sau:
1. N kt thc lnh ang thc hin v lu a ch ca lnh k tip (PC)
vo ngn xp.
2. N cng lu tnh trng hin ti ca tt c cc ngt vo bn trong (ngha
l khng lu vo ngn xp).
3. N nhy n mt v tr c nh trong b nh c gi l bng vc t
ngt ni lu gi a ch ca mt trnh phc v ngt.
4. B vi iu khin nhn a ch ISR t bng vc t ngt v nhy ti .
N bt u thc hin trnh phc v ngt cho n lnh cui cng ca ISR l RETI (tr
v t ngt).
5. Khi thc hin lnh RETI b vi iu khin quay tr v ni n b
ngt. Trc ht n nhn a ch ca b m chng trnh PC t ngn xp bng cch
ko hai byte trn nh ca ngn xp vo PC. Sau bt u thc hin cc lnh t a
ch .
Lu bc 5 n vai tr nhy cm ca ngn xp, v l do ny m chng ta
phi cn thn khi thao tc cc ni dung ca ngn xp trong ISR. c bit trong ISR
cng nh bt k chng trnh con CALL no s ln y vo ngn xp (Push) v s
ln ly ra t n (Pop) phi bng nhau.
Lp trnh ngt
Khi c mt ngt, chng trnh chnh s b dng, con tr chng trnh ngay lp
tc c chuyn n mt a ch quy nh sn trong bn vector ngt nh hnh di:
Hnh 3-35. Bng vector ngt v v d
Mt s v d v bi tp:
V d 1:
Hy ch ra nhng lnh a) cho php ngt ni tip ngt Timer0 v ngt phn cng
ngoi 1 (EX1) v b) cm (che) ngt Timer0 sau c) trnh by cch cm tt c mi
ngt ch bng mt lnh duy nht.
Li gii:

Bi ging Chng 3
a) MOV IE, #10010110B ; Cho php ngt ni tip, cho php ngt Timer0 v
cho php ngt phn cng ngoi.
V IE l thanh ghi c th nh a ch theo bt nn ta c th s dng cc lnh sau y
truy cp n cc bt ring r ca thanh ghi:
SETB IE.7 ; EA = 1, Cho php tt c mi ngt
SETB IE.4 ; Cho php ngt ni tip
SETB IE.1 ; Cho php ngt Timer1
SETB IE.2 ; Cho php ngt phn cng ngoi 1
(tt c nhng lnh ny tng ng vi lnh MOV IE, #10010110B trn y).
b) CLR IE.1 ; Xo (che) ngt Timer0
c) CLR IE.7 ; Cm tt c mi ngt.
V d 2:
Hy vit chng trnh nhn lin tc d liu 8 bt cng P0 v gi n n cng P1
trong khi n cng lc to ra mt sng vung chu k 200us trn chn P2.1. Hy s
dng b Timer0 to ra sng vung, tn s ca 8051 l XTAL = 11.0592MHz.
Li gii:
Ta s dng b Timer0 ch 2 (t ng np li) gi tr np cho TH0 l
100/1.085us = 92.
; - - Khi khi to vo chng trnh main trnh dng khng gian.
; a ch dnh cho bng vc t ngt.
ORG 0000H
CPL P2.1 ; Nhy n bng vc t ngt.
; - - Trnh ISR dnh cho Timer0 to ra sng vung.
ORG 0030H ; Ngay sau a ch bng vc-t ngt
MAIN: TMOD, #02H ; Chn b Timer0, ch 2 t np li
MOV P0, #0FFH ; Ly P0 lm cng vo nhn d liu
MOV TH0, # - 92 ; t TH0 = A4H cho 92
MOV IE, #82H ; IE = 1000 0010 cho php Timer0
BACK: MOV A, P0 ; Nhn d liu vo t cng P0
MOV P1, A ; Chuyn d liu n cng P1
SJMP BACK ; Tip tc nhn v chuyn d liu
; Chng no b ngt bi TF0
END
Trong v d 2 trnh phc v ngt ISR ngn nn n c th t va vo khng
gian a ch dnh cho ngt Timer0 trong bng vc t ngt. Tt nhin khng phi lc
no cng lm c nh vy. Xt v d 3 di y.

Bi ging Chng 3
V d 3:
Hy vit li chng trnh v d 2 to sng vung vi mc cao ko di
1085us v mc thp di 15us vi gi thit tn s XTAL = 11.0592MHz. Hy s
dng b nh thi Timer1.
Li gii:
V 1085us l 1000x1085us nn ta cn s dng ch 1 ca b nh thi
Timer1.
;Khi khi to trnh s dng khng gian dnh cho bng vc t ngt.
ORG 0000H
LJMP MAIN ; Chuyn n bng vc t ngt.
; - - Trnh ISR i vi Timer1 to ra xung vung
OR6 001BH ; a ch ngt ca Timer1
; trong bng vc t ngt
LJMP ISR_T1 ; Nhy n ISR
; - - Bt u cc chng trnh chnh MAIN.

ORG 0030H ; Sau bng vc t ngt
MAIN: MOV TMOD, #10H ; Chn Timer1 ch 1
MOV P0, #0FFH ; Chn cng P0 lm u vo nhn d liu
MOV TL1, #018H ; t TL1 = 18 byte thp ca - 1000
MOV TH1, #0FCH ; t TH1 = FC byte cao ca - 1000
MOV IE, #88H ; IE = 10001000 cho php ngt Timer1
BACK: MOV A, P0 ; Nhn d liu u vo cng P0
MOV P1, A ; Chuyn d liu n P1
SJMP BACK ; Tip tc nhn v chuyn d liu
; - - Trnh ISR ca Timer1 phi c np li v ch 1

ISR_T1: CLR TR1 ; Dng b Timer1
CLR P2.1 ; P2.1 = 0 bt u xung mc thp
MOV R2, #4 ; 2 chu k my MC (Machine Cycle)
HERE: DJNZ R2, HERE ; 4 2 MC = 8 MC
MOV TL1, #18H ; Np li byte thp gi tr 2 MC
MOV TH1, #0FCH ; Np li byte cao gi tr 2 MC
SETB TR1 ; Khi ng Timer1 1 MC
SETB P2.1 ; P2.1 = 1 bt P2.1 tr li cao
RETI ; Tr v chng trnh chnh
END
Lu rng phn xung mc thp c to ra bi 14 chu k mc MC v mi
MC = 1.085us v 14 x 1.085us = 15.19us.
Bi tp:
Vit mt chng trnh to ra mt sng vung tn s 50Hz trn chn P1.2.
Gi s XTAL = 11.0592MHz.

Bi ging Chng 3
Th t u tin ngt
Khi c hai hay nhiu ngt cng lc xy ra, hoc mt ngt ang thc hin th
m ngt khc yu cu th ngt no c u tin hn s c u tin x l.
C 3 cp u tin ngt trong 8051
- Ngt reset l ngt c mc u tin cao nht, khi reset xy ra tt c cc ngt
khc v chng trnh u b dng v vi iu khin tr v ch khi dng
ban u.
- Ngt mc 1, ch c reset mi c th cm ngt ny
- Ngt mc 0, cc ngt mc 1 v reset c th cm ngt ny.
Vic t chn mc u tin ngt l 1 hoc 0 thng qua thanh ghi IP. Vic x l u
tin ngt ca 8051 nh sau:
- Nu 1 c u tin cao hn mt ngt ang c x l xut hin th, ngt c
u tin thp ngay lp tc b dng ngt kia c thc hin
- Nu 2 ngt cng yu cu vo 1 hi im th ngt c mc u tin hn s c
x l trc
- Nu 2 ngt c cng mc u tin cng yu cu vo 1 thi im th th t c
chn nh sau:
o INTR 0
o Timer 0
o INTR 1
o Timer 1
o UART
Thanh ghi IP
Trong : Cc bit t 0 n 5 t mc ngt l 0 hoc 1 cho cc ngt tng ng nh

sau:
- PS: UART
- PT1: Timer 1
- PX1: INTR 1
- PT0: Timer 0
- PX0: INTR 0

Bi ging Chng 3
3.7 Cu hi v bi tp cui chng
Cu 1. Nu cc bc cu hnh cho timer 0 mode 1 s dng ngt
Cu 2. Nu cc bc cu hnh cho timer 1 mode 1 s dng ngt
Cu 3. Nu cc bc cu hnh cho counter 0 mode 1 s dng ngt
Cu 4. Nu cc bc cu hnh cho counter 1 mode 2 s dng ngt
Cu 5. Nu cc bc khi to truyn thng ni tip
Cu 6. Nu cc bc khi to ngt ngoi 0 theo mc thp
Cu 7. Nu cc bc khi to ngt ngoi 0 theo sn xung
Cu 8. Nu cc bc khi to ngt ngoi 1 theo mc thp
Cu 9. Nu cc bc khi to ngt ngoi 1 theo sn xung
Cu 10. Tnh gi tr TH, TL cho Timer 0, trn sau mi 60s, bit tn s thch
anh l 16Mhz
anh l 12Mhz
Cu 12. Tnh gi tr TH, TL cho Timer 1, trn sau mi 60ms, bit tn s thch
anh l 20Mhz
anh l 11.0592Mhz
Cu 14. Cho tn s thch anh Fxtal= 8MHz, baud=9600bps, tnh gi tr TH1
Cu 15. Cho tn s thch anh Fxtal=10MHz, baud=9600bps, tnh gi tr TH1
Cu 16. Cho tn s thch anh Fxtal= 8MHz, baud=19200bps, tnh gi tr TH1
Cu 17. Cho tn s thch anh Fxtal=10MHz, baud=19200bps, tnh gi tr TH1
Cu 18. Cho tn s thch anh Fxtal= 8MHz, baud=19200bps (cu hnh nhn
i tc baud), tnh gi tr TH1
Cu 19. Cho tn s thch anh Fxtal=10MHz, baud=19200bps(cu hnh nhn
i tc baud), tnh gi tr TH1
Cu 20. Vit chng trnh mi khi bm v gi phm th n LED nhp nhy.
Bit phm bm tch cc mc 0, ghp vo chn P0.0, LED mc cc dng vo
P2.0, cc m qua tr 280 xung GND
Cu 21. Vit chng trnh mi khi bm v gi phm th n LED nhp nhy.
Bit phm bm tch cc mc 0, ghp vo chn P0.1, LED mc cc dng vo
P2.1, cc m qua tr 280 xung GND
Cu 22. Vit chng trnh lin tc nhp nhy n LED, nu bm v gi phm
th ngng nhp nhy LED. Bit phm bm tch cc mc 0, ghp vo chn
P0.0, LED mc cc dng vo P2.3, cc m qua tr 280 xung GND
Cu 23. Vit chng trnh lin tc nhp nhy n LED, nu bm v gi phm
th ngng nhp nhy LED. Bit phm bm tch cc mc 0, ghp vo chn
P1.0, LED mc cc dng vo P2.5, cc m qua tr 280 xung GND
Cu 24. Vit chng trnh con ngt v khi to ngt Timer 0, mode 1, vi tn
s trn l 200KHz, bit tn s thch anh Fxtal=8MHz
Bi ging Chng 3
s trn l 400KHz, bit tn s thch anh Fxtal=11.0592MHz
Cu 26. Vit chng trnh con ngt v khi to ngt Timer 0, mode 2, vi chu
k trn l T=200s, bit tn s thch anh Fxtal=11.0592MHz
s trn l 200KHz, bit tn s thch anh Fxtal=8MHz
s trn l 400KHz, bit tn s thch anh Fxtal=11.0592MHz
k trn l T=255s, bit tn s thch anh Fxtal=8MHz
k trn l T=200s, bit tn s thch anh Fxtal=11.0592MHz
Cu 31. Vit on lnh khi to truyn thng ni tip bit tn s thch anh l
8MHz, tc baud=9600bps.
Cu 34. Thit k v vit chng trnh con c ma trn 2x2 nt bm (nt bm
c nh s t 1 n n), kt qu tr v l s th t nt bm, nu khng c
nt no c bm, tr v 0. Bit nt bm c ghp hng vo P1, ct vo P2.
Cu 35. Thit k v lp trnh hin th s 1234 4 LED 7 thanh. Bit 4 LED l
chung m, mc chung BUS d liu (a..h).
Cu 36. Vit chng trnh truyn lin tc tn mnh ln my tnh qua ng
RS232, vi tc baud = 9600bps
Cu 37. Hy lp trnh cho 8051 nhn cc byte d liu ni tip v t chng
vo cng P1. t tc baud l 4800bps, 8 bit d liu v 1 bit Stop.
Cu 38. Hy lp trnh cho 8051 nhn cc byte d liu ni tip v t chng
vo cng P2. t tc baud l 9600bps, 8 bit d liu v 1 bit Stop.
Cu 39. Vit chng trnh truyn thng vi my tnh, nu my tnh gi k t
a th 8051 gi tr v k t b, nu my tnh gi k t b th 8051 gi tr v
k t c,
Cu 40. Vit chng trnh truyn thng vi my tnh nu my tnh gi xung
ch Ten th 8051 gi tr v tn mnh (th sinh).
Cu 41. Hy vit chng trnh nhn lin tc d liu 8 bit cng P0 v gi n
n cng P1 trong khi n cng lc to ra mt sng vung chu k 200s trn
chn P2.1. Hy s dng b Timer0 to ra sng vung, tn s ca 8051 l
FXTAL =11.0592MHz.
Cu 42. Hy vit chng trnh nhn lin tc d liu 8 bit cng P0 v gi n
n cng P1 trong khi n cng lc to ra mt sng vung vi mc cao ko di

Bi ging Chng 3
1085s v mc thp di 15s vi gi thit tn s FXTAL = 11.0592MHz. Hy
s dng b nh thi Timer1.
Cu 43. Hy vit chng trnh trong 8051 c d liu t cng P1 v ghi n
ti cng P2 lin tc trong khi a mt bn sao d liu ti cng COM ni tip
thc hin truyn ni tip gi thit tn s XTAL l 11.0592MHz v tc
baud l 9600bps.
Cu 44. Hy vit chng trnh trong 8051 nhn d liu t cng P1 v gi
lin tc n cng P2 trong khi d liu i vo t cng ni tip COM c
gi n cng P0. Bit tn s FXTAL=11.0592MHz v tc baud 9600bps.
Cu 45. Hy vit mt chng trnh thc hin cc cng vic sau:
a. Nhn d liu ni tip v gi n n cng P0.
b. c d liu t cng P1, truyn ni tip v sao chp n cng P2.
c. S dng Timer0 to sng vung tn s 5kHz trn chn P0.1
gi thit tn s XTAL = 11.0592MHz v tc baud 4800.

Bi ging Chng 3

Bi ging Chng 4
Vi x l - Vi iu khin ng dng
CHNG 4. NG DNG
Mc tiu
Gip sinh vin hc tp v thc hnh theo cc v d mu, nhm nng cao trnh
lp trnh ca sinh vin.
Tm tt:
ng dng cc vi iu khin lp trnh giao tip vi th gii thc thng qua

cc v d:
- Ghp ni vi iu khin vi hin th 7 thanh
- Ghp ni vi iu khin vi mn hnh LCD
- Ghp ni vi iu khin vi bn phm
- Ghp ni vi iu khin vi cc b chuyn i ADC v DAC
- Ghp ni vi iu khin vi step motor
-

Bi ging Chng 4
4.1 Nhp nhy dy LED n

Mc ch ca v d ny khng phi l chng minh hot ng ca n LED, n
dng biu th s hot ng ca cc vi iu khin.
S chung ca nhm v v vi LED chng ta dng s nh sau:
C1 U1
33p 19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
FXTAL 37
P0.2/AD2
18 36
XTAL2 P0.3/AD3
35
C2 P0.4/AD4
34
P0.5/AD5
33p 33
P0.6/AD6
9 32
RST P0.7/AD7
C3
10u 21
P2.0/A8
R1 P2.1/A9
22
23
10k P2.2/A10
29 24
PSEN P2.3/A11
C4 30 25
ALE P2.4/A12
31 26
224 EA P2.5/A13
40 27
VCC P2.6/A14
20 28
GND P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD
AT89C51
D8 D7 D6 D5 D4 D3 D2 D1
LED LED LED LED LED LED LED LED
R2
220
Hnh 4-1. Mch nhp nhy LED n

S ny l s nguyn l thc khi thit k mch chy mch in. Nhng
trong m phng, chng ta ch n gin l m phng nguyn l hot ng ca mch,
nn mt s linh kin c th b qua, v chng c phn mm m phng Proteus
t mc nh ri.
Mc nh, chng ta s dng Fxtal=12MHz.
C th, s m phng ch cn nh sau:
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18 36
XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
21
P2.0/A8
22
P2.1/A9
23
P2.2/A10
29 24
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD
AT89C51
D8 D7 D6 D5 D4 D3 D2 D1
LED LED LED LED LED LED LED LED
Hnh 4-2. Mch nhp nhy LED n trong m phng.

Bi ging Chng 4
Mt s hm mu:
Trong tt c cc v d v LED, chng ta u s dng mt chng trnh con (CTC)
to tr, thng t tn l Delay. Chng trnh con Delay c vit bng cch to ra
nhiu vng lp lng nhau, nhm tiu tn thi gian. Khong thi gian bao nhiu c
tnh da theo tn s thch anh (Fxtal), s vng lp, s ln gi CTC.
Chng trnh con Delay c thi gian c nh:
Delay:mov R7, #10
DL:mov R6,#255
DL1:mov R5,#255
DL2:djnz r5,dl2
djnz R6,DL1
DJNZ R7, DL
ret
M ngun 4-1. Delay
Gi tr np vo R7, R6, R5 c th c thay i ty thi gan yu cu.
Chng trnh con Delay c thi gian thay i ty lc gi:
DelayX macro Tdelay tng l vit CTC trong mt
local DL1,DL2,DL3 MACRO, truyn tham s thi gian tr
push 7
push 6
vo tham s ti lc gi hm. Nh vy, c
push 5 th vi mi ln gi hm khc nhau,
mov R7,#Tdelay chng trnh con Delay s c truyn
DL1:mov R6,#100 thi gian khc nhau, v khong thi gian
DL2:mov R5,#100 tr l nh nhau.
DL3:djnz R5, Dl3
djnz R6, Dl2
djnz R7, Dl1
pop 5
pop 6
pop 7
endm
M ngun 4-2. DelayX

Bi ging Chng 4
Nhp nhy c cng P1:
Mun LED nhp nhy trn cng P1, chng ta tt LED, tr ri bt LED, tr.
S nh Hnh 4-1. Mch nhp nhy LED n, s thut ton v m ngun
nh hnh di y:
org 0
start:
mov P1,#0x00
call delay
mov P1,#0xff
call delay
jmp start
delay:mov R7, #10
DL:mov R6,#255
DL1:
mov R5,#255
DL2:djnz r5,dl2
djnz R6,DL1
DJNZ R7, DL
ret
end
Hnh 4-3. Thut ton: Nhp nhy P1 M ngun 4-3. Nhp nhy cng P1
org 0
Nhp nhy LED P1
Macro jmp main
// Khai bo DelayX ti y
Nhn: Start
// Xem: M ngun 4-2. DelayX
P1=0x55 Tt LED sbit L0= P2.0
main:
Tr nhn
mov P1, #0x55
DelayX
trng thi LED cpl L0
delay 10
P1=0xAA mov P1, #0xaa
Bt LED
cpl L0
DelayX delay 10
Tr nhn
trng thi LED
jmp main
end
Hnh 4-4. Thut ton: Nhp nhy P1- M ngun 4-4. Nhp nhy cng P1v o
Macro trng thi P2.0
Trong v d trn, c thm phn o LED, xem k o LED Hnh 4-5. Thut ton:
Nhp nhy P1.0
Nhp nhy mt LED n:
n gin ch cn kch hot n LED nhp nhy nhn thy c s hot ng,
trong mi ln thay i trng thi ca LED, cn to mt khong thi gian tr c th
quan st thy trng thi. Trong v d ny, thi gian tr c cung cp bng cch thc

Bi ging Chng 4
hin mt chng trnh con tr, c gi l Delay. N l 3 vng lp lng nhau s
dng thanh ghi R0, R1 v R2. Sau khi tr v t cc chng trnh con, trng thi ca
chn c o ngc v cc th tc tng t c lp i lp li ...
ORG 0
JMP BEGIN ;Reset vector
ORG 100H
;Khi to trng thi:
MOV P1,#0FFh
BEGIN:
CPL P1.0 ;o trng thi P1.0
LCALL Delay ;Time delay
SJMP BEGIN
Delay:
MOV R2,#20 ;500 ms time delay
F02: MOV R1,#50 ;25 ms
F01: MOV R0,#230
DJNZ R0,$
DJNZ R1,F01
DJNZ R2,F02
Ret
END ;End of program
Hnh 4-5. Thut ton: Nhp nhy P1.0 M ngun 4-5. Nhp nhy P1.0
4.2 Timer
Chng trnh di y minh ha mt v d n gin nht v Timer, ly v d l Timer 0 (v
trong ch c bn, Timer 0 v Timer 1 l nh nhau).
S nguyn l, vn ly s trong Hnh 4-1. Mch nhp nhy LED n.
Thut ton lp trnh v m ngun c th thc hin nh cc v d di y.
Timer Bi ton 1:
Lin tc pht xung vung c chu k l 2ms ra chn P1.0
CSEG AT 0
Timer-Xung vung
JMP Start ; Reset vector
Nhn: Start ORG 100H
Start:
Khi to
TMOD=1 MOV TMOD,#0x01
Timer0
TH0_TL0=65536-1000
MOV TH0, #HIGH(-1000);1ms
MOV TL0, #LOW(-1000)
TR0=1 Chy! SETB TR0 ; Cho TIMER chay
Nhn: waitTF0
waitTF0: jnb TF0, waitTF0
Ch n khi
TF0=1?
Timer0 Chy xong
CPL P1.0
o trng thi ca
P1.0=~P1.0 JMP Start
chn (To xung)
END
Hnh 4-6. Thut ton: TIMER0 M ngun 4-6. Timer0 to xung PWM

Bi ging Chng 4
Timer Bi ton 2:
S dng Timer0 v Timer1, Timer0 dng pht xung vung c chu k 4ms ti
chn P1.0, Timer 1 pht xung vung 8ms chn P1.7.
Hnh vn dng : Hnh 4-1. Mch nhp nhy LED n
Phn tch:
Vi yu cu bi nh trn, ta s dng ngt timer0 v ngt timer1. Chng
trnh chnh khi to timer, khi to ngt ri khng lm g na.
C hai CTC ngt c vai tr nh nhau. Trong mi ngt, thc hin nhim v l
lt trng thi chn ( to xung vung), v khi to li gi tr timer tng
ng.
Timer-Xung vung
CSEG AT 0
Ngt JMP Start ; Reset vector
ORG 0BH
JMP TM0_PWM ;Vector ngt TM0
TMOD=11h
TH0_TL0=65536-2000
Khi to ORG 01BH
Timer0
TH1_TL1=65536-4000 JMP TM1_PWM ;Vector ngt TM1
ORG 100H
TR0=1 Chy! Start:
TR1=1
MOV TMOD,#0x11
Khng lm g MOV TH0,#HIGH(-2000)
MOV TL0,#LOW(-2000)
MOV TH1,#HIGH(-4000)
Ngt TM0 MOV TL1,#LOW(-4000)
MOV IE,#08AH ; Interrupt enabled
Cng vic P1.0=~P1.0
Khi to TH0_TL0=65536-2000 SETB TR0 ; Cho TIMER0 chay

li Timer0
SETB TR1 ; Cho TIMER1 chay
Thot ngt
JMP $
TM0_PWM:
CPL P1.0
MOV TL0,#LOW(-2000)
RETI ; RETurn from Interrupt
TM1_PWM:
CPL P1.7
MOV TL1,#LOW(-4000)
RETI ; RETurn from Interrupt
END ; End of program
Hnh 4-7. Thut ton: Ngt Timer 0 M ngun 4-7. Timer0 v Timer1 to xung
v Timer1 PWM dng ngt.
(Thut ton TM0 v TM1 l tng
ng)

Bi ging Chng 4
4.3 S dng Timer T2
V d ny m t vic cu hnh Timer T2 (ch c trong cc dng VK 8052) s
dng hot ng ch t ng cp nht. Trong trng hp ny, n LED c
kt ni vi cng P3 trong khi cc nt nhn c s dng bt buc thit lp li b
m thi gian (T2EX) c kt ni vi chn P1.1.
Khi kt thc gi m, ngt Timer trn c kch hot v chng trnh con
TIM2_ISR c thi hnh, sau , quay thanh ghi A ri a ra cng P3. Cui cng,
xa ngt v tr v ni gi n.
Hnh 4-8. S dng Timer 2

Nu bm T2EX, b m thi gian tm thi t li. Nt bm ny reset li timer,
trong khi nt nhn RESET s Reset li vi iu khin.
CSEG AT 0
JMP XRESET ; Reset vector
ORG 02BH ; Vector ngt ca TM2
JMP TIM2_ISR
ORG 100H
XRESET:
MOV A,#0FFH
MOV P3,#0FFH
MOV RCAP2L,#0FH ; TM2, 16-bit t np li
MOV RCAP2L,#01H
CLR CAP2 ; Cho php 16-bit t np li
SETB EXEN2 ; Khi to nt bm
SETB TR2 ; Cho TM2 chy
MOV IE,#0A0H ; Cho php ngt TM2
CLR C

Bi ging Chng 4
LOOP1: SJMP LOOP1 ; Chy ti ch
TIM2_ISR:
RRC A ; Quay A qua c C
MOV P3,A ; Xut A ra cng P3
CLR TF2 ; Xa c ngt
CLR EXF2 ; Xa c ngt
RETI ; Kt thc ngt
END ; Kt thc chng trnh
M ngun 4-8. S dng Timer 2
4.4 Dng ngt ngoi.

Di y l mt v d khc ca s thc thi ngt. Mt ngt ngoi c to ra khi mt
logic khng (0) xy ra trn chn P3.2 hoc chn P3.3. Ty thuc vo l u vo hot
ng no, mt trong hai cng vic s c thc thi:
Hnh 4-9. Lp trnh 2 ngt ngoi

Mt logic s mc khng (0) trn P3.2 khi to s thc thi ngt Isr_Int0, v th s
tng dn trong R0 c sao chp ra cng P0. Logic s mc khng trn P3.3 khi to s
thc thi chng trnh con ngt Isr_Int1, s tng dn trong R1 c sao chp sang P1.
Trong ngn hn, mi ln bm vo cc nt nhn INT0 v INT1 s c tnh v ngay
lp tc c hin th nh dng nh phn trn cng thch hp
CSEG AT 0
JMP XRESET; Reset vector
ORG 003H ; Vector ngt INT0
JMP Isr_Int0
ORG 013H ; Vector ngt INT1
JMP Isr_Int1
ORG 100H
XRESET:
MOV TCON,#00000101B ; Ngt INT0 (P3.2)v ngt INT1 (P3.3) xy

Bi ging Chng 4
; ra khi c thay i mc t 1 xung 0
MOV IE,#10000101B ; Cho php ngt
MOV R0,#00H ; Khi to
MOV R1,#00H ;
MOV P0,#00H ;
MOV P1,#00H ;
LOOP: SJMP LOOP ;Chy ti ch
Isr_Int0:
INC R0 ; Tng R0 ri xut ra P0
MOV P0,R0
RETI
Isr_Int1:
INC R1 ; Tng R1 ri xut ra P1
MOV P1,R1
RETI
M ngun 4-9. Lp trnh 2 ngt ngoi
4.5 Lp trnh ngt ngoi theo sn xung.

Pht hin nu c sn xung ti chn ngt ngoi 1 (INT1, P3.3) th sinh ngt,
Trong CTC ngt, bt loa ku mt lc ri tt.
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18 36
XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
21
P2.0/A8
R1 22
P2.1/A9
220R 23
P2.2/A10
29 24
LS1 PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
R4
SPEAKER 1 10 10k
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
R2 3 12
Q1 P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
BC547 220R 5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
R3 7 16
P1.6 P3.6/WR
10k 8 17
P1.7 P3.7/RD
AT89C51
Hnh 4-10. Lp trnh ngt ngoi bt loa

ORG 0000H
LJMP MAIN
ORG 0013H ;INT1 ISR
MOV R7, #50 ; Thi gian loa ku
Speak:
SETB P1.3 ;Bt loa
MOV R3,#255
BACK: DJNZ R3,BACK ;Tr 1 cht
CLR P1.3 ;Tt loa
MOV R3,#255
BACK1: DJNZ R3,BACK1 ;Tr 1 cht

Bi ging Chng 4
DJNZ R7, Speak
RETI ;
;Chng trnh chnh:
ORG 30H
MAIN: SETB TCON.2 ;Cho ngt cnh xung
MOV IE,#10000100B ;Cho php ngt ngoi
HERE: SJMP HERE ;Chy ti ch.
;Nu c ngt th thc hin ngt, thc hin xong li v y
END
M ngun 4-10. Lp trnh ngt ngoi bt loa
4.6 S dng LED 7 thanh

Cc v d sau y m t vic s dng n LED hin th 7 thanh. tit kim
chn I/O, bn LED hin th c kt ni hot ng ch multiplex. N c
ngha l tt c cc on c cng tn c kt ni vi mt cng ra, v ch c mt mn
hnh LED hot ng ti mt thi im, ta gi l qut LED.
Cc tranzistor v LED trn mn hnh ny lun phin sng trong khong thi gian
ngn, do lm cho ta tng rng tt c cc ch s ang hin th ng thi.
4.6.1 Hin th s trn 1 LED 7 thanh

Chng trnh ny l mt loi bi tp "Khi ng" trc khi lm vic thc t. Mc
ch ca v d ny l hin th trn mn hnh bt c iu g . Ta s dng 1 LED
trong mn hnh hin th cc s t 0-9 thng qua mt n s trong chng trnh con
hin th.
Hnh 4-11. Hin th LED 7 thanh

Bi ging Chng 4
;****************************************************************
;* PROGRAM NAME : 7Seg1.ASM
;* DESCRIPTION: Program displays number "3" on 7-segment LED
display
;****************************************************************
CSEG AT 0
ORG 100H
XRESET:
MOV P1,#0 ; Tt LED
MOV P3,#20h ; Chn LED D4 hin th
LOOP:
MOV A,#03 ; Hin th s 3
LCALL Disp ; Thng qua mt n trong CTC Disp
MOV P1,A
SJMP LOOP
Disp: ;CTC hin th s
INC A
MOVC A,@A+PC
RET
DB 3FH ; Mt n s 0
DB 06H ; Mt n s 1
DB 5BH ; Mt n s 2
DB 4FH ; Mt n s 3
DB 66H ; Mt n s 4
DB 6DH ; Mt n s 5
DB 7DH ; Mt n s 6
DB 07H ; Mt n s 7
DB 7FH ; Mt n s 8
DB 6FH ; Mt n s 9
END ; Kt thc chng trnh
M ngun 4-11. Hin th LED 7 thanh -1
4.6.2 Hin th trn nhiu LED 7 thanh
Led 7 thanh c ng dng kh ph bin khi cn hin th s t nhin hoc vi ch ci nht nh.
Led 7 thanh c th c kch thc ln nh khc nhau, mu sc khc nhau nhng v hnh dng c
bn nh hnh di y
Led 7 thanh bao gm nhiu led tch hp bn trong, cc led c ni chung nhau 1 chn. Trong
thc t c 2 loi led 7 thanh l led 7 thanh A-nt chung v led 7 thanh Ka-tt chung. Led loi A-nt
chung, cc led s c chung nhau chn ngun (chn dng), chn cn li ca led no c ni t
th led s sng. Led loi Ka-tt chung, cc led s ni chung nhau chn t (chn m), chn cn
li ca led no c ni ngun th led s sng.

Bi ging Chng 4
Hnh 4-12.S chn LED 7 thanh
V d:
org 0h
start:
mov P0,#11111100b; Cp 0V cho thanh led a v b
clr P2.0 ; Cp 5V cho led 7 thanh
call delay ; Gi hm tr
mov P0,#11011011b; Cp 0V cho thanh led c,f

clr P2.0 ; Cp 5V cho led
mov P0,#10110000b; Cp 0V to a,b,c,d,g

clr P2.0 ; Cp 5V cho led
sjmp start ; Tr v u chng trnh

Bi ging Chng 4
;=============================================
;subroutine delay created to rise delay time
;=============================================
delay: mov R1,#255
del1: mov R2,#255
del2: djnz R2,del2
djnz R1,del1
ret
end
M ngun 4-12. Hin th LED 7 thanh - 2
V d iu khin nhiu LED 7 thanh:
org 0h
start:
mov dptr, #word ; con tr d liu vo u bng
mov R6, #8 ; s led cn hin th, 8 led
mov R1, #01111111b; khi u led 8
Again:
clr A ; xa thanh ghi acc
movc A, @A+dptr ; a s u tin bng vo acc
inc dptr ; tng v tr con tr
mov P0, A ; a m cn hin th ra P0
mov A, R1 ; th t led cn hin th
mov P2, A ; hin th led
rr A ; dch vi tr led cn hin th
mov R1, A ; lu vo thanh ghi R1
call delay ; gi hm tr
mov P0, #11111111b; xa
djnz R6, Again ; lp li 8 ln
sjmp start ; tr v v tr ban u
delay: mov R1,#255
del1: mov R2,#255
del2: djnz R2,del2
djnz R1,del1
ret
word: DB 00111111b, 01000111b, 00001000b, 00000011b
DB 01000110b, 01000000b, 01001000b, 00111111b
end
M ngun 4-13. Hin th trn nhiu LED 7 thanh

Bi ging Chng 4
4.7 Thng bo bng vn bn trn mn hnh LCD
V d ny s dng loi LCD ph bin nht hin th vn bn trong hai dng vi
16 k t mi dng. tit kim chn IO ca vi iu khin, ch c 4 chn c s
dng cho giao tip d liu. Bng cch ny, mi byte c truyn i theo hai bc:
u tin l 4 bit cao sau l 4 bit thp.
LCD cn phi c khi to ti u chng trnh (trc khi s dng cc tnh
nng ghi c LCD). Bn cnh , cc phn ca chng trnh lp i lp li trong
chng trnh to ra mt chng trnh con c bit. Tt c iu ny c v rt phc
tp, nhng ton b chng trnh v c bn thc hin mt s hot ng n gin v
hin th dng ch LCD display.
Hnh 4-13. S hin th LCD thc

U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
LCD1 P0.2/AD2
18 36
LM016L XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
21
P2.0/A8
22
P2.1/A9
23
P2.2/A10
VDD
VSS
VEE
29 24
RW
RS
D0
D1
D2
D3
D4
D5
D6
D7
PSEN P2.3/A11
E
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD
AT89C51
Hnh 4-14. S hin th LCD m phng

Bi ging Chng 4
;****************************************************************
;* PROGRAM NAME : Lcd.ASM
;* DESCRIPRTION : Program for testing LCD display. 4-bit
communication
;* is used. Program does not check BUSY flag but uses program delay
;* between 2 commands. PORT1 is used for connection
;* to the microcontroller.
;***************************************************************
Start_address EQU 0000h

CSEG AT 0
ORG Start_address
JMP Inic
LCD_Disp MACRO TS
MOV A,#TS ; Display character ' '.
CALL LCD_putc
ENDM
ORG Start_address+100h
MOV IE,#00 ; All interrupts are disabled
Inic: CALL LCD_inic ; Initialize LCD
;*************************************************
;* MAIN PROGRAM
;*************************************************
START: MOV A,#80h ; Hin th ti dng 1 ct 1
CALL LCD_status
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp 'L'
LCD_Disp 'C'
LCD_Disp 'D'
MOV A,#0c0h ; Hin th ti dng 2 ct 1
CALL LCD_status
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp 'D'
LCD_Disp 'i'
LCD_Disp 's'
LCD_Disp 'p'
LCD_Disp 'l'
LCD_Disp 'a'
LCD_Disp 'y'

Bi ging Chng 4
MOV R0,#20d ; Ch mt t(20x10ms)

CALL Delay_10ms
MOV DPTR,#LCD_DB ; Xa mn hnh
MOV A,#6d
CALL LCD_inic_status
MOV R0,#10d ; Ch mt t 10x10ms)
CALL Delay_10ms
JMP START
;*********************************************
;* Chng trnh con to tr (T= r0 x 10ms)
;*********************************************
Delay_10ms: MOV R5,00h ;T.gian tr ~ 1+(1+(1+2*r7+2)*r6+2)*r5
MOV R6,#100d ; (nu r7>10)
MOV R7,#100d ; 2*r5*r6*r7
DJNZ R7,$
DJNZ R6,$-4
DJNZ R5,$-6
RET
;****************************************************************
; Chng trnh con khi to:
;****************************************************************
LCD_enable BIT P1.3 ; Bit for activating pin E on LCD.

LCD_read_write BIT P1.1 ; Bit for activating pin RW on LCD.
LCD_reg_select BIT P1.2 ; Bit for activating pin RS on LCD.
LCD_port SET P1 ; Port for connection to LCD.
Busy BIT P1.7 ; Port pin on which Busy flag appears.
LCD_Start_I_red EQU 00h ; Address of the first message

character
; in the first line of LCD display.
LCD_Start_II_red EQU 40h ; Address of the first message
character
; in the second line of LCD display.
LCD_DB: DB 00111100b ; 0 -8b, 2/1 lines, 5x10/5x7

format
DB 00101100b ; 1 -4b, 2/1 lines, 5x10/5x7 format
DB 00011000b ; 2 -Display/cursor shift,
right/left
DB 00001100b ; 3 -Display ON, cursor OFF,
;cursor blink off
DB 00000110b ; 4 -Increment mode, display shift
off
DB 00000010b ; 5 -Display/cursor home
DB 00000001b ; 6 -Clear display

Bi ging Chng 4
DB 00001000b ; 7 -Display OFF, cursor OFF,
; cursor blink off
LCD_inic:
MOV DPTR,#LCD_DB
MOV A,#00d ; Triple initialization in 8-bit
CALL LCD_inic_status_8 ; mode is performed at the beginning
MOV A,#00d ; (in case of slow increment of
CALL LCD_inic_status_8; the power supply is on
MOV A,#00d
lcall LCD_inic_status_8
MOV A,#1d ; Change from 8-bit into

CALL LCD_inic_status_8 ; 4-bit mode
MOV A,#1d
MOV A,#3d ; As from this point the program executes in
;4-bit mode
MOV A,#6d
MOV A,#4d
RET
;******************************************
LCD_inic_status_8:
PUSH B
MOVC A,@A+DPTR
CLR LCD_reg_select ; RS=0 - Write command
CLR LCD_read_write ; R/W=0 - Write data on LCD
MOVB,LCD_port ; Lower 4 bits from LCD port are memorized

ORLB,#11110000b
ORLA,#00001111b
ANLA,B
MOVLCD_port,A ; Data is moved from A to LCD port
SETB
LCD_enable ; high-to-low transition signal
; is generated on the LCD's EN pin
CLR LCD_enable
MOV B,#255d ; Time delay in case of improper reset
DJNZ B,$ ; during initialization
DJNZ B,$
DJNZ B,$
POP B
RET
;*********************************************************
LCD_inic_status:
MOVC A,@A+DPTR

Bi ging Chng 4
CALL LCD_status
RET
;***********************************************************
;* SUBROUTINE: LCD_status
;* DESCRIPTION: Subroutine for defining LCD status.
;*******************************************************
LCD_status: PUSH B
MOV B,#255d
DJNZ B,$
DJNZ B,$
DJNZ B,$
CLR LCD_reg_select ; RS=O: Command is sent to LCD
CALL LCD_port_out
SWAP A ; Nibles are swapped in accumulator
DJNZ B,$
DJNZ B,$
DJNZ B,$
CLR LCD_reg_select ; RS=0: Command is sent to LCD
CALL LCD_port_out
POP B
RET
;************************************************************
;* SUBROUTINE: LCD_putc
;* DESCRIPTION: Sending character to be displayed on LCD.
;********************************************************
LCD_putc: PUSH B
MOV B,#255d
DJNZ B,$
SETB LCD_reg_select ; RS=1: Character is sent to LCD
CALL LCD_port_out
SWAP A ; Nibles are swapped in accumulator
DJNZ B,$
SETB LCD_reg_select ; RS=1: Character is sent to LCD
CALL LCD_port_out
POP B
RET
;****************************************************
;* SUBROUTINE: LCD_port_out
;* DESCRIPTION: Sending commands or characters on LCD display
;***************************************************
LCD_port_out: PUSH ACC
PUSH B
MOV B,LCD_port
ORL B,#11110000b
ORL A,#00001111b
ANL A,B
MOV LCD_port,A ; Data is copied from A to LCD port
SETB LCD_enable ; high-to-low transition signal

Bi ging Chng 4
; is generated on the LCD's EN pin
CLR LCD_enable
POP B
POP ACC
RET
M ngun 4-14. Hin th LCD
4.8 Nhn d liu qua UART

Truyn thng gia VK vi my tnh, cn c b chun ha d liu. Tn hiu in
p t PC ti cng COM l t 12v n 3v, trong khi , VK c chun TTL
0v/5v. Trong thc t, b chun ha thng dng MAX232 nh Hnh 4-15. Ghp
ni VK vi my tnh.
V d ny cho thy lm th no nhn c thng ip gi t PC. Timer T1 to
tc baud. Thch anh 11,0592 MHz to tc baud l 9600 bps khng c li.
Mi d liu nhn c ngay lp tc c chuyn ra P1.
Hnh 4-15. Ghp ni VK vi my tnh

Bi ging Chng 4
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18 36
XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
21
P2.0/A8
22
P2.1/A9
23
P2.2/A10
29 24
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD RXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1 TXD
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1 RTS
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD CTS
AT89C51
CLOCK=11.0592MHz
Hnh 4-16. Nhn d liu ni tip m phng

;*************************************************************
;* PROGRAM NAME : UartR.ASM
;* DESCRIPTION:Nhn d liu t UART, truyn thng xung P1
;*******************************************************
CSEG AT 0
ORG 023H ; Vector ngt ni tip
JMP IR_SER
ORG 100H
XRESET: MOV IE,#00 ; All interrupts are disabled
MOV TMOD,#20H ; Timer1 in mode2
MOV TH1,#0FDH ; 9600 baud rate at the frequency of
; 11.0592MHz
MOV SCON,#50H ; Receiving enabled, 8-bit UART
MOV IE,#10010000B ; UART interrupt enabled
CLR TI ; Clear transmit flag
CLR RI ; Clear receive flag
SETB TR1 ; Start Timer1
LOOP: SJMP LOOP ; Remain here
IR_SER: JNB RI,OUTPUT ; If any data is received,

; move it to the port
MOV A,SBUF ; P1
MOV P1,A
OUTPUT: RETI

M ngun 4-15. Nhn d liu ni tip
4.9 Truyn d liu qua UART

Chng trnh ny m t cch s dng UART truyn d liu. Mt dy s (0-255) c
truyn n my PC tc truyn 9600 baud. MAX 232 c s dng nh l mt b iu
p.

Bi ging Chng 4
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18 36
XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
21
P2.0/A8
22
P2.1/A9
23
P2.2/A10
29 24
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD RXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1 TXD
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1 RTS
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD CTS
AT89C51
CLOCK=11.0592MHz
Hnh 4-17. Truyn d liu ni tip m phng

;***************************************************************
;* PROGRAM NAME : UartS.ASM
;* DESCRIPTION: Sends values 65-127 to PC.
;***************************************************************
CSEG AT 0
ORG 100H
XRESET: MOV IE,#00 ; All interrupts are disabled
MOV TMOD,#20H ; Timer1 in mode 2
MOV TH1,#0FDH ; 9600 baud rate at the frequency of
MOV TL1,#0FDH ; 11.0592MHz
MOV SCON,#40H ; 8-bit UART
CLR TI ; Clear transmit bit
MOV R3,#'A' ; Reset counter from A (65)
SETB TR1 ; Start Timer 1
START: MOV SBUF,R3 ; Move number from counter to a PC
LOOP1: JNB TI,LOOP1 ; Wait here until byte transmission is
; complete
CLR TI ; Clear transmit bit
INC R3 ; Increment the counter value by 1
CJNE R3,#127,START ; Send until R3=127
LOOP: SJMP LOOP ; Remain here

M ngun 4-16. Truyn d liu ni tip

Bi ging Chng 4
4.10 Chng trnh con phc v truyn thng ni tip
Serial_Init: ;Khi to:
;Set timer 1 mode to 8-bit Auto-Reload
mov TMOD,#20H
;Enable reception
;Set Serial port mode to 8-bit UART
mov SCON,#50H
;Set baudrate to 9600 at 11.0592MHz
mov TH1,#0FDH
mov TL1,#0FDH
;Start Timer
setb TR1
ret
Serial_Send: ; truyn ni dung thanh ghi A ra UART
;wait for last data to be
;sent completely
jnb TI,Serial_Send
;clear the transmit interrupt flag
clr TI
;Then move the data to send in SBUF
mov SBUF,A
ret
Serial_Read: ; nhn t UART v thanh ghi A

;Wait for Receive interrupt flag
jnb RI,Serial_Read
;If falg is set then clear it
clr RI
;Then read data from SBUF
mov A,SBUF
ret
M ngun 4-17. Cc CTC Truyn-Nhn d liu ni tip
4.11 Truyn thng UART cho 8051 bng phn mm

thc hin thnh cng UART u tin chng ta cn phi bit giao thc truyn
thng UART.
S trn cho thy dng sng ca mt frame truyn. u tin l bit bt u

START, sau 8-bit d liu v mt bit STOP cui. C mt cng thc b mt
tnh ton thi gian tr hon l c baudrate chnh xc gia cc bit.

Bi ging Chng 4
Di y l mt phn mm trin khai UART, trong c th c s dng
chng trnh C cng nh ASM. N c vit cho phn mm Keil. Nhng vi mt
vi thay i nh bn c th dng n trong chng trnh ca bn.
?SU?PUTC SEGMENT CODE

?SU?GETC SEGMENT CODE
PUBLIC _putc
PUBLIC getc
txd_pin EQU P3.1 ;Transmit on this pin

rxd_pin EQU P3.0 ;Receive on this pin
;Formula to calculate the bit time delay constant

;This constant is calculated as: (((crystal/baud)/12) - 5) / 2
;crystal is the frequency of crystal in Hz
;baud is required baudrate
;Please try to keep baudrate below 9600
;to get best results :)
BITTIM EQU 45; (((11059200/9600)/12) - 5) / 2
;--------------------------------------------
;To send data serially
;For C programs
;Protype definition:
; void putc(unsigned char);
;Usage:
; putc(data);
;Return:
; This function returns nothing
;
;For Assembly Programs:
;
;Usage:
; data to be send has to be moved to R7
; for example:
; mov R7,#'a'
; lcall _putc
;--------------------------------------------
RSEG ?SU?PUTC
_putc:
push ACC
Push PSW
mov a,r7
CLR txd_pin ;Drop line for start bit
MOV R0,#BITTIM ;Wait full bit-time

Bi ging Chng 4
DJNZ R0,$ ;For START bit
MOV R1,#8 ;Send 8 bits
putc1:
RRC A ;Move next bit into carry
MOV txd_pin,C ;Write next bit
DJNZ R0,$ ;For DATA bit
DJNZ R1,putc1 ;write 8 bits
SETB txd_pin ;Set line high
RRC A ;Restore ACC contents
DJNZ R0,$ ;For STOP bit
POP PSW
pop ACC
RET
;--------------------------------------------
;To receive data Serially
;If you want to use this routine in your
;C program then define function prototype
; as:
; unsigned char getc(void);
;
; Usage:
; data = getc();
; Return value:
; Returns data received
;If you are using it in assembly program
; Usage:
; lcall getc
; Return:
; data received is stored in R7
;--------------------------------------------
RSEG ?SU?GETC
getc:
Push ACC
Push PSW
JB rxd_pin,$ ;Wait for start bit
MOV R0,#BITTIM/2 ;Wait 1/2 bit-time
DJNZ R0,$ ;To sample in middle
JB rxd_pin,getc ;Insure valid
MOV R1,#8 ;Read 8 bits
getc1:
DJNZ R0,$ ;For DATA bit
MOV C,rxd_pin ;Read bit
RRC A ;Shift it into ACC

Bi ging Chng 4
DJNZ R1,getc1 ;read 8 bits
mov r7,a
POP PSW
pop ACC
RET ;go home
M ngun 4-18. CTC truyn thng ni tip bng phn mm
4.12 Ghp ni 8051 vi ADC0804, chuyn i ADC 8-bit

Chuyn i ADC l chuyn i t tng t sang s, chng ta c u vo l in p tng t
c di t 0v..5v, u ra sau khi chuyn i l s: 0..255, tng ng, t l vi u vo.
Trc khi xy dng mch v lp trnh, ta cn nghin cu i cht v IC ADC0804
U3
1 20
CS VCC
2 18
RD DB0(LSB)
3 17
WR DB1
4 16
CLK IN DB2
5 15
INTR DB3
8 14
A GND DB4
10 13
D GND DB5
9 12
VREF/2 DB6
19 11
CLK R DB7(MSB)
6
VIN+
7
VIN-
ADC0804
Hnh 4-18. S chn ADC0804
Hnh 4-19. Gin thi gian c ADC

C theo nh gin thi gian ta lm, vy th s ghp ni ch cn 3 tn hiu iu khin v
mt cng c ADC. Ta c mch nguyn l nh sau:

Bi ging Chng 4
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18
XTAL2 P0.3/AD3
P0.4/AD4
36
35 Ai (0..5v) <=> LED: 00..FF
34
L7
L6
L5
L4
L3
L2
L1
L0
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7 C1
21 U2
P2.0/A8 DB0
22 1 20
P2.1/A9 DB1 CS VCC
23 1nF 2 18
P2.2/A10 DB2 ADC_RD RD DB0(LSB) DB0
29 24 3 17
PSEN P2.3/A11 DB3 ADC_WR WR DB1 DB1
30 25 4 16
ALE P2.4/A12 DB4 CLK IN DB2 DB2
31 26 5 15
EA P2.5/A13 DB5 intr INTR DB3 DB3
27 R1+2V5 8 14
P2.6/A14 DB6 A GND DB4 DB4
28 10k 10 13
P2.7/A15 DB7 D GND DB5 DB5
9 12
VREF/2 DB6 DB6
1 10 19 11
ADC_RD P1.0 P3.0/RXD L0 CLK R DB7(MSB) DB7
2 11
ADC_WR P1.1 P3.1/TXD L1 RV1
3 12 6
21%
CS P1.2 P3.2/INT0 L2 VIN+
4 13 5k 7
intr P1.3 P3.3/INT1 L3 VIN-
5 14
P1.4 P3.4/T0 L4
6 15 ADC0804
P1.5 P3.5/T1 L5
7 16
P1.6 P3.6/WR L6
8 17
P1.7 P3.7/RD L7
AT89C51
CLOCK=12MHz
Hnh 4-20. Mch nguyn l m phng chuyn i ADC0804
ORG 0h
JMP MAIN
ADC_RD EQU P1.0
ADC_WR EQU P1.1
INTR EQU P1.3
ADC_DAT EQU P2
LED7 EQU P3
;Khai bo chng trnh con DelayX y
; tham kho M ngun 4-2. DelayX
ORG 30H
MAIN:
ACALL TACT_LayMau
mov LED7,A
SJMP MAIN
TACT_LayMau:
CLR ADC_WR ; Tao xung tu cao xuong thap
;tai chan ADC_WR(Tuc W/R cua ADC)
DelayX 1
SETB ADC_WR ; Cho phep ADC0804 bat dau qua trinh
; chuyen doi tu tuong tu sang so
JB INTR, $ ; Doi cho qua trinh chuyen doi xong(100us)
CLR ADC_RD ; Dua xung muc thap toi chan RD
; cho phep doc du lieu tu ADC(Xuat ra D0..D7)
DelayX 1
MOV A,ADC_DAT ; Dua du lieu 8bit tu ADC_DAT den thanh ghi A
setb ADC_RD
RET
END
M ngun 4-19. Chuyn i ADC (VK-ADC0804)

Bi ging Chng 4
4.13 Ghp ni vi iu khin vi bn phm
U1
19 39
XTAL1 P0.0/AD0
38
P0.1/AD1
37
P0.2/AD2
18 36
XTAL2 P0.3/AD3 DB0
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
9 32
RST P0.7/AD7
DB1
21
P2.0/A8 DB0
22
P2.1/A9 DB1
23
P2.2/A10 DB2
29 24
PSEN P2.3/A11 DB3
30 25
ALE P2.4/A12 DB4 DB2
31 26
EA P2.5/A13 DB5
27
P2.6/A14 DB6
28
P2.7/A15 DB7
1 10
P1.0 P3.0/RXD DB3
2 11
P1.1 P3.1/TXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
DB4
DB5
DB6
DB7
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD
AT89C51
CLOCK=12MHz
Hnh 4-21.Cch ghp ni bn phm trong m phng- phm n ghp li

MKP1
KEYPAD-4X4ABCD
U1
19 39
XTAL1 P0.0/AD0
38
1 2 3 4
P0.1/AD1
37
18
XTAL2
P0.2/AD2
P0.3/AD3
36
35
A 1 2 3 A A
P0.4/AD4
34
P0.5/AD5
33
9
RST
P0.6/AD6
P0.7/AD7
32 B 6 5 4 B B
21
P2.0/A8 DB0
22
29
P2.1/A9
P2.2/A10
23
24
DB1
DB2
C 7 8 9 C C
PSEN P2.3/A11 DB3
30 25
ALE P2.4/A12 DB4
31 26
EA P2.5/A13
P2.6/A14
27
28
DB5
DB6
D 0 # D D
P2.7/A15 DB7
1 2 3 4
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
C
D
A
B
4
3
2
1
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
8 17
P1.7 P3.7/RD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
AT89C51
CLOCK=12MHz
Hnh 4-22.Cch ghp ni bn phm trong m phng dng module bn phm

Thut ton c phm bm:
- Khi to: Cho Cng P2=0xFF
- Ln lt cho hng = 0.
- Vi mi hng, ln lt kim tra ct, nu ct no = 0 phm tng ng vi hng v
ct c bm.
- Vi mi phm c bm, lu li kt qu ( lm g sau , nu cn)

Bi ging Chng 4
ORG 0
JMP MAIN
KQ EQU 0
COL1 EQU P2.3
COL2 EQU P2.2
COL3 EQU P2.1
COL4 EQU P2.0
ROW_A EQU P2.4
ROW_B EQU P2.5
ROW_C EQU P2.6
ROW_D EQU P2.7
MAIN:
MOV P2,#0FFh
CLR ROW_A
ADB0:JB COL1, ADB1
MOV KQ,#1 // Phim 1 bam
ADB1:JB COL2, ADB2
ADB2:JB COL3, ADB3
MOV KQ,#3 //Phim 3 bam
ADB3:JB COL4, AFINISH
MOV KQ,#'A' //Phim A bam
AFINISH:
SETB ROW_A
CLR ROW_B
BDB0:JB COL1, BDB1
BDB1:JB COL2, BDB2
BDB2:JB COL3, BDB3
BDB3:JB COL4, BFINISH
MOV KQ,#'B' //Phim 4 bam
BFINISH:
SETB ROW_B
CLR ROW_C
CDB0:JB COL1, CDB1
CDB1:JB COL2, CDB2
CDB2:JB COL3, CDB3
CDB3:JB COL4, CFINISH
MOV KQ,#'C' //Phim C bam
CFINISH:
SETB ROW_C

Bi ging Chng 4
CLR ROW_D
DDB0:JB COL1, DDB1
MOV KQ,#'*' // Phim * bam
DDB1:JB COL2, DDB2
DDB2:JB COL3, DDB3
MOV KQ,#'#' //Phim # bam
DDB3:JB COL4, DFINISH
MOV KQ,#'D' //Phim D bam
DFINISH:
SETB ROW_D
MOV P3,KQ // x l kt qu
JMP MAIN
END
M ngun 4-20. c ma trn phm
4.14 Ghp ni vi iu khin vi step motor

Bi ton thc hin vic iu khin ng c bc quay, thay i tc , o chiu,
dng ng c. Chng trnh s dng 4 u to xung vo ng c lm thay i
trng thi ca ng c bc.
Thng cc cun dy ca ng c bc c xc nh theo mu dy, tuy nhin i vi mt
ng c bt k, ta c th dng ng h xc nh dy nh hnh v, y trnh by cch
xc nh ng c c 5, 6 u dy.
Hnh 4-23. Cu to ng c bc
1. dng ng h xc nh u chung (common) dng ng h thang o tr, o tr

gia cc cp dy, u chung l u c tr gia n v cc u khc bng in tr cc
u khc vi nhau.
Khi bit c th t cc cun dy, ta kch xung theo th t ng c s chy.

Bi ging Chng 4
V d mt on chng trnh sau, gi s 4 u ca ng c bc u vo 4 bit:
P1.0 P1.3 ca 8051.
ORG 0H
MOV R3, #00000011B
MOV A, R3
BACK: MOV P1,A
RL A ;Quay thanh ghi A
ACALL DELAY
SJMP BACK
DELAY:
MOV R1, #50
H1: MOV R2 , #255
H2: DJNZ R2, H2
DJNZ R1, H1
RET
END
M ngun 4-21. iu khin ng c bc

Bi ging Chng 4
V d m rng 1:
Chng trnh o nhit dng LM35DZ, ADC0804, v thit lp ; nhit cnh bo bng bn phm
my tnh:
LCD_DATA EQU P2 CLR ADC_WR ;Tao canh len
LCD_RS BIT P0.0 SETB ADC_WR
LCD_RW BIT P0.1 JNB ADC_INTR,$ ;Cho chuyen doi xong
LCD_E BIT P0.2 CLR ADC_RD ;Cho phep doc ADC
ADC_DATA EQU P1 MOV A,ADC_DATA ;Doc du lieu tu ADC
ADC_RD BIT P0.4 MOV 30H,A ;Luu vo 30H
ADC_WR BIT P0.5 RET
ADC_INTR BIT P0.6 ;_______________________________________
KB_CLK BIT P3.2 ;CTC chuyen ma doc duoc tu ADC chua ;
KB_DATA BIT P0.3 ;trong 30H thanh nhiet do chua trong ;
WARN BIT P0.7 ;31H(chuc), 32H(Don vi), 33H(phan tram) ;ma
ASCII ;
ORG 0000H ;---------------------------------------
LJMP MAIN CONVERT:
ORG 0003H MOV A,30H ;Lay ma doc duoc tu ADC
LJMP EX0_ISR MOV B,#4 ;Do phan giai la 0,4oC
MUL AB
ORG 0030H MOV R7,B ;Nhiet do dat trong R7-R6
MAIN: MOV R6,A
LCALL CONFIG MOV B,#10
;Thiet lap cac thong so ban dau LCALL DIV16_8
MAIN1: LCALL READ_ADC ;Doc ADC MOV A,B
LCALL CONVERT ;Chuyen doi ADD A,#30H
LCALL COMPARE ;So sanh va hien thi MOV 33H,A ;Thap phan
LCALL DELAY_500MS ;Cho 0,1s MOV B,#10
LJMP MAIN1 LCALL DIV16_8
;_______________________________________ MOV A,B
CONFIG: ;CTC thiet lap cac thong so ADD A,#30H
MOV A,#38H ;K.D LCD MOV 32H,A ;Don vi
LCALL WRCMD MOV B,#10
MOV A,#0CH ;Display ON, Cursor OFF LCALL DIV16_8
LCALL WRCMD MOV A,B
MOV A,#06H ;LCD tu dong dich phai ADD A,#30H
LCALL WRCMD MOV 31H,A ;Chuc
MOV A,#01H ;Ghi loi chao RET
LCALL WRCMD ;_______________________________________
MOV DPTR,#CHAO1 ;CTC chia 1 so 16-bit cho 1 so 8-bit ;
LCALL OUT_STRING_LINE1 ;So bi chia: R7-R6 ;
MOV DPTR,#CHAO2 ;So chia: B ;
LCALL OUT_STRING_LINE2 ;Thuong so: R7-R6 ;
LCALL DELAY_2S ;So du B ;
MOV DPTR,#CHAO3 ;---------------------------------------;
LCALL OUT_STRING_LINE1 DIV16_8:
MOV DPTR,#CHAO4 CLR A
LCALL OUT_STRING_LINE2 MOV R2,#16
LCALL DELAY_2S DIV1: CLR C
SETB WARN ;Tat den canh bao LCALL RLC_R7R6
CLR F0 ;F0=0: chuc, =1: dvi ;Xoay trai R7_R6 qua co C
MOV 41H,#'4' RLC A
;Dat nhiet do canh bao ban dau CJNE A,B,NOT_EQ
MOV 42H,#'0' LJMP LOW1
MOV IE,#81H ;Cho phep ngat ngoai 0 NOT_EQ: JNC LOW1
RET SJMP GIAM
;_______________________________________
;CTC doc ADC ; LOW1: SUBB A,B
;Du lieu doc duoc chua trong 30H ; XCH A,R6
;---------------------------------------; ORL A,#01H
READ_ADC: XCH A,R6
MOV ADC_DATA,#0FFH ;De doc ADC chinh xac GIAM: DJNZ R2,DIV1
SETB ADC_INTR ;nhan t.hieu canh xuong MOV B,A ;So du chua trong B

Bi ging Chng 4
RET LCALL WRTXT
;_______________________________________ MOV A,33H
RLC_R7R6: LCALL WRTXT
;CTC xoay trai so 16 bit R7_R6 qua co C MOV A,#'o'
PUSH ACC LCALL WRTXT
MOV A,R6 MOV A,#'C'
RLC A LCALL WRTXT
MOV R6,A RET
MOV A,R7 DP_WARN_TEMP:
RLC A MOV A,41H
MOV R7,A LCALL WRTXT
POP ACC MOV A,42H
RET LCALL WRTXT
MOV A,#'o'
LCALL WRTXT
MOV A,#'C'
;_______________________________________ LCALL WRTXT
;CTC so sanh nhiet do hien thi v ; RET
;nhiet do dat ; ;_______________________________________
;Neu lon hon hoac bang nhiet do dat ; ;CTC xuat mot chuoi ra LCD ;
;thi canh bao ; ;Con tro DPTR chi toi chuoi can xuat ;
;---------------------------------------; ;---------------------------------------;
COMPARE: OUT_STRING:
MOV A,#01H MOV R4,#0
LCALL WRCMD OUTST1: MOV A,R4
MOV A,31H MOVC A,@A+DPTR
CJNE A,41H,KHAC LCALL WRTXT
MOV A,32H INC R4
CJNE A,42H,KHAC CJNE R4,#16,OUTST1
LJMP CANHBAO ;Neu bang nhau thi canh bao RET
KHAC: OUT_STRING_LINE1:
JNC CANHBAO ;Neu lon hon thi canh bao MOV A,#80H
LJMP HIENTHI LCALL WRCMD
CANHBAO: LCALL OUT_STRING
CLR WARN ;Bat den canh bao RET
MOV DPTR,#ST3 OUT_STRING_LINE2:
LCALL OUT_STRING_LINE1 MOV A,#0C0H
MOV A,#0C1H LCALL WRCMD
LCALL WRCMD LCALL OUT_STRING
LCALL DISPLAY_TEMP RET
MOV A,#' ' WRCMD: ;CTC ghi lenh ra LCD
LCALL WRTXT CLR LCD_RW
MOV A,#'>' SETB LCD_E
LCALL WRTXT CLR LCD_RS
MOV A,#' ' MOV LCD_DATA,A
LCALL WRTXT NOP
LCALL DP_WARN_TEMP CLR LCD_E
LJMP THOAT LCALL READY
HIENTHI: RET
SETB WARN ;Tat den canh bao WRTXT: ;CTC ghi ki tu ra LCD
MOV DPTR,#ST1 CLR LCD_RW
LCALL OUT_STRING_LINE1 SETB LCD_E
MOV A,#08AH SETB LCD_RS
LCALL WRCMD MOV LCD_DATA,A
LCALL DISPLAY_TEMP NOP
MOV DPTR,#ST2 CLR LCD_E
LCALL OUT_STRING_LINE2 LCALL READY
MOV A,#0C8H RET
LCALL WRCMD READY: ;CTC cho LCD
LCALL DP_WARN_TEMP PUSH ACC
THOAT: RET OK: CLR LCD_E
DISPLAY_TEMP: ;CTC hien thi nhiet do CLR LCD_RS
MOV A,31H SETB LCD_RW
LCALL WRTXT MOV LCD_DATA,#0FFH
MOV A,32H SETB LCD_E
LCALL WRTXT MOV A,LCD_DATA
MOV A,#',' JB ACC.7,OK

Bi ging Chng 4
CLR LCD_RW DJNZ R6,DELAY4
POP ACC DJNZ R7,DELAY3
RET RET
DELAY_500MS: ;CTC delay 0,5s ;_______________________________________
MOV R7,#250 ;CTC ngat ngoai 0 ;
DELAY1: MOV R6,#200 ;Doc tu ban phim P/S2 ;
DELAY2: MOV R5,#5 ;Va h.thi ra LCD ;
DJNZ R5,$ ;---------------------------------------;
DJNZ R6,DELAY2 EX0_ISR:
DJNZ R7,DELAY1 CLR EX0
RET PUSH ACC
DELAY_2S: ;CTC delay 2s MOV A,#00H
MOV R7,#250 MOV R3,#8
DELAY3: MOV R6,#200
DELAY4: MOV R5,#20 JNB KB_CLK,$ ;Bo qua bit Start
DJNZ R5,$
LOOP: JB KB_CLK,$ ;Lay 8 bit Data DVI: MOV 42H,A
MOV C,KB_DATA CLR F0
RRC A LJMP EXIT
JNB KB_CLK,$ LOOP2: INC R4
DJNZ R3,LOOP CJNE R4,#20,LOOP1 ; 20 lan?
EXIT: CLR C
MOV R3,#24 POP ACC
SKIP: JB KB_CLK,$ SETB EX0 ;Bat co ngat
JNB KB_CLK,$ RETI
DJNZ R3,SKIP CHAO1: DB ' Duc, Q.Toan '
CHAO2: DB 'H.Thuong, Nguyen'
MOV 40H,A CHAO3: DB 'CT do n.do so V1'
MOV R4,#0 CHAO4: DB ' Xin chao! '
LOOP1: MOV DPTR,#SCAN MOV A,R4 ST1: DB 'Nhiet do: '
MOVC A,@A+DPTR ST2: DB 'C.bao: '
CJNE A,40H,LOOP2 ST3: DB ' Canh bao! '
MOV DPTR,#ASCII SCAN: DB
MOV A,R4 45H,16H,1EH,26H,25H,2EH,36H,3DH,3EH,46H,70
MOVC A,@A+DPTR H,69H,72H,7AH,6BH,73H,74H,6CH,75H,7DH
JB F0,DVI ;Neu F0=1 ghi hang d.vi ASCII: DB '01234567890123456789'
CHUC:
MOV 41H,A ;neu F0=0 nho hang chuc END
SETB F0
LJMP EXIT
M ngun 4-22. Chng trnh o nhit

Bi ging Chng 4
V d m rng 2:
Thit k h thng hin th v cnh bo p sut nc trong bnh nn, vi 03 mc
thp, trung bnh v cao (ngng do ngi dng t t)
Bit cm bin p sut c tn hiu ra trong khong 0..100mV tng ng vi p sut
t 0..3000 atmosphe.
Yu cu thit k theo cc bc sau:
Thit k s khi tng th ton h thng
c t mi khi:
o Chc nng, nhim v ca khi
o S lng v chun tn hiu in p vo/ra
Thit k s tng tc (thut ton nhng) ton h thng
Thit k s nguyn l
c t s nguyn l
o Chc nng, nhim v ca (nhm) linh kin
o Chun giao tip (chun truyn thng (nu c chun), lc bnh thng/lc
hot ng,)
Lp trnh
o S Call graph
o S khi (ca mi chc nng trong s call graph, nu cn)
o Vit m ngun
p n:
Thit k s khi tng th ton h thng:
Khi
Khi vo Hin th
DKTT
Ngun
Hnh 4-24. S khi tng th ton b h thng

c t mi khi:
o Chc nng, nhim v, s lng v chun tn hiu in p vo/ra ca khi:
a. Khi vo: Gm cm bin p sut v cc phm bm. Cm bin c chc nng thu
nhn gi tr p sut. Phm bm dng nhp gi tr tham s t bn phm.
Cm bin p sut c u vo l p sut thuc khong 0..3000 atmosphe, u
ra l 0..100mV. Tn hiu ny s c lc nhiu, khuch i t l ln 0..5v
trc khi a vo khi iu khin trung tm.
Phm bm: gm 3 phm c u ra chun in p TTL, bnh thng l mc 1,
khi c bm s v mc 0.
Vy, khi vo, a ra 1 tn hiu Analog (0..5v), v 3 tn hiu s cho 3 nt
bm.
b. Khi hin th: Hin th trng thi ca h thng ln LCD16x2 v 3 LED n. LCD
dng lin tc hin th trng thi ca h thng nh: Gi tr p sut, gi tr ngng

Bi ging Chng 4
cnh bo mc p sut, dng hin th gi tr tham s, hin th gi tr nt bm khi

nhp tham s, 3 n LED gm LED , LED xanh, LED Trng.
LCD s dng ch 4bit, nn cn 7 ng hin th s cho LCD: RS, RW,
E, D4..D7
LED n dng bo trng thi ngng p sut, cc mu khc nhau
nhn t xa, s dng LED siu sng. Cn 03 tn hiu s trc tip t khi iu
khin trung tm.
Vy, u vo khi hin th l: 10 tn hiu s.
c. Khi iu khin trung tm (DKTT): C chc nng x l tn hiu t khi vo
a ra hin th v cnh bo khi hin th.
c tn hiu tng t t khi vo (0..5v), chuyn i ADC sang s
(0..1023) x l.
c gi tr nt bm thay i tham s (Ngng thp v Ngng cao) cnh
bo.
So snh gi tr ADC thc t v gi tr ngng quyt nh trng thi cn
cnh bo ln LED n, v hin th gi tr p sut, cc tham s ln LCD 16x2
d. Khi ngun: H thng s dng ngun 5v, v 12v cho b khuch i trong khi
u vo. Nn b ngun cn thit phi thit k l:
Vo: 220VAC
Ra: -12v, GND, +5v, +12v c n p.
D tnh ton b h thng tiu th cng sut thp. Nn b ngun s ch cn
dng in ti a 1A cho mi u ra.
Thit k s tng tc (thut ton nhng) ton h thng:

0..100mV Ai(0..5V)
LCD 16x2
Cm bin

#
D
Bn phm A, B
A B
Hi=D>B Hi LED Trng
No=(ADB)
Lo=D<B No LED Xanh
Lo LED
Hnh 4-25. S tng tc h thng cnh bo p sut

Thit k s nguyn l
c t s nguyn l
o Chc nng, nhim v ca (nhm) linh kin
o Chun giao tip (chun truyn thng (nu c chun), lc bnh thng/lc
hot ng/,)
Bi ging Chng 4
Thit k nguyn l chi tit cho tng khi theo

Hnh 4-24. S khi tng th ton b h thng:
Khi Vo: c yu cu nh sau:
Hnh 4-26. Hnh 4-27.
Khi vo s bao gm: Khi cm bin, khi lc v khuch i, khi bn phm. Chi tit c
thit k nh sau:
Vcc
3x10k
R2 K1 KB1
R5
K2 KB2
R1
R3 R4 K3 KB3
C1
Hnh 4-28. Mch

Hnh 4-29. Khuch i v lc nhiu Hnh 4-30. Bn phm
cm bin
c t khi:
Khi cm bin, u vo l p sut o ca i tng, u ra l in p, c di
t 0..100mV
Khi khuch i v lc nhiu, nhn tn hiu t khi cm bin (0..100mv)
xut ra tn hiu 0..5v tuyn tnh vi tn hiu vo. Nh vy, h s khuch i
l 5v/100mV = k = 50 ln.
T , ta tnh c nh sau: Error! Objects cannot be created from editing field
codes., ta chn linh kin: R1=R2=R3=R4=10K, R5=50K
Khuch i, dng LM324, ngun i xng 12v
Khi bn phm, c 3 phm, bnh thng th KB1..KB3 c mc 1, phm no

c bm s c mc 0.

Bi ging Chng 4
Khi hin th:
RS,RW,E
LCD16x2
D4..D7
Hi
No LED n
Lo
Hnh 4-31. Hnh 4-32.

Khi hin th c cho nh Hnh 4-31, ta trin khai su hn nh Hnh 4-33. Hin
th LCD.
Thit k chi tit cc khi nh sau:
LCD1
LM016L
D1 R1
Hi
10k
W hite LED
VDD
D2
VSS
VEE
R2
RW
RS
D0
D1
D2
D3
D4
D5
D6
D7
E
No
10k
RV2 Green LED
1
2
3
4
5
6
7
8
9
10
11
12
13
14
50%
5k
D3 R3
Lo
10k
RED-LED
RS
D4
D5
D6
D7
RW
Vcc
Hnh 4-33. Hin th LCD Hnh 4-34. Bn phm

Khi iu khin trung tm

Bi ging Chng 4
C1
22p
8MHZ U1
CRYSTAL
C2 13 33
OSC1/CLKIN RB0/INT E
14 34
OSC2/CLKOUT RB1 RS
35
RB2 RW
22p 2 36
Ai RA0/AN0 RB3/PGM
3 37
RA1/AN1 RB4 D4
4 38
RA2/AN2/VREF-/CVREF RB5 D5
5 39
RA3/AN3/VREF+ RB6/PGC D6
6 40
RA4/T0CKI/C1OUT RB7/PGD D7
7
RA5/AN4/SS/C2OUT
15
RC0/T1OSO/T1CKI Hi
8 16
RE0/AN5/RD RC1/T1OSI/CCP2 No
9 17
RE1/AN6/WR RC2/CCP1 Lo
10 18
RE2/AN7/CS RC3/SCK/SCL
R4 23
RC4/SDI/SDA
1 24
MCLR/Vpp/THV RC5/SDO
10k 25
RC6/TX/CK
26
RC7/RX/DT
19
RD0/PSP0 KB1
20
RD1/PSP1 KB2
21
RD2/PSP2 KB3
22
RD3/PSP3
27
RD4/PSP4
28
RD5/PSP5
29
RD6/PSP6
30
RD7/PSP7
PIC16F877A
Hnh 4-35. Khi iu khin trung tm
Lp trnh
o S Call graph
o S khi (ca mi chc nng trong s call graph, nu cn)
o Vit m ngun
Phn mm
nhng
ADC LCD KeyBoard SoSanh
Cm bin Hin th LCD Bn phm Hin th LED
Hnh 4-36. S Callgraph

M ngun: V d n ny rt ln, v khi thit k li chn PIC, nn ngn ng lp trnh dng
ngn ng C cho PIC l hp l nht.
#include "ADC-LCD-LED.h"
#define use_portb_lcd true
#include <LCD.C>
#define KB1 !input(PIN_D0)
#define T 50
int16 D,Hi,No,Lo,A,B;
int8 cnt;
void init_main();

Bi ging Chng 4
void KeyBoard(){
if(KB1){Mode=(++Mode)%3;delay_ms(T);}
if(Mode==1){
if(KB2){A++;delay_ms(T);}
if(KB3){A--;delay_ms(T);}
}
if(Mode==2){
if(KB2){B++;delay_ms(T);}
if(KB3){B--;delay_ms(T);}
} }
void main(){
init_main();
while(1){
D=read_adc();
lcd_gotoxy(1,1); printf(lcd_putc,"Ap
Suat=%4LU.Mode=%u\nA=%4u.B=%4u",D,Mode,A,B);
Hi_LED=No_LED=Lo_LED=0;
if(D<A)Lo_LED=1;
else if(D>B)Hi_LED=1;
else No_LED=1;
KeyBoard();
delay_ms(100);
} }
void init_main(){
setup_adc_ports(AN0);
setup_adc(ADC_CLOCK_INTERNAL);
set_adc_channel(0);
lcd_init();
}
M ngun 4-23. Lp trnh cho VK tin tin

Bi ging Chng 4

Bi ging Chng 5
Vi x l - Vi iu khin Cc h Vi iu khin tin tin
CHNG 5.
CC H VI IU KHIN TIN TIN
Mc tiu
Gip sinh vin bit v cc h vi iu khin hin i v ph bin trong thc t

sn xut; v ng dng c bn ca chng.
Tm tt:
Tm hiu v cc vi iu khin hin i h AVR, h PIC v ARM

Bi ging Chng 5
5.1 Atmel AVR
Hnh 5-1 - Atmel AVR ATmega8 PDIP

AVR l mt kin trc Harvard sa i 8-bit RISC n chip vi iu khin (C)
c pht trin bi Atmel vo nm 1996. Cc AVR l mt trong nhng h vi
iu khin u tin s dng on-chip b nh flash lu tr chng trnh, tri vi
One-Time Programmable ROM, EPROM hoc EEPROM c s dng bi vi iu
khin khc vo lc .
5.1.1 Lch s h AVR

Ngi ta tin vo kin trc AVR c bn c hnh thnh bi hai sinh vin ti
Vin Cng ngh Na Uy (th n) Alf-Egil Bogen v Vegard Wollan.
Cc AVR MCU bn gc c pht trin ti mt ngi nh ASIC thuc a
phng Trondheim, Na Uy, ni m hai thnh vin sng lp ca Atmel Na Uy
lm vic nh sinh vin. N c bit n nh mt RISC (Micro RISC). Khi cng
ngh c bn cho Atmel, kin trc ni b c pht trin thm bi Alf v
Vegard ti Atmel Na Uy, mt cng ty con ca Atmel thnh lp bi hai kin trc s.
Atmel AVR ni rng cc tn khng phi l mt t vit tt v khng phi l bt
c iu g c bit. Nhng ngi sng to AVR khng c cu tr li dt khot v
thut ng vit tt "AVR".
Lu rng vic s dng "AVR" trong bi vit ny thng cp n 8-bit
RISC dng vi iu khin Atmel AVR.
Trong s nhng thnh vin u tin ca dng AVR l AT90S8515, ng v
trong gi 40-pin DIP c chn ra ging nh mt vi iu khin 8051, bao gm a ch
BUS multiplexed bn ngoi v d liu. Tn hiu RESET i ngc, 8051
RESET mc cao, AVR RESET mc thp), nhng khc vi , chn ra l ging ht
nhau.
5.1.2 Tng quan v thit b

AVR l mt kin trc my Modified Harvard vi chng trnh v d liu c
lu tr trong cc h thng b nh vt l ring bit xut hin trong khng gian a
ch khc nhau, nhng c kh nng c ghi d liu t b nh bng cch s dng lnh
c bit.
C bn v h AVR
AVRs thng phn thnh bn nhm rng:
Bi ging Chng 5
TinyAVR - chui Attiny

o 0,5-8 kBb nh chng trnh
o ng v 6-32-chn
o Tp ngoi vi hu hn
MegaAVR - chui Atmega
o 4-256 kB b nh chng trnh
o ng v 28-100-chn
o Tp lnh m rng (Lnh nhn v lnh cho qun l b nh ln hn).
o M rng hn v thit b ngoi vi
XMEGA - chui Atxmega
o 16-384 kB b nh chng trnh.
o ng v 44-64-100-chn (A4, A3, A1)
o M rng cc tnh nng hiu sut, chng hn nh DMA, "S kin h
thng", v h tr mt m.
o Thit b ngoi vi c m rng vi DACs
ng dng c th AVR
o megaAVRs vi cc tnh nng c bit khng tm thy trn cc thnh
vin khc ca gia nh AVR, chng hn nh b iu khin LCD,
USB, iu khin, nng cao PWM, CAN v.v..
o Atmel At94k FPSLIC (Field Programmable System Level Circuit),
mt li trn AVR vi mt FPGA. FPSLIC s dng SRAM cho m
chng trnh AVR, khng ging nh tt c cc AVRs khc. Mt phn
do s khc bit tc tng i gia SRAM v flash, li AVR trong
FPSLIC c th chy ln n 50 MHz.
5.1.3 Kin trc thit b

Flash, EEPROM, v SRAM tt c c tch hp vo mt chip duy nht, loi b
s cn thit ca b nh ngoi trong hu ht cc ng dng. Mt s thit b c BUS
m rng song song cho php thm d liu b sung (hoc m) b nh, hoc b
nh nh x thit b. Tt c cc thit b c giao tip ni tip, m c th c s dng
kt ni EEPROMs ni tip chip flash.
5.1.4 Program Memory (Flash)

M lnh chng trnh c lu tr trong b nh Flash chng xa (non-volatile
Flash). Mc d h l 8-bit MCUs, mi lnh mt 1 hoc 2 t 16-bit.
Kch c ca b nh chng trnh thng c ch nh trong vic t tn ca
thit b chnh (v d, dng ATmega64x c 64 kB ca Flash, tuy nhin ATmega32x
ch c 32kB).
5.1.5 EEPROM
Hu nh tt c cc vi iu khin AVR u c Electrically Erasable
Programmable Read Only Memory (EEPROM) lu na vnh vin d liu lu

Bi ging Chng 5
tr. Cng ging nh b nh Flash, EEPROM c th duy tr ni dung ca n khi

c g b.
Trong hu ht cc bin th ca kin trc AVR, b nh EEPROM ni b ny
khng phi l nh x vo khng gian a ch b nh ca MCU. N ch c th c
truy cp cng mt cch nh l thit b ngoi vi bn ngoi, thanh ghi s dng con tr
c bit v c / ghi hng dn m lm cho truy cp EEPROM chm hn nhiu so
vi RAM ni b khc.
Tuy nhin, mt s thit b trong dng SecureAVR (AT90SC) s dng mt bn
EEPROM c bit n cc d liu hoc b nh chng trnh ty thuc vo cu
hnh. Dng XMEGA cng cho php EEPROM nh x vo khng gian a ch d
liu.
K t khi s lng cc ln ghi EEPROM khng phi l khng gii hn - Atmel
ch c 100.000 chu k ghi.
5.1.6 Chng trnh thc thi

Atmel's AVRs c hai giai on, thit k kiu ng ng (pipeline) duy nht.
iu ny c ngha l ch lnh k tip l c ly khi lnh ny ang thc hin. Hu
ht cc lnh ch mt mt hoc hai chu k ng h, lm cho AVRs tng i nhanh
trong s vi iu khin 8-bit.
H AVR ca b vi x l c thit k vi s thc hin hiu qu ca m C.
5.1.7 Tp lnh
Tp lnh AVR hn l trc giao vi hu ht cc vi iu khin tm-bit, c bit l
8051 v vi iu khin PIC vi AVR m ngy nay ang cnh tranh. Tuy nhin, n
khng phi l hon ton bnh thng:
Con tr ghi X, Y, v Z c kh nng nh a ch khc vi nhau.
V tr thanh ghi R0 n R15 c kh nng nh a ch khc hn v tr thnah
ghi R16 n R31.
I / O port 0-31 c kh nng nh a ch khc so vi I / O ports 32-63.
CLR nh hng n cc c, trong khi SER khng, ngay c khi chng c
lnh b sung. CLR xa tt c cc bit v khng v SER t chng ln mt.
Truy cp d liu ch c c lu trong b nh chng trnh (flash) yu cu
lnh c bit LPM.
Ngoi ra, mt s chip-s khc bit c th nh hng n cc th h m. M con
tr (bao gm c cc a ch tr li stack) l hai byte trn chip ln n 128 KBytes b
nh flash, nhng ba byte trn chip ln hn, khng phi tt c cc chip c s nhn
phn cng; chip vi hn 8 Kbytes flash c nhnh v gi lnh vi khong rng hn;
v.v. .
Lp trnh cho n bng cch s dng lp trnh C (hoc thm ch Ada) trnh bin
dch kh n gin. GCC bao gm h tr AVR t kh lu, v h tr c s dng

Bi ging Chng 5
rng ri. Trong thc t, Atmel g gm u vo t cc nh pht trin chnh ca trnh

bin dch cho vi iu khin nh, tch hp tnh nng cho cc tp lnh hu dng
nht trong mt trnh bin dch cho cc ngn ng cp cao.
5.1.8 Tc MCU
Dng AVR bnh thng c th h tr tc ng h 0-20 MHz, vi mt s thit
b t 32 MHz. H tr hot ng thp hn thng i hi mt tc gim. Tt c
gn y (Tiny v Mega, nhng khng phi 90S) AVRs tch hp oscillator-chip, loi
b s cn thit ca ng h bn ngoi hoc mch dao ng. Mt s AVRs cng c
mt prescaler ng h h thng, c th chia xung ng h ca h thng ln n
1024. Prescaler ny c th c cu hnh li bng phn mm trong thi gian chy,
cho php ti u ha tc ng h.
V tt c cc hot ng (tr literals) trn thanh ghi R0 - R31 l n chu k, cc
AVR c th t c ln n 1MIPS mi MHz. Ti v lu tr vo / ra b nh mt 2
chu k, phn nhnh phi mt 3 chu k.
5.1.9 Nhng c tnh

AVRs hin cung cp mt lot cc tnh nng:
My a chc nng, Bi-directional General Purpose I / O port vi cu hnh,
built-in pull-up resistors
Nhiu ni Oscillators, bao gm c RC oscillator m khng c b phn bn
ngoi
Ni, lnh Self-Programmable Flash Memory ln n 256 KB (384 KB trn
XMega)
o In-System Programmable s dng ni tip / song song h th c
quyn hoc cc giao din JTAG
o Ty chn khi ng vi bo v Lock Bits c lp.
On-chip g li (OCD) h tr thng qua JTAG hoc debugWIRE trn hu ht
cc thit b
o tn hiu JTAG (TMS, TDI, TDO, v TCK) l multiplexed ngy
GPIOs. Nhng Pin c th c cu hnh vi chc nng nh JTAG
hoc GPIO ty thuc vo thit lp ca mt vi cu ch (FUSES), c
th c lp trnh thng qua ISP hoc HVSP. Theo mc nh, AVRs
vi JTAG i km vi giao din JTAG bt.
o debugWIRE s dng chn /RESET nh mt knh giao tip hai
hng truy cp vo mch debug-chip. l hin nay trn cc thit
b vi s lng chn t, v n ch cn mt chn.
Internal Data EEPROM ln n 4 kB
Internal SRAM ln n 8 kB (32 kB trn XMega)
Ngoi 64KB d liu trn cc m hnh khng gian nht nh, bao gm c
Mega8515 v Mega162.
o Trong mt s thnh vin ca lot XMEGA, d liu khng gian bn
ngoi c tng cng h tr c hai SRAM v SDRAM. ng
Bi ging Chng 5
thi, cc d liu a ch, cc ch c m rng cho php ln

n 16MB b nh ca d liu c cp trc tip.
o AVR thng khng h tr thc thi m t b nh bn ngoi. Mt s
ASSP bng cch s dng m AVR lm b nh h tr chng trnh
bn ngoi.
8-Bit v 16-Bit Timers
o PWM u ra (thi gian cht my pht in trn mt s thit b)
o vo capture
So snh Analog
o 10 hoc 12-Bit A / D Converters, vi multiplex ln n 16 knh
o 12-bit D / A Converters
Mt lot cc giao tip ni tip, bao gm c
o IC tng thch Two-Wire Interface (TWI)
o Thit b ngoi vi Synchronous / Asynchronous Serial (UART /
USART) (c s dng vi RS-232, RS-485, v nhiu hn na)
o Thit b giao din Serial Bus (SPI)
o Universal Serial Interface (USI) cho 2 hoc 3 dy truyn thng ng
b ni tip.
Brownout Detection
Watchdog Timer (WDT)
Nhiu ch tit kim in (Power-Saving Sleep)
iu khin nh sng v iu khin ng c (c th l PWM ) iu khin m
hnh
H tr CAN Controller
H tr USB Controller
o USB Full speed (12 Mbit / s) iu khin phn cng & Hub vi AVR
nhng.
o Cng sn sng t do vi tc thp (1,5 Mbit / s) (HID) bitbanging
EMULATIONS phn mm
H tr Ethernet Controller
H tr LCD Controller
Hot ng mc in p thp, c th xung n 1.8v (n 0.7v vi loi h
tr chuyn i DC-DC)
Thit b picoPower
b iu khin DMA v truyn thng "S kin h thng" ngoi vi.
M ha v gii m nhanh, h tr cho AES v DES

Bi ging Chng 5
5.2 Vi iu khin PIC
Cc dng PIC khc

PIC 1655A
Hnh 5-2 Cc dng PIC
PIC l mt h vi iu khin RISC c sn xut bi cng ty Microchip
Technology. Dng PIC u tin l PIC1650 c pht trin bi Microelectronics
Division thuc General Instrument .
PIC bt ngun l ch vit tt ca "Programmable Intelligent Computer" (My
tnh kh trnh thng minh) l mt sn phm ca hng General Instruments t cho
dng sn phm u tin ca h l PIC1650. Lc ny, PIC1650 c dng giao
tip vi cc thit b ngoi vi cho my ch 16bit CP1600, v vy, ngi ta cng gi
PIC vi ci tn "Peripheral Interface Controller" (B iu khin giao tip ngoi vi).
CP1600 l mt CPU tt, nhng li km v cc hot ng xut nhp, v v vy PIC
8-bit c pht trin vo khong nm 1975 h tr hot ng xut nhp cho
CP1600. PIC s dng microcode n gin t trong ROM, v mc d, cm t RISC
cha c s dng thi by gi, nhng PIC thc s l mt vi iu khin vi kin
trc RISC, chy mt lnh mt chu k my (4 chu k ca b dao ng).
Nm 1985 General Instruments bn b phn vi in t ca h, v ch s hu
mi hy b hu ht cc d n - lc qu li thi. Tuy nhin PIC c b sung
EEPROM to thnh 1 b iu khin vo ra kh trnh. Ngy nay rt nhiu dng
PIC c xut xng vi hng lot cc module ngoi vi tch hp sn (nh USART,
PWM, ADC...), vi b nh chng trnh t 512 Word n 32K Word.
Lp trnh cho PIC
PIC s dng tp lnh RISC, vi dng PIC low-end ( di m lnh 12 bit, v d:
PIC12Cxxx) v mid-range ( di m lnh 14 bit, v d: PIC16Fxxxx), tp lnh bao
gm khong 35 lnh, v 70 lnh i vi cc dng PIC high-end ( di m lnh 16
bit, v d: PIC18Fxxxx). Tp lnh bao gm cc lnh tnh ton trn cc thanh ghi,
vi cc hng s, hoc cc v tr b nh, cng nh c cc lnh iu kin, lnh
nhy/gi hm, v cc lnh quay tr v, n cng c cc tnh nng phn cng khc
nh ngt hoc sleep (ch hot ng tit kin in). Microchip cung cp mi
trng lp trnh MPLAB, n bao gm phn mm m phng v trnh dch ASM.
Mt s cng ty khc xy dng cc trnh dch C, Basic, Pascal cho PIC.
Microchip cng bn trnh dch "C18" (cho dng PIC high-end) v "C30" (cho dng

Bi ging Chng 5
dsPIC30Fxxx). H cng cung cp cc bn "student edition/demo" dnh cho sinh

vin hoc ngi dng th, nhng version ny khng c chc nng ti u ho code
v c thi hn s dng gii hn. Nhng trnh dch m ngun m cho C, Pascal,
JAL, v Forth, cng c cung cp bi PicForth.
GPUTILS l mt kho m ngun m cc cng c, c cung cp theo cng c
v bn quyn ca GNU General Public License. GPUTILS bao gm cc trnh dch,
trnh lin kt, chy trn nn Linux, Mac OS X, OS/2 v Microsoft Windows.
GPSIM cng l mt trnh m phng dnh cho vi iu khin PIC thit k ng vi
tng module phn cng, cho php gi lp cc thit b c bit c kt ni vi PIC,
v d nh LCD, LED...
Mt vi c tnh
Hin nay c kh nhiu dng PIC v c rt nhiu khc bit v phn cng, nhng
chng ta c th im qua mt vi nt nh sau:
8/16 bit CPU, xy dng theo kin trc Harvard c sa i

Flash v ROM c th tu chn t 256 byte n 256 Kbyte
Cc cng Xut/Nhp (I/O ports) (mc logic thng t 0V n 5.5V, ng vi
logic 0 v logic 1)
8/16 Bit Timer
Cng ngh Nanowatt
Cc chun Giao Tip Ngoi Vi Ni Tip ng b/Khng ng b USART,
AUSART, EUSARTs
B chuyn i ADC Analog-to-digital converters, 10/12 bit
B so snh in p (Voltage Comparators)
Cc module Capture/Compare/PWM
LCD
MSSP Peripheral dng cho cc giao tip IC, SPI, v IS
B nh ni EEPROM - c th ghi/xo ln ti 1 triu ln
Module iu khin ng c, c encoder
H tr giao tip USB
H tr iu khin Ethernet
H tr giao tip CAN
H tr giao tip LIN
H tr giao tip IrDA
Mt s dng c tch hp b RF (PIC16F639, v rfPIC)
KEELOQ M ho v gii m
DSP nhng tnh nng x l tn hiu s (dsPIC)
H vi iu khin PIC 8/16-bit

Bi ging Chng 5
Cc link ny c ly t trang ch www.microchip.com, tuy nhin hin nay

trang ny ang rt thng b cht, c th do lng truy cp qu nhiu, v cc ng
dn lun thay i, v vy, c th link s b cht.
Vi iu khin 8-bit
PIC10, PIC12, PIC14, PIC16, PIC17, PIC18
Vi iu khin 16-bit:
PIC24
B iu khin x l tn hiu s 16-bit (dsPIC):
dsPIC30
dsPIC33F
B iu khin x l tn hiu s 32-bit (PIC32):
PIC32

Bi ging Chng 5
5.3 ARM
Cu trc ARM
Cu trc ARM (vit tt t tn gc l Acorn RISC Machine) l mt loi cu trc
vi x l 32-bit kiu RISC c s dng rng ri trong cc thit k nhng. Do c c
im tit kim nng lng, cc b CPU ARM chim u th trong cc sn phm in
t di ng, m vi cc sn phm ny vic tiu tn cng sut thp l mt mc tiu
thit k quan trng hng u.
Ngy nay, hn 75% CPU nhng 32-bit l thuc h ARM, iu ny khin ARM
tr thnh cu trc 32-bit c sn xut nhiu nht trn th gii. CPU ARM c
tm thy khp ni trong cc sn phm thng mi in t, t thit b cm tay (PDA,
in thoi di ng, my a phng tin, my tr chi cm tay, v my tnh cm tay)
cho n cc thit b ngoi vi my tnh ( a cng, b nh tuyn bn.) Mt
nhnh ni ting ca h ARM l cc vi x l Xscale ca Intel.
Mt b vi x l Conexant c
dng ch yu trong cc b nh
Tr s chnh ca cng ty ARM ti Cambridge tuyn
Anh)
Lch s pht trin

Vic thit k ARM c bt u t nm 1983 trong mt d n pht trin ca
cng ty my tnh Acorn.
Nhm thit k, dn u bi Roger Wilson v Steve Furber, bt u pht trin
mt b vi x l c nhiu im tng ng vi K thut MOS 6502 tin tin. Acorn
tng sn xut nhiu my tnh da trn 6502, v vy vic to ra mt chip nh vy
l mt bc tin ng k ca cng ty ny.
Nhm thit k hon thnh vic pht trin mu gi l ARM1 vo nm 1985, v
vo nm sau, nhm hon thnh sn phm thc gi l ARM2. ARM2 c tuyn d
liu 32-bit, khng gian a ch 26-bit tc cho php qun l n 64 Mbyte a ch v
16 thanh ghi 32-bit. Mt trong nhng thanh ghi ny ng vai tr l b m chng
trnh vi 6 bit cao nht v 2 bit thp nht lu gi cc c trng thi ca b vi x l.
C th ni ARM2 l b vi x l 32-bit kh dng n gin nht trn th gii, vi ch
gm 30.000 transistor (so vi b vi x l lu hn bn nm ca Motorola l 68000
Bi ging Chng 5
vi khong 68.000 transistor). S n gin nh vy c c nh ARM khng c vi

chng trnh (m chim khong n 1/3 trong 68000) v cng ging nh hu ht
cc CPU vo thi , khng h cha cache. S n gin ny a n c im tiu
th cng sut thp ca ARM, m li c tnh nng tt hn c 286. Th h sau,
ARM3, c to ra vi 4KB cache v c chc nng c ci thin tt hn na.
Vo nhng nm cui thp nin 80, hng my tnh Apple Computer bt u hp
tc vi Acorn pht trin cc th h li ARM mi . Cng vic ny tr nn quan
trng n ni Acorn nng nhm thit k tr thnh mt cng ty mi gi l Advanced
RISC Machines. V l do bn thng c gii thch ARM l ch vit tt ca
Advanced RISC Machines thay v Acorn RISC Machine. Advanced RISC Machines
tr thnh cng ty ARM Limited khi cng ty ny c a ra sn chng khon
London v NASDAQ nm 1998.
Kt qu s hp tc ny l ARM6. Mu u tin c cng b vo nm 1991 v
Apple s dng b vi x l ARM 610 da trn ARM6 lm c s cho PDA hiu
Apple Newton. Vo nm 1994, Acorn dng ARM 610 lm CPU trong cc my vi
tnh RiscPC ca h.
Tri qua nhiu th h nhng li ARM gn nh khng thay i kch thc.
ARM2 c 30.000 transistors trong khi ARM6 ch tng ln n 35.000. tng ca
nh sn xut li ARM l sao cho ngi s dng c th ghp li ARM vi mt s b
phn ty chn no to ra mt CPU hon chnh, mt loi CPU m c th to ra
trn nhng nh my sn xut bn dn c v vn tip tc to ra c sn phm vi
nhiu tnh nng m gi thnh vn thp.
Th h thnh cng nht c l l ARM7TDMI vi hng trm triu li c s
dng trong cc my in thoi di ng, h thng video game cm tay, v Sega
Dreamcast. Trong khi cng ty ARM ch tp trung vo vic bn li IP, cng c mt
s giy php to ra b vi iu khin da trn li ny.
Dreamcast a ra b vi x l SH4 m ch mn mt s tng t ARM (tiu
tn cng sut thp, tp lnh gn ) nhng phn cn li th khc vi ARM.
Dreamcast cng to ra mt chip x l m thanh c thit k bi Yamaha vi li
ARM7. Bn cnh , Gameboy Advance ca Nintendo, dng ARM7TDMI tn s
16,78 MHz.
Hng DEC cng bn giy php v li cu trc ARM (i khi chng ta c th b
nhm ln v h cng sn xut ra DEC Alpha) v sn xut ra th h Strong ARM.
Hot ng tn s 233 MHz m CPU ny ch tiu tn khong 1 watt cng sut
(nhng i sau cn tiu tn t cng sut hn na). Sau nhng kin tng, Intel cng
c chp nhn sn xut ARM v Intel nm ly c hi ny b sung vo th h
gi ci i960 ca h bng Strong ARM. T , Intel pht trin cho chnh h mt
sn phm chc nng cao gi tn l Xscale.
Cc dng li

Bi ging Chng 5
Cache MIPS in
H Li c tnh ng dng
(I/D)/MMU hnh @ MHz
Game Boy
ARM7TDMI 15 MIPS @
ARM7TDMI 3-tng pipeline khng Advance, Nintendo
(-S) 16.8 MHz
DS, iPod
36 MIPS @
ARM710T MMU Psion 5 series
40 MHz
8KB unified, 60 MIPS @
ARM720T
MMU 59.8 MHz
ARM740T MPU
ARM7EJ-S Jazelle DBX khng
ARM9TDMI ARM9TDMI 5-tng pipeline khng
GP32,GP2X (li
16KB/16KB, 200 MIPS @ u tin), Tapwave
ARM920T
MMU 180 MHz Zodiac (Motorola i.
MX1)
ARM922T 8KB/8KB, MMU
ARM940T 4KB/4KB, MPU GP2X (li th hai)
Nintendo DS,
thay i c,
Nokia N-Gage,
ARM9E ARM946E-S tightly coupled
Conexant 802.11
memories, MPU
chips
ST Micro
khng c cache,
ARM966E-S STR91xF, includes
TCMs
Ethernet [1]
khng c cache,
ARM968E-S
TCMs
in thoi di ng:
Sony Ericsson (K,
thay i c, 220 MIPS @
ARM926EJ-S Jazelle DBX W series),Siemens
TCMs, MMU 200 MHz
and Benq (i x65
v i mi hn)
Clockless khng caches,
ARM996HS
processor TCMs, MPU
32KB/32KB,
ARM10E ARM1020E (VFP)
MMU
16KB/16KB,
ARM1022E (VFP)
MMU
ARM1026EJ- variable, MMU or
Jazelle DBX
S MPU
ARM1136J SIMD, Jazelle
ARM11 variable, MMU
(F)-S DBX, (VFP)
ARM1156T2 SIMD, Thumb- thay i c,
(F)-S 2, (VFP) MPU
ARM1176JZ SIMD, Jazelle thay i c,

Bi ging Chng 5
Cache MIPS in
H Li c tnh ng dng
(I/D)/MMU hnh @ MHz
(F)-S DBX, (VFP) MMU+TrustZone
1-4 core SMP,
ARM11 thay i c,
SIMD, Jazelle
MPCore MMU
DBX, (VFP)
ln n 2000
(2.0
Application
DMIPS/MHz
profile, NEON, variable (L1+L2), Texas Instruments
Cortex Cortex-A8 in speed from
Jazelle RCT, MMU+TrustZone OMAP3
600 MHz to
Thumb-2
greater than 1
GHz)
Embedded variable cache, Broadcom l mt
Cortex-R4 600 DMIPS
profile MMU optional hng s dng
Luminary Micro[2]
Microcontroller 120 DMIPS
Cortex-M3 no cache, (MPU) microcontroller
profile @ 100MHz
family
80200/IOP310
XScale I/O Processor
/IOP315
80219
IOP321 Iyonix
IOP33x
PXA210 Applications
Zaurus SL-5600
/PXA250 processor
400
32KB/32KB,
PXA255 BogoMips Gumstix
MMU
@400 MHz
PXA26x
800 MIPS @ HTC Universal,
PXA27x
624 MHz Zaurus SL-C1000
PXA800(E)F
1000 MIPS @
Monahans
1.25 GHz
PXA900 Blackberry 8700
Control Plane
IXC1100
Processor
IXP2400
/IXP2800
IXP2850
IXP2325
/IXP2350
IXP42x NSLU2
IXP460

Bi ging Chng 5
Cache MIPS in
H Li c tnh ng dng
(I/D)/MMU hnh @ MHz
/IXP465
Cc lu v thit k
t c mt thit k gn, n gin v nhanh, cc nh thit k ARM xy
dng n theo kiu ni cng khng c vi chng trnh, ging vi b vi x l 8-bit
6502 tng c dng trong cc my vi tnh trc ca hng Acorn.
Cu trc ARM bao gm cc c tnh ca RISC nh sau:
-
Cu trc np/lu tr.
-
Khng cho php truy xut b nh khng thng hng (by gi cho php
trong li Arm v6)
- Tp lnh trc giao
- File thanh ghi ln gm 16 x 32-bit
- Chiu di m my c nh l 32 bit d gii m v thc hin pipeline,
t c iu ny phi chp nhn gim mt m my.
- Hu ht cc lnh u thc hin trong vng mt chu k n.
So vi cc b vi x l cng thi nh Intel 80286 v Motorola 68020, trong
ARM c mt s tnh cht kh c o nh sau:
- Hu ht tt c cc lnh u cho php thc thi c iu kin, iu ny lm
gim vic phi vit cc tiu r nhnh cng nh b cho vic khng c
mt b d on r nhnh.
- Trong cc lnh s hc, ch ra iu kin thc hin, ngi lp trnh ch
cn sa m iu kin
- C mt thanh ghi dch ng thng 32-bit m c th s dng vi chc
nng hon ho vi hu ht cc lnh s hc v vic tnh ton a ch.
- C cc kiu nh a ch theo ch s rt mnh
- C h thng con thc hin ngt hai mc u tin n gin nhng rt
nhanh, km theo cho php chuyn tng nhm thanh ghi.

Ti liu tham kho
[1]. Tng Vn On, Hong c Hi, H vi iu khin 8051, NXB Lao ng x

hi, nm 2001
[2]. Nguyn Tng Cng, Cu trc v lp trnh h vi iu khin 8051, NXB
Khoa hc v k thut, nm 2004
[3]. Nguyn Minh Tun, Gio trnh hp ng - Chng 1, HKHTN, 2002
[4]. Randal Hyde, The art of assembly language programming Chapter 1.
[5]. Norton Guide
[6]. Dan Rollins, TechHelp v.6.0
[7]. http://picat.dieukhien.net
[8]. http://wapedia.mobi/vi/Hp_ng
[9]. http://www.emu8086.com/
[10]. http://www.daniweb.com/code/
[11]. http://www.freewebs.com/maheshwankhede/adcdac.html
[12]. http://wapedia.mobi/vi

Bi ging
Vi x l - Vi iu khin Ph lc
PH LC A: Tp lnh trong 8051
Lnh s hc
C php S
S
STT M t chu
M lnh Ton hng byte
k
1 ADD A, Rn A = A + Rn 1 1
ADD A,direct A = A + direct 2 1
ADD A,@Ri A = A + @Ri 1 1
ADD A,#data A = A + #data 2 1
ADDC A,Rn A = A + Rn + C 1 1
6 ADDC A,direct A = A + direct + C 2 1
7 ADDC A,@Ri A = A + @Ri + C 1 1
8 ADDC A,#data A = A + #data + C 2 1
9 SUBB A,Rn A = A Rn C 1 1
10 SUBB A,direct A = A direct C 2 1
11 SUBB A,@Ri A = A @Ri C 1 1
12 SUBB A,#data A = A #data C 2 1
13 INC A A=A+1 1 1
14 INC Rn Rn = Rn + 1 1 1
15 INC Direct direct = direct + 1 2 1
16 INC @Ri @Ri = @Ri + 1 1 1
17 DEC A A=A1 1 1
18 DEC Rn Rn = Rn 1 1 1
19 DEC Direct direct = direct 1 2 1
20 DEC @Ri @Ri = @Ri 1 1 1
21 INC Dptr dptr = dptr + 1 1 2
22 MUL AB B:A = A*B 1 4
23 DIV AB A/B = A(thng) + B (d) 1 4
Hiu chnh thp phn s liu
24 DA A 1 1
trong thanh ghi A
Lnh logic
C php S S
STT M t chu
M lnh Ton hng byte k
1 ANL A,Rn A = (A)and(Rn) 1 1
2 A,direct A = (A)and(direct) 2 1
3 A,@Ri A = (A)and(@Ri ) 1 1
4 A,#data A = (A)and(#data) 2 1
5 direct,A direct = (direct)and(A) 2 1

Bi ging
C php S S
STT M t chu
6 Direct,#data direct = (direct)and(#data) 3 2
7 ORL A,Rn A = (A)or(Rn) 1 1
8 A,direct A = (A)or(direct) 2 1
9 A,@Ri A = (A)or(@Ri ) 1 1
10 A,#data A = (A)or(#data) 2 1
11 direct,A direct = (direct)or(A) 2 1
12 Direct,#data direct = (direct)or(#data) 3 2
13 XRL A,Rn A = (A)xor(Rn) 1 1
14 A,direct A = (A)xor(direct) 2 1
15 A,@Ri A = (A)xor(@Ri ) 1 1
16 A,#data A = (A)xor(#data) 2 1
17 direct,A direct = (direct)xor(A) 2 1
18 Direct,#data direct = (direct)xor(#data) 3 2
19 CLR A A=0 1 1
20 CPL A A = not(A) 1 1
21 RL A Quay tri A 1 1
22 RLC A Quay tri A qua c C 1 1
23 RR A Quay phi A 1 1
24 RRC A Quay phi A qua c C 1 1
25 SWAP A Hon i 2 na ca A 1 1
Cc lnh Bit
C php S S
STT M t chu
1 CLR C Xa c C v 0 1 1
2 CLR Bit Xa bit v 0 2 1
3 SETB C t c C = 1 1 12
4 SETB Bit t bit = 1 2 1
5 CPL C o gi tr ca c C 1 1
6 CPL Bit o gi tr ca bit 2 1
7 ANL C,bit C = (C)and(bit) 2 2
8 ANL C,/bit C = (C)and(o ca bit) 2 2
9 ORL C,bit C = (C)or(bit) 2 2
10 ORL C,/bit C = (C)or(o ca bit) 2 2
11 MOV C,bit C = bit 2 1

Bi ging
C php S S
STT M t chu
12 MOV Bit,C Bit = C 2 2
nhy n nhn <rel> nu C =
13 JC <rel> 2 2
1
nhy n nhn <rel> nu bit=
14 JNC Bit, <rel> 3 2
1
15 JB Bit, <rel> 3 2
1
16 JNB Bit, <rel> 3 2
0
nhy n nhn <rel> nu bit =
17 JBC Bit, <rel> 3 2
1 v sau xa lun bit v 0
Cc lnh iu khin chng trnh

C php S S
STT M t chu
gi chng trnh con (nm
1 ACALL <addr11> 3 2
trong phm vi 2k mem)
gi chng trnh con (trong
2 LCALL <addr16> 3 2
pham vi 64k mem)
3 RET tr v t chng trnh con 1 2
tr v t chng trnh
4 RETI 1 2
phc v ngt
nhy n nhn (trong phm
5 AJMP <addr11> 2 2
vi 2k mem)
nhy n nhn (trong phm
6 LJMP <addr16> 3 2
vi 64 mem)
7 SJMP <rel> nhy n nhn 2 2
nhy n a ch =
8 JMP @A+DPTR 1 2
A+DPTR
9 JZ <rel> nhy n nhn nu A = 0 2 2
10 JNZ <rel> nhy n nhn nu A #0 2 2
So snh v nhy n
11 CJNE A,direct,<rel> 3 2
nhn nu A # direct
So snh v nhy n nhn
12 CJNE A,#data,<rel> 3 2
nu A#data
13 Rn,#data,<rel> So snh v nhy n 3 2

Bi ging
C php S S
STT M t chu
nhn nu Rn#data
So snh v nhy n nhn
14 @Ri,#data,<rel> nu byte c a ch = Ri c 3 2
ni dung khc vi data
Gim Rn i 1 v nhy
15 DJNZ Rn,<rel> n nhn nu cha gim v 2 2
0
Gim direct i 1 v nhy
16 DJNZ direct,<rel> n nhn nu cha gim v 3 2
0
17 NOP Khng lm g c 1 1

Bi ging
PH LC B: Chi tit cc thanh ghi chc nng trong 8051
Bn tm tt chc nng cc thanh ghi
1. Thanh ghi IE:
IE: Interrupt Enable, cho php ngt: thanh ghi ny cho php/cm cc ngt hot
ng
EA -- ET2 ES ET1 EX1 ET0 EX0
2. Thanh ghi TCON: TCON Register - TCON (S:88h)

TCON: Timer/Counter Control Register: thanh ghi iu khin b m/b nh thi
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
3. Thanh ghi TMOD: TMOD Register - TMOD (S: 89h)

TMOD: Timer/Counter 0 and 1 Modes: thanh ghi t ch cho Timer/Counter 0 v 1
GATE1 C/T1# M11 M01 GATE0 C/T0# M10 M00
4. Thanh ghi T2CON: T2CON Register - T2CON (S:C8h)

Thanh ghi iu khin Timer/Counter 2
TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2# CP/RL2#
5. Thanh ghi T2MOD: T2MOD Register - T2MOD (S:C9h)

Thanh ghi iu khin Timer/Counter 2
- - - - - - T2OE DCEN
6. Thanh ghi SCON

SCON: Serial Controller: thanh ghi cu hnh truyn thng ni tip.
FE/SM0 SM1 SM2 REN TB8 RB8 TI RI
7. Thanh ghi PCON: PCON Register

PCON - Power Control Register (87h): Thanh ghi iu khin ngun

Bi ging
Din gii ngha cc thanh ghi:
1. Thanh ghi phc v lp trnh ngt:
Thanh ghi IE: Interrupt Enable: Cho php ngt:
EA -- ET2 ES ET1 EX1 ET0 EX0
Nu lp bt =1 th cho php ngt, t bng 0 th cm ngt

EA: Enable All : cho php ngt tt c, phi t bt ny bng 1, th mi ngt khc mi c
php hot ng. Mun ngt no hot ng th cho php ngt theo cc bit di y.
ET2: Enable Timer 2: cho php Timer 2 hot ng
ES: Enable Serial: Cho php ngt ni tip.
EX1: Enable eXternal: cho php ngt ngoi 1
EX0: Enable eXternal: cho php ngt ngoi 0
2. Thanh ghi TCON: TCON Register - TCON (S:88h)
Timer/Counter Control Register.
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Bit K
ngha
th hiu
C trn Timer 1
7 TF1 c xa bi phn cng khi vi x l nhy n chng trnh con ngt
Lp bi phn cng khi Timer / Counter 1 trn
Bit iu khin chy Timer 1
6 TR1 Xa cm chy timer/counter 1.
Lp chy timer/counter 1.
C trn Timer 0
5 TF0 Xa bng phn cng khi chy chng trnh con ngt
Lp bng phn cng khi thanh ghi timer/counter trn
4 TR0 Xa cm chy timer/counter 0.
Lp chy timer/counter 0.
C cnh ngt 1
3 IE1 Xa bng phn cng khi ngt vi x l, nu t ngt cnh (sn)
Lp bng phn cng khi ngt ngoi c pht hin ti chn INT1
Bit iu khin loi ngt ngoi 1
2 IT1 Xa: Ngt theo mc thp cho ngt ngoi 1 (INT1)
Lp : Ngt theo cnh xung (sn xung) cho ngt ngoi 1 (INT1)
C cnh ngt 0
1 IE0 Xa bng phn cng khi ngt vi x l, nu t ngt cnh (sn)
Lp bng phn cng khi ngt ngoi c pht hin ti chn INT0
Bit iu khin loi ngt ngoi 0
0 IT0 Xa: Ngt theo mc thp cho ngt ngoi 1 (INT0)
Lp : Ngt theo cnh xung (sn xung) cho ngt ngoi 1 (INT0)
Gi tr sau khi reset = 0000 0000b
Mode: ch
Timer : B nh thi, Counter: B m
3. Thanh ghi TMOD: TMOD Register - TMOD (S: 89h)

Bi ging
TMOD - Timer/Counter 0 and 1 Modes.
GATE1 C/T1# M11 M01 GATE0 C/T0# M10 M00
Bit
K hiu ngha
th
Bit iu khin cng Timer 1
7 GATE1 Xa cho php timer 1 mi khi bit TR1 lp
Lp cho php timer 1 ch khi chn INT1# mc 1 v bit TR1 c lp
Bit la chn Counter/Timer 1
6 C/T1# Xa: Timer 1 hot ng: B nh thi, m tng theo xung nhp h thng
Lp: Counter hot ng: B m, m tng theo sn xung ca chn T1.
5 M11 Cc bit chn ch cho Timer 1
M11 M01 Ch hot ng
0 0 Mode 0 8-bit Timer/Counter (TH1) vi 5-bit(TL1)
0 1 Mode 1 16-bit Timer/Counter
4 M01
1 0 Mode 2 8-bit Timer/Counter (TL1) t np li gi tr t TH1 mi
khi Timer/Counter trn
1 1 Mode 3 Timer 1 dng

Bit iu khin cng Timer 0
3 GATE0 Xa cho php timer 0 mi khi bit TR0 lp
Lp cho php timer 0 ch khi chn INT0# mc 1 v bit TR0 c lp
Bit la chn Counter/Timer 0
2 C/T0# Xa: Timer 0 hot ng: B nh thi, m tng theo xung nhp h thng
Lp: Counter 0 hot ng: B m, m tng theo sn xung ca chn T0.
Cc bit chn ch cho Timer 0
1 M10 M10 M00 Ch hot ng
0 0 Mode 0 8-bit Timer/Counter (TH0) vi 5-bit(TL0)
0 1 Mode 1 16-bit Timer/Counter
1 0 Mode 2 8-bit Timer/Counter (TL0) t np li gi tr t TH0
0 M00 mi khi Timer/Counter trn
1 1 Mode 3 TL0 l b Timer/Counter 8 bit. TH0 l b Timer 8-
bit s dng Timer cc bit TR0 v TF0
Khi Timer 0 Mode 3, Timer 1 c th c bt hoc tt bng cch chuyn n ra khi hoc vo
Mode 3, hoc c th vn dng to tc Baud (c l b-u-d) cho cng truyn thng ni tip,
hoc trong thc t, trong mt s ng dng khng dng ngt.

Bi ging
4. Thanh ghi T2CON: T2CON Register - T2CON (S:C8h)
Thanh ghi iu khin Timer 2
TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2# CP/RL2#
Bit
K hiu ngha
th
C trn Timer 2
TF2 khng c lp nu RCLK=1 hoc TCLK=1
7 TF2
Phi xa bng phn mm
Lp bng phn cng khi Timer 2 trn
C ngt ngoi Timer 2
Lp khi c cnh xung ti chn T2EX, nu EXEN2=1
6 EXF2
Nu ngt Timer 2 hot ng, mc 1 ti bit ny, chng trnh s gi ngt
Phi xa bng phn mm
Bit clock nhn
Xa s dng c trn Timer 1 lm xung clock nhn cho truyn thng ni tip
5 RCLK trong Mode 1 hoc 3
Lp s dng c trn Timer 2 lm xung clock nhn cho truyn thng ni tip
trong Mode 1 hoc 3
Bit clock truyn
Xa s dng c trn Timer 1 lm xung clock pht cho truyn thng ni tip
4 TCLK trong Mode 1 hoc 3
Lp s dng c trn Timer 2 lm xung clock pht cho truyn thng ni tip
trong Mode 1 hoc 3
Bit cho php ngt ngoi Timer 2
Xa b qua s kin ti chn T2EX cho hot ng Timer 2
3 EXEN2
Lp s xy ra ngt ngoi ti chn T2EX khi c sn xung, nu Timer 2 khng s
dngcho truyn thng ni tip.
2 TR2 Xa : cm Timer 2 chy
Lp: chy Timer 2
Bit la chn Timer/Counter 2
1 C/T2# Xa: Timer (ngun xung h thng: Fosc)
Lp: Counter (u vo t chn T2)
Bit capture/Reload ca Timer 2
Nu RCLK=1 hoc TCLK=1, CP/RL2# b b qua v Timer s chy ch t
np li mi khi trn
0 CP/RL2#
Xa: t np li khi Timer 2 trn hoc khi c sn xung chn T2EX nu
EXEN2=1.
Lp bt gi (capture) khi c cnh xung chn T2EX nu EXEN2=1

Bi ging
5. Thanh ghi T2MOD: T2MOD Register - T2MOD (S:C9h)
Thanh ghi chn ch cho Timer 2
- - - - - - T2OE DCEN
Bit
K hiu ngha
th
7 - D tr
6 - D tr
5 - D tr
4 - D tr
3 - D tr
2 - D tr
Bit cho php xut Timer 2
1 T2OE Xa lp trnh P1.0/T2 nh u vo clock hoc cng I/O
Lp lp trnh P1.0/T2 nh u ra clock
Bit cho php m li
0 DCEN Xa: cm Timer 2 m tng/gim
Lp: cho php Timer 2 m tng/gim
Gi tr sau khi reset = xxxx xx00b
6. Thanh ghi SCON

FE/SM0 SM1 SM2 REN TB8 RB8 TI RI
Bit
K hiu ngha
th
FE: Framing Error bit: bit bo truyn thng li. (SMOD0=1)
Xa reset trng thi li, khng c xa bi mt bit STOP ng
FE
7 Lp bi phn cng khi pht hin li bit STOP khng ng
SMOD0 phi c lp cho php truy cp n bit FE
SM0 Ch truyn thng ni tip
SM0 SM1 Mode ngha Tc Baud
0 0 0 Thanh ghi dch FCPU PERIPH/6
6 SM1 0 1 1 8-bit UART C th thay i
1 0 2 9-bit UART FCPU PERIPH/32 hoc /16
1 1 3 39-bit UART C th thay i
Bit Mode 2 cng ni tip / Bit cho php truyn thng a vi x l
Xa cm chc nng truyn thng a vi x l
5 SM2
Lp cho php ch truyn thng a vi x l trong Mode 2 v 3, v thm ch
Mode 1. Bit ny phi xa nu dng Mode 0
Bit cho php nhn ( Reception Enable bit)
4 REN Xa: cm nhn ni tip
Lp: cho php nhn ni tip
Pht bit 8 / bit th 9 truyn thng trong Mode 2 v 3
3 TB8
Xa: truyn bit logic 0 trong bit th 9

Bi ging
Lp: truyn bit logic 1 trong bit th 9
Nhn bit 8 / nhn bit th 9 trong mode 2 v 3
Xa bng phn cng nu bit th 9 nhn c l logic 0
2 RB8 Lp bng phn cng nu bit th 9 nhn c l logic 1
Trong mode1, nu SM2=0, RB8 l bit STOP nhn c. Trong mode 0 RB8 khng
s dng
C ngt truyn
Xa chp nhn ngt
1 TI
Lp bng phn cng ti thi gian cui cng ca bit th 8 trong mode 0 hoc bt
u ca bit STOP trong cc mode khc
C ngt nhn
Xa chp nhn ngt
0 RI
Lp bng phn cng ti thi gian cui cng ca bit th 8 trong mode 0. Xem hnh
di bit thm trong cc mode khc
7. Thanh ghi PCON: PCON Register

PCON - Power Control Register (87h)
Bit
K hiu ngha
th
Ch cng ni tip, bit 1 cho USART

7 SMOD1
Lp la chn tc Baud gp i trong mode 1,2 hoc 3
Ch cng ni tip, bit 0 cho USART

6 SMOD0 Xa la chn bit SM0 trong thanh ghi SCON
Lp la chn bit FE trong thanh ghi SCON
5 D tr
C tt ngun: Power Off Flag
Xa nhn bit kiu reset ln k tip
4 POF
Lp bng phn cng khi VCC tng t 0 ln in p bnh thng. cng c th t
bng phn mm
3 GF1 C mc ch chung, lp, xa ty lp trnh vin
2 GF0 C mc ch chung, lp, xa ty lp trnh vin
Bit ch ngun gim
1 PD Xa bng phn cng khi xy ra reset
Lp vo ch ngun gim
Bit ch IDL
0 IDL Xa bng phn cng khi xy ra ngt hoc reset
Lp vo ch ngh (IDLE)
Gi tr sau khi reset = 00X1 0000b
Khng th nh a ch bit

Bi ging
PH LC C: Ngt
INT 21h / AH=1 - read character from standard input, with echo, result is stored
in AL.
if there is no character in the keyboard buffer, the function waits until any key is
pressed.
example:
mov ah, 1
int 21h
INT 21h / AH=2 - write character to standard output.
entry: DL = character to write, after execution AL = DL.
example:
mov ah, 2
mov dl, 'a'
int 21h
INT 21h / AH=5 - output character to printer.
entry: DL = character to print, after execution AL = DL.
example:
mov ah, 5
mov dl, 'a'
int 21h
INT 21h / AH=6 - direct console input or output.
parameters for output: DL = 0..254 (ascii code)
parameters for input: DL = 255
for output returns: AL = DL
for input returns: ZF set if no character available and AL = 00h, ZF clear if
character available.
AL = character read; buffer is cleared.
example:
mov ah, 6
mov dl, 'a'
int 21h ; output character.
mov ah, 6
mov dl, 255
int 21h ; get character from keyboard buffer (if any) or set ZF=1.

Bi ging
INT 21h / AH=7 - character input without echo to AL.
if there is no character in the keyboard buffer, the function waits until any key is
pressed.
example:
mov ah, 7
int 21h
INT 21h / AH=9 - output of a string at DS:DX. String must be terminated
by '$'.
example:
org 100h
mov dx, offset msg
mov ah, 9
int 21h
ret
msg db "hello world $"
INT 21h / AH=0Ah - input of a string to DS:DX.
fist byte is buffer size, second byte is number of chars actually read. this function
does not add '$' in the end of string. to print using INT 21h / AH=9 you must set
dollar character at the end of it and start printing from address DS:DX + 2.
example:
org 100h
mov dx, offset buffer
mov ah, 0ah
int 21h
jmp print
buffer db 10,?, 10 dup(' ')
print:
xor bx, bx
mov bl, buffer[1]
mov buffer[bx+2], '$'
mov dx, offset buffer + 2
mov ah, 9
int 21h
ret
the function does not allow to enter more characters than the specified buffer size.
see also int21.asm in c:\emu8086\examples

Danh mc hnh nh
Hnh 1-2. Lch s pht trin ca VXL................................................................................ 11
Hnh 1-3. S khi mt my tnh c in ...................................................................... 15
Hnh 1-4. S khi h vi x l........................................................................................ 16
Hnh 1-5. Khi x l trung tm.......................................................................................... 17
Hnh 1-6.LED 7 thanh v cch m ha .............................................................................. 18
Hnh 1-7. Bng m ASCII.................................................................................................. 20
Hnh 1-8. Bng m ASCII c c k t trong phn m rng .............................................. 21
Hnh 2-1.Tng quan v phn cng b x l....................................................................... 24
Hnh 2-2.S hot ng ca CPU........................................................................................ 25
Hnh 2-3.S khi bn trong 8086.................................................................................. 26
Hnh 2-4. S chn 8086/8088........................................................................................ 31
Hnh 2-5. Emu8086 - Mi trng son tho ...................................................................... 56
Hnh 2-6. Emu8086 - Gi tr cc c v mn hnh hin th ................................................. 56
Hnh 2-7. Emu8086 - Mn hnh Debug chng trnh........................................................ 57
Hnh 2-8. Giao tip bus c bn........................................................................................... 81
Hnh 2-9. Quan h gia gii m a ch v b nh ............................................................ 81
Hnh 2-10. Mc ni tng nhiu 74LS138.......................................................................... 82
Hnh 2-11. Ghp ni VXL vi b nh ............................................................................... 82
Hnh 2-12. nh thi ghi b nh ....................................................................................... 83
Hnh 2-13. nh thi c b nh ....................................................................................... 83
Hnh 2-14. Gii m cho cc cng....................................................................................... 84
Hnh 2-15. Vi mch 74LS245 ............................................................................................ 85
Hnh 2-16. Vi mch cht 74LS373 .................................................................................... 85
Hnh 3-1. Cu trc chung h VK .................................................................................... 92
Hnh 3-2 Giao tip b nh.................................................................................................. 93
Hnh 3-3. Vo ra vi thit b ngoi vi ................................................................................ 95
Hnh 3-4 ghp ni b dao ng.......................................................................................... 95
Hnh 3-5. B nh thi/m ............................................................................................... 96
Hnh 3-6. Truyn nhn ni tip .......................................................................................... 96
Hnh 3-7.Kin trc vi iu khin 8051............................................................................... 97
Hnh 3-8. S chn VK AT89C51 ............................................................................... 99
Hnh 3-9. Cng vo/ra...................................................................................................... 100
Hnh 3-10. Xut mc 0..................................................................................................... 101
Hnh 3-11. Tr treo ni ti chn....................................................................................... 101
Hnh 3-12. xut mc 1...................................................................................................... 101
Hnh 3-13 S kt ni thch anh ............................................................................... 104
Hnh 3-14. Cc vng nh trong AT89C51 ..................................................................... 104
Hnh 3-15. Thc thi b nh chng trnh ngoi ............................................................. 108
Hnh 3-16 - Ghp ni RS232 vi 8051 ............................................................................. 113
Hnh 3-17. Cc thanh ghi ca b Timer 0 ......................................................................... 126
Hnh 3-18. Cc thanh ghi ca b Timer 1 ......................................................................... 127
Hnh 3-19. Timer TMOD .................................................................................................. 127
Hnh 3-20. Timer 0 Mode 0 ........................................................................................... 130
Hnh 3-21. Timer 0 Mode 1 ........................................................................................... 130
Hnh 3-22. Timer 0 Mode 2 ........................................................................................... 130
Hnh 3-23. Timer 0 Mode 3 ........................................................................................... 131
Hnh 3-24. Truyn thng................................................................................................... 133
Hnh 3-25. Ghp ni RS232 vi 8051.............................................................................. 135
Hnh 3-26. Truyn thng ni tip Mode 0 ..................................................................... 136
Hnh 3-27. Gin thi gian truyn ni tip Mode 0................................................... 137

Hnh 3-28. Gin thi gian nhn ni tip Mode 0....................................................... 137
Hnh 3-29. Truyn nhn ni tip Mode 1 ...................................................................... 137
Hnh 3-30. Gin thi gian truyn ni tip Mode 1 .................................................... 137
Hnh 3-32. Gin thi gian truyn ni tip Mode 2 .................................................... 138
Hnh 3-34. Cc tn hiu iu khin ngt............................................................................ 142
Hnh 3-35. Bng vector ngt v v d............................................................................... 143
Hnh 4-1. Mch nhp nhy LED n ............................................................................... 152
Hnh 4-2. Mch nhp nhy LED n trong m phng..................................................... 152
Hnh 4-3. Thut ton: Nhp nhy P1................................................................................ 154
Hnh 4-4. Thut ton: Nhp nhy P1-Macro .................................................................... 154
Hnh 4-5. Thut ton: Nhp nhy P1.0.............................................................................. 155
Hnh 4-6. Thut ton: TIMER0 ......................................................................................... 155
Hnh 4-7. Thut ton: Ngt Timer 0 v Timer1 ................................................................ 156
Hnh 4-8. S dng Timer 2............................................................................................... 157
Hnh 4-9. Lp trnh 2 ngt ngoi ...................................................................................... 158
Hnh 4-10. Lp trnh ngt ngoi bt loa ........................................................................ 159
Hnh 4-11. Hin th LED 7 thanh ..................................................................................... 160
Hnh 4-12.S chn LED 7 thanh ................................................................................. 162
Hnh 4-13. S hin th LCD thc ................................................................................ 164
Hnh 4-14. S hin th LCD m phng ....................................................................... 164
Hnh 4-15. Ghp ni VK vi my tnh .......................................................................... 169
Hnh 4-16. Nhn d liu ni tip m phng.................................................................. 170
Hnh 4-17. Truyn d liu ni tip m phng............................................................... 171
Hnh 4-18. S chn ADC0804 .................................................................................... 175
Hnh 4-19. Gin thi gian c ADC............................................................................ 175
Hnh 4-20. Mch nguyn l m phng chuyn i ADC0804......................................... 176
Hnh 4-21.Cch ghp ni bn phm trong m phng- phm n ghp li........................ 177
Hnh 4-22.Cch ghp ni bn phm trong m phng dng module bn phm .............. 177
Hnh 4-23. Cu to ng c bc..................................................................................... 179
Hnh 4-24. S khi tng th ton b h thng............................................................. 184
Hnh 4-25. S tng tc h thng cnh bo p sut .................................................... 185
Hnh 4-26.......................................................................................................................... 186
Hnh 4-27.......................................................................................................................... 186
Hnh 4-28. Mch cm bin ............................................................................................... 186
Hnh 4-29. Khuch i v lc nhiu ................................................................................. 186
Hnh 4-30. Bn phm ........................................................................................................ 186
Hnh 4-31.......................................................................................................................... 187
Hnh 4-32.......................................................................................................................... 187
Hnh 4-33. Hin th LCD.................................................................................................. 187
Hnh 4-34. Bn phm ........................................................................................................ 187
Hnh 4-35. Khi iu khin trung tm.............................................................................. 188
Hnh 4-36. S Callgraph.............................................................................................. 188
Hnh 5-1 - Atmel AVR ATmega8 PDIP .......................................................................... 192
Hnh 5-2 Cc dng PIC ................................................................................................. 197

Danh mc m ngun
M ngun 4-1. Delay......................................................................................................... 153
M ngun 4-2. DelayX...................................................................................................... 153
M ngun 4-3. Nhp nhy cng P1................................................................................... 154
M ngun 4-4. Nhp nhy cng P1v o trng thi P2.0............................................... 154
M ngun 4-5. Nhp nhy P1.0........................................................................................ 155
M ngun 4-6. Timer0 to xung PWM ............................................................................ 155
M ngun 4-7. Timer0 v Timer1 to xung PWM dng ngt.......................................... 156
M ngun 4-8. S dng Timer 2 ...................................................................................... 158
M ngun 4-9. Lp trnh 2 ngt ngoi.............................................................................. 159
M ngun 4-10. Lp trnh ngt ngoi bt loa................................................................ 160
M ngun 4-11. Hin th LED 7 thanh -1 ........................................................................ 161
M ngun 4-12. Hin th LED 7 thanh - 2 ...................................................................... 163
M ngun 4-13. Hin th trn nhiu LED 7 thanh ........................................................... 163
M ngun 4-14. Hin th LCD ......................................................................................... 169
M ngun 4-15. Nhn d liu ni tip ............................................................................. 170
M ngun 4-16. Truyn d liu ni tip .......................................................................... 171
M ngun 4-17. Cc CTC Truyn-Nhn d liu ni tip ................................................ 172
M ngun 4-18. CTC truyn thng ni tip bng phn mm .......................................... 175
M ngun 4-19. Chuyn i ADC (VK-ADC0804) ..................................................... 176
M ngun 4-20. c ma trn phm .................................................................................. 179
M ngun 4-21. iu khin ng c bc....................................................................... 180
M ngun 4-22. Chng trnh o nhit ....................................................................... 183
M ngun 4-23. Lp trnh cho VK tin tin .................................................................. 189
Danh mc bng
Bng 1-1. Gi tr tng ng gia cc h s ........................................................................ 19
Bng 2-1. Cc thanh ghi...................................................................................................... 28
Bng 2-2.Phi hp MOD v R/M to ra cc ch a ch........................................... 33
Bng 2-3. Cc ch a ch............................................................................................... 36
Bng 2-4. Bn b nh, a ch ngt ca 8086 ................................................................ 60
Bng 3-1. Chc nng cc chn ca Port 3 ........................................................................ 103
Bng 3-2. Cc thanh ghi chc nng c bit..................................................................... 105
Bng 3-3. a ch RAM ni 8051 ..................................................................................... 106
Bng 3-4. k hiu s dng m t lnh............................................................................... 117
Bng 3-5. Cc lnh vn chuyn d liu ............................................................................ 120
Bng 3-6. Cc lnh thao tc bit v c cng.................................................................... 120
Bng 3-7. Lnh c cng .................................................................................................. 121
Bng 3-8. c cht trong ca cng ra.............................................................................. 121
Bng 3-9. Nhy v iu kin............................................................................................. 122
Bng 3-10. Cc ton t...................................................................................................... 124
Bng 3-11. Ch hot ng ca Timer/Counter ............................................................ 127
Bng 3-12. Mt s gi tr thng dng trong truyn thng ni tip ................................. 139

Ch mc
74LS245 ............................................... 85 EQU.................................................... 124
74LS373 ............................................... 85 EU................................................... 25, 26
ACALL............................................... 123 FOR ...................................................... 70
Accumulator ....................................... 109 Gii m a ch ..................................... 84
ADC...................................................... 39 Gray Code ............................................ 19
ADD ..................................................... 40 hng ...................................................... 63
ALU ...................................................... 24 Hp ng................................................ 54
AND ..................................................... 42 I/O Ports ............................................... 94
ASCII.................................................... 21 IF THEN............................................ 69
AT89C51 .............................................. 99 IN .......................................................... 38
BCD ...................................................... 18 INC ....................................................... 40
bin ....................................................... 63 INT ....................................................... 53
BIU ....................................................... 25 IRET ..................................................... 53
B m................................................ 113 JA/JNBE............................................... 47
b nh thi......................................... 113 JAE/JNB/JNC....................................... 47
bus......................................................... 17 JB/JC/JNAE ......................................... 48
Bus a ch ............................................ 17 JBE/JNA............................................... 48
Bus iu khin ...................................... 17 JE/JZ..................................................... 49
Bus d liu............................................ 17 JMP....................................................... 49
Cc bc khi lp trnh .......................... 55 JNE/JNZ ............................................... 50
Cc h m ........................................... 18 Khi x l trung tm ...................... 16, 17
CALL............................................ 52, 122 Khung chng trnh ............................. 62
Cu trc ................................................ 24 kin trc ca mt vi x l..................... 15
cu trc iu khin................................ 69 Kin trc vi iu khin 8051 ................ 97
ch a ch.................................. 31, 34 LCALL ............................................... 123
CH A CH CHUI.................. 36 Lnh b................................................. 67
CH A CH CNG ................... 37 LJMP .................................................. 122
CH A CH GIN TIP ........... 35 LOOP ................................................... 51
CH A CH THANH GHI ........ 34 LOOPE/LOOPZ ................................... 51
CH A CH TRC TIP .......... 35 Macro ................................................... 67
CH A CH TC TH .............. 34 my mc dn dng ............................... 14
CH A CH TNG I ........ 35 my tnh c in ................................... 15
Chng trnh con.................................. 65 MODEL................................................ 58
CMP...................................................... 46 Mt s hm mu ................................. 153
c .......................................................... 29 MOV..................................................... 38
Cng vo/ra ........................................ 100 MUL ..................................................... 41
CPU ................................................ 16, 94 NEG...................................................... 41
CU......................................................... 24 Ngt ...................................................... 72
DB....................................................... 123 Ngt 8051 ........................................... 114
DEC ...................................................... 40 Nh thng minh .................................... 14
Delay................................................... 153 NOP ...................................................... 53
a ch ch s ...................................... 115 NOT...................................................... 42
a ch gin tip.................................. 115 OR ........................................................ 42
a ch theo thanh ghi......................... 114 OUT...................................................... 38
a ch trc tip .................................. 115 PC:Program Counter ............................ 94
a ch tc thi ................................... 114 PCON ................................................. 112
a ch vt l ........................................ 29 phn cng b x l ............................... 24
DIV ....................................................... 40 POP....................................................... 39
DPTR .................................................. 111 PROC ................................................... 65
EEPROM .............................................. 93 PSW.................................................... 110

PUSH.................................................... 39 STACK................................................. 60
qung co.............................................. 14 STC ...................................................... 54
RAM..................................................... 93 SUB...................................................... 41
RCL ...................................................... 43 Tp lnh Assembly............................... 37
RCR...................................................... 43 Tn ..................................................... 124
Registers ............................................... 24 thanh ghi............................................... 27
REPEAT............................................... 71 thanh ghi ch s .................................... 28
RET ...................................................... 54 thanh ghi on...................................... 28
ROL...................................................... 44 thit b t ng ..................................... 13
ROM..................................................... 92 thit b y t............................................ 14
ROR...................................................... 44 Timer Mode........................................ 129
rs232 ................................................... 113 Timer Register.................................... 111
SAL ...................................................... 45 TMOD................................................ 127
sn phm cng nghip .......................... 14 T chc b nh 8051 ......................... 104
sn phm gii tr ................................... 14 Ton t ................................................. 64
SBUF.................................................. 111 t kha................................................ 125
SFR............................................... 94, 109 UART................................................. 113
SHL ...................................................... 45 ng dng ca vi iu khin .................. 13
SHR ...................................................... 45 ng dng ca vi iu khin ................. 91
SJMP .................................................. 122 WHILE................................................. 70
S chn 8086/8088.......................... 31 XOR ..................................................... 46
S khi h vi x l .......................... 16


Bai Giang VXL-VDK Chuan - 2011-07 - (Ban Dep, Link)

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Bai Giang VXL-VDK Chuan - 2011-07 - (Ban Dep, Link)

Uploaded by

Copyright:

Available Formats

TRNG I HC K THUT CNG NGHIP

BI GING PHT CHO SINH VIN

Thi Nguyn, ngy 01 thng 07 nm 2011

Ths. Nguyn Tun Linh PGS. TS. Nguyn Hu Cng

TRNG I HC c lp - T do - Hnh phc

K THUT CNG NGHIP

CHNG TRNH GIO DC I HC

CNG CHI TIT HC PHN:

B mn K thut my tnh Khoa in t 9

1.1 GII THIU CHUNG V VI X L VI IU KHIN

1.1.1 Tng quan

Vi x l (vit tt l P hay uP), i khi

Trc khi xut hin cc b vi x l, cc CPU c xy dng t cc mch tch

10 B mn K thut my tnh Khoa in t

1.1.2 Lch s pht trin ca cc b x l

Hnh 1-2. Lch s pht trin ca VXL

12 B mn K thut my tnh Khoa in t

1.1.4 ng dng ca Vi x l vi iu khin

B mn K thut my tnh Khoa in t 13

Trong cc sn phm dn dng:

14 B mn K thut my tnh Khoa in t

1.2 Cu trc chung ca h vi x l

Hnh 1-3. S khi mt my tnh c in

V c bn kin trc ca mt vi x l gm nhng phn cng sau:

B mn K thut my tnh Khoa in t 15

Hnh 1-4. S khi h vi x l

1.2.1 Khi x l trung tm (CPU)

16 B mn K thut my tnh Khoa in t

Hnh 1-5. Khi x l trung tm

1.2.2 H thng bus

B mn K thut my tnh Khoa in t 17

CPU a ra a ch ca nh cn c ln bus a ch.

1.3 nh dng d liu v biu din thng tin trong h vi x l vi iu

Hnh 1-6.LED 7 thanh v cch m ha

18 B mn K thut my tnh Khoa in t

B mn K thut my tnh Khoa in t 19

1.3.2 M k t - Alphanumeric CODE (ASCII, EBCDIC)

Hnh 1-7. Bng m ASCII

20 B mn K thut my tnh Khoa in t

Hnh 1-8. Bng m ASCII c c k t trong phn m rng

B mn K thut my tnh Khoa in t 21

1.3.3 Cc php ton s hc trn h m nh phn

Php tr nh phn, chnh l php cng nh phn vi s b 2 ca s tr, trng

Php nhn, php chia, ngh sinh vin t nghin cu.

22 B mn K thut my tnh Khoa in t

Cu trc phn cng ca b vi x l 8086

B mn K thut my tnh Khoa in t 23

2.1 Cu trc phn cng ca b vi x l 8086

2.1.1 Tng quan

Hnh 2-1.Tng quan v phn cng b x l

2.1.2 Cu trc bn trong v s hot ng

24 B mn K thut my tnh Khoa in t

Hnh 2-2.S hot ng ca CPU

2.1.2.1 S khi bn trong ca 8086

B mn K thut my tnh Khoa in t 25

Hnh 2-3.S khi bn trong 8086

26 B mn K thut my tnh Khoa in t

B mn K thut my tnh Khoa in t 27

28 B mn K thut my tnh Khoa in t

B mn K thut my tnh Khoa in t 29

30 B mn K thut my tnh Khoa in t

Hnh 2-4. S chn 8086/8088

2.2.1 Khi nim ch a ch