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NGUYN L V M PHNG IU CH
VECTOR KHNG GIAN
C Anh Tun
H Anh Tun
DCVTKG v1.2 2
Nguyn l v m phng iu ch vector khng gian
Mc ch ca ti liu
Ti liu c vit nhm phc v cc bn sinh vin ngnh in t ng, nhng ngi mong
mun tm hiu thut ton iu ch vector khng gian nhng cha c nhiu kinh nghim trong
vic s dng Matlab Simulink nh mt cng c hiu qu trong hc tp v nghin cu.
Mc ch chnh
Cung cp nhng hng dn c th v qu trnh xy dng thut ton iu ch vector khng
gian cng cc hiu ng trc quan trn phn mm m phng Matlab Simulink. T y em
ti 2 li ch quan trng sau:
Gip cc bn sinh vin hiu c thut ton iu ch vector khng gian mt cch sinh
ng t tng hng th vi mn hc.
Mc ch b xung
Ti liu trnh by nhng ni dung ht sc c bn ca thut ton iu ch vector khng gian
v cc k thut trin khai thut ton ny. y l nhng kin thc mnh vit li t hiu v
kinh nghim ca bn thn mnh nn cc bn c th s dng nh mt ti liu tham kho, khi
khng hiu nhng vn no ca gio trnh mn hc trn lp.
DCVTKG v1.2 3
Nguyn l v m phng iu ch vector khng gian
Hng dn s dng
i tng s dng:
Cch s dng:
Ti liu khng mang tnh hc thut, khng phn tch thut ton SVPWM vi nhng u nhc
im ca n. Ti liu mang tnh cht k thut nhiu hn, i su minh ha nhng ni dung c
bn v hng dn chi tit vo vic xy dng v trin khai thut ton SVPWM bng Matlab
Simulink.
hiu y v cn k hn v l thuyt, cc bn c th c:
Chng 1: C s v Matlab
Chng 6: C s v Simulink
DCVTKG v1.2 4
Nguyn l v m phng iu ch vector khng gian
V phng php c quyn sch ny, cng nh ti liu ca mnh. Cc bn nht nh phi t
code li, xy dng li m hnh v t chy m phng. Nu cc bn ch xem qua v t cho l
mnh hiu th ti liu ny s khng cn gi tr g na. Cc bn phi tht ch vn ny,
v y l kinh nghim tht s mnh tri qua. Trong sch m phng ca thy Quang, cc
bn cn ch vo chng 6, v y l chng cha kin thc m ta s s dng. Chng 7, 8
cng l chng quan trng, s gip cc bn trnh c mt s li gp phi trong qu trnh
chy m phng. Tuy nhin chng ny cng hi kh c, ngay c hin nay mnh vn cn
nhiu ch cha hiu ht.
V cch s dng ti liu iu ch vector khng gian ny, vi cc bn cha c nhiu kinh
nghim trong s dng Simulink, nn c ph lc 5.1 Mt s vn trong m phng Matlab
Simulink trc khi xy dng m hnh m phng, mnh tng kt mt s ni dung cn
lu trong mc ny. V phng php khai thc ti liu, mnh xin nhc li ch trn: . Cc
bn nht nh phi t code li, xy dng li m hnh v t chy m phng. Nu cc bn ch
xem qua v t cho l mnh hiu th ti liu ny s khng cn gi tr g na.
Phin bn Matlab m mnh s dng l bn Matlab 7.8.0 R2009a, cc file m phng mnh
cng up ln trang thanhphonglab.wordpress.com. Hi vng cc bn c th hon thnh vic
s dng ti liu m khng cn ti nhng file ny. Nu thy b qu th cc bn c li n ra
chy th, chnh sa ty cng c. Nhng nh, sau khi ng li, cc bn hy t xy dng
li m hnh cho mnh nh. y l ti liu k thut, nn th cc bn cn thu c l k nng
ch cha phi l kin thc.
DCVTKG v1.2 5
Nguyn l v m phng iu ch vector khng gian
https://thanhphonglab.wordpress.com/2016/08/25/nguyen-ly-va-mo-phong-phep-dieu-che-vector-khong-
gian-svpwm/comment-page-1/#comment-16
DCVTKG v1.2 6
Nguyn l v m phng iu ch vector khng gian
Li ni u
DCVTKG v1.2 7
Nguyn l v m phng iu ch vector khng gian
Mc lc
DCVTKG v1.2 8
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 9
Nguyn l v m phng iu ch vector khng gian
1 CC PHNG PHP IU CH
Cc khi iu ch c v tr cui cng trong mt cu trc iu khin ca mt thit b in t
cng sut. Khi ny thng c gi l khi chp hnh, c vai tr bin nhng gi tr yu cu
ca b iu khin thnh cc i lng vt l trn thit b (dng in, in p). V phng
din ny, cc khi iu ch c nhim v nh mt b DAC. i vi cc thit b in t cng
sut, khi iu ch v mch van c vai tr chnh trong vic iu tit dng nng lng chy
trong thit b, sao cho p ng c mong mun ca b iu khin c v hng v ln.
V phng din ny, cc khi iu ch c vai tr nh bnh li trong mt con tu.
Udc Ud
- Udc + Ud_ref C
Udc_ref Id_ref + Id Ud -
+
PI PI
- + U_ref
Id PWM
L
SVM
Iq
L
U_ref
Iq_ref=0 - Uq - - Uq_ref dq
+ Iq
PI
Ud u
ua,ub,uc
PLL
u abc
i Grid
dq ia,ib,ic
i abc
DCVTKG v1.2 10
Nguyn l v m phng iu ch vector khng gian
Trong gii hn ca ti liu, mnh ch trnh by v php iu ch vector khng gian SVPWM.
DCVTKG v1.2 11
Nguyn l v m phng iu ch vector khng gian
Biu din i lng in ba pha nh mt vector quay duy nht thay v l t hp ca ba thnh
phn mt pha ring l l ni dung c bn cho thut ton iu ch vector khng gian. y
cng l nn tng cho cc thut ton iu khin i tng ba pha hin nay nh iu khin
ng c ta t thng roto FOC, iu khin nghch lu ta in p li VOC ... Php biu
din vector quay a ra cch nhn nhn h thng ba pha nh mt i tng c th v nht
qun, gip ta hiu h thng mt cch sinh ng, l gii cc hin tng mt cch d dng,
cng nh thun li trong trong thit k h thng iu khin can thip vo i tng.
Trong mc ny mnh s gii thiu v php biu din h thng ba pha bng vector quay. Nhn
tin mnh cng gii thiu v vic s dng vector quay l gii v cc hin tng xy ra trn
li in ba pha, y l phn mnh c trong qun L thuyt cng sut tc thi -
Instantaneous Power Theory and Applications to Power Conditioning ca tc gi Akagi.
V ni dung ca mc 2, cc bn mun xem thm c th c sch iu khin t ng truyn
ng in xoay chiu ba pha ca thy N.P Quang, chng 2 Vector khng gian ca cc i
lng ba pha. Chng ny thy vit vector khng gian trong ng dng iu khin ng c
xoay chiu ba pha, cch vit ngn gn, r rng. Ngoi ra cc bn cng c th c
Instantaneous Power Theory and Applications to Power Conditioning mc 2.5.1
Classifications of Three-Phase Systems mc ny h thng ba pha c xem st gc
nhn rng hn v mi hin tng xy ra trn li in ba pha u c th biu din qua ba
thnh phn vector thun, nghch, khng. y lm mc rt hay, mi lin h gia cc hin
tng xy ra trn li in vi s tham gia ca cc thnh phn vector quay c trnh by ht
sc sng sa v d hiu. Tuy phn ny c i hi xa so vi yu cu xy dng thut ton iu
ch vector khng gian. Nhng d sao, y cng l mc th v c, ng thi bn cng c
ci nhn tng qut hn v h thng in ba pha v c th khng nh rng php iu ch
DCVTKG v1.2 12
Nguyn l v m phng iu ch vector khng gian
vector khng gian c th iu ch ra mi dng in p ba pha thng qua php tng hp vector
quay.
ua U m cos(t )
2
ub U m cos(t )
3
2
uc U m cos(t 3 )
Thng thng chng ta hay thy h thng in 3 pha c biu din qua biu thi gian.
y, cc thnh phn in p s c biu din bng cc gi tr tc thi thay i theo thi
gian. Nh hnh 2, h thng in 3 pha l tng s bao gm 3 th hnh sin. Trong ,
th ca pha b, pha c c dng ging nh pha a nhng ln lt li li mt khong bng 1/3 chu
k tng ng lch pha 2/3.
DCVTKG v1.2 13
Nguyn l v m phng iu ch vector khng gian
0.4
0.2
-0.2
-0.4
-0.6
-0.8
-1
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
close all;
clear all;
% Plot 3 phase Voltge
f = 50; %50 Hz
% Time Vector
t = 0:0.0001:0.04;
figure (1)
plot(t,ua,'r','LineWidth',3);
hold on;
plot(t,ub,'g--','LineWidth',3);
plot(t,uc,'b:','LineWidth',3);
plot(t,us,'k');
grid on;
legend('pha a','pha b', 'pha c', 'ua + ub+ uc',1);
title('Dien ap 3 pha thu tu thuan - ly tuong','Fontsize', 15);
Ngoi cch biu din theo trc thi gian, h thng in ba pha cng c th biu din theo h
ton cc. ta cc, thng thng cc thng tin c quan tm chnh l bin v gc
pha. Cc i tng dao ng iu ha c biu din thnh cc vector quay vi chiu dng
l chiu ngc chiu kim ng h. Trong h ta ny, cc thnh phn in p c biu
din thnh cc vector quay quanh gc ta vi bin bng bin in p trong phng
trnh biu din min thi gian. Tc quay bng vi vn tc gc ca phng trnh biu
din in p. Chng ta thy rng h ta ny, cc thnh phn in p ua , ub , uc l cc
DCVTKG v1.2 14
Nguyn l v m phng iu ch vector khng gian
vector quay cng vn tc v cch nhau mt gc 2/3. Theo chiu dng, pha a gp trc x
trc ri n pha b, pha c nh vy pha b pha c ln lt chm pha hn pha a mt gc 2/3. V
3 vector quay cng mt vn tc nn ta thy tuy v tr tc thi ca cc vector c thay i
nhng khong cch gia chng l gi nguyn. Ta cng c th hnh dung, 3 vector in p
nh 3 ci a trn mt ci a ang quay vi vn tc gc bng t. Vi ci bn, 3 chic a
ang quay, nhng vi ci a 3 chic a l ng yn v khong cch gia chng l khng
i. y l u im ca php biu din ta cc, s tng quan v pha ca cc thnh phn
dao ng s c nhn thy mt cch r rng.
uc
ua x
2 / 3
/3
2
ub
uc ua
0.4
0.2
x 0
-0.2
-0.4
-0.6
ub
-0.8
-1
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
DCVTKG v1.2 15
Nguyn l v m phng iu ch vector khng gian
60
ub
nhng ngc chiu vi pha a. iu c
uc ub
ngha tng vector ca 3 thnh phn in p u cb
lun bng 0. ub
ua U m cos(t )
2
ub U m cos(t )
3
2
uc U m cos(t 3 )
Trong min thi gian, chng ta thy rng th ca pha c, pha b c dng ging nh pha a
nhng ln lt li li mt khong bng 1/3 chu k tng ng lch pha 2/3.
0.4
0.2
-0.2
-0.4
-0.6
-0.8
-1
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
DCVTKG v1.2 16
Nguyn l v m phng iu ch vector khng gian
close all;
clear all;
% Plot 3 phase Voltge
f = 50; %50 Hz
% Time Vector
t = 0:0.0001:0.04;
figure (1)
plot(t,ua,'r','LineWidth',3);
hold on;
plot(t,ub,'g--','LineWidth',3);
plot(t,uc,'b:','LineWidth',3);
plot(t,us,'k');
grid on;
legend('pha a','pha b', 'pha c', 'ua + ub+ uc',1);
title('Dien ap 3 pha thu tu nghich','Fontsize', 15);
Trong h ta cc, h thng ba pha th t nghch cng tng t nh h thng 3 pha thc t
thun nhng th t cc vector quay theo chiu dng s l vector a, c, b.
ub
ua x
2 / 3
/3
2
uc
DCVTKG v1.2 17
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 18
Nguyn l v m phng iu ch vector khng gian
2 2
us (ua ub 2uc ) vi 1
3 3
DCVTKG v1.2 19
Nguyn l v m phng iu ch vector khng gian
j j
uc
u 's (ua ub 2uc )
ua uc 240
uc ub ua uc ub ua
120
240
120
ub 120
ub
(1) (2)
j
2
us (ua ub 2uc )
us 3
u'
s
us
(3)
Hnh 10: Cc bc tng hp vector khng gian bng php chuyn i Clarke
Cc tnh cht ca vector in p ba pha (t phn ny v sau mnh s dng t vector in p
ch vector in p 3 pha c tng hp bng cng thc Clarke)
j j
uc
ub
ua us ua
uc 240
uc ub ua
120
120
240
ub 120 uc 240
us
240
ub 120
uc
ub
(1) (2)
Tng qut hn, php bin i Clarke c coi nh php phn tch thnh phn th t thun
trong h 3 pha bt k. Vi php bin i ngc, ta s thu c 3 pha tng ng vi thnh
phn ny trong li in theo cng thc:
ua 1
2
ub us
uc
Vic khi phc 3 thnh phn mt pha trong cng thc bin i ngc Clarke, n thun l
cc php dch pha ca vector khng gian i cc gc 2/3. Vi v tr vector khng gian trng
vi v tr pha a. Vn ny c th quan st thng qua hnh 10.
Trong h thng in p 3 pha c dng sin v cn bng (ch tn ti 1 thnh phn th t thun
hoc nghch), qu o ca vector khng gian u l mt ng trn, c bn knh bng vi bin
in p pha. Cn nu in p ca h sin nhng mt cn bng (tn ti c hai thnh phn th
t thun v nghch), th qu o vector u v nn s c dng elip, ng bn knh di c
ln bng bin thnh phn th t thun u p , ng bn knh ngn c ln bng hiu bin
DCVTKG v1.2 21
Nguyn l v m phng iu ch vector khng gian
in p ba pha sin
v cn bng
in p ba pha sin
v mt cn bng
p
u
u
p
un
Hnh 12: Qu o vector khng gian trn mt phng
nm c khi nim vector khng gian trong trin khai thut ton iu ch vector khng
gian th c l ch cn trnh by n y l . Tuy nhin, cc bn c c ci nhn rng
hn v khi nim vector in p ba pha, mnh s gii thiu nt cc thnh phn vector cn li,
cc bn quan tm c th c thm ti liu [2].
DCVTKG v1.2 22
Nguyn l v m phng iu ch vector khng gian
uc
u
u0
u u
b a
u0 u0 u
2 / 3
a u b 2 u
=
3
2
/
+ + a u
2
/3
/3
2 cb
u0
c u
2
b 2 u 2 u
u
u0 1 1 1 ua
1 2
u 1 ub
3 1 2
u uc
ua 1 1 1 u0
ub 1
2
u
1 2
uc u
2 2 1 3
us (ua ub 2uc ) vi 1 j
3 3 2 2
Tng ng vi:
2
2 1 3 1 3
u (ua ( j )ub j uc )
3 2 2 2 2
DCVTKG v1.2 23
Nguyn l v m phng iu ch vector khng gian
2 1 1 3 3
u (ua ub uc j ( ub uc ))
3 2 2 2 2
1 1 u
a
1
u 2 2 2
u ub
3 0 3 3
u
2 2 c
y l cng thc tnh ton thnh phn ca vector khng gian t cc gi tr tc thi uaubuc .
Sau khi xy dng cng thc ny, ta hy th kim tra mt vi tnh cht ca vector khng gian
trn phn mm Matlab.
Chng trnh sau minh ha li in 3 pha c hai thnh phn th t thun v nghch vi bin
l 1 v 0.15. Ta hy quan st dng th li in v kt qu php biu din vector quay.
Chng trnh v th
close all;
clear all;
% Clarke transform matric
Clarke = 2/3 * [1, -1/2, -1/2
0, sqrt(3)/2, -sqrt(3)/2];
% Frequency of Voltage
f = 50; %50 Hz
% Time Vector
t = 0:0.0001:0.04;
% Positive sequence
uap = cos(2*pi*f*t);
ubp = cos(2*pi*f*t - 2*pi/3);
ucp = cos(2*pi*f*t + 2*pi/3);
% Negative sequence
uan = 0.15*cos(2*pi*f*t);
ubn = 0.15*cos(2*pi*f*t + 2*pi/3);
ucn = 0.15*cos(2*pi*f*t - 2*pi/3);
% Total of Voltage sequences
ua = uap + uan;
ub = ubp + ubn;
uc = ucp + ucn;
us = ua + ub + uc;
DCVTKG v1.2 24
Nguyn l v m phng iu ch vector khng gian
uvp = Clarke * up;
uvn = Clarke * un;
uv = Clarke * u;
figure (1)
plot(t,ua,'r','LineWidth',3);
hold on;
plot(t,ub,'g--','LineWidth',3);
plot(t,uc,'b:','LineWidth',3);
plot(t,us,'k');
grid on;
legend('pha a','pha b', 'pha c', 'ua + ub+ uc',1);
title('Dien ap 3 pha','Fontsize', 15);
figure (2)
plot(uvp(1,:), uvp(2,:), 'r-.', 'LineWidth',3);
hold on;
plot(uvn(1,:), uvn(2,:), 'b:', 'LineWidth',3);
plot(uv(1,:), uv(2,:), 'k', 'LineWidth',3);
grid on;
set (gca,'Xlim',[-1.5 1.5], 'Ylim',[-1.5 1.5]);
legend('Positive sequence','Negative sequence', 'Total', 1);
title('Space Vector','Fontsize', 15);
Kt qu:
Dien ap 3 pha
1.5
pha a
pha b
1 pha c
ua + ub+ uc
0.5
-0.5
-1
-1.5
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
DCVTKG v1.2 25
Nguyn l v m phng iu ch vector khng gian
Space Vector
1.5
Positive sequence
Negative sequence
1 Total
0.5
X: -1 X: 0.15 X: 1.15
Y: 3.331e-016 Y: 3.469e-017 Y: 0
0
-0.5
X: 8.882e-016
Y: -0.85
-1
-1.5
-1.5 -1 -0.5 0 0.5 1 1.5
DCVTKG v1.2 26
Nguyn l v m phng iu ch vector khng gian
2.3.1.1 S m phng
Scope1 XY Graph
A A
Anpha
B B
C C Beta
1 1 u
a
1
u 2 2 2
u ub
3 0 3 3
u
2 2 c
DCVTKG v1.2 27
Nguyn l v m phng iu ch vector khng gian
2/3
Gain
<signal1> -1/3 1
<signal2>
<signal3> Anpha
Gain1 Add1
-1/3
Scope1 XY Graph
1 Gain2
A
A A
Anpha
B B 2
B
C C Beta 0
Gain5
ua 1sin(100 t )
2
ub 1sin(100 t )
3
2
uc 1sin(100 t 3 )
1
Scope1
XY AGraph
u_a
A A 2
Anpha
B B
B
C C u_b
Beta
2.3.1.3 Kt qu m phng
DCVTKG v1.2 28
Nguyn l v m phng iu ch vector khng gian
Nhn xt:
in p u trng pha vi in p ua
Hnh 20: in p u (trn) v u (di)
[1] Nguyn Phng Quang, iu khin t ng truyn ng in xoay chiu ba pha, NXB
Gio Dc
[4] Nguyn Phng Quang, Matlab v Simulink dnh cho k s iu khin t ng, NXB
Khoa hc v K thut H Ni, 2005
DCVTKG v1.2 29
Nguyn l v m phng iu ch vector khng gian
Cu trc ca chng bao gm 3 phn, theo trnh t t l thuyt ti thc hnh, bao gm:
DCVTKG v1.2 30
Nguyn l v m phng iu ch vector khng gian
G1 G3 G5
a b c
is L uN
Va
Cdc Vdc Vb
Vc
a b c
G4 G6 G2
DCVTKG v1.2 31
Nguyn l v m phng iu ch vector khng gian
V6 ,V1 ,V2 2/3 Vdc -1/3 Vdc -1/3 Vdc Vdc 0 2 / 3Vdc 0
u1
V1 ,V2 ,V3 1/3 Vdc 1/3 Vdc -2/3 Vdc 0 Vdc 2 / 3Vdc ( / 3)
u2
V2 ,V3 ,V4 -1/3 Vdc 2/3 Vdc -1/3 Vdc - Vdc Vdc 2 / 3Vdc (2 / 3)
u3
V3 ,V4 ,V5 -2/3 Vdc 1/3 Vdc 1/3 Vdc - Vdc 0 2 / 3Vdc ( )
u4
V4 ,V5 ,V6 -1/3 Vdc -1/3 Vdc 2/3 Vdc 0 - Vdc 2 / 3Vdc (2 / 3)
u5
V5 ,V6 ,V1 1/3 Vdc -2/3 Vdc 1/3 Vdc Vdc - Vdc 2 / 3Vdc ( / 3)
u6
u7 V1 ,V3 ,V5 0 0 0 0 0 0
u3 u2
vector, th nht nh phi thuc sector no
trong 6 sector k trn, v ta hon ton c th
II biu din vector in p ny bng tng ca 2
III I vector thnh phn, nm trn vi 2 vector
u4 u0 u7
u1 bin chun ca sector . T hnh 25, ta thy
DCVTKG v1.2 32
Nguyn l v m phng iu ch vector khng gian
Do T1 , T2 Ts nn cc gi tr k,l s nm trong
u5 u6 khong (0, 1). Thi gian cn li T0 Ts (T1 T2 )
Hnh 25: Tng hp vector khng gian
l thi gian iu ch vector khng.
u3 u2
G1 G3 G5
T1 l.Ts
u4 u0
u1
G4 G6 G2 u7 l.u1
Ts
u5 u6
u3 u2
G1 G3 G5
T1 l.Ts T2 k .Ts
2
k .u
u0
u4 u1
u7 l.u1
G4 G6 G2 Ts
u5 u6
u3 u2
G1 G3 G5 u k .u2 l.u1
2
k .u
T1 l.Ts T2 k .Ts T0 Ts T1 T2
u0
u4 u1
u7 l.u1
G4 G6 G2 Ts
u5 u6
DCVTKG v1.2 33
Nguyn l v m phng iu ch vector khng gian
hoc u7 ) theo phng php tng quan thi gian, vi chu k trch mu l Ts. Ti y ta
nm c v mt nguyn l ca thut ton iu ch vector khng gian. trin khai c hiu
qu thut ton ny, ta cn gii quyt thm cc vn sau:
Th t iu ch vector bin ti u
Thot nhn qua, ta s cho rng gii hn ca thut ton SVPWM l ng trn ngoi tip hnh
lc gic u vi bn knh bng di vector bin chun 2U DC / 3 . Tuy nhin, thc t th
phng php SVPWM khng c kh nng iu ch nh vy. Tham s gii hn chnh l chu
k bm xung Ts . Chng ta thy rng cc h s k,l trong cng thc t hp vector
DCVTKG v1.2 34
Nguyn l v m phng iu ch vector khng gian
u3 u2
3
/
U DC
u0
u4 2U DC / 3
u1
u7
Vng gii hn iu ch ca
phng php SVPWM
Vng gii hn iu ch in p
sin ca phng php SVPWM
u5 u6
Hnh 27: Gii hn iu ch ca thut ton SVPWM
V vic tnh ton chi tit gii hn ca php iu ch, cc bn c th xem ti liu [1] trang 86.
y mnh ch trch li kt lun nh sau: module ti a ca in p iu ch khng phi
ng trn ngoi tip m ch l hnh lc gic u. T y chng ta c th a ra kt lun tip
theo: in p iu ch c dng sin th qu o ca vector in p phi nm trong
ng trn ni tip hnh lc gic u vi bn knh bng U DC / 3 .
DCVTKG v1.2 35
Nguyn l v m phng iu ch vector khng gian
G1 0 1 1 1 u7 u2 u1 u0
G3 0 0 1 1
G5 0 0 0 1
G1 dn
G3 dn
G5 dn
t1 t2 t3 t4 t5 t6 t7
u0 u1 u2 u7 u2 u1 u0
DCVTKG v1.2 36
Nguyn l v m phng iu ch vector khng gian
u0 u1 u2 u7 u2 u1 u0
Sector 1: u0 u1 u2 u7 u2 u1 u0 u3 u2
Sector 2: u0 u3 u2 u7 u2 u3 u0 II
Sector 3: u0 u3 u4 u7 u4 u3 u0 III I
u4 u0 u7
u1
Sector 4: u0 u5 u4 u7 u4 u5 u0
IV VI
Sector 5: u0 u5 u6 u7 u6 u5 u0 V
Sector 6: u0 u1 u6 u7 u6 u1 u0
u5 u6
S1 S1 S1
S3 S3 S3
S5 S5 S5
S4 S4 S4
S6 S6 S6
S2 S2 S2
S1 S1 S1
S3 S3 S3
S5 S5 S5
S4 S4 S4
S6 S6 S6
S2 S2 S2
DCVTKG v1.2 37
Nguyn l v m phng iu ch vector khng gian
3.1.3 Nguyn l phn cng trong thc thi thut ton iu ch vector khng
gian
Kt thc mc 3.1.2 chng ta nm c trnh t iu ch cc vector bin theo tng sector
cng nh trt t ng ngt cc van tng ng. Bng mu xung iu ch cho php ta hnh
dung c kt qu ca phng php. Tuy nhin vn cn mt vn m chng ta cn thc
mc l cc vi x l s hot ng ra sao to ra c cc mu xung nh th? Mi lin h
gia kt qu tnh ton ca thut ton SVM v xung iu ch u ra ca vi x l? Mc 3.1.3 s
tr li nhng cu hi ny. Nguyn l hot ng ca phn cng s c trnh by khi qut
da trn cu trc ca vi x l TMS320F2812 ca hng Texas Instrument. Khi pht xung ca
vi x l ny l khi pht xung tiu biu v c bn nht ca dng DSP C2000 dng DSP ng
dng trong iu khin cng sut ca TI.
DCVTKG v1.2 38
Nguyn l v m phng iu ch vector khng gian
B n i xng
Khi so snh
Trong :
Cc thanh ghi lu thi im pht xung : bao gm ba thanh ghi lu thi im ng,
m van tng ng vi ba cp van ca khi nghch lu cu 6 van.
DCVTKG v1.2 39
Nguyn l v m phng iu ch vector khng gian
Gi tr m
Tc
Tb
B m i
xng
Ta
G5 dn
TS / 2
TS
DCVTKG v1.2 40
Nguyn l v m phng iu ch vector khng gian
phc v cho bi ton pht xung SVPWM, b qun l s kin EV cng bao gm cc khi
c bn trn. Nh Hnh 33, ta thy b nh thi dng chung General Purpose Timer c
mt b counter ng vai tr nh mt b m i xng. Thanh ghi Period trong b nh thi
dng chung c vai tr ci t chu k m tc chu k trch mu cho b counter. Cn thanh
ghi thi im pht xung v khi logic so snh th nm trong b so snh Full Compare
Units trong Hnh 33. Ta c th thy, b so snh ny gm 3 khi chc nng c lp, nhn
thng tin thi gian c s t b nh thi dng chung v to ra ba cp tn hiu iu ch cho ba
cp van. hiu k hn v tng khi chc nng ny, ta c th quan st hnh 35. y cc b
phn ca khi chc nng trn c th hin chi tit, b logic so snh (Compare Logic) nhn
thng tin t b counter ca khi nh thi dng chung 1 v thng tin t thanh ghi thi im
pht xung (Compare Register) to tn hiu ng m van. Tn hiu ny qua khi x l dead
band v logic u ra s tr thnh cc xung PWM iu khin cc van cng sut tng ng.
Mc 3.1.1 gii thiu s hnh thnh khng gian vector vi 6 vector bin chun v 2 vector
khng t cc trng thi ng - ct xc nh ca b nghch lu cu 6 van. ng thi, mc ny
trnh by phng php t hp ra vector in p t t cc vector bin chun. Minh ha bi
DCVTKG v1.2 41
Nguyn l v m phng iu ch vector khng gian
trnh t hp vector trong khng gian u k.u2 l.u1 thnh phng trnh t l thi gian iu
T2 T
ch k , l 1 vi T1 , T2 ln lt l thi gian iu ch cc vector bin u1 , u2 trong mt
Ts Ts
DCVTKG v1.2 42
Nguyn l v m phng iu ch vector khng gian
Gi tr m
Tc
Tb
Ta
Thi gian
G1 dn
G3 dn
G5 dn
T0 T1 T2 T T0 T T1 T0
t1 t2 t3 t4 0 t5 t 2 t7 t8
4 2 2 4 4 6 2 2 4
u0 u1 u2 u7 u2 u1 u0
TS / 2
TS
u0 : T00 t1 t8 2.t1
u1 : T1 t2 t7 2.t2
u2 : T2 t3 t6 2.t3
u7 : T07 t4 t5 2.t4 2.t1
DCVTKG v1.2 43
Nguyn l v m phng iu ch vector khng gian
u0 : T0 h T0 / 4
u1 : T1h T1 / 2
u2 : T2 h T2 / 2
u7 : T7 h T0 / 4
bng cc gi tr T0 / 2, T1 , T2 , T0 / 2 .
CPRM1: Ta T0 / 4
CPRM2 : Tb T0 / 4 T1 / 2
CPRM3 : T T / 4 T / 2 T / 2
c 0 1 2
DCVTKG v1.2 44
Nguyn l v m phng iu ch vector khng gian
3.2 Tnh ton v thc hin thut ton iu ch vector khng gian
Mc ch cui cng ca cc php iu ch l a ra c mt trt t ng ct cc van bn
dn sao cho in p u ra khi nghch lu sp s vi in p t. V vy, thng tin m ta
quan tm l thi im v thi gian cc van thc hin dn hay kha. Nh trnh by trong
mc nguyn l, phng php iu ch vector khng gian l phng php to ra vector in
p mong nun t cc vector bin chun. Trong mc ny mnh s trnh by chi tit vic tnh
ton thi im v thi gian iu ch cc vector bin to ra vector in p u ra mong
mun.
Tng t nh trong mc 3.1, mc ny s phn tch, xy dng cng thc chi tit cho trng
hp vector in p t nm trong sector 1. Vi trng hp vector nm trong cc sector
cn li, ti liu s ch dn kt qu m khng trnh by li na.
Trong vic tnh ton c th thi gian iu ch, vic bit c vector in p t hin ang
trong sector no (ang nm gia 2 vector bin chun no) l thng tin ht sc quan trng. V
n quyt nh cp vector bin chun no s c iu ch, hn na cc cng thc tnh thi
gian iu ch cho tng sector cng khc nhau. V vy, trc tin ta phi xc nh c sector
cha vector cn iu ch, da vo thng tin vector in p t.
Sau khi bit c vector in p t nm gia 2 vector bin chun no, ta i n tnh ton cc
vector thnh phn trn vector bin chun tng hp ra vector in p t da theo
phng php cng vector hnh hc. Kt thc bc ny, ta thu c t di vector thnh
phn so vi vector bin chun. y chnh l t l thi gian iu ch vector bin trong mt chu
k iu ch.
Mc 3.2 ny s ln lt gii quyt 3 bc trn. V cch thc trin khai, mnh trnh by da
theo chng trnh mu ca hng Texas Instrument trong ti liu [6] SPRU485A Digital
Motor Control Software Library mc SVGEN_DQ. V vy s c ch hi khc so vi ti liu
DCVTKG v1.2 45
Nguyn l v m phng iu ch vector khng gian
[1] ca thy Quang. y cng l nhng cng vic mnh tng lm trong thi gian thc tp ti
phng th nghim trong trng, mnh s gii thiu sau y cc bn tham kho thm.
Trc khi trnh by c th, mnh mun nh s li tng sector trong khng gian. Vic ny
gip thun tin trong vic p dng phng php trong vi x l, mnh s trnh by c th pha
di:
u3 u2 u3 u2
II I
III I V III
u4 u0 u7 u4 u0 u7
u1 u1
IV VI IV II
V VI
u5 u6 u5 u6
0 1
x
y 3 1 u
2
2 u
z
3 1
2 2
x>0
y<0
z<0
a<
b<
b< 0
0
c>
a>
0
c> 0
0
X 0
z<
z> 0
c
0
y< >0
y>
x
u3 0
u3 u2 u2
x>
I
a<0 V III
u0 u7 a a>0 u0 u7
u1
b>0 u1
b<0
c>0
u4
c<0 u4 IV II
VI Y
Z z>
0 0
u5 u6 z> u5 u6
y<
0 0
y< x<
b 0 0
x<
0
b> 0
c<
0
a<
b>
c< 0
0
a>
0
x<0
y>0
Hnh 38: Du in p pha U a ,U b ,U c trong z>0
Hnh 39: Du in p XYZ trong khng gian
khng gian vector vector
x 0 X 1
x 0 X 0
y 0 Y 1
y 0 Y 0
z 0 Z 1
z 0 Z 0
DCVTKG v1.2 47
Nguyn l v m phng iu ch vector khng gian
Vector u2 s i din cho vector bin bn tri. Tng t nh vy, (T1 , T2 ) ln lt i din
cho thi gian iu ch vector bin bn phi v bn tri.
u0 t1.u1 u1 sau:
u7
u
Ts T1 T2 T0
T1 T2
Hnh 40: Vector in p iu ch c tng hp trong u T .u1 T .u2
sector 3 s s
* T1 T2 * T1 2 T2 2
u T . u1 T . u2 cos( 3 ) u T . 3 .udc T . 3 udc .cos( 3 )
s s s s
u* T2 . u sin( ) u* T2 . 2 .u sin( )
Ts
2
3 Ts 3 dc 3
by sau.)
DCVTKG v1.2 48
Nguyn l v m phng iu ch vector khng gian
u*
u
udc / 3
*
u u
u / 3
dc
T1 1
t1 T 2 ( 3u u ) 3 1
t1 u
t 2
s
2
t T2 u 2 0 u
1
2 Ts
Cng thc trn th hin mi quan h gia t l thi gian iu ch (chia tn s trch mu) v t
DCVTKG v1.2 49
Nguyn l v m phng iu ch vector khng gian
Thi gian iu ch t1 t2 t1 t2 t1 t2 t1 t2 t1 t2 t1 t2
Thi gian iu ch t1 t2 t2 t1 t1 t2 t2 t1 t1 t2 t2 t1
sector cn li nh sau:
Sector
III I V IV VI II
3 1 3 1 0 1 0 1 3 1 3 1
2 2 2 2 3
1 3 1 2 2 2 2
0 1 3 1 2 2 2 2 3 1 0 1
2 2 2 2
T bng trn ta thy cc h s tnh ton thi gian iu ch u xoay quanh ba cng thc sau:
DCVTKG v1.2 50
Nguyn l v m phng iu ch vector khng gian
a u
1
b ( 3u u )
2
1
c 2 ( 3u u )
CPRM1: Ta T0 / 4
CPRM2 : Tb T0 / 4 T1 / 2
CPRM3 : T T / 4 T / 2 T / 2
c 0 1 2
tnh li bng:
(1 (t1 t 2 )) * Ts
Ta 4
(1 (t1 t 2 )) * Ts t1 * Ts
Tb
4 2
(1 (t1 t 2 )) * Ts t1 * Ts t2 * Ts
Tc
4 2 2
DCVTKG v1.2 51
Nguyn l v m phng iu ch vector khng gian
N Ta 1 t1 t2
Ta
Ts / 2 2
N Tb 1 t1 t2
Tb t1
Ts / 2 2
T 1 t1 t2
TcN c t1 t2
Ts / 2 2
S1 S1
S3 S3
S5 S5
S4 S4
S6 S6
S2 S2
S5 S5
S4 S4
S6 S6
S2 S2
DCVTKG v1.2 52
Nguyn l v m phng iu ch vector khng gian
1 t1 t2
X1 2
X 2 X 1 t1
X X t
3 2 2
T mu chuyn mch hnh 25, ta c th xy dng cng thc tnh thi im pht xung Ta, Tb,
Tc cho tng sector theo cc gi tr X1 , X 2 , X 3 nh sau:
DCVTKG v1.2 53
Nguyn l v m phng iu ch vector khng gian
Chng c vit theo trnh t xy dng thut ton, cc khi chc nng c m phng theo
th t:
Khi xc nh thi gian chuyn mch: bao gm cc khi tnh thi gian iu ch vector
bin v khi tnh thi gian pht xung TaTbTc
M hnh m phng: din di chi tit tng khi trong m hnh, cc tham s ci t
3.3.1.1 S m phng
Chng trnh m phng nhm kim tra hot ng ca thut ton xc nh sector cha vector
in p t trong khng gian vector. S m phng bao gm mt khi pht tn hiu in p
3 pha, mt khi chuyn h ta Alpha Beta v mt khi xc nh sector. Bng cch ci t
chiu quay ca vector in p , ta quan st th t cc sector c tnh ton bi khi xc nh
sector v nh gi chnh xc ca thut ton.
DCVTKG v1.2 54
Nguyn l v m phng iu ch vector khng gian
XY Graph
Scope2 >= 0
X
A A
Anpha Anpha ZYX
B B Y >= 0 2
C C Beta Beta
Z Gain Add Scope
Scaling1 Clarke_Uab xyz Calcuator
>= 0 4
Gain1
>= 0
u_a Scope5
0 1
X
Y 3 1 U s
2
2 U s
Z
3 1
2 2
-1*sqrt(3)/2
XY Graph Product
1
3
Anpha
>= 0 Z
Scope2 Add
sqrt(3)/2
X
A A
Anpha Anpha
Product1
ZYX
B B Y >= 0 2 2
C C Beta Beta Y
Z Gain Add Scope Add1
Scaling1 Clarke_Uab XYZ -1/2
>= 0 4
Gain1 Product2
>= 0
2 1
u_a Scope5 Beta X
3.3.1.2.2 Xc nh v tr sector
V tr ca sector cha vector in p c xc nh theo khong du ca in p xyz nh
trnh by trong mc 3.2.1 Xc nh sector cha vector cn iu ch
DCVTKG v1.2 55
Nguyn l v m phng iu ch vector khng gian
x>0
y<0
z<0
X 0
z<
z> 0
0
0
y< 0
y>
x>
u3 0
u2
x>
I
V u0 u7
III
u1
u4 IV II
VI Y
Z z>
0 0
z> u5 u6
y<
0 0
y< x<
0 0
x<
x<0
y>0
z>0
Hnh 44: Cc khong du ca in p xyz v cc sector tng ng
Gi tr sector ny c tnh ton bng mt s nh phn ZYX(2) theo khong du ca h in
p xyz nh sau:
x 0 X 1
x 0 X 0
y 0 Y 1
y 0 Y 0
z 0 Z 1
z 0 Z 0
Hnh 45: Tnh ton v tr sector
ZYX(2) = (Z << 2) + (Y<<1) + X
ua 1sin(100 t )
2
ub 1sin(100 t )
3
2
uc 1sin(100 t 3 )
DCVTKG v1.2 56
Nguyn l v m phng iu ch vector khng gian
u3 u2
I
V III
u0 u7
u4 u1
IV II
VI
u5 u6
Hnh 48: Cc sector trong khng Hnh 49: Th t sector i vi vector in p quay theo
gian vector thnh phn th t thun
Nhn xt:
DCVTKG v1.2 57
Nguyn l v m phng iu ch vector khng gian
ua 1sin(100 t )
2
ub 1sin(100 t )
3
2
uc 1sin(100 t 3 )
u3 u2
I
V III
u0 u7
u4 u1
IV II
VI
u5 u6
Hnh 52: Cc sector trong khng Hnh 53: Th t sector i vi vector in p quay theo
gian vector thnh phn th t ngch
Nhn xt:
DCVTKG v1.2 58
Nguyn l v m phng iu ch vector khng gian
3.3.2.1 S m phng
Thnh phn chnh ca s m phng l khi tnh ton thi im pht xung TaTbTc. B ny
gm 2 thnh phn: khi xc nh sector cha vector in p t ( xy dng nh trn) v
khi tnh ton TaTbTc theo tng sector.
u u Sector
Selector
ua ubuc u u
sector
Clarke
u u TaTbTc
TaTbTc Calculator
M hnh
tng t M hnh gin on
Tt nhin, cc cng thc tnh ton l khc nhau mi sector. V vy, vic p dng cng thc
no ph thuc vo thng tin sector cha vector cn iu ch. S tng qu ca khi tnh
ton TaTbTc c trnh by nh Hnh 55.
DCVTKG v1.2 59
Nguyn l v m phng iu ch vector khng gian
Sector
Sector1
Xc nh t1t2 t Tnh ton TaTbTc
t1t2
Tnh ton
Sector2
Sector3
cc bin abc TaTbTc t t1t2
u u theo sector theo sector
cc bin Sector4
Sector5
a,b,c Sector6
1 t1 t2
X1
Sector
III I V IV VI II 2
a u c c a a b b X 2 X 1 t1
a b b c c a X X t
1 3 2 2
b ( 3u u )
2
1 Sector III I V IV VI II
c 2 ( 3u u ) Ma trn tnh ton cc gi tr t1t2 Ta X1 X 2 X 3 X 3 X 2 X1
Tb X 2 X1 X1 X 2 X 3 X3
Tc X 3 X 3 X 2 X1 X1 X2
Thi im pht xung TaTbTc
Hnh 55: S khi TaTbTc Calculator
Trong s m phng ny, nhm nng cao tnh chn thc ca php m phng, mnh s
khi pht tn hiu t l m hnh lin tc v khi tnh ton thi im pht xung l m hnh
gin on (nh Hnh 54). Nh vy, qu trnh tnh ton thi im pht xung s c thc hin
sau mi khong thi gian cch u. Khong thi gian ny tng ng vi gi tr chu k trch
mu ca cc b iu ch trong thc t l Ts = 0.1 ms (fs = 10 kHz). Nh trnh by trong
ph lc 4.1, vic ci t chu k trch mu cho m hnh tnh ton TaTbTc, ta ch cn khai bo
ti v tr u vo ca m hnh tc l ti khi Clarke. M hnh tn hiu t ni vi m hnh tnh
ton TaTbTc qua mt khu Zero-Order Hold chuyn tham s Sample Time.
DCVTKG v1.2 60
Nguyn l v m phng iu ch vector khng gian
In2 TaTbTc
[Tc]
Sector5
Hnh 56: M hnh m phng khi tnh ton thi im pht xung TaTbTc
Tham s m phng:
%______________________Frequency Parameter__________________________
T_i = 1e-6; % Time for fixstep simulation
fs = 10000; % sample frequency 10kHz
Ts = 1/fs; % Sample Period
%_______________________Voltage Parameter__________________________
Ur = 0.5; % Refernce Voltage Amplitude,
% gia tri tuong doi(tinh theo (udc/sqrt(3)))
Vic cu hnh tham s thi gian trch mu cho cc khi trong m hnh c trnh by nh
trong mc 3.3.2.1. hin th trc quan tham s cu hnh ny, ta c th vo mc Format ->
Sample Time Display -> All, cc gi tr Sample time s hin th theo mu sc nh hnh di.
T hnh ny ta thy sau khi Zero-oder Hold cc khi pha sau u c mu xanh tc khi
gin on vi chu k trch mu Ts = 0.1 ms ng nh mong mun ca ta khi xy dng m
hnh m phng. Kt qu ny do tnh k tha tham s Sample time c ci t mc nh
trong cc khi thng dng ca Simulink (xem ph lc 4.1).
Anpha
D2 Sector
Sector D2
[Ta]
Beta D2
A
D2 Anpha
Sector Selector Scope2 [Tb] B
D2
D2 C Beta
[Ta] [Tc]
Clarke_Uab1 XY Graph
[Tb]
D2
[A]
[Tc]
D2
CBA TaTbTc D2
[Ta]
D2
Sector1 D2
<signal1>
D2 Scope4
<signal2> D2
D2 <signal3> [A]
CBA TaTbTc D2
Cont D2 Scope3
A In1 Out1 A D2 D2
Cont D2 Anpha Sector2 [Ta]
B In2 Out2 B
Cont D2 D2
C In3 Out3 C Beta D2
CBA TaTbTc D2 D2
[B]
Voltage Source Zero-Order Clarke D2
Anpha D2 Sector3 D2
Hold CBA Scope5 [Tb]
[A] Beta D2
CBA TaTbTc
[B] ABC Transform
D2
Sector4 [C]
[C] D2 Scope1
D2
D2 [Tc]
In2 TaTbTc
Sector5
D2
In2 TaTbTc Multiport
Switch
Sector6
DCVTKG v1.2 62
Nguyn l v m phng iu ch vector khng gian
Cont D2
1 1
In1 Out1
Zero-Order
Hold
Cont D2
2 2
In2 Out2
Zero-Order
Hold1
Cont D2
3 3
In3 Out3
Zero-Order
Hold2
Khi xc nh sector
>= 0
X
1 Anpha
Y >= 0 2 1
Anpha
2 Beta
Z Sector
Gain Add
Beta XYZ
>= 0 4
Gain1
Khi tnh ton thi im pht xung c trnh by trong mc 3.2.2 v 3.2.3, v m t
trong Hnh 55. Qu trnh trin khai tnh ton thi im pht xung c 3 php tnh:
DCVTKG v1.2 63
Nguyn l v m phng iu ch vector khng gian
Anpha
Sector
Sector
[Ta]
sector, tnh ton b tham s X1X2X3 v xc nh thi im
T gi tr t1t2 v v tr Beta A
Sector Selector Scope2 [Tb] B
C
pht xung TaTbTc [Ta] [Tc]
Clark
Chu ky trich mau
[Tb]
[A]
[Tc]
CBA TaTbTc
[Ta]
Sector1 <signal1> Scop
<signal2>
CBA TaTbTc <signal3> [A]
Scope3
A In1 Out1 A
Anpha Sector2 [Ta]
B In2 Out2 B
C In3 Out3 C Beta
CBA TaTbTc
[B]
age Source Zero-Order Clarke
Anpha Sector3
Hold CBA Scope5 [Tb]
[A] Beta
CBA TaTbTc
[B] ABC Transform
Sector4 [C]
[C]
In2 TaTbTc
[Tc]
Sector5
DCVTKG v1.2 64
Nguyn l v m phng iu ch vector khng gian
-1*sqrt(3)/2
Product
1 C
Anpha
Add
sqrt(3)/2
Product1
B
1
CBA
Add1
1/2
Product2
A
2
Beta
X1
t1
<signal1> C
1 X2
t2
1
CBA <signal2> X3
B TaTbTc
Ton_Canculation
B X1
t1
1
1 <signal2> X2
-1 TaTbTc
CBA <signal3> t2
-A X3
Gain Ton_Canculation
Khu tnh ton gi tr thi im pht xung TaTbTc t bin t1t2 bao gm 2 bc:
Tnh b tham s X1 X 2 X 3
DCVTKG v1.2 65
Nguyn l v m phng iu ch vector khng gian
1
1/2 1
X1
B X1 Subtract
t1
1
<signal2> X2
-1 TaTbTc
<signal3> t2 2
-A X3 1
X2
Gain t1 Add
Ton_Canculation
2 3
X3
t2 Add1
3.3.2.3 Kt qu m phng
ng thi im pht xung thay i t 0.25 n 0.75 c bin bng 0.5 tng ng
vi bin tn hiu t. iu ny cho thy, bin TaTbTc t l thun vi bin
in p u vo. in p t cng ln th bin thi im pht xung cng cao
DCVTKG v1.2 66
Nguyn l v m phng iu ch vector khng gian
Hnh 69: Cc cu trc iu khin PWM c bn: (a) iu khin vng h, (b) iu khin dng
vng kn
DCVTKG v1.2 67
Nguyn l v m phng iu ch vector khng gian
Trong m hnh m phng ny, mnh s dng cc khi trong th vin SimPowerSystems
m phng cc thnh phn trong mch cng sut nh b nghch lu cu 6 van IGBT, ti RL, ..
Nu cc bn cha tip xc vi SimPowerSystems th c th c ti liu [7] trong mc ti liu
tham kho, nh mnh ch dn trong Hng dn s dng. Sau , lm quyen vi m
hnh iu khin chnh lu cu 6 van IGBT, cc bn qua ph lc 5.3 M phng phng php
iu khin gii tr. y l mt ng dng m phng n gin trong iu khin nghch lu
cu. Sau khi chy m phng xong v d ny, cc bn c th t tin tr mc 3.3.3 xy dng
m hnh iu khin nghch lu vng h theo thut ton SVPWM
3.3.3.1 S m phng
Reference PWM
SVPWM
Voltage Hardware
u u Ta
uref Tb
u Tc
u
G1 G3 G5
La Ra
Lb Rb
Udc
Lc Rc
G4 G6 G2
DCVTKG v1.2 68
Nguyn l v m phng iu ch vector khng gian
thng tin in p mong mun u ra b nghch lu, 1 khi tnh ton thut ton SVPWM,
mt khi m phng cu trc phn cng ca vi x l, h m phng mch van v cc linh kin
vt l nh t, cun, in tr. Trong , khi m phng cu trc phn cng vi x l hot ng
theo nguyn l ca DSP C2000 nh trnh by mc 3.1.3, cc cun v tr l ti u ra ca
khi nghch lu.
Voltage Source
L R uref 1 is
K
R sL
DCVTKG v1.2 69
Nguyn l v m phng iu ch vector khng gian
22/06/2016
[Ual]
[Uar] [Ube]
[Ubr] [Ube]
[Ual] Ualpha & Ubeta
[Ucr]
TaTbTc [Ia]
A In1 Out1 A
Anpha
Ual [Ib]
B In2 Out2 B
TaTbTc T Puse
C In3 Out3 C Beta
[Ic] Is
Ubt
Vref Zero-Order Clarke_Uab PWM
Hold SVPWM Hardware [Uar]
[Ia]
[Ia]
Scope1
Scope2 [Ib]
i
+ -
g [Ic] 1
[Uar] K
+ + i L.s+R
A -
Udc Mo hinh Mo hinh t
A A
B + i khoi SVPWM
- - B B
[Ia]
C i C C
+ -
Three-Phase
Series RLC Branch
+ v
-
[Ua] Note:
+ v + khoi SVPWM cung vo
[Ub]
- K= Umax = Udc/sqrt(3)
Continuous +
- v
[Uc]
+ Mo hinh tai RL la mot
powe rgui
%_______________________Voltage Parameter__________________________
% Source
Udc = 12; % 60; 30;12 V
Umax = Udc/(sqrt(3));
Uc = Udc*2/3;
% Load RL
Rl = 0.5; % dien tro cua cuon cam
DCVTKG v1.2 70
Nguyn l v m phng iu ch vector khng gian
Rr = 0; % dien tro tai
R = Rl + Rr;
L = 0.5e-3;
Zl = omega*L;
Z = sqrt(R*R + Zl*Zl);
Anpha Sector
Sector
Beta
Sector Selector1
CBA TaTbTc
Sector1
CBA TaTbTc
Signal value
1 Sector2 in (0 - 1)
Ual
2
CBA TaTbTc
1
Ubt
Anpha Sector3 TaTbTc
CBA Saturation
Beta
CBA TaTbTc
ABC Transform1
Sector4
In2 TaTbTc
Sector5
DCVTKG v1.2 71
Nguyn l v m phng iu ch vector khng gian
Khi m phng phn cng PWM Hardware hot ng theo nguyn l ca b PWM trong cc
DSP dng C2000 ca TI. C ch hot ng c th c nn trong mc 3.1.3, mt cch
khi qut, cu trc ca cc b PWM ny gm 3 b phn chnh:
B m ln xung i xng
Khi so snh
DCVTKG v1.2 72
Nguyn l v m phng iu ch vector khng gian
Timer
Time
Repeating
Sequence
q-
<= In1
q+
Relational
Subsystem
Operator
Sampling q-
1 TaTbTc <signal1>
<= In1
1 In1 Out1
q+
z <signal2> 1
T <signal3> Relational
Subsystem1 Puse
Triggered Operator1
Subsystem
q-
<= In1
q+
Relational
Subsystem2
Operator2
1 boolean 2
In1 q+
NOT 1
q-
DCVTKG v1.2 73
Nguyn l v m phng iu ch vector khng gian
ny khng mang li s thay i no trong kt qu m phng ngoi vic tng thm khi lng
tnh ton cho my tnh v thi gian m phng nn mnh ch cc bin m l gi tr tng
i m thi. Nh vy, cc gi tr TaTbTc s c gi nguyn khi a ti b so snh. B m
s c ci t gi tr m t 0 n 1 tng ng vi i lng thi gian t 0 Ts/2.
Cu to chi tit ca tng khi c din t nh sau:
DCVTKG v1.2 74
Nguyn l v m phng iu ch vector khng gian
Repeating
Sequence
Cont
Cont q-
<= In1 Cont
q+
Relational
Subsystem
Operator
Cont
Sampling D1 q-
1 <= Cont
D2 TaTbTc
D2 D1 D1
<signal1> In1
1 In1 Out1 Cont
D1
<signal2> q+ Cont
z 1
T <signal3> Relational
Subsystem1 Puse
Triggered Operator1
Subsystem
Cont
Cont q-
<= In1 Cont
q+
Relational
Subsystem2
Operator2
m phng hot ng ny, chng trnh s dng khi Trigger ca Simulink pht hin
sng ln ca b m Repeating Sequence. Vo mi thi im b m bt u dm ln th
d liu t khi Unit Delay mi c y ra cc khi so snh.
Trigger
1 1
In1 Out1
Nh trnh by trong phn l thuyt mc 3.1.3, khi so snh c vai tr so snh gi tr trong
thanh ghi thi im pht xung v gi tr hin thi ca b m i xng t a ra xung
DCVTKG v1.2 75
Nguyn l v m phng iu ch vector khng gian
ng ngt tng ng. Trong chng trnh m phng, mnh s dng khi Relational
Operator lm vai tr ca khi so snh. Khi so snh gm 3 b Relational Operator tng
ng vi 3 pha nhnh van c iu khin. Trong mc la chn thuc tnh logic, ta chn <=
tng ng gi tr logic u ra = 1 khi gi tr m ca b Timer vt qua gi tr thi im pht
xung lu trong thanh ghi so snh.
3.3.3.3 Kt qu m phng
22/06/2016
[Ual]
[Uar] [Ube] [Ua]
[Ubr] [Ube]
[Ual] Ualpha & Ubeta
[Ucr] [Uar] K Scope3
[Ia]
TaTbTc
A In1 Out1 A
Anpha
Ual [Ib] [Ua] A
Anpha
B In2 Out2 B
TaTbTc T Puse
C In3 Out3 C Beta
[Ic] Is [Ub] B Voltage
Ubt
Vref Clarke_Uab Beta
Zero-Order PWM [Uc] C To Workspace1
Hold SVPWM Hardware [Uar] Clarke_Uab1
[Ual]
[Ia] K Vm
[Ia]
Scope1 [Ube]
Gain2 To Workspace
Scope2 [Ib]
+ -i
g [Ic] 1
[Uar] K
+ i
A + - L.s+R [Ua]
Udc Mo hinh Mo hinh tai RL
A A
B + -i B B
khoi SVPWM Scope5
- [Ia] Scope4
C
C C
+ i
- Three-Phase
Series RLC Branch Note:
+
- v
[Ua]
+ khoi SVPWM cung voi bo nghich luu hoat dong nhu mot khau khuyech dai voi he so bang
+ v [Ub]
K= Umax = Udc/sqrt(3)
-
Continuous + v [Uc] + Mo hinh tai RL la mot khau quan tinh bac mot co dang: 1/(Ls + R)
-
powe rgui
Thoi gian dan t1,t2: dat trong don vi tuong doi voi chu ky trich mau Ts
t1 = T1/Ts
DCVTKG v1.2 76
Nguyn l v m phng iu ch vector khng gian
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% File: OPenLoop_SVPWM_plot.m %
%
% Comment: Print file to plot singnal of SIMULINK %
% model OPenLoop_SVPWM.mdl
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% ----------------------Grid plot---------------------------------
figure(1);
Time = Grid.time;
Va = Grid.signals.values(:,1);
Vb = Grid.signals.values(:,2);
Vc = Grid.signals.values(:,3);
plot(Time,Va,'b');
hold on;
plot(Time,Vb,'r');
plot(Time,Vc,'g');
grid on;
set (gca,'Ylim',[-15 15],'Fontsize', 13);
title('Current');
figure(2);
Alpham = Vm(:,1);
Betam = Vm(:,2);
Alpha = Voltage(:,1);
Beta = Voltage(:,2);
%Plot Figure
plot(Alpha,Beta,'b','LineWidth',2);
hold on;
plot(Alpham,Betam,'r');
grid on;
%set (gca,'Ylim',[-1 1],'Xlim',[-1 1],'Fontsize', 13);
title(' Trajectory of Gripd and Module Voltage Vector');
figure(3);
% Init
t = PWM.time;
Ta = PWM.signals.values(:,1);
Tb = PWM.signals.values(:,2);
Tc = PWM.signals.values(:,3);
%Caculating from 0.1s to 0.2s
%Plot
plot(t, Ta,'m-');
hold on;
plot(t, Tb,'r-');
plot(t, Tc,'b-');
grid on;
set (gca,'Ylim',[-0.1 1.1],'Fontsize', 13);
title('Ta,,Tb and Tc(Pu)');
%-------------------------------Phase a--------------------------------
figure(4);
% Init
t = Pa.time;
Va = Pa.signals.values(:,1);
DCVTKG v1.2 77
Nguyn l v m phng iu ch vector khng gian
Vam = Pa.signals.values(:,2);
%Caculating from sample 60001 to sample 80001
tnew = t(round(length(t)*60001/80001):end);
Vanew = Va(round(length(Va)*60001/80001):end);
Vamnew = Vam(round(length(Vam)*60001/80001):end);
%Plot
plot(tnew, Vanew,'g-');
hold on;
plot(tnew, Vamnew,'r-','LineWidth',2);
grid on;
set (gca,'Xlim',[tnew(1) tnew(end)],'Fontsize', 13);
title('Reference Voltage and PWM Voltage');
in p bng gi tr U DC / 3 : in p t gp gii hn iu ch
in p t ln hn gi tr U DC / 3 : in p t nm ngoi kh nng iu ch ca
phng php.
a) in p t c gi tr nh hn U DC / 3
80 U DC
Trong trng hp ny bin vector in p t c gi tr bng U r 5.5V . Mnh
100 3
cng xin nhc li l gi tr ci t cho khi in p t Voltage Source l i lng tng
i, tnh theo n v (1/( U DC / 3 )), U ref U r / U DC / 3 .
DCVTKG v1.2 78
Nguyn l v m phng iu ch vector khng gian
Trajectory of Gripd and Module Voltage Vector Reference Voltage and PWM Voltage
8 8
6 X: -4.008 6
Y: 6.922
X: -1.039
4 Y: 5.444 4
2
2
X: 7.999
Y: 0.01004
0
0
-2
-2
-4
-4
-6
-6
-8
-8
0.06 0.065 0.07 0.075 0.08
-8 -6 -4 -2 0 2 4 6 8
DCVTKG v1.2 79
Nguyn l v m phng iu ch vector khng gian
Ta,Tb and Tc(Pu) Three phase Load Current
15
1
10
0.8
5
0.6
0
0.4
-5
0.2
-10
0
-15
0 0.02 0.04 0.06 0.08 0 0.02 0.04 0.06 0.08
Hnh 88: Thi im pht xung TaTbTc Hnh 89: Dng in nghch lu
Hnh 88 biu din kt qu thi im pht xung TaTbTc theo n v tng i chia mt na
chu k bm xung. Qu o ca cc tn hiu Ta, Tb, Tc ln lt chm pha 120. Bin tn
hiu thay i t 0.1 n 0.9, rng 0.9 - 0.1 = 0.8 tng ng vi bin tn hiu t
U r 80 /100*U max .
-10
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
Time (s)
0.25
0.2
0.15
0.1
0.05
0
0 5 10 15 20
Harmonic order
DCVTKG v1.2 80
Nguyn l v m phng iu ch vector khng gian
thnh cng trong vic to ra in p xoay chiu 3 pha t ngun in mt chiu bng vic
t chc ng ct t hp 6 van IGBT.
kim tra tnh chnh xc ca phng php iu ch, mi quan h gia tn hiu in p t
v p ng dng ti thc ta s quan st qua kt qu m phng sau y:
Hnh 91: M hnh kim tra mi lin h gia kt qu thc v m hnh thut ton
Trong nhng phn trc chng ta tng kt lun rng khi iu ch vector khng gian c
vai tr nh mt khu p t in p u ra, hay mt b phn c vai tr nh mt khi DAC
trong vic bin vector in p t di dng con s thun ty thnh cc i lng in p
thc mang th nguyn l Vol. M hnh Hnh 91 nhm kim tra li kt lun trn. M hnh
c xy dng da trn s n gin Hnh 71 v m hnh ton hc Hnh 72. Trong m
hnh ny khi iu ch vector khng gian c m hnh ha nh mt khu khuch i vi
thi gian p t l tc thi v h s khuch i K bng gi tr tham chiu cho in p tng
i K U DC / 3 .
-5
-10
-15
0.04 0.05 0.06 0.07 0.08
DCVTKG v1.2 81
Nguyn l v m phng iu ch vector khng gian
Dong dien tai va dong mo hinh
10
-5
DCVTKG v1.2 82
Nguyn l v m phng iu ch vector khng gian
-5
-10
0.07 0.072 0.074 0.076 0.078 0.08
-5
-5.5
-6
DCVTKG v1.2 83
Nguyn l v m phng iu ch vector khng gian
b) in p t c gi tr bng U DC / 3
Trajectory of Gripd and Module Voltage Vector Reference Voltage and PWM Voltage
8 8
6 6
4 4
2 2
0 0
-2 -2
-4 -4
-6 -6
-8 -8
-8 -6 -4 -2 0 2 4 6 8
0.06 0.065 0.07 0.075 0.08
Hnh 96: Qu o vector in p Hnh 97: in p iu ch v in p t
0.2
-10
0
-15
0 0.02 0.04 0.06 0.08
0 0.02 0.04 0.06 0.08
Hnh 98: Thi im pht xung TaTbTc Hnh 99: Dng in nghch lu
Cng vi s tng ln ca in p iu ch, bin ca ng TaTbTc cng tng theo v t
gi tr ti a t 0 1. Nh vy, cc gi tr thi im pht xung lp y gi tr m ca b
m PWM. p ng dng in tng n gi tr 13 A v vn gi c dng sin vi ch s
THD thp 0.79%
DCVTKG v1.2 84
10
Nguyn l v m phng
-10
iu ch vector khng gian
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
Time (s)
Mag (% of Fundamental)
0.3
0.2
0.1
0
0 5 10 15 20
Harmonic order
Trajectory of Gripd and Module Voltage Vector Reference Voltage and PWM Voltage
10 8
8
6
6
4
4
2
2
0 0
-2
-2
-4
-4
-6
-8
-6
-10 -8
-10 -8 -6 -4 -2 0 2 4 6 8 10 0.06 0.065 0.07 0.075 0.08
Hnh 101: Qu o vector in p Hnh 102: in p iu ch v in p t
C th thy vector in p iu ch vt ra ngoi hnh lc gic u, trong trng hp ny
l ng trn ngoi tip vi bn knh bng bin vector bin chun 2U DC / 3 .
Hnh 103: Thi im pht xung TaTbTc Hnh 104: Dng ti nghch lu
C th thy khi vector in p t vt ra ngoi ng trn ni tip hnh lc gic u, thi
im pht xung cng vt ra ngoi kh nng iu ch ca b PWM. Nhn Hnh 103 c th
DCVTKG v1.2 85
Selected signal: 4 cycles. FFT window (in red): 3 cycles
Nguyn l v m phng
10
iu ch vector khng gian
0
2.5
Mag (% of Fundamental)
2
1.5
0.5
0
0 5 10 15 20
Harmonic order
DCVTKG v1.2 86
Nguyn l v m phng iu ch vector khng gian
Kt thc mc 3.3 th ton b thut ton iu ch vector khng gian c trnh by hon
thin t c s l thuyt, k thut thc hin cho ti m phng hot ng. Trong mc ny,
mnh trnh by thm mt s k thut b xung v chnh xa li m hnh m phng cho hon
thin hn, phc v cho cc mc ch v sau.
3.4.1 X l bo ha in p iu ch
Nh kt lun phn trc ta thy rng in p iu ch c dng sin th qu o ca vector
in p t phi l ng trn v nm trong ng trn ni tip hnh lc gic u ca cc
Tuy nhin, trong chng trnh iu khin i khi b iu khin yu cu in p t cho khi
SVPWM vt ra ngoi kh nng iu ch ca n, nht l ti cc thi im qu , iu
khin p ng dng mang nhiu thnh phn hi gy nhiu ngc li b iu khin. khc
phc vn ny ta s dng 1 thao tc gi l x l bo ha in p iu ch. Thao tc c
nhim v lm co li vector in p t nu n vt ra ngoi ng trn gii hn kh nng
iu ch ca thut ton SVPWM.
u3 u2
us
us
'
u
us '
u4 u0
u1
u7 us' us
u5 u6
Hnh 106: X l bo ha in p iu ch
Khu x l bo ha c minh ha trn hnh 91. Trong :
DCVTKG v1.2 87
Nguyn l v m phng iu ch vector khng gian
us us us us 2 us 2
us' us' 1 1
' us
u s
us 2 us 2
u ' us
s
us 2 us 2
y l cng thc hiu chnh li cc thnh phn vector in p t trn trc khi vector vt
qua ng trn gii hn kh nng iu ch ca thut ton SVPWM. Nh vy sau khi x l
bo ha, vector in p t s lun c m bo nm trong gii hn iu ch ca phng
php.
3.4.2.1 S m phng
S m phng tng t nh s trong mc 3.3.3 M phng cu trc nghch lu vng
h. im khc chnh ch bin in p t tng dn theo thi gian, t trong gii hn
iu ch ti vt ra ngoi gii hn iu ch. Qua , chng ta quan st p ng ca khu x
l bo ha ti ti thi im bin in p t vt ra ngoi gii hn iu ch ca phng
php.
DCVTKG v1.2 88
Nguyn l v m phng iu ch vector khng gian
[Ual]
[Uar] [Ube] [Tabc] [Ua]
[Ube]
[Ubr] [Ual] Ualpha & Ubeta [Uar] K Scope3
[Ucr]
[Ia]
TaTbTc
[Ib] [Ua] A
A In1 Out1 A Ual Anpha
Anpha
Amp B In2 Out2 B
TaTbTc T Puse [Ic] Is [Ub] B Voltage
C In3 Out3 C Beta
Ramp Ubt
Beta
Vref Zero-Order Clarke_Uab [Uc] C To Workspace1
PWM
Hold Dutycycle_Gen Hardware [Uar] Clarke_Uab1
[Amp] [Ual]
[Ia] K Vm
Scope1 [Ube]
Gain2 To Workspace
[Ia]
1
[Uar] K
Scope2 [Ib] L.s+R
+ -i Mo hinh [Ua]
Mo hinh tai RL
g [Ic] khoi SVPWM
+ i Scope4 Scope5
A + - [Ia]
Udc
i A A
B + - B B
-
C i C C [Amp]
+ -
Three-Phase
Series RLC Branch
+ v 1
[Ua] [Tabc]
- z
+ v [Ub]
- [Ia]
Continuous + Scope6
- v
[Uc] [Ib]
Khi tnh ton thut ton SVPWM, trong mc ny mnh thm vo khu x l bo ha in p
t SV_Saturator. Cc tham s in p t trn 2 trc s c kim tra ti khi ny, nu
n vt ra ngoi kh nng iu ch ca thut ton th in p t s c hiu chnh li trc
khi a ti b tnh ton
DCVTKG v1.2 89
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 90
Nguyn l v m phng iu ch vector khng gian
cng thc:
' us
us
us 2 us 2
u ' us
s
us 2 us 2
Trong khi tn ton thut ton SVPWM ny, mnh cng chnh sa li khi tnh ton TaTbTc,
bng vic thm cc khi sector 0, v sector 7. y l sector khng c thc t, tuy nhin mnh
thm vo m bo khi tnh ton TaTbTc bao qut ht c cc trng hp ca khi tnh
sector ca vector in p t. Gi tr TaTbTc trong sector ny l 1 gi tr bt k.
DCVTKG v1.2 91
Nguyn l v m phng iu ch vector khng gian
Anpha
Sector
Sector
Beta
Sector Selector
TaTbTc
Sector0
CBA TaTbTc
Sector1
CBA TaTbTc
1 Ual_I Ual_o Ual
1 Sector2 Signal value
Ual TaTbTc 1 Ual in (0 - 1)
2
2 Ubt_I Ubt_o Ubt TaTbTc CBA TaTbTc
Ubt 1
Ubt Anpha Sector3
SV_Saturator Dutycycle_Calculator CBA TaTbTc
Beta Saturation
CBA TaTbTc
ABC Transform
Sector4
In2 TaTbTc
Sector5
In2 TaTbTc
Sector6
Multiport
TaTbTc Switch
Sector7
1
u_a A
2
u_b B
3
u_c C
1
Amp
3.4.2.3 Kt qu m phng
trc quan kt qu m phng mnh s chia lm 2 phn: trc khi s dng b x l bo ha
v sau khi s dng b x l bo ha.
DCVTKG v1.2 92
Nguyn l v m phng iu ch vector khng gian
1.2
0.8
0.6
0.4
0 0.05 0.1 0.15 0.2
0.8
0.6
0.4
0.2
0
0 0.05 0.1 0.15 0.2
Load Current
15
10
5
0
-5
-10
-15
0 0.05 0.1 0.15 0.2
DCVTKG v1.2 93
Nguyn l v m phng iu ch vector khng gian
1.2
0.8
0.6
0.4
0 0.05 0.1 0.15 0.2
0.8
0.6
0.4
0.2
0
0 0.05 0.1 0.15 0.2
Load Current
15
10
5
0
-5
-10
-15
0 0.05 0.1 0.15 0.2
DCVTKG v1.2 94
Nguyn l v m phng iu ch vector khng gian
[1] Nguyn Phng Quang, iu khin t ng truyn ng in xoay chiu ba pha, NXB
Gio Dc
[3] Nguyn Phng Quang, Matlab v Simulink dnh cho k s iu khin t ng, NXB
Khoa hc v K thut H Ni, 2005
[4] V Minh Chnh, Phm Quc Hi, Trn Trng Minh, in t cng sut, NXB Khoa
hc v K thut, 2010
[6] Digital Control Systems (DCS) Group, SPRU485A - Digital Motor Control Software
Library, Texas Instrument
[7] Trnh Quang Vinh, Ti liu hng dn matlab simulink thc hnh m phng in t
cng sut, TH MC
[8] https://www.mathworks.com/help/
DCVTKG v1.2 95
Nguyn l v m phng iu ch vector khng gian
4 Ph lc
4.1 Mt s vn trong m phng Matlab Simulink
Phng php tnh ton m phng - Solver
Vic thc hin tnh ton m phng trong Simulink c thc hin bi cc thut ton gi l
Solver. C th nh:
Ode45, ode23: da trn phng php Runge-Kutta, p dng cho cc bc tnh linh
hot (variable-step)
Ode2: phng php Heun, p dng cho bc tnh c nh (fixed-step size)
Ode1: phng php Euler tin, p dng cho bc tnh c nh
Discrete: phng php tnh ton cho cc h thng gin on, c s dng bc tnh c
nh hoc bc tnh linh hot
Bc tnh c nh (Fixed-step) v bc tnh linh hot (variable-step)
Vic thc hin cc php tnh trong qu trnh m phng c Simulink chia lm hai loi
chnh:
Fixed-step solvers: cc solver s dng bc tnh c nh. M hnh s c tnh ton
theo nhng khong thi gian cch u t lc bt u n khi kt thc qu trnh m
phng. Khong cch gia cc bc tnh gi l fixed-step size. ln ca fixed-step
(fixed-step size) t l thun vi thi gian m phng v t l nghch vi chnh xc
ca kt qu m phng ([ 2] trang 3-21).
Variable-step solvers: cc solver s dng bc tnh linh hot. Cc bc tnh trong qu
trnh m phng thay i theo bin thin trng thi ca m hnh. Khi m hnh c s
bin thin ln th bc tnh s t ng gim xung tng chnh xc. V khi m
hnh c s bin thin nh th bc tnh s tng ln gim thi gian m phng ([2]
trang 3-21).
Phng php m phng lin tc v gin on
C phng php m phng lin tc (continuous solvers) v gin on (discrete
solvers) u c th thc hin theo bc tnh c nh hoc linh hot
Vi h bao gm c thnh phn lin tc v gin on th khng th s dng discrete
solver v solver ny khng gii quyt cc trng thi lin tc ([2] trang 3-22, [1] trang
285)
Mt s khuyn co khi ci t sample time cho m hnh
i vi cu hnh Fixed-step size, tham s Sample time cu hnh cn phi ci t bng
nguyn ln gi tr ca Fixed-step size ([1] trang 255)
Ch nn ch nh tham s sample time i vi mt s khi trong th vin sau
Th vin Sources, Sinks
Cc khi Trigger v Enable
Th vin Discrete
DCVTKG v1.2 96
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 97
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 98
Nguyn l v m phng iu ch vector khng gian
DCVTKG v1.2 99
Nguyn l v m phng iu ch vector khng gian
G1 G3 G5
Lc Rc
Lb Rb
Udc La Ra
G4 G6 G2
G1 G4
i fb
i ref
tng dng ra ti. V ngc li, khi dng phn hi vt qu ngng trn, b iu khin s
kha van G1, thot bt dng v ngun DC, gim gim trn ti.
4.3.1 S m phng
[Ia]
+
Scope2 [Ib] - v
+ i
- Scope4
g [Ic]
+ + i
A -
Udc
i A A
B + - B B
-
C
C C
+ -i
Three-Phase
Series RLC Branch
+
- v
[Ua]
+ v [Ub]
Continuous -
+
- v
[Uc]
powe rgui
% Load RL
Rl = 0.5; % dien tro cua cuon cam
Rr = 0; % dien tro tai
R = Rl + Rr;
L = 0.5e-3;
% Source
Udc = 12; % 60; 30;12 V
% Hysterisys reference
Iref = 10;
fl = 50;
omega = 2*pi*fl;
delta = 0.25; % 0.1; 0.2; 0.3; 0.5
Trong m hnh m phng s dng cc khi cng sut trong Toolbox SimpowerSystems,
s dng cc khi ny cc bn nh ko khi powerguide vo m hnh v chn ch m
phng l continuous.
Hnh 124: Qu trnh m van IGBT trong Hnh 125: Qu trnh kha van IGBT trong
thc t thc t
b) Khi iu khin di tr
q+
1 In1
q-
e_ia q+
2 In1
q-
1
e_ib q+ Pulse
3 In1
q-
e_ic
i ref
(Err <= -Delta )
i feb
i ref - Delta
(Err >= Delta ) ifeb <= iref Delta : g=1 (Err >= Delta )
iref Delta <ifeb < iref + Delta : g gi nguyn (-Delta < Err < Delta)
ifeb >= iref + Delta :g=0 (Err <= - Delta)
g
1
(Err >= Delta )
0
Err
- Delta + Delta
1 Switch off point Switch on point
0 g
Tn hiu ra khi Relay l tn hiu iu khin mt van (vi pha a l van Q1), c mt cp
xung iu khin mt nhnh van cn qua b to tn hiu iu khin. Khi ny c nhiu v to
tn hiu iu khin van cn li v chuyn i kiu d liu sang dng logic tng thch vi
u vo m hnh mch cu IGBT.
1 boolean 1
In1 q+
NOT 2
q-
4.3.3 Kt qu m phng
Kt qu m phng cho thy dng in p ng c dng sin lch pha 120. Bin dng in
bng 10 A nh gi tr t vo b iu khin.
[Ia]
[Iar]
Is2
delta
Constant
Is2
delta
Constant
[Ia]
+
Scope2 [Ib] - v
+ i
- Scope4
g [Ic]
+ + -i
A
Udc
A A
B + i
- - B B
C C C
+ i
- Three-Phase
Series RLC Branch
+ v [Ua]
-
+ v [Ub]
Continuous -
+
- v
[Uc]
powe rgui
[3] V Minh Chnh, Phm Quc Hi, Trn Trng Minh, in t cng sut, NXB Khoa
hc v K thut, 2010
[4] Nguyn Phng Quang, Matlab v Simulink dnh cho k s iu khin t ng, NXB
Khoa hc v K thut H Ni, 2005
[5] Trnh Quang Vinh, Ti liu hng dn matlab simulink thc hnh m phng in t
cng sut, TH MC
[6] https://www.mathworks.com/help/physmod/sps/simscape-components-1.html
[7] https://www.mathworks.com/help/physmod/sps/powersys/ref/universalbridge.html
[8] https://www.mathworks.com/help/physmod/sps/powersys/ref/igbt.html
File cu hnh:
%______________________Frequency Parameter__________________________
T_i = 1e-6; % Time for fixstep simulation
fs = 10e3; % sample frequency 10kHz
Ts = 1/fs; % Sample Period
fr = 50; % 50Hz system voltage frequency
PeriodMax = Ts;
omega = 2*pi*fr;
%_______________________Voltage Parameter__________________________
% Source
Udc = 12; % 60; 30;12 V
Umax = Udc/(sqrt(3));
Uc = Udc*2/3;
% Load RL
Rl = 0.5; % dien tro cua cuon cam
Rr = 0; % dien tro tai
R = Rl + Rr;
L = 0.5e-3;
Zl = omega*L;
Z = sqrt(R*R + Zl*Zl);
File v th
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% File: TestOpenLoop_SVPWM_before_Plot.m %
% Comment: Print file to plot singnal of SIMULINK %
% model TestOpenLoop_SVPWM_before.mdl %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Time = Scope6.time;
Amplitude = Scope6.signals(1).values;
Tabc = Scope6.signals(2).values;
Iabc = Scope6.signals(3).values;
figure (2)
subplot (3,1,1);
plot(Time,Amplitude,'b','LineWidth',2);
grid on;