You are on page 1of 55

Lab1: Hardware and Software Set Up

I. Mc tiu:

Download v ci t phn mm Code Composer Studio, cng nh download


nhiu ti liu v phn mm h tr s dng trong ton b cc bi lab.
Tm hiu cc thnh phn ca kit v kim tra hot ng ca chng trnh demo
c np sn trn kit.
Cc cng c pht trin ny s c s dng trong xuyn sut cc bi lab v
sau.

II. Cc bc tin hnh:

Harware
1. Yu cu phn cng:
Laptop 32 hoc 64 bit Window XP hoc Window 7 vi ti thiu 2G b nh
cng trng.
C kt ni mng.
Nu thc hin cc bi lab dng 2 mn hnh hin th th s gip qu trnh d
dng hn. Do , khuyn khch cc bn mang theo labtop c nhn trong cc
gi thc hnh.
Thc hin cc bi lab trn kit EK-LM4F120XL.
Mt multi meter.

Download v ci t Code Composer Studio


2. Download phn mm Code Composer Studio (CCS) 5.x web installer t a ch
http://processors.wiki.ti.com/index.php/Download_CCS (khng download bt k
bn dng th no). Yu cu kt ni mng cho n khi qu trnh hon tt. Nu
khng c kt ni mng th c th s dng offline version ci t.
3. Nu s dng file offline, chy file ccs_setup_5.xxxxx.exe trong folder sau khi gii
nn.
4. ng Software License Agreement v click Next.

5. Ngoi tr vic mun ci t CCS mt v tr khc, th tt nht nn chn folder


mc nh theo chng trnh ci t v Click Next.

6. Chn Custom cho phn Setup type v Click Next.


7. Trong hp thoi tip theo, chn processors m CCS s h tr. Chn Stellaris
Cortex M MCUs thc hin cc bi lab. Ngoi ra, nu quan tm ti MSP430
th c th chn MSP430 Low Power MCUs. C th chn thm cc kin trc
khc, tuy nhin s mt thi gian ci t cng nh kch thc ci t s ln. Click
Next.

8. Trong hp thoi Component, gi mc nh cc la chn v Click Next.


9. Trong hp thoi Emulator, b chn Blackhawk and Spectrum Digital emulators, tr
khi c nh s dng chng.

10. Khi ti n hp thoi ci t cui cng, Click Next. Qu trnh ci t s bt u.


Khi hon tt qu trnh ci t, khng chy CCS.
Ci t StellarisWare
11. Download v ci t version cui cng ca StellarisWare t a ch:
http://www.ti.com/tool/sw-lm3s . Nu c th, nn ci t StellarisWare vo folder
mc nh C:\StellarisWare.

Ci t LM Flash Programmer
12. Download, gii nn, v ci t mi nht LM Flash Programmer
(LMFLASHPROGRAMMER) t http://www.ti.com/tool/lmflashprogrammer .

Download ICDI Drivers


13. Download phin bn mi nht ca in-circuit debug interface drivers t a ch
http://www.ti.com/tool/stellaris_icdi_drivers . Gii nn file di chuyn folder
stellaris_icdi_drivers vo trong a ch C:\StellarisWare.

Download v ci t Workshop Lab Files


14. Download the lab installation file t a ch Wiki site bn di. Cc file lab s
c ci t trong C:\StellarisWare\boards\MyLaunchPadBoard . Do , phi
chc chn rng StellarisWare phi c ci t trc .
www.ti.com/StellarisLaunchPadWorkshop

Download Workshop Workbook Lab Files


15. C th download file Ting Anh hng dn cc bi lab ny vi nhiu bi lab hn
theo a ch sau:
www.ti.com/StellarisLaunchPadWorkshop

Terminal Program
16. Nu s dng Window XP, c th s dng HyperTerminal. Window 7 khng c
chng trnh terminal, nn phi s dng mt phn mm khc. Cc cu lnh trong
cc bi labs s dng HyperTerminal v PuTTY. C th download PuTTY t a
ch sau:
http://the.earth.li/~sgtatham/putty/latest/x86/putty.exe

Window-side USB Examples


17. Download v ci t StellarisWare Windows-side USB examples t a ch:
www.ti.com/sw-usb-win

Download v ci t GIMP
18. Chng ta s cn mt cng c thao tc ha c kh nng x l cc nh nh dng
PNM. GIMP c th lm iu . Download v ci t GIMP t a ch:
www.gimp.org
LaunchPad Board Schematic
19. tham kho, schematic s c phn cui ca ti liu ny.

Cc ti liu v trang web tham kho hu dng


20. C rt nhiu ti liu hu dng, tuy nhin t nht bn nn c cc ti liu sau.
Tm trong C:\StellarisWare\docs s thy:

Peripheral Driver Users Guide (SW-DRL-UGxxxx.pdf)

USB Library Users Guide (SW-USBL-UGxxxx.pdf)

Graphics Library Users Guide (SW-GRL-UGxxxx.pdf)

LaunchPad Board Users Guide (SW-EK-LM4F120XL-UG-xxxx.pdf )

21. Vo a ch: http://www.ti.com/product/lm4f120h5qr v download


LM4F120H5QR Data Sheet. Stellaris Data Sheet thc s l mt hng dn s
dng y cho cc device.
22. Download the ARM Optimizing C/C++ Compilers User Guide t a ch
http://www.ti.com/lit/pdf/spnu151 (SPNU151).
23. Cc gi c trnh by trong cui mi bi labs (nu c) cung cp cc thng
tin hu dng khi gp phi cc vn trong cc bi labs.
24. Tm kim TI website cho cc ti liu tham kho thm:
SPMU287: Stellaris Driver Installation Guide (for ICDI and FTDI drivers)

SPMU288: BoosterPack Development Guide

SPMU289: LaunchPad Evaluation Board Users Manual (includes schematic)

C th tm thm thng tin cc websites sau:


Main page: www.ti.com/launchpad

Stellaris LP: www.ti.com/stellaris-launchpad

EK-LM4F120XL product page: http://www.ti.com/tool/EK-LM4F120XL

BoosterPack webpage: www.ti.com/boosterpack

LaunchPad WiKi: www.ti.com/launchpadwiki

LM4F120H5QR folder: http://www.ti.com/product/lm4f120h5qr

Kit
25. M hp kit ra
S c trong :

The LM4F120H5QR LaunchPad Board


USB cable (A-male to micro-B-male)
README First card

Ci t Board ban u
26. Kt ni board vi my tnh v ci t drivers
LM4F120 LaunchPad Board ICDI USB port (c ghi nhn trn board l DEBUG
v c th thy nh trong hnh di) l cng USB v bao gm 3 kt ni:

Stellaris ICDI JTAG/SWD Interface - debugger connection


Stellaris ICDI DFU Device - firmware update connection
Stellaris Virtual Serial Port - a serial data connection

Drivers s c ci t t ng.

QuickStart Application
LaunchPad Board c lp trnh trc vi mt ng dng QuickStart. Ch cn cung
cp ngun cho board, ng dng ny s chy mt cch t ng.

27. Phi chc chn rng Power switch pha trn gc tri ca board c gt qua v
tr bn phi DEBUG nh trong hnh:
28. Phn mm trong LM4F120H5QR s dng timers nh l pulse-width modulators
(PWMs) thay i cng ca tt c 3 mu trn Led n RGB (red, green,
and blue). Bi vy, mt s cm nhn c nhiu mu sc khc nhau c to ra
thng qua vic kt hp cc mu c bn.
Hai plushbuttons pha di ca board c nh nhn SW1 (bn tri) v SW2
( bn phi ). Nhn hoc nhn v gi SW1 di chuyn v pha ph mu
cui. Nhn hoc nhn v gi SW2 di chuyn v ph mu tm cui.

Nu khng nhn nt no trong vng 5 giy, phn mm s t ng quay v thay


i mu sc nh mc nh.

29. Nhn v gi c 2 nt nhn SW1 v SW2 trong vng 3 giy s i vo hibernate


mode (ch ng). Trong ch ny mu sc cui cng s nhp nhy 1/2 giy
sau mi 3 giy. Gia cc khong nhp nhy, thit b ch ng VDD3ON vi
realtime-clock (RTC) ang chy. Nhn SW2 bt k lc no s nh thc thit b
v quay v chng trnh hin th mu sc mt cch t ng.
30. Ta c th giao tip vi board thng qua UART. UART c kt ni nh l cng
ni tip o thng qua kt ni USB gi lp.
Cc bc sau y s hng dn lm cch no m kt ni vi board s dng
HyperTerminal (trong Window XP) v PuTTY (trong Window 7 hoc 8).

31. Ta cn tm COM port number ca Stellaris virtual Serial Port trong Device
Manager. B qua bc 32 nu ng s dng Window 7 hoc 8.
Window XP:

A. Click chut phi My Computer v chn Properties.

B. Trong ca s System Properties, chn tab Hardware.

C. Click nt Device Manager.

M Ports heading v vit s ca Stellaris Virtual Serial Port y: COM____


32. Window 7 hoc 8:
A. Click chut phi My Computer v chn Properties.

B. Chn Device Manager hp thoi bn tri.

M Ports heading v vit s ca Stellaris Virtual Serial Port y: COM____


33. Trong Win XP, m HyperTerminal. Trong hp thoi hin ra, chn kt ni s
dng COM##, vi ## l s ca cng COM ghi ch bc trc. Click OK.
Chn cc thit lp nh hnh sau v click OK.

Khi ca s terminal c m, nhn ENTER mt ln v LaunchPad board s phn


hi l xc nhn giao tip m. B qua bc 31.
34. Trong Win 7 hoc 8, double click vo putty.exe. Thit lp cc ci t nh hnh
di v sau click Open. COM Port number s l s m ta ghi ch li trc
y.

Khi ca s terminal c m, nhn ENTER mt ln v LaunchPad board s phn


hi l xc nhn giao tip m. B qua bc 31.

35. Bn c th giao tip bng cch g cc dng lnh sau v nhn ENTER:
help: s to ra mt danh sch cc lnh v thng tin.

hib: s a thit b vo ch ng. Nhn SW2 nh thc thit b.

rand: s bt u mt chui pseudo-random mu sc.

intensity: iu chnh sng ca LED t 0 ti 100%. Vi 100 s lm LED hin


th sng nht.

rgb: theo sau l mt 6 hex character value thit lp cng ca tt c 3


LEDs. V d: rgb FF0000 LED sng mu , rgb 00FF00 LED sng mu xanh
dng v rgb 0000FF LED sng mu xanh l.

36. ng chng trnh Terminal.


Hon thnh!
Lab 2: Code Composer Studio

I. Mc tiu:

Mc tiu ca lab ny l lm quen vi cch s dng Code Composer Studio mt cch c


bn.

II. Load the Lab 2 Project

M Code Composer Studio

1. Double click vo shortcut Code Composer trn Destop m CCS


Khi hp thoi Select a workspace xut hin, tr n folder My Computer:

(In WinXP) C:\Documents and Settings\<user>\My Documents

(In Win7) C:\Users\<user>\My Documents

Ngoi ra, cng c th tr n folder mong mun ca bn. Click OK.

Tn ca workspace l khng quan trng, tuy nhin hy s dng


MyWorkspaceLM4F120.
Khng chn Use this as the default and do not ask again.

Click OK.

Nu khng c licensed Code Composer, bn s c hi trong nhng bc ci t


tip theo. Khi , chn Evaluation. Ngay khi my tnh c kt ni vi
LaunchPad board, Code Composer s c y chc nng, min ph. Bn c th
quay li v thay i license nu cn thit bng cch chn Help -> Code Composer
Studio Licensing Information -> Upgrade tab -> Launch License Setup

Khi ca s TI Resource Explorer and/or Grace xut hin, ng cc tabs. Vo


lc cc cng c ch h tr MSP430.

To Lab2 Project
2. Trn CCS menu bar chn File -> New -> CCS Project. Thit lp cc ty chn nh
bn di. Phi chc chn rng b chn Use default location v chn ng
dn chnh xc. Bc ny l quan trng lm cho project ca bn linh ng
v cho lin i ti cng vic mt cch trc tip. G 120 trong variant
a ln 4 phin bn ca thit b. Chn Empty Project (with main.c) cho project
mu. Click Finish.
3. File main.c s c m trong editor tab. Xa ni dung v g hoc copy/paste
on code sau vo trong file. ng bn khon v code by gi; s i vo chi
tit v code trong lab 3. Lu cc cu hi xut hin bn tri ca cc cu lnh
include. iu ny cho bit rng Code Composer khng bit ng dn n cc
ngun. Ta s sa iu phn sau.
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
int main(void)
{
int LED = 2;
SysCtlClockSet(SYSCTL_SYSDIV_4|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
while(1)
{
// Turn on the LED
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, LED);
// Delay for a bit
SysCtlDelay(2000000);
// Cycle through Red, Green and Blue LEDs
if (LED == 8) {LED = 2;} else {LED = LED*2;}
}
}

Click nt Save trn menu bar lu li. Nu c bt k vn g, bn c th


tm code trong folder Lab2/ccs trong file main.txt.

Nu code tht vo tht ra khng r rng, nhn Ctrl-A, click chut phi v chn
Source -> Correct Indentation.

4. M rng project trong Project Explorer pane ( pha bn tri) bng cch click vo
du + hoc du ca Lab 2. Danh sch ny cho thy c tt c cc file c s
dng build project. Mt trong cc file ny l startup_ccs.c m ta a vo
trong folder ca lab (file ny sn c trong mi StellarisWare example). Double-
click vo file m n. File ny nh ngha stack and the interrupt vector table
structure trong nhng th khc. Cc ci t ny l cn thit cho Code Composer
build project. Khng thay i bt k ni dung no trong file ny v ng li.

Ci t Build Options
5. trn cp n nhng cu hi xut hin sau hng lnh include. Hai bc
tip theo s gip gii quyt vn tm ra ngun ca cc file cn thit cho
bin dch code.
Click chut phi Lab2 trong Project Explorer pane v chn Properties. Click
Include Options di ARM Compiler. bn di, khung include search path,

click Add button v thm vo include search path sau. Bn c th mun


copy/paste t workbook pdf vi 2 bc tip theo.

${PROJECT_ROOT}/../../../..

ng dn ny cho php trnh bin dch (compiler) tm chnh xc folder driverlib,


vi 4 mc trn tnh t folder project. Ch rng, nu bn folder project ca
bn v tr khc th ng dn trn khng hot ng.
6. Pha di ARM Linker click File Search Path. Thm vo ca s pha trn file
library sau:
${PROJECT_ROOT}/../../../../driverlib/ccs-cm4f/Debug/driverlib-cm4f.lib
Bc ny cho php trnh lin kt (linker) tm thy chnh xc file lib. Ch rng
nu bn khng project mt v tr khc th ng dn trn cng khng hot
ng.

Click OK lu li cc thay i.

Chy Code chng trnh


7. Phi chc chn rng LaunchPad board c cm vo. Kim tra rng Lab2 l
Active Project bng cch click vo project trong khung Project Explorer, click nt
Debug trn CCS menu bar build v ti Lab2 project. Khi qu trnh hon
thnh, CCS s trong giao din Debug (lu 2 tabs pha trn bn phi ca mn
hnh ko chng qua bn tri mt cht bn c th nhn thy chng hon
ton).
8. Click nt Run trn CCS menu bar chy chng trnh. Quan st LED ba
mu sng , lc v lam trn LaunchPad board.

Mt vi c trng ca CCS
9. Click nt Suspend trn CCS menu bar. Nu chng trnh dng vi mt bo
hiu No source available , click vo tab main.c. Hu ht thi gian trong vng
lp while() l trong cc hm delay v source file ny khng linked vo trong
project.
10. Breakpoints
Trong ca s chng trnh gia mn hnh, double-click vo vng xm bn tri
ca line number ca hang lnh GPIOPinWrite() thit lp breakpoint (n trng
ging th ny ). Click nt Resume restart li chng trnh. Chng trnh
s dng li im breakpoint v bn s thy mt mi tn bn tri ca line
number, xc nh rng b m chng trnh c dng trn hang ny ca
code. Ch rng ICDI driver hin ti khng h tr thm vo/b bt
breakpoints trong khi processor ang chy. Click nt Resume mt vi ln hoc
nhn phm F8 chy chng trnh. Quan st LED trn LaunchPad board.

11. Register View


Click View -> Registers thy gi tr core and peripheral register. Chnh li kch
thc ca s nu thy cn thit. Bm vo du cng bn tri xem registers. Lu
rng thit b ngoi vi khng thuc h thng cha c kch hot khng th c
c. Trong project ny bn c th thy Core Registers, GPIO_PORTA (where
the UART pins are), GPIO_PORTF (where the LEDs and pushbuttons are
located), HIB, FLASH_CTRL, SYSCTL and NVIC.

12. Memory View


Click View -> Memory Browser kim tra processor memory. G 0x00 trong
trng v nhn Enter. Bn c th thy memory v c th click vo mt v tr v
thay i gi tr trc tip trong v tr b nh .

13. Expressions View


Phi chc chn rng bn c th thy khung Expressions gc trn bn phi mn
hnh. Bn c th phi click vo tab Expressions. Click chut phi vo khung v
chn Remove All lm cho chc chn rng khng cn g hin th trong
expressions.

Trong ca s code, double-click vo bin LED xung quanh dng 18. Click chut
phi vo bin c chn v chn Add Watch Expression v sau click OK. Ca
s trn bn phi s chuyn sang Expression view v bn s thy bin c
lit k. Chy chng trnh vi ln. Mi ln code thc hin ti im breakpoint,
gi tr hin th s c cp nht,. Gi tr c cp nht c bi nn mu vng.

Xa tt c cc im breakpoint m bn thit lp bng cch click Run ->


Remove All Breakpoints t menu bar. Mt ln na, breakpoint ch c th c
xa khi processor khng chy.

14. Click vo Terminate quay v mi trng son tho. Click phi chut vo
Lab2 trong khung Project Explorer v chn Close Project ng project.
Minimize CCS.

LM Flash Programmer
15. LM Flash Programmer l mt giao din lp trnh c lp m cho php bn lp
trnh flash ca ca mt thit b Stellaris thng qua nhiu port. To ra nhiu file
cn thit cho bc build ri rc trong Code Composer m s c thy trong
trang tip theo ca bi lab ny.
Nu khng sn c, ci t LM Flash Programmer vo my ca bn.

16. Phi chc chn rng Code Composer Studio khng chy code trong mi trng
CCS Debug bng khng CCS v Flash Programmer s xung t trong vic
iu khin USB port.
s l Shortcut ca LM Flash Programmer trong Destop
ca bn, double-click vo m cng c. Nu khng thy
shortcut trn Destop, vo Start -> All Programs -> Texas
Instruments -> Stellaris -> LM Flash Programmer v click vo LM Flash
Programmer.

17. Hin ti board ca bn ang chy ng dng ca Lab2. Nu User LED khng sng,
nhn nt RESET trn board. Ta s lp trnh ng dng ban u tr li trn
LM4F120H5QR.
Click vo tab Configuration. Chn LM4F120 LaunchPad t Quick Set menu th
xung ca Configuration tab. Xem users guide thm thng tin v cch no
cu hnh bng tay cng c cho mt thit b m khng phi l evaluation boards.

18. Click vo tab Program. Sau click vo nt Browse v iu khin n:


C:\StellarisWare\boards\ek-lm4f120XL\qs-rgb\ccs\Debug\qs-rgb.bin

y l ng dng m c np sn trn flash memory ca LM4F120XL ca


board.

Lu rng l cc ng dng y c build sn vi mi IDE c h tr.


Phi chc chn rng cc chn sau y c la chn:
19. Click vo nt Program.
Bn s thy qu trnh programming v verification pha di ca ca s. Sau
khi cc bc ny hon thnh, quickstart application s chy trn kit.

20. ng LM Flash Programmer.

Tu chn: To mt bin File cho Flash Programmer


Nu bn mun to mt bin file s dng bi stand-alone programmer trong mt
vi bi labs, s dng cc bc sau y. Nh rng project phi c m trc khi
bn c th thay i c tnh ca n.

In Code Composer 5.2 and Earlier:

Trong Code Composer, trong Project Explorer, click chut phi vo project v
chn Properties. bn tri, click Build v v sau Steps tab. Dn cc cu lnh
sau vo trong Post-build steps Command box:

"${CCS_INSTALL_ROOT}/utils/tiobj2bin/tiobj2bin"

"${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin"

"${CG_TOOL_ROOT}/bin/ofd470" "${CG_TOOL_ROOT}/bin/hex470"

"${CCS_INSTALL_ROOT}/utils/tiobj2bin/mkhex4bin"

In Code Composer 5.3 and Later:

Trong Code Composer, trong Project Explorer, click chut phi vo project v
chn Properties. bn tri, click Build v v sau Steps tab. Dn cc cu lnh
sau vo trong Post-build steps Command box:

"${CCS_INSTALL_ROOT}/utils/tiobj2bin/tiobj2bin"

"${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin"

"${CG_TOOL_ROOT}/bin/armofd" "${CG_TOOL_ROOT}/bin/armhex"

"${CCS_INSTALL_ROOT}/utils/tiobj2bin/mkhex4bin"

Mi cu lnh c bao quanh bi du ngoc kp v c cc khong trng mi


ci. Cc bc ny s chy sau khi project builds v bin file s c to ra trong
folder Labx/ccs/debug. Bn c th truy xut n trong CCS Project Explorer
trong project bng cch click vo Debug folder.

Hon Thnh!
Lab 3: Khi to v GPIO

I. Mc tiu:

Trong bi lab ny ta s hc c lm cch no khi to clock h thng v ngoi vi GPIO.


Sau ta s s dng cc GPIO ouput lm sang LED trn board.

II. Cc bc tin hnh:

To Lab3 project
1. Maximine Code Composer. Trn CCS menu bar chn File -> New-> CCS
Project. Lm cc chn la nh bn di. Phi chc chn rng khng chn vo
Use default location v chn ng dn chnh xc ti ccs folder m bn to
ra. Bc ny quan trng v n s lm project ca bn linh ng v include
cc ng dn lm vic cho ng. Trong hp variant, g 120 thu hp
cc kt qu trong hp bn phi. Trong ca s Project templates and examples,
chn Empty Project (with main.c). Click Finish.
Header Files
2. Xa ni dung hin ti ca main.c. G (hoc ct/dn t file pdf) cc hng sau vo
trong main.c include cc file header cn thit truy xut StellarisWare APIs
cng nh nh ngha bin:
#include "inc/hw_memmap.h"

#include "inc/hw_types.h"

#include "driverlib/sysctl.h"

#include "driverlib/gpio.h"

int PinData=2;

hw_memmap.h: Macros nh ngha memory map ca thit b Stellaris. Include


ny nh ngha cc v tr peripheral base address nh l GPIO_PORTF_BASE.
hw_types.h: nh ngha common types v macros nh l tBoolean v
HWREG(x).

sysctl.h: nh ngha v macros cho System Control API ca DriverLib. Ci ny


bao gm API functions nh l SysCtlClockSet v SysCtlClockGet.

gpio.h: nh ngha v macros cho GPIO API ca DriverLib. Ci ny bao gm API


functions nh l GPIOPinTypePWM v GPIOPinWrite.

int PinData=2; : to mt bin integer c gi l PinData v khi to gi tr ca


n l 2. N s c s dng quay vng qua 3 LED, sng mt ln mt thi
im.

Bn s thy cu hi xut hin bn tri ca dng include trong main.c c hin th


trong Code Composer. Ta cha nh ngha ng dn ti include folders, do
Code Composer khng th tm thy chng. Ta s sa li ny sau.

Main() Function
3. Tip theo, ta s to mt khun mu cho hm main. Copy on code sau vo pha
sau phn khai bo ca chng trnh:
int main(void)
{

Clock Setup
4. Cu hnh clock h thng chy s dng mt thch anh 16MHz trn b giao
ng chnh, li qua 400MHz PLL. 400MHz PLL dao ng tn s duy nht,
nhng c th c iu khin bi cc thch anh v b dao ng chy gia 5 v
25MHz. C mt mc nh l b chia 2 trong ng clock v by gi ta ang thit
lp thm b chia 5, nng tng s ln 10. iu c ngha l clock h thng s
40MHz. a hng code sau vo trong hm main():
SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);

Biu di y l mt bn v vn tt ca clock tree nhn mnh ng Clock


h thng v s la chn.
Biu bn di l mt phn c trch t LaunchPad board Schematic. Lu rng
thch anh gn lin vi u vo dao ng chnh l 16MHz, trong khi thch anh gn vi
u vo real-time clock (RTC) l 32,768MHz.

GPIO Configuration
5. Trc khi gi bt k hm ngoi vi c th driverLib, ta phi tch cc clock cho
ngoi vi . Nu bn tht bi, n s tr v kt qu l mt Fault ISR (address fault).
y l mt li chung ca mt s ngi dng thng mc phi. Hng lnh th 2
bn di cu hnh 3 chn GPIO kt ni vi LEDs nh l ng ra. Mt phn s
bn di ca LaunchPad board schematic ch r cc chn PF1, PF2 v PF3 l
c kt ni vi LEDs.
Cch ra mt hng, sau a 2 hng code sau vo trong main() sau hang lnh
bc trc.

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);

Base addresses ca GPIO ports c lit k trong User Guide c a ra bn


di. Lu rng chng l tt c trong memory maps peripheral section c a
ra trong module 1. APB l Advanced Peripheral Bus, trong khi AHB l Advanced
High-Performance Bus. AHB cung cp hiu sut tt hn so vi APB bus. GPIO
truy cp thng qua AHB c th dch chuyn vi mt chu k xung clock so vi 2
chu k xung clock i vi port trn APB. Trong cc ng dng nhy cm v cng
sut, APB s l mt s la chn tt hn so vi AHB. Trong bi lab ny,
GPIO_PORTF_BASE l 0x40025000.

GPIO Port A (APB): 0x4000.4000


GPIO Port A (AHB): 0x4005.8000
GPIO Port B (APB): 0x4000.5000
GPIO Port B (AHB): 0x4005.9000
GPIO Port C (APB): 0x4000.6000
GPIO Port C (AHB): 0x4005.A000
GPIO Port D (APB): 0x4000.7000
GPIO Port D (AHB): 0x4005.B000
GPIO Port E (APB): 0x4002.4000
GPIO Port E (AHB): 0x4005.C000
GPIO Port F (APB): 0x4002.5000
GPIO Port F (AHB): 0x4005.D000
While() Loop
6. Cui cng, to mt vng lp while(1) gi mt 1 hay 0 ti mt pin GPIO
cho trc, vi mt hm delay gia 2 lnh.
SysCtlDelay() l mt vng lp timer c cung cp trong StellarisWare. Tham s
m l s vng lp, khng phi thi gian delay thc s trong chu k clock.

ghi vo chn GPIO, s dng GPIO API function c gi l GPIOPinWrite.


Phi chc chn c v hiu c lm th no GPIOPinWrite function c s
dng trong Datasheet.

Trong v d bn di, ta ang ghi gi tr trong bin PinData ln tt c 3 pin GPIO


m c kt ni ti LEDs. Ch c 3 pin c s c ghi gi tr da trn bit
mask c xc nh trc .

By gi c l l thi im tt nhn vo Datasheet cho Stellaris device. Xem


chng GPIO hiu cch duy nht GPIO data register c thit k v u im
ca phng php.

B trng mt hng v thm on code sau vo trong hm main():

while(1)
{
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, PinData);
SysCtlDelay(2000000);
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, 0x00);
SysCtlDelay(2000000);
if(PinData==8) {PinData=2;} else {PinData=PinData*2;}
}

7. Click nt Save lu li. on chng trnh s nh sau:

#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
int PinData=2;
int main(void)
{
SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_
OSC_MAIN);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
while(1)
{
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, PinData);
SysCtlDelay(2000000);
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, 0x00);
SysCtlDelay(2000000);
if(PinData==8) {PinData=2;} else {PinData=PinData*2;}
}
}

Nu bn ang c gng build on chng trnh trn th khng nn, v nh vy s


tht bi. Lu cc cu hi xut hin trong hng lnh include CCS vn cha
bit v tr ca cc file u. Chng ta vn cn thm vo start up code v thit
lp cc ty chn build.

Startup Code
8. Ngoi cc file chnh to ra, bn cng cn c mt startup file c th chui
cng c m bn ang s dng. File ny cha ng vector table, startup routines
sao chp data khi to cho RAM, xa bss section, v li mc nh ISRs. File ny
a vo trong folder ca bn.
Double-click vo startup_ccs.c trong Project Explorer pane v c mt ci nhn
tng quan. ng thay i iu g vo lc ny.

Set the Build Options


9. Click chut phi vo Lab3 trong Project Explorer pane v chn Properties. Click
Include Options di ARM Compiler. pha di, include search path pane,
click nt Add v thm vo search path sau:
${PROJECT_ROOT}/../../../..

Nu bn lm theo cc hng dn trn trong qu trnh to Lab3 project, th


ng dn trn trn 4 mc so vi folder project, s cho php project ca bn
truy xut vo inc v driverlib folder. Bng khng, bn phi t iu chnh ng
dn ca mnh.

trnh g sai th tt nht l copy/paste on ny v on bc tip theo.


Click OK. Ngay lp tc, CCS s refresh li project v bn s thy l cc cu hi
sau cu lnh include trong main.c s bin mt.

10. Click phi chut Lab3 trong Project Explorer pane mt ln na v chn
Properties. Pha di ARM Linker, click File Search Path. Ta phi cung cp
cho project ng dn n M4F libraries. Thm include library file sau vo ca
s pha trn:
${PROJECT_ROOT}/../../../../driverlib/ccs-cm4f/Debug/driverlib-cm4f.lib

D nhin l nu bn khng lm theo cc bc hng dn trn khi to Lab3


project th ng dn ny phi c hiu chnh.
Click OK lu li cc thay i.

Compile, Download and Run the Code


11. Bin dch v ti ng dng bng cch click vo nt Debug trn menu bar.
Nu bn c nhc nh lu cc thay i th hy lm theo. Nu c bt c vn
g, sa cha chng, v click nt Debug mt ln na. Sau khi build thnh cng,
giao din g li s xut hin.
Click nt Resume chy chng trnh m c download vo flash memory
ca device ca bn. Bn s thy LED chp sang. Nu bn mun chnh sa li
code thay i thi gian delay v chn n no c sng th c tin hnh.

Nu bn ang lm vic vi code v nhn c thng bo No source available for

, ng editor tab li. Source code cho hm khng nm trong project. N


ch xut hin nh mt library file.

Click vo nt Terminal quay v giao din CCS Edit.

Examine the Stellaris Pin Masking Feature


Lu rng cc bc sau y hi khc so vi workshop video.

12. Thay i code tt c 3 LEDs u sng cng lc. Lm cc thay i sau:


Tm hng c cha int PinData=2; v thay i thnh int PinData=14;

Tm hang c cha if(PinData v chnh li on ny thnh phn ghi ch bng


cch thm 2 du // vo u hang.

Lu li thay i.

13. Compile v download ng dng bng cch click vo nt Debug trn menu
bar. Click nt Resume chy chng trnh. Vi 3 LEDs cng sng mt lc,
bn s thy l chng nhp nhy mt mu gn nh l mu trng.
14. By gi ta s s dng pin masking feature sng LEDs mt lc. Ta s khng
phi tr v giao din CCS Edit chnh sa code. Ta c th lm ngay. Trong ca
s code, nhn hng u tin c cha GPIOPinWrite(). Pin mask y l
GPIO_PIN_1| GPIO_PIN_2| GPIO_PIN_3 , c ngha l tt c 3 trong s cc v
tr bit ny, tng ng vi v tr ca LED s c gi ra GPIO port. Thay i bit
mask thnh GPIO_PIN_1. Dng lnh s ging nh sau:
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, PinData);

15. Compile v download ng dng bng cch click vo nt Debug trn menu
bar. Khi c nhc lu li cng vic, click OK. Khi bn c hi nu nh mun
kt thc debug session, click Yes.
Trc khi click nt Resume, on trc LED m bn mong i s sng: ____

Click vo nt Resume . Nu bn on l mu , bn ng.

16. Thay i bit mask thnh GPIO_PIN_2. Dng lnh s ging nh sau:
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, PinData);

17. Compile v download ng dng bng cch click vo nt Debug trn menu
bar. Khi c nhc lu li cng vic, click OK. Khi bn c hi nu nh mun
kt thc debug session, click Yes.
Trc khi click nt Resume, on trc LED m bn mong i s sng: ____

Click vo nt Resume . Nu bn on l xanh lam, bn ng.

18. Thay i bit mask thnh GPIO_PIN_3. Dng lnh s ging nh sau:
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, PinData);
19. Compile v download ng dng bng cch click vo nt Debug trn menu
bar. Khi c nhc lu li cng vic, click OK. Khi bn c hi nu nh mun
kt thc debug session, click Yes.
Trc khi click nt Resume, on trc LED m bn mong i s sng: ____

Click vo nt Resume . Nu bn on l xanh lc, bn ng.

20. Homework: Hy nhn cch s dng ca ButtonsPoll() API gi trong file qs-rgb.c
trong quickstart application (qs-rgb) folder. Vit code s dng hm API tt
m LED s dng pushbuttons.
Hon thnh!
Lab 4: Interrupts and the Timer

I. Mc tiu:

Thit lp ch hot ng ca Timer to ra ngt.

Vit chng trnh s l ngt nhy led.

I. Cc bc tin hnh:

Import Lab4 Project

1. Chng ti to ra cho bn project lab4 cho bn mt file main.c trng, mt file


startup v tt c cc thit lp cn thit build mt project. Bn cn phi hon thin
code c n li cho project. import project click Project Import Existing CCS
Eclipse Project. Chn project cn import, b du check mc Copy projects into
workspace v click finish.

Header Files

2. Sau khi import project bn cn phi chnh sa li file main.c.


Trc tin bn thm on code sau vo u file main.c include cc file
header cn thit truy cp vo cc hm API trong th vin StellarisWare.
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/sysctl.h"
#include "driverlib/interrupt.h"
#include "driverlib/gpio.h"
#include "driverlib/timer.h"
Trong :
hw_ints.h: l macros xc nh cc ngt trn thit b Stellaris (NVIC)
hw_memmap.h : l macros xc nh bn b nh ca thit b Stellaris,
n bao gm cc define thanh ghi a ch bt u ca mt thit b ngoi vi. V
d nh: GPIO_PORTF_BASE.
hw_types.h : define cc kiu thng thng v cc macros nh tBoolean v
HWREG(x).
sysctl.h : y l define v macros cc API system control trong driverlib.
y include cc hm nh SysCtlClockSet v SysCtlClockGet.
interrupt.h : y l define v macros cc API iu khin NIVC (interrupt)
trong driverlib. y include cc hm nh IntEnable v IntPrioritySet.
gpio.h : y l define v macros cc API iu khin GPIO trong driverlib.
y include cc hm nh GPIOPinTypePWM v GPIOPinWrite.
timer.h : y l define v macros cc API iu khin Timer trong driverlib.
y include cc hm nh TimerConfigure v TimerLoadSet.

Main() Function

3. Chng ta s s dng bin Period tnh ton Timer delays. Chng ta s to hm


main() cng vi vic to mt bin unsigned-long Period trong hm, nh sau.
int main(void)
{
unsigned long ulPeriod;
}

Clock setup

4. Configure clock h thng chy vi tn s 40Mhz ( y nh trong lab 3) vi d ng


configure sau:
SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16M
HZ|SYSCTL_OSC_MAIN);

GPIO Configuration

5. Cng nh lab trc chng ta s enable ngoi vi GPIO ni ca pin c ni n Led.


V cho php pin vi chc nng l output vi d ng code sau:
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE,
GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);

Timer Configuration

6. Mt ln na, chng ta cn phi enable clock cho ngoi vi trong thanh ghi RCGCn
trc khi truy cp n cc thanh nghi ca n. Nu khng th h thng s bo li Fault
ISR. Trong project ny ta s configure cho Timer 0 chy trong ch nh th Timer
32bit, nn nh rng khi Timer 0 chy trong ch 32 bit th n s dng 2 timer 16bit
Timer 0A v Timer 0B. TIMER0_BASE l a ch khi u ca Timer 0 trong bn
b nh. V on code sau y s configure cho Timer 0 hot ng trong ch trn:
SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER);

Calculate Delay

7. Trong project ny ta s tin hnh cho Led chp tt vi tn s 10Hz v vi duty cycle
l 50 . Bn cn phi to ra mt ngt ti thi gian mong mun. Trc tin bn cn
phi tnh ton s chu k clock cho 10hz bng cch gi hm SysCtlClockGet() v chia
cho tn s clock mong mun. Tip theo l chia 2 s clock to c mt ngt ti
khong thi gian mong mun.
Sau bn cn phi np gi tr s chu k clock ny cho thanh ghi Timers
Interval Load bng cch s dng hm TimerLoadSet trong driverlib timer
API. Nn nh l bn cn phi tr i mt chu k clock ti thi im ngt ti 0.
on code sau y s thc hin cc tnh ton trn:
ulPeriod = (SysCtlClockGet() / 10) / 2;
TimerLoadSet(TIMER0_BASE, TIMER_A, ulPeriod -1);

Interrupt Enable

8. Tip theo chng ta cn phi cho php ngt khng nhng cho tng module m c n cho
php ngt trong NVIC. Hm IntMasterEnable cho php ngt cho ton b h thng.
Hm IntEnable cho php ngt ca tng module ngoi vi bn trong h thng. Hm
TimerIntEnable cho php ngt tng s kin xy ra trn module Timer. y chng ta
s set cho Timer 0 ngt khi xy ra s kin Timeout.
Bn cn phi thm on code di y vo chng trnh cu hnh cho ngt
Timer:
IntEnable(INT_TIMER0A);
TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
IntMasterEnable();

Timer Enable

9. Cui cng chng ta s kch hot cho Timer chy. Vic ny cho php Timer bt u
chy v s kch hot ngt timeout.
Thm on code sau vo chng trnh cho php Timer bt u chy.
TimerEnable(TIMER0_BASE, TIMER_A);

Main Loop

10. Mt v ng lp v tn s c thc hin bng mt lnh while(1). Vic bt tt Led s


c thc hin trong hm ngt.
Thm mt d ng code sau vo sau cc d ng code trc:
while(1)
{
}

Timer Interrupt Handler

11. V tip theo ta cn phi vit chng trnh ngt trong Timer thc hin vc bt tt
Led da vo trng thi Led hin ti. Trc tin cn phi kim tra ngun ngt v xa
c bo ngt bng hm TimerIntClear(). Kim tra trng thi ca pin GPIO bng hm
GPIOPinRead(), v bt tt pin GPIO bng hm GPIOPinWrite().
Thm on code sau vo sau hm main():
void Timer0IntHandler(void)
{
// Clear the timer interrupt
TimerIntClear(TIMER0_BASE, TIMER_TIMA_TIMEOUT);

// Read the current state of the GPIO pin and
// write back the opposite state
if(GPIOPinRead(GPIO_PORTF_BASE, GPIO_PIN_2))
{
GPIOPinWrite(GPIO_PORTF_BASE,
GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, 0);
}
else
{
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 4);
}
}

12. Click save save li code ca bn. V kt qu on code ca bn s c nh sau:


#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/sysctl.h"
#include "driverlib/interrupt.h"
#include "driverlib/gpio.h"
#include "driverlib/timer.h"

int main(void)
{
unsigned long ulPeriod;

SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16M
HZ|SYSCTL_OSC_MAIN);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE,
GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);

SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER);

ulPeriod = (SysCtlClockGet() / 10) / 2;


TimerLoadSet(TIMER0_BASE, TIMER_A, ulPeriod -1);

IntEnable(INT_TIMER0A);
TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
IntMasterEnable();

TimerEnable(TIMER0_BASE, TIMER_A);

while(1)
{
}
}

void Timer0IntHandler(void)
{
// Clear the timer interrupt
TimerIntClear(TIMER0_BASE, TIMER_TIMA_TIMEOUT);

// Read the current state of the GPIO pin and


// write back the opposite state
if(GPIOPinRead(GPIO_PORTF_BASE, GPIO_PIN_2))
{
GPIOPinWrite(GPIO_PORTF_BASE,
GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, 0);
}
else
{
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 4);
}
}

Startup Code

13. Open startup_ccs.c chnh sa. Tn tin ny s cha tt c cc bng vector ngt m
chng ta trnh tho lun trc . Trong tp tin tm n d ng Timer 0 subtimer A.
bn cn phi c n thn thay th tn IntDefaultHandler thnh tn Timer0IntHandler y
chnh l tn m bn t cho hm s l ngt Timer 0.


Bn cng cn phi khai bo hm ny vi t kha extern pha trn bo cho
trnh compiler bit biu tng ny. Bn cn tm n d ng:
extern void _c_int00(void);
v add thm d ng sau vo ngay bn di n:
extern void Timer0IntHandler(void);


Click save.

Compile, Download and Run The Code

14. Compile v download ng dng ca bn click vo nt Debug trong menu bar.


Nu bn thy bt k mt vn g th bn sa li chng v tin hnh compile li ln
na. Sau khi thnh cng th giao din chng trnh Debug s xut hin.
Click vo nt Resume tin hnh chy chng trnh c download
xung b nh flash ca thit b. Lc ny n Led mu xanh s c nhp
nhy trn board launchpad.

Khi bn mun kt thc, click nt terminate tt chc nng Debug.

Exceptions

15. Tm cc d ng enable cc thit b ngoi vi, v chnh sa n li nh hnh sau.


y l on code truy cp vo thit b ngoi vi m khng enable clock. iu
ny s to ra mt ngoi l.

16. Tin hnh compile v download li chng trnh. Click Resume chy chng
trnh. Xem iu g xy ra, chng trnh ny chy c tt khng n Led mu xanh c
nhy khng.

17. Click nt terminate kt thc chng trnh Debug. Rt v cm li cp micro-


USB cable trn kit LaunchPad cp ngun li. Cc thanh ghi s c gi tr default khi
mi cp ngun tr li.
Code m bn download xung ang chy. Nhng Led mu xanh khng
nhp nhy.

18. Compile v Download li chng trnh. Click Resume chy chng trnh.
Khng c g xy ra. Bn click nt Suspend dng qu trnh Debug li. Bn s
thy rng chng trnh s b mc kt trong FaultISR(). Tt c cc ngoi l ISRs c
thc hin bng while(1). iu ny l khng h mong mun trong ng dng ca bn.

19. Loi b comment v tin hnh compile, download v chy li chng trnh mt ln
na chc chn chng trnh ca bn chy tt. Khi thc hin xong bn click nt
terminate kt thc trnh Debug v tin hnh ng project li.

20. Homework Idea: kim tra v vic iu ch rng xung ca Timer. Chng trnh
timer nhp nhy Led nhanh hn mt bn c th nhn thy. Thng l ln hn 30Hz,
v s dng rng xung thay i cng sng nhnh hn. Vit mt v ng lp
thc hin iu chnh cng khc nhau theo nh k.
Hon thnh!
Lab 5: ADC12

I. Mc tiu:

Trong lab ny, chng ti s s dng ADC12 v sample sequencers o cc d liu t


cc cm bin nhit trn chip. Chng ti s s dng code Composer hin th cc gi
tr thay i.

II. Cc bc tin hnh:

Import Lab5 Project

1. Chng ti to ra cho bn project lab4 cho bn mt file main.c trng, mt file


startup v tt c cc thit lp cn thit build mt project. Bn cn phi hon thin
code c n li cho project. import project click Project Import Existing CCS
Eclipse Project. Chn project cn import, b du check mc Copy projects into
workspace v click finish.

Header Files

2. Xa ni dung hin ti ca file main.c, thm cc d ng di y vo file main.c. N


bao gm cc file header truy cp vo cc hm API trong StellarisWare.
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
adc.h: nh ngha cho vic s dng ADC driver.

Driver Library Error Routine

3. Thi gian chy kim tra thng s ca cc thit b ngoi vi Driver Library l kh mau
k t khi kim tra qu mc s c nh hng tiu cc n tnh chu k. Nhng, trong
qu trnh Debug, bn c th thy rng bn c gi l mt driver library API vi
cc thng s khng chnh xc hoc mt th vin chc nng to ra mt li v mt l do
khc. Cc m sau y s c gi nu cc driver library gp mt li nh. code
chy ta cn thm vo on code sau.
#ifdef DEBUG
void__error__(char *pcFilename, unsigned long ulLine)
{
}
#endif

Main()

4. Thit lp hm main() vi cc d ng sau:


int main(void)
{
}

5. nh ngha sau y s to ra mt mng s c s dng lu tr cc d liu c t


ADC FIFO. N phi l ln FIFO cho cc chui c s dng. Chng ta s s dng
tun t 1 c su FIFO ca 4. Nu sequencer khc c s dng vi mt FIFO
nh hn hoc su hn, sau kch thc mng s phi c thay i. V d, se-
quencer 0 c su 8.
Thm d ng khai bo sau vo u hm main():
unsigned long ulADC0Value[4];

6. Chng ta s cn mt s bin tnh nhit t cc d liu cm bin. Bin u tin l


lu tr trung bnh ca nhit . Cc bin cn li c s dng lu tr cc gi tr
nhit C v F. Tt c u c khai bo l 'volatile mi bin s khng c
ti u ha bi trnh bin dch v s c sn cho cc 'Expression' hoc 'Local'
window(s) ti thi gian chy. Thm vo nhng d ng sau vo cui :
volatile unsigned long ulTempAvg;
volatile unsigned long ulTempValueC;
volatile unsigned long ulTempValueF;

7. Set up clock h thng l 40Mhz. bng cch thm vo chng trnh d ng lnh sau:
SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_OSC_MAI
N|SYSCTL_XTAL_16MHZ);

8. Kch hot module ADC0 bng cch thm d ng lnh sau vo d ng k tip:
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
9. Trong v d ny, chng ta thit lp tc ly mu l 250kilo-samples trong mi giy.
Hm API SysCtlADCSpeedSet() c th set tc ly my vi cc tc c th
(125KSPS, 500KSPS and 1MSPS).
Add thm vo d ng tip theo d ng lnh sau:
SysCtlADCSpeedSet(SYSCTL_ADCSPEED_250KSPS);

10. Trc khi cu hnh cc thit lp ADC sequencer. Ta cn phi disable ADC sequencer
1.
Add thm vo d ng tip theo d ng lnh sau:
ADCSequenceDisable(ADC0_BASE, 1);

11. By gi chng ta c th cu hnh ADC sequencer. Chng ta mun s dng ADC0,


mu sequencer 1, chng ta mun cc b vi x l kch hot sequencer v chng ta
mun s dng u tin cao nht.
Add thm vo d ng tip theo d ng lnh sau:
ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_PROCESSOR, 0);

12. Tip theo chng ta cn phi cu hnh tt c bn steps trong sequencer ADC. Cu hnh
cc steps 0-2 trn sequencer 1 ly mu cm bin nhit (ADC_CTL_TS). Trong
v d ny, chng ta s t trung bnh tt c bn mu d liu cm bin nhit trn
sequencer 1 tnh ton nhit , v vy tt c bn steps sequencer s o cm bin
nhit . bit thm thng tin v b sp xp dy ADC v cc steps, tham kho
datasheet ca thit b c th.
Add thm 3 d ng sau vo d ng tip theo d ng lnh:
ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_TS);

13. steps sequencer cui cng i hi mt vi thit lp b sung. Mu cm bin nhit


(ADC_CTL_TS) v cu hnh c ngt (ADC_CTL_IE) c thit lp khi mu c
thc hin. Cho logic ADC rng y l vic chuyn i cui cng trn sequencer 1
(ADC_CTL_END).
Add thm vo d ng tip theo d ng lnh sau:
ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_TS | ADC_CTL_IE |
ADC_CTL_END);

14. By gi chng ta c th enable ADC sequencer 1.


Add thm vo d ng tip theo d ng lnh sau:
ADCSequenceEnable(ADC0_BASE, 1);

15. Vn trong hm main(), thm v ng lp while (1).


Add thm 3 d ng code sau vo d ng k tip:
while(1)
{
}

16. Save li code ca bn. Ta s c on code di y


#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"

#ifdef DEBUG
void__error__(char *pcFilename, unsigned long ulLine)
{
}
#endif

int main(void)
{
unsigned long ulADC0Value[4];
volatile unsigned long ulTempAvg;
volatile unsigned long ulTempValueC;
volatile unsigned long ulTempValueF;


SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_OSC_MAIN|
SYSCTL_XTAL_16MHZ);

SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlADCSpeedSet(SYSCTL_ADCSPEED_250KSPS);
ADCSequenceDisable(ADC0_BASE, 1);

ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_TS | ADC_CTL_IE |
ADC_CTL_END);
ADCSequenceEnable(ADC0_BASE, 1);

while(1)
{

}
}
Khi bn xy dng code ny, bn c th nhn c mt cnh bo
ulADC0Value was declared but never referenced. B qua cnh bo ny,
chng ta s thm code s dng mng ny sau.

Inside the while(1) Loop


Trong while (1) chng ta s c gi tr ca cm bin nhit v tnh ton nhit .

17. Cc du hiu cho thy vic chuyn i ADC hon tt s l l c tnh trng gin on
ADC. N lun lun thc hnh lp trnh tt m bo rng l c c xa trc khi
vit m x l n.
Thm on code sau vo d ng u tin trong v ng lp while(1):
ADCIntClear(ADC0_BASE, 1);

18. Sau chng ta c th kch hot chuyn i ADC bng phn mm. Chuyn i ADC
cng c th c kch hot bi nhiu ngun khc.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
ADCProcessorTrigger(ADC0_BASE, 1);

19. Sau , chng ta cn phi ch i cho vic chuyn i hon thnh. R rng, mt
cch tt hn lm iu ny l s dng mt interrupt, ch khng phi l mt lnh
ch i qu trnh chuyn i kt thc.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
while(!ADCIntStatus(ADC0_BASE, 1, false))
{
}

20. Sau khi i cho qu trnh chuyn i hon thnh, by gi ta c th c gi tr ca


ADC t ADC Sample Sequencer 1 FIFO. Hm ny c chc nng sao lu mu d liu
chuyn i ADC cha trong ADC Sample Sequencer 1 FIFO vo mt b m trong
b nh. iu ny ch tr li cc d liu ang sn c trong ADC Sample Sequencer 1
FIFO, n c th tr li khng y d liu nu bn c gng truy cp FIFO khi qu
trnh chuyn i cha hon tt.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
ADCSequenceDataGet(ADC0_BASE, 1, ulADC0Value);

21. Tip theo ta s tin hnh tnh ton gi tr trung bnh ca d liu. Chng ta s ni v
hot ng ca php ton floating point sau, v vy by gi n l php ton fixed-
point.
Vic b xung thm 2 l lm tr n. T php ton 2/4 1/2 0.5, 1.5 s c
lm tr n ln 2 bng vic b xung thm 0.5, c n trng hp 1.0 khi c thm
vo 0.5 s thnh 1.5, iu ny s c lm tr n xung 1.0 do quy tc lm tr n
ca php ton nguyn.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
ulTempAvg = (ulADC0Value[0] + ulADC0Value[1] + ulADC0Value[2] +
ulADC0Value[3] + 2)/4;

22. By gi chng ta c c gi tr trung bnh ca cm bin nhit , chng ta s tin


hnh tnh ton gi tr nhit theo oC bng cng thc di y c cp trong
phn 13.3.6 ca datasheet LM4F120H5QR. Php chia c thc hin cui cng
trnh vic lm tr n trong qu trnh tnh ton.
TEMP = 147.5 ((75 * (VREFP VREFN) * ADCVALUE) / 4096)
Chng ta cn phi nhn tt c cho 10 bn trong, v sau chia cho 10 cui
cng c kt qu ng, VREFP VREFN l VDD hoc 3.3v chng ta s
nhn n cho 10 v sau nhn tip cho 75 c 2475.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
ulTempValueC = (1475 - ((2475 * ulTempAvg)) / 4096)/10;

23. Sau khi c oC vic tnh ton oF l ht sc d dng. Php chia c thc hin sau
trnh lm tr n trong qu trnh tnh ton.
Chng ta s dng cng thc sau chuyn i t oC sang oF: F ( C * 9)/5
+32 iu chnh li mt cht ta c: F ((C * 9) + 160) / 5.
Thm d ng code sau y sau vo d ng tip theo trong v ng lp while(1):
ulTempValueF = ((ulTempValueC * 9) + 160) / 5;

24. Save code ca bn li, ta s c on code nh sau:


#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"

#ifdef DEBUG
void__error__(char *pcFilename, unsigned long ulLine)
{
}
#endif

int main(void)
{
unsigned long ulADC0Value[4];
volatile unsigned long ulTempAvg;
volatile unsigned long ulTempValueC;
volatile unsigned long ulTempValueF;


SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_OSC_MAIN|
SYSCTL_XTAL_16MHZ);

SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlADCSpeedSet(SYSCTL_ADCSPEED_250KSPS);
ADCSequenceDisable(ADC0_BASE, 1);

ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_TS);
ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_TS | ADC_CTL_IE |
ADC_CTL_END);
ADCSequenceEnable(ADC0_BASE, 1);

while(1)
{
ADCIntClear(ADC0_BASE, 1);
ADCProcessorTrigger(ADC0_BASE, 1);

while(!ADCIntStatus(ADC0_BASE, 1, false))
{
}

ADCSequenceDataGet(ADC0_BASE, 1, ulADC0Value);
ulTempAvg = (ulADC0Value[0] + ulADC0Value[1] + ulADC0Value[2] +
ulADC0Value[3] + 2)/4;
ulTempValueC = (1475 - ((2475 * ulTempAvg)) / 4096)/10;
ulTempValueF = ((ulTempValueC * 9) + 160) / 5;
}
}

Add Pre-defined Symbol

25. Click chut phi vo project Lab5 trong Project Explorer chn Properties. Bn click
theo ng dn sau Build ARM Compiler Advanced Options Predefined
Symbols. Trong phn Pre-define NAME add define DEBUG. Click Ok. Trong cc
bi lab tip theo define ny lun c xc nh.


Build and Run the Code

26. Bn tin hnh compile v Download ng dng ca bn bng cch click vo biu

tng Debug , sau khi qu trinh compile v download kt thc giao din Debug
s xut hin.

27. Click trong tab Expressions. Xa tt c Expressions bng cch click chut phi vo
khung v chn Remove All.
Tm n cc bin ulADC0Value, ulTempAvg, ulTempValueC v
ulTempValueF trong bn d ng cui cng ca code click p chut vo mi
bin chn tng bin, click chut phi vo bin v chn Add Watch
Expression sau nhn Ok. Lm nh vy cho 4 bin. Kt qu ta c nh hnh
sau:

28. Chng ta mun thit lp cho chng trinh Debug n hin th kt qu sau mi ln
chy. V khng c mt d ng lnh no sau qu trnh tnh ton, nn ta s t 1
Breakpoint trc cc lnh tnh ton hin th kt qu tnh ton gn nht.
Click chut vo d ng u tin trong v ng lp while (1)
ADCIntClear(ADC0_BASE, 1);
Click chut phi vo n, chn Breakpoint (Code Composer Studio)
breakpoint t 1 breakpoint ngay hng .


Click chut phi ln biu tng breakpoint v chn Breakpoint Properties
tm d ng cha Action v click vo Remain Halted value. l cch bnh
thng mt breakpoint nn hnh ng, nhng chng ta hy thay i n thnh
Update View. Trong hp thoi di y, lu rng ch c ca s Expressions
s c cp nht. By gi cc bin trong ca s Expressions s c cp nht
v code s tip tc thc hin. Nhn OK.

29. Click nt Resume chy chng trnh.


Bn s thy gi tr ca bin u1TempAvg thay i giao ng rt nh. Bn c
th dng ngn tay ca mnh ma st ln qun ri sau t n ln thit b
LM4F120 trn board launchpad lm m n. Dng ngn tay ca bn vo
mt thc ung lnh, sau chm vo thit b LM4F120 lm mt n. Bn
nn nhanh chng xem kt qu bin i trn mn hnh.


Ghi nh rng cc b cm bin nhit cha c hiu chnh, v vy cc gi
tr hin th khng chnh xc. Khng sao trong lab ny, v chng ta ch tm hiu
nhng thay i trong vic o lng.
Lu s lng bin ulTempAvg ang thay i. Chng ta c th gim s
lng bng cch s dng phn cng trung bnh trong ADC.

Hardware averaging

30. Click nt Teminate quay tr li trnh chnh sa.


Tm n cc d ng ci t ADC ca bn nh hnh di y

To mt d ng mi sau hm SysCtlADCSpeedSet(). V add cu lnh sau vo:
ADCHardwareOversampleConfigure(ADC0_BASE, 64);
Code ca bn s ging nh hnh sau:


Tham s cui cng trong cc gi hm API
ADCHardwareOversampleConfigure() l s lng mu c ly trung
bnh. Con s ny c th l 2, 4, 8, 16, 32 hoc 64. La chn ca chng ta c
ngha l mi mu trong ADC FIFO s l kt qu ca 64 php o trung bnh
vi nhau.

31. Buil, download v chy chng trnh ca bn trn board launchpad. Quan st bin
ulTempAvg trong ca s Expressions, bn s thy n s thay i vi tc chm hn
nhiu so vi trc.

Calling APIs from ROM

32. Trc khi thc hin bt k thay i, chng ta xem dung lng code ca chng ta hin
ti. Click Teminate kt thc qu trnh Debug v quay tr v giao din chnh
sa. Trong Project Explorer, m rng folder Debug ca project Lab5. Click p vo
file Lab5.map.

33. Code composer gi mt danh sch cc tp tin thay i k t ln build mi nht.


Khi bn nhp vo nt build, CCS compiles v assembles cc tp tin vo cc tp tin
object. (Bn c th buc CCS hon ton rebuild li project bng cch xa project
hoc rebuilding li tt c). Sau , trong mt qu trnh a qua, mi lin kt to ra cc
file output (.out) s dng bn b nh ca thit b theo defined trong file linker
command (. Cmd). Qu trnh build cng to ra mt file map (.map). Gii thch ln
cc phn ca chng trnh (.text Code) v chng c t vo ch no trong bn
b nh.
Trong file Lab5.map, tm n SECTION ALLOCATION MAP v tm d ng
.text nh hnh di y.

Chiu di .text ca chng ti l 690h. Vit kch thc ca bn vo
y________

34. Hy nh rng M4F on-board ROM cha cc Th vin Driver ca thit b ngoi vi.
Thay v thm nhng th vin gi n b nh flash ca chng n, chng ta c th gi
chng t ROM. iu ny s lm gim kch thc m ca chng trnh ca chng ta
trong b nh flash. lm nh vy, chng ta cn thm s h tr cho ROM trong m
ca chng ta.
Trong main.c thm d ng include sau vo u ca code:
#include "driverlib/rom.h"

35. Trong properties lab5 ca bn, click chut phi trong Lab5 trn Project Explorer chn
Properties. Trong Build ARM Compiler Advanced Options, click trong
Predefined Symbols. Add biu tng sau y vo u ca s.
TARGET_IS_BLIZZARD_RA1
Blizzard l tn sn ph m ni b cho lot LM4F ca TI. Biu tng ny s
cung cp cho cc th vin truy cp vo cc API trong ROM. Nhn OK.

36. Tr li main.c, thm ROM_ n u ca mi gi hm ca DriverLib nh hnh di


y.
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
#include "driverlib/rom.h"

#ifdef DEBUG
void__error__(char *pcFilename, unsigned long ulLine)
{
}
#endif

int main(void)
{
unsigned long ulADC0Value[4];
volatile unsigned long ulTempAvg;
volatile unsigned long ulTempValueC;
volatile unsigned long ulTempValueF;

ROM_SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_OSC
_MAIN|SYSCTL_XTAL_16MHZ);

ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
ROM_SysCtlADCSpeedSet(SYSCTL_ADCSPEED_250KSPS);
ROM_ADCHardwareOversampleConfigure(ADC0_BASE, 64);
ROM_ADCSequenceDisable(ADC0_BASE, 1);

ROM_ADCSequenceConfigure(ADC0_BASE,1,
ADC_TRIGGER_PROCESSOR, 0);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_TS);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_TS);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_TS);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_TS |
ADC_CTL_IE | ADC_CTL_END);
ROM_ADCSequenceEnable(ADC0_BASE, 1);

while(1)
{
ROM_ADCIntClear(ADC0_BASE, 1);
ROM_ADCProcessorTrigger(ADC0_BASE, 1);

while(!ROM_ADCIntStatus(ADC0_BASE, 1, false))
{
}

ROM_ADCSequenceDataGet(ADC0_BASE, 1, ulADC0Value);
ulTempAvg = (ulADC0Value[0] + ulADC0Value[1] + ulADC0Value[2] +
ulADC0Value[3] + 2)/4;
ulTempValueC = (1475 - ((2475 * ulTempAvg)) / 4096)/10;
ulTempValueF = ((ulTempValueC * 9) + 160) / 5;
}
}

Build, Download and Run Your Code

37. Click nt Debug buil v download code ti flash memory LM4F120H5QR.

Khi qu trnh hon tt, click nt Resume chy code ca bn. Khi bn chc
chn rng tt c mi th ang lm vic mt cch chnh xc, click nt Terminate
quay tr v giao din chnh sa.

38. Kim tra SECTION ALLOCATION MAP trong Lab5.map. Kt qu ca chng ta


c hin th di y


Kch thc mi cho .text Ca chng ta l 3e8h. N l nh hn so vi trc
40%. Vit kt qu ca bn y_____
39. Phng php th hin trong cc bc sau c gi l " direct ROM calls ". N cng
c th thc hin cuc gi ROM nh x khi bn ang s dng cc thit b (nh ARM
Cortex-M3 TI) c th c hoc khng c mt ROM. Kim tra phn 32,3 trong
Peripheral Driver Library Users Guide bit thm thng tin.

40. Khi bn hon thnh, ng project v chng trnh Code Composer Studio ca bn
li.
Hon thnh!

You might also like