Seminar On "VLSI Algorithms"

under
Technical Education Quality Improvement Program (TEQIP II)
From August 09, 2016 to August 12, 2016
Organized By
Department of Computer Science & Engineering,
Heritage Institute of Technology, Kolkata- 700107

OBJECTIVE OF THE PROGRAM

There is a lot of apprehension and attention shown by pure CSE professionals when it
comes to the fascinating world of IC design. They think on one hand VLSI is mostly
ECE stuff. But at the same time they marvel at latest hardware and gizmos and wonder
how these splendid things are implemented in practice. This seminar intends to clear
some of the fears and doubts which may be in the minds of CSE professionals towards
the IC design domain. It also aims to bring them in shape with some simple yet powerful
techniques they can master, to come up with IC designs of their own. Hence we can
identify the following objectives of this seminar:
1. Introduce CSE professionals to the basics of IC design flow.
2. Explain how familiar CSE algorithms are applied with little modification to various IC
CAD software.
3. Explore various opportunities for CSE professionals in the vast realm of IC designs
and enable them create interesting designs of their own.
4. Learn latest happenings in IC design from world class experts in this field and
identify some potential research ideas CSE people can work on in future.

TOPICS TO BE COVERED

o High Level Synthesis

o Design Compilation Flow (Hands-on)
o Sequential Testing
o Formal Design Verification
o Design of Secured ICs including Physically Unclonable Functions
o Simulation of Electronic Circuits
o Placement and Routing Flow (Hands-on)

SPEAKERS
Prof. Indranil Sengupta ........................................ Department of CSE, IIT Kharagpur
Prof. Preeti Ranjan Panda ................................... Department of CSE, IIT Delhi
Prof. Krishanu Datta............................................. Department of ECE, HIT Kolkata
Prof. Angsuman Bannerjee ................................. ACMU, Indian Statistical Institute
Prof. Rajat Shubhro Chackraborty...................... Department of CSE, IIT Kharagpur
Abhishek Somani ................................................. Mentor Graphics Kolkata
ELIGIBILITY FOR PARTICIPATION
The course is open to CSE/IT faculty members of engineering colleges, research
institutes and universities across India.

COURSE FEE
Rs. 1000/- per participant. Payment should be made through Demand Draft (DD) only.
The demand draft should be drawn in favour of:
"Heritage Institute of Technology TEQIP-II-Corpus A/c.", payable at Kolkata.

REGISTRATION PROCEDURE
1. Scanned copy of duly filled-in Registration form and the DD should be sent by e-mail
to: somenath.sengupta@heritageit.edu OR arindam.chatterjee@heritageit.edu.
2. The following details must be written on the back of the DD: Candidates name and
Institutes name.
3. Duly filled-in Registration form and the DD in original should be submitted at the
registration desk on the inaugural day of the program i.e. on 09-August-2016.

IMPORTANT DATES
Deadline for sending of duly filled-in registration form through e-mail: 29-Jul-
2016.

FOR FURTHER DETAILS CONTACT:

Somenath Sengupta Arindam Chatterjee

Assistant Professor Assistant Professor
Dept. of CSE Dept. of CSE
Mobile No : 9831825026 Mobile No. : 9874722985
somenath.sengupta@heritageit.edu arindam.chatterjee@heritageit.edu