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Radio, 1982, 8
Figure 1.
For normal operation of the ADC requires that the inverter-comparators A1-A4 should
be able to switch when the voltage on their inputs equal to Vcc/2 and an error must
be no more than Vcc/(2n-2) (n - number of bits of binary code at output), and the
output voltage of the comparator in on/off states should be close to zero and to the
Vcc. In addition, the comparator must have a high input and low output impedance.
Most of the modern op amps is satisfied for these requirements, the inverting inputs
of this op amps should be connected to the Vcc/2 (half of power supply voltage).
Figure 2.
If the required accuracy of analog to digital conversion does not exceed four bits,
then as the basis for the ADC can be used quad CMOS logic elements "NAND" or
"NOR". One of the possible approaches to construct this device is shown in Figure 2.
The input impedance of this circuit is about 22 kilohms, and the time of conversion -
less than 300 ns.