l

I HC QUC GIA THNH PH H CH MINH

TRNG I HC CNG NGH THNG TIN

BO CO LAB 2
LP PH002 F26.1

TN MSSV:
NGUYN C V 14521100
NGUYN PHI HONG V 14521101
1.1)
Sinh vin tin hnh v mch theo hm logic sau y, sau tin hnh m
phng hot ng ca mch bng phn mm v np vo kit DE2 th
nghim hot ng ca mch

1.2) TIN TRNH

Mch logic c v trn Quartus

(gm 3 inputs, 1 output, 1 OR2 gate, 1 OR3 gate, 1 AND3 gate, 2 NOT gates)

Compile mch thnh cng

 To v chy waveform

1.3) WAVEFORM

1.4) BNG CHN TR

 A B C

+
A+B+C F
0 0 0 1 1 1 0 0
0 0 1 1 0 1 1 0
0 1 0 1 1 1 1 1
0 1 1 1 0 1 1 0
1 0 0 0 1 0 1 0
1 0 1 0 0 1 1 0
1 1 0 0 1 1 1 1
1 1 1 0 0 1 1 0

1.5) KT LUN
Ta c:
F= ( + )( + + )
F= ( + + + )
F=
Do tn hiu ra ch ph thuc vo tnh hiu u vo B v C

2.1)
Sinh vin tin hnh v mch theo hm logic sau y, sau tin hnh m
phng hot ng ca mch bng phn mm v np vo kit DE2 th
nghim hot ng ca mch

Hm F l hm ca mt mch Multiplexer (MUX 4-1) c din t nh hnh

di:
2.2) TIN TRNH

Mch logic c thit k trn Quartus

(gm 5 inputs, 1 output, 4 AND3 gates, 2 NOT gates, 1 OR4 gate)
 Compile mch thnh cng

To v chy waveform

2.3) WAVEFORM
2.4) BNG CHN TR
A B W X Y Z F S trng hp
0 0 1 0 hoc 1 0 hoc 1 0 hoc 1 1 8
0 1 0 hoc 1 1 0 hoc 1 0 hoc 1 1 8
1 0 0 hoc 1 0 hoc 1 1 0 hoc 1 1 8
1 1 0 hoc 1 0 hoc 1 0 hoc 1 1 1 8
0 0 0 0 hoc 1 0 hoc 1 0 hoc 1 0 8
0 1 0 hoc 1 0 0 hoc 1 0 hoc 1 0 8
1 0 0 hoc 1 0 hoc 1 0 0 hoc 1 0 8
1 1 0 hoc 1 0 hoc 1 0 hoc 1 0 0 8
Tng cng 64

2.5) KT LUN
- y l mch a hp c th chn 1 u ra t cc u vo ( y l 4 u
vo) vic chn u vo c thc hin da trn tn hiu (dng nh phn) 2 cng
chn (A v B)
A B CNG VO
0 0 W
0 1 X
1 0 Y
1 1 Z