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Chapter 1

Digital Logic

1.1 Introduction
Digital circuits are electronic circuits designed to operate with a xed number
of discrete voltage values. Usuallyand throughout this bookwhere are just
two such values. Depending on how we use them, we may designate them with
dierent symbols, such as:

Truth values, true and false, denoted T and F, repectively.


Boolean values, 1 and 0.
Voltage, the electrical potential between a point in the circuit and a com-
mon reference point, called ground. We call these values high and
low, denoted H and L, respectively1

Digital systems record 1 and 0 in several ways:

(a) CDs and DVDs represent 1 by the presence and 0 by the absence of a pit
(or depression) in a layer of aluminum depositied on a rigid plastic disk
and detected by reection of a laser beam. The same principlepresence
or absence of a hole detected by a light sensorwas used in computer
punch cards and paper tapes in early computers (and even before that).
(b) Magnetic Disks (and Data Storage Tapes) represent logic data with mag-
netized areas on an iron oxide recording surface. A south pole sticking
out of the surface would represent a 1 and a north pole would be a 0 (or
vice versa).
(c) Spring loaded mechanical switches have two states, closed and open. Ei-
ther of these states could be chosen to represent truth; for example, the
designer might interpret an open switch as a logic 1.
1 The same voltage levels are used for signal values and power levels. For the latter, we use

the names the names power and ground with symbols Vcc and Vdd, respectively.

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2 CHAPTER 1. DIGITAL LOGIC

(d) As already mentioned, voltage in digital electronic circuits. The 74LS


family of transistor-transistor logic (TTL) integrated circuits, pervasive
in the 1980s, uses two voltage ranges, high voltage (H) being 2.25.0 V
and low voltage (L) being 00.8 V. The designer may choose to identify
either level with 0 and the other with 1, as we shall see in Chapter 2. All
circuits are designed to operate correctly within these ranges. In the 1990s,
as power consumption became a dominating factor in portable electronics,
new families of integrated circuitry emerged with high voltages ranges up
to 3.2 V. The important feature remains that the circuity must be able to
distinguish the two ranges.

This two-valued, or binary, characteristic of the digital world makes boolean


algebra the appropriate way to mathematically model the behavior of these
physical devices. Conversely, the desire to implement logical constructs in phys-
ical devices makes binary devices useful. If the devices produced more than two
values, more complicated mathematics would be needed to reect this property
abstractly. In a way it is fortunate that engineers have met with only limited
success in building reliable non-binary devices. Three-valued or ve-valued de-
vices would be far more dicult to trouble-shoot. Knowing that any signal must
hold either a 1 or a 0 turns out to be important in practice.
Of course, electronics is continuous by nature, and hence is innite-valued.
Since we are discussing why discrete-valued devices have only two values, it is
worth contemplating why digital circuits arise in the rst place. While there
may be no self-contained reason for this development, it may be enough to say
that they exist because we can do so much with them. Digital systems can be
systematically designed that exhibit far greater functionality than has ever been
attained using analog electronics.
Again, why?
One important reason is that the functionality of active logic devices orients
them and restricts their behavior with respect to input and output. In contrast,
analog electronics are relational in character and hence more dicult to manip-
ulate mathematically. These devices are also temporally oriented, an aspect to
be much further discussed in later chapters of this textbook.

1.2 Digital Devices


The electronically controlled switch: is a fundamental digital device.

G=H G=L

X Y X Y
S S

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c 2003 Steven D. Johnson Draft Material August 27, 2004
1.2. DIGITAL DEVICES 3

A B
X Y

X Y

B
(a) Connected in series (a) Connected in parallel

Figure 1.1: Two ways to combine two switches to connect points X and Y

A high voltage at the point G closes this switch, making a connection between
points X and Y . A low voltage at G opens the switch, disconnecting X and Y .
Switches integrated circuits are realized with transistors, depicted in schemat-
ics by this symbol:
G

A B
Chapter ?? describes how transistors work.
The logical function of a circuit derives from the elementary ways we can
combine switches. Fig. 1.1 shows the two ways to combine switches S1 and
S2 between two connecting points, X and Y . In Fig. 1.1(a), on the left, they
are connected in series; and in Fig. 1.1(b), on the right, they are connected in
parallel. If S1 and S2 are connected in series, then there must be high voltage
at both point A and point B to have a connection between points X and Y .
Thus, in this sense the series connection represents the function and. Similarly,
If S1 and S2 are connected in parallel, then X and Y are connected when there
is high voltage at either point A or point B, or both, so the parallel connection
represents the logical function or.
In theory, we could use this idea to implement any logical expression of
and s and or s. However, our idealized concept of a perfect switch cannot be
realized by physical devices, and we must do a bit more to sustain the illusion
of digital logic. Both the impulse needed to open or close the switch and
the imperfect (dis)connection it makes consume electrical energy. The most
signicant consequence of this energy drain is to compromise the discrete voltage
levels on which the logic is based in the rst place. If a high voltage closes the

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4 CHAPTER 1. DIGITAL LOGIC

switch and a low voltage opens it, an intermediate voltage leaves the state
of the switch uncertain. It takes only a few real switches to create such an
ambiguous situation.
Real digital components are active devices that employ amplication to re-
store signals to their proper digital levels. Below, two transistors are connected
in series with a resistor (an electronic element that restricts current ow), be-
tween Vdd (ground) and Vcc (power), both constant voltage sources.

VCC

VCC
R

A
Z Z
B
A

Now suppose that high voltage is present at both points A and B, so that
both switches are closed, as before. The point Z is thereby more directly (i.e.
with less resistence2 ) connected to ground through the switches; it therefore
acquires a low voltage. On the other hand, if either of the switches is open, Z
is disconnected from ground and the connection to Vcc dominates.
In either case, the voltage at point Z is restored to a proper digital level
and, in addition, this voltage has the full strength of the power supply behind
it. Hence, the signal Z is clear and strong.
This device is an example of a digital logic gate, and there are several points
worth remembering about it.

As has already been noted, it is an active device, using amplication to


sustain proper voltage levels for digital operation.

The gate device is behaving as a function with respect to inputs A and


B and output Z. One schematic symbol, called nand, for that function is
2 The voltage at Z is (Vcc R)/(R + r ), where r is the resistance across the two switches.
s s
R is chosen to minimize leakage when the switches are closed and maximize current when
the switches are open. This gure illustrates NMOS technology. We will look at CMOS
technology (in which the resister is replace by another transistor) later.
NOTE: This is not a course in electronics. This discussion, and others like it throughout
the text, describe how digital components work in a qualitative way. The purpose is to provide
intuition about the physical basis of digital systems. However, there is not ground material
in this textbook to understand how or why these physical objects behave the way they do.
Your instructor may choose to provide additional material about this level, or direct you to
other courses to learn more. In any case, this groundwork is not critical for understanding
the main topics developed in this book.

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c 2003 Steven D. Johnson Draft Material August 27, 2004
1.2. DIGITAL DEVICES 5

shown to the right of the schematic above. We might read it as saying


Z = A nand B.
Because it uses amplication, the gate requires a power supply for correct
operation. It also generates physical byproducts, such as heat. Its ability
to sustain our idealized view of its operation depends critically on our
using it properly, providing adequate power and heat dissapation, and so
forth.
Because it is a physical device the gate takes time to perform its function.
This crucial fact will become the focus of our attention starting in Chapter
?? and onward. Generally speaking, the temporal aspect of system design
poses the most daunting intellectual challenge to designers and therefore
becomes central to our design methodology.

One of the rst things we do in developing a disciplined digital design method


is abstract from (or remove from consideration) details that get in the way of our
paramont design objective: achieving some specied functionality. During de-
sign, we want to think of our building blocks as purely mathematical functions,
rather than physical devices, to do otherwise merely clouds our thinking. When
a nand gate appears in a schematic, the power and ground connections are not
shown because they are irrelevant to the principal design goal: the function of
the design. To show them would add needless clutter and distraction.
Of course, when the time comes to build the physical implementation, the
engineer had better remember to connect the power supply! This is a theme
that we shall revisit again and again in this book. The concepts and methods
for design have co-evolved over time with the technolgies and building blocks
available for implementation. Understanding the juxtaposition of the conceptual
design space and its reection in physical building blocks is the key to making
sense a method and to keeping up with unrelenting advances in technology and
practice.
If the series-connected transistors in the nand -gate are replaced by paral-
lel connected transistors, as below, the result is a logic gate whose output is
grounded when the voltage on either of its inputs is high.
VCC

VCC
R

A
Z Z
B

A B

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6 CHAPTER 1. DIGITAL LOGIC

This is traditionally called a nor gate. We shall see in the next chapter that
the names nand and nor are misleading.

1.3 Logic and Boolean Algebra


1.3.1 Logic Constants and Primitive Operations.
The logical values true (T) and false (F) have already been introduced. Our
use of logic in this chapter is restricted to propositional expression, involving
simple combinations of logic values, without quantication (i.e. without for
all, there exists, etc.). Of particular interest are the functions and (denoted
by an inx ), or (denoted by an inx ), and not (denoted by a prex ).
In logical expressions, the unary lnot has highest precedence and lowest,
so for example, the term
S A S B
if fully parenthesized, would be written

(S A) ((S) B)

(See Exercise 3.)

1.3.2 Logical Variables.


Capitalized italic names A, B, C, etc. are used for logic variables. We may
employ subscripts in groups of related names; for instance, A0 , A1 , . . . A7 .
In design examples, nmemonics like LD, CLR, are used and, when the
situation calls for it, descriptive identiers, such as PHOTODIODE .ERROR,
START .ASSERTED. A period is used as a mnemonic separator in this book,
but dierent design tools and other sources may use hyphens or underscores for
this purpose.

1.3.3 Truth Tables


A truth table is a representation of a logical function. The rst example, on the
left below, describes a function X of three variables, A, B and C. The second
example, on the right, describes a two functions, Y and Z, of variables S A and
B.
A B C X S A B Y Z
F F F F F F T F T
F F T T T F F F F
F T F T F T F T T
F T T F T F T T F
T F F T F F F F T
T F T F T T F F F
T T F F T T T T F
T T T F F T T T T

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1.3. LOGIC AND BOOLEAN ALGEBRA 7

X(A, B, C) = [F, T, T, F, T, F, F, F]

A A
T F T F

B B B B
T F T F T F T

C C C C C T
C F
T F T F T F T F T
F F
F T T F T F F F

T F

Figure 1.2: Some truth table representations: an array (top), a decision tree
(left), and a decision diagram (right).

If you study the truth tables for X, Y and Z long enough, you may probably
think of better ways to describe them, either informally with English predicates
or perhaps formally as logic expressions.
You may also have noticed a dierence in the order that the rows of these
two tables are presented. Although the order does not matter, so long as there
is just one row for each of the eight possible input combinations, it is generally
better to have a standard, or canonical, ordering. For reasons that are explained
in Section 1.3.5, the ordering on the left, above, is canonical.
If we are going to use the standard ordering, then the only thing we really
need to describe a particular truth table are the functions name, its variables
in some order, and the column of specied function values. The rest is boiler-
plate, giving the table a familiar shape and format. Figure 1.2 shows a number
of possible representations this essential information might have, including data
structures that often used for computer representations. Of particular note is
the binary decision diagram (BDD), Fig. 1.2, lower left, a computer represen-
tation found in many design tools.
Figure 1.3 gives truth tables dening some of the primitive logic functions.

1.3.4 Elements of Boolean Algebra


In mathematics, a boolean algebra is one of a family of systems which share
certain properties.3 For our purposes boolean algebra refers to a particular

3 The term boolean derives from the name of the mathematician George Boole (18151864)

who was the rst to apply the concept of algebra to logic. Some textbooks acknowledge
Booles profound contributions to computer science by using a lower-case b.

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8 CHAPTER 1. DIGITAL LOGIC

not, and , or ,
A A A B AB A B AB
F T F F F F F F
T F F T F F T T
T F F T F T
T T T T T T

either-or, = i , = implies, only if ,


A B A = B A B A=B A B AB
F F F F F T F F T
F T T F T F F T T
T F T T F F T F F
T T F T T T T T T

Figure 1.3: Some primitive logic functions.

system involving two constants, 1 and 0, and operations +, and , dened as

0 + 0 1 0 1
0 1 0 0 1 0 0 0
1 0 1 1 1 1 0 1

Other members of the family include


The theory of sets, playing the role of 0, a universal set U playing the
role of 1 and set intersection, set union and set complementation (with
respect to U) playing the roles of , + and , respectively.
Logic, with for , for + and for .
Arcane instances, such as the system BN whose values are all the divisors
of a number N with 1 for 0, N for 1, least-common-multiple for +, greatest-
common-divisor for and x =def N/x.
Of course, with just two constants, T and F, logic is essentially identical to the
binary system just introduced. We will use these two systems interchangably,
and even say true for 1, and for , and so forth. In fact, the constants 0 and
1 are often to be prefered over T and F because they are easier to write down
and are more visually distinct. Furthermore, the boolean operator symbols are
chosen for their familiarity and hence are easier to manipulate algebraically.
Despite these advantages, we will still use the logical operators when we
wish to emphasize logical aspects of a design. For instance, if we want a signal
READY to be asserted whenever both conditions A and B are true, we will
likely write
READY = A B

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1.3. LOGIC AND BOOLEAN ALGEBRA 9

(a) x=x double negation

(b) x1 =x x+0=x identity


(c) x0 =0 x+1=1 dominance
(d) xx =x x+x=x inversion
(e) xx =0 x+x=1 cancellation

(f) xy =yx x+y =y+x commutativity


(g) x (y z) = (x y) z x + (y + z) = (x + y) + z associativity
(h) x (y + z) = x y + x z x + y z = (x + y) (x + z) distributivity

(i) xy =x+y x+y =xy DeMorgans law

(j) x (x + y) = x x + xy = x absorbtion
(k) x (x + y) = x y x + xy = x + y absorbtion
(l) xy + xy = y (x + y) (x + y) = y independence

Figure 1.4: Boolean identities

to express the logical intent.


As just mentioned, the choice of symbols for the boolean and , or and not
operations reect the fact that their algebraic properties are similar to (but
stronger than) those of arithmetic multiplication, addition and negation. We
may use familiar algebraic identities, such as commutativity and associativity,
to simplify and reason about boolean expressions. Figure 1.4 lists some of these
identities and names some of them. Some of the identities can be derived from
the others in the list. Since we mean to take advantage of our hard-learned
familiarity with the laws of arithmetic, we shall adopt the same notational
conventions with our boolean operators. Times takes precedence over plus,
and wherever possible we drop the and simply juxtapose the operands of a
product.
Since both + and + are associative, we do not need to parenthesize long
strings of sums or products. Furthermore, the distributive and DeMorgan laws
generalize, for instance:

(A + B + C + D + E) = A B C D E

and
A (B1 + B2 + + Bn ) = (A B1 ) + (A B2 ) + (A Bn )+

Although the boolean operators share many properties with their arithmetic
counterparts, there are also some signicant dierences. You will see in Fig. 1.4
that all of the identities involving + or come in pairs. This feature reects the

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10 CHAPTER 1. DIGITAL LOGIC

The Principle of Duality: From any valid boolean equation L = R one


may derive another valid equation LD = RD by interchanging 1s with
0s and +s with s. The expression E D obtained from E in this way is
called the dual of E.
In performing boolean derivations, one often misses opportunities to apply
the duals of the familiar arithmetic laws, practiced over and over in high school
and calculus classes. Fortunately, one is unlikely to be called upon to perform
extensive derivations in digital design applications. Nevertheless, it is useful to
be able to do short o the cu derivations, so a bit of practice is worthwhile.
DeMorgans Law, which says that negation distributes over both + and
, give another aspect to duality. DeMorgans Law can be stated more generally
than the primitive law appearing in Fig. 1.4:

DeMorgans (Generalized) Law : The negation of any boolean expression


E is equivalent to the expression obtained by negating all the variables
within E D .
DeMorgans Law makes it convenient to express negation by drawing a bar
over the negated expression rather than putting a minus-sign in front of it, as
we do in arithmetic expressions. However, if this convention is used carelessly
in combination with other shortcuts, there is a danger of confusing the negation
of a product with the product of negatives:

AB = A B
Be careful!
The general form of DeMorgans Law is proved valid by an induction over
the grammar of logical expressions. We have not laid the groundwork for such
a proof in this textbook. Let us look at an example, at least.

Example 1. According to DeMorgans Generalized Law, it should be the case


that
A + B C + A C D + B D = A(B + C)(A + C + D)(B + D)
Let us prove this instance algebraically, using the repeated applications, from
left to right, of the primitive form of Fig. 1.4(i).

A + B C + AC D + B D = A + B CA C D + B D
= AB CA C D + B D
= A(B + C)A C D + B D
= A(B + C)A C DB D
= A(B + C)(A + C + D)B D
= A(B + C)(A + C + D)(B + D)

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1.3. LOGIC AND BOOLEAN ALGEBRA 11

So the generalized law holds in this case.

Although it sometimes provides a convenient shortcut, DeMorgans general


law is less often applied in practice than its more primitive form in Fig. 1.4(i).
Often, when double-negations ariseas in the second step of the derivation
abovethey are immediately simpied using Eq. 1.4(a) Application of the law
can be easier said than done because the precedence rules often require (or
allow) us to introduce (or eliminate) parentheses when when s and +s are
interchanged.
Let us work a few examples to get started. Need some more examples

A (B + C (B + A)) = A (B + C B + C A) (Eq. 1.4(h))


= A (B + C A) (1.4(j))
= AB+AC A (1.4(h))
= AB+AAC (1.4(f))
= AB+0C (1.4(d))
= AB (1.4(c), 1.4(b))
= A+B 1.4(i))

1.3.5 Bits, Binary Numerals


We often interpret a group of binary variables as a binary number, in which case
it is customary to display these variables in such a way that the least-signicant
bit is right-most, as in normal numerical representations.
When an indexed group of variables, A0 , A1 , . . . , Ak is involved, Ai usually
represents the 2is place in the corresponding numeral, and we will write
the k + |-bit numeral out as Ak A1 A0 with the least-signicant bit, again,
furthest right.
An immediate application of this idea is in the presentation of truth tables.
Our rst example of a truth table is repeated below, with truth values on the
left and the corresponding boolean values on the right

A B C X A B C X
F F F F (0) 0 0 0 0
F F T T (1) 0 0 1 1
F T F T (2) 0 1 0 1
F T T F (3) 0 1 1 0
T F F T (4) 1 0 0 1
T F T F (5) 1 0 1 0
T T F F (6) 1 1 0 0
T T T F (7) 1 1 1 0

This truth table is in standard form because its rows are listed in numerical
order, depending a xed choice of rst A, then B, and nally C as the ordering
of its input variables. In this case, we have (redundantly) numbered the rows
for reference.

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12 CHAPTER 1. DIGITAL LOGIC

We shall have a great deal more to say about the binary numeric represen-
tations and the implementation of arithmetic in later chapters.

1.4 Summary
This chapter has set the scene for the topics that follow. Like most chapters
in this textbook, this one has looked at both physical and conceptual aspects
of digital systems. As in common in most textbooks about design, we are
concerned with resolving two levels of abstraction. Of course, we are just at
the outset of this process, so the distinction is rather course. We have taken a
brief, qualitative glimpse at what digital systemsa vast domain ranging from
wristwatches to global communication systemsare made of: switches. And we
have taken the rst step toward imposing a useful conceptual function on those
elementary devices: logic gates.
We want to get started on a good footing. In the next chapter, we will
explore a vital, fundamental principle of design in detail, before returning to
the task of expanding our design methodology.
Exercises 1.4

1. Figure 1.3 denes ve binary (two-input) logic functions. How many two-
input logic functions are there?

2. On Page 4 a nand gate is described by an equation, Z = A nand B. Dis-


cuss what the = sign might represent in this context? Is it mathematical
equality? A dening expression? An assignment statement?

3. Verify that the truth table for Y on page 7 species the function

Y = S A S B

4. By inserting full parentheses, show the order of evaluation of these func-


tion.

(a) B A C + D + E

(b) A + B C + D

(c) A + B (C + D)

5. By inspecting their truth tables, deduce the value of each function, X, Y ,


Z and W . Do not formally derive any logic expression; simply write down

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1.4. SUMMARY 13

the minimal formulation of each function.


A B C W X Y Z
0 0 0 0 1 0 1
0 0 1 0 1 0 0
0 1 0 0 1 0 1
0 1 1 0 1 0 0
1 0 0 0 1 1 1
1 0 1 0 1 1 0
1 1 0 0 1 1 1
1 1 1 0 1 1 0

6. Give 5-bit binary representations for the decimal numbers 5, 21, 48 and
13.
7. What numerical values are represented by the binary numbers 1011, 11011,
011 and 1111111111?
8. Describe algorithms for adding and subtracting binary number representa-
tions. Implement and test these algorithms in software using the language
of your choice.

Copyright 
c 2003 Steven D. Johnson Draft Material August 27, 2004

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