-- Multiplexador de 2:1 entradas de 1 bit

--============================================================
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;

ENTITY mux_1bit IS
PORT (a, b: IN STD_LOGIC;
mux_out: OUT STD_LOGIC;
sel: IN STD_LOGIC
);
END mux_1bit;

ARCHITECTURE comportamento OF mux_1bit IS

BEGIN

WITH sel SELECT

mux_out <= a WHEN '0',

b WHEN others;

END comportamento;