TV Chassis pt90 Neat PDF

SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL PT-90
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL NEAT
SERVICE MANUAL
SERVICE MANUAL CHASSIS
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
SERVICE MANUAL
Modification reserved
PT 90 NEAT Service Manual
CONTENTS
PAGE
Assembling/Disassembling
Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1. Technical Specs. Connectors
and Chassis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. Safety Instructions and Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4. Supply Voltage Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
5. I-C Bus Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
6. Fault Tracing Diag. for Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
7. Chassis Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
8. Service Menu And Basic Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
8.1 Option Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.2 Geometry Adj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.3 G2 Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.4 Video . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8.5 Tune / IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
8.6 Hotel Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
8.7 System Voltage Adj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
9. DVD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
9.1 Safety And Handling Precautions . . . . . . . . . . . . . . . . . . . .17
9.2 Mech. And Elec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
10. Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
TV Chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
DVD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
11. Description Of Ics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
TV Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
DVD Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
3
ASSEMBLING /
DISASSEMBLING PROCEDURE
Disassembly procedure is explained as below. Before dis- CRT drive module must be grounded via mass
assembling the TV set please read the safety instructions cable.
and warning parts of the service manual. Grounding must be completed between loader and
chassis via soldering cable between tuner and loader.
Turn off TV and plug the mains out Front AV must be connected to SS05 and line out
Remove screws (6 pieces) to dismount the back cover should be connected to SS09 via 9P and 5P sockets,
Remove 2 connection cables between chassis and back respectively.
cover. Front AV and lineout sockets should be discon- Place the back cover back to its place.(6 screws)
nected. Plug the mains in.
Cut the tie, which fixes DVD cables together. Turn on the TV.
Disconnect the following sockets to take the chassis out ; Grounding must be completed between loader and
Loader, chassis via soldering cable between tuner and loader.
IR receiver Front AV must be connected to SS05 and line out
Deflection cable should be connected to SS09 via 9P and 5P sockets,
Degaussing coil respectively.
Speaker cable Place the back cover back to its place.(6 screws)
Power cable Plug the mains in.
Remove the ground cable localised between tube mod- Turn on the TV.
ule, chassis and mass cable.
Remove the CRT drive module from picture tube.
Desolder the ground cable of loader from tuner.
Remove anode cable localised on the picture tube.
Slide out the chassis through the guides (no screws,
straps or other fixing).
Please follow the assembly instructions

explained below;
Be sure that all of the loader cables are free. If necessary
fix the cables firmly to avoid any kind of squeezing
while inserting the chassis back.
Before inserting the chassis into guides, check the con-
trol buttons in front of the chassis. In case of misplace-
ment of control buttons place them into correct position.
Slide the chassis into guides until the connection cables
could be reached to their sockets.
Plug in the sockets coming from led PCB, 5P to KL01
and 4P to KL02
Plug in the sockets coming from loader, 4P to SS03, 6P
to SS13 and 12P (blue one pointing to right) to SS18.
Plug in the power cable socket to AC01.
Plug in the degauss cable socket to KP02.
Plug in the speaker cable socket to HS03.
Place the CRT drive module on picture tube.
Slide the chassis completely on its place. Be careful
about control buttons.
Plug in the deflection cable socket 4P to KD01 and 2P to
SD21.
Place the anode cable to picture tube. Be careful about
high voltage!
4
1. TECHNICAL SPECIFICATIONS, CONNECTIONS AND

CHASSIS OVERVIEW
1.1. Technical Specifications
1.1.1 Reception
Tuning System : PLL

Color Systems : PAL SECAM NTSC
Sound Systems : B/G D/K L/L
A/V Connections : SCART AND FRONT AV
Channel Selections : AIR, CABLE : The entire band via frequency search
IF Frequency : B/G, D/K, L : 38.9 MHZ
L: 33.4
I: 39.5MHZ
Aerial Input : 75 OHM
1.1.2 Miscellaneous
Audio Output (RMS) : 2 x 2.5 W

Mains Voltage : 220-240 V ( 10 %)
Mains Frequency : 50/60 Hz ( 5 %)
Ambient Temperature :
Maximum Humidity :
Power Consumption : 50 W
Standby Power Consumption :4W
1.2 Connections
A/LA/R PCM
EURO AV
Rear Connections
VIDEO L AUDIO R
Side Connection
5
EURO SCART
I- Audio output 1. right channel 0.5 VRMS/<l k 0

2- Audio input 1. right channel 0.5 VRMS (connected to No.6)
3- Audio output 2. left channel 0.5 VRMS (connected to No.1)
4- GND (audio)
5- GND
6- Audio input 2. left channel 0.5 VRMS/>10k 0
7- RGB input, blue (B)
8- Switch signal video (status)
9- GND
10- Reserved for clock signals (not connected)
11- RGB input, green (G)
12- Reserved for remote control (not connected)
13- GND
14- GND switch signal RGB
15- RGB input, red (R)
16- Switch signal RGB
17- GND (video)
18- GND19- Video output 1 Vpp/75 ohm
20- Video input 1 Vpp/75 ohm
21- Shield
1 3 5 7 9 11 13 15 17 19 21
2 4 6 8 10 12 14 16 18 20
6
CHASSIS OVERVIEW 1- FRONT CABINET 002

14 NEAT CTV 001 2- PICTURE TUBE
3- PICTURE TUBE SCREW
4- SPEAKER
5- SPEAKER SCREW
6- DVD DRIVER
7- DVD DRIVER SCREW
8- EJECT BUTTON 001
9- EJECT BUTTON 001 SCREW
10- MULTIBUTON LEFT
11- MULTIBUTON LEFT SCREW
12- MULTIBUTON RIGHT
13- MULTIBUTON RIGHT SCREW
14- ON-OFF BUTON
15- ACYRILIC WINDOW 001
16- INFRA LED PCB
17- INFRA LED PCB SCREW
18- REFLECTOR
19- REFLECTOR SCREW
20- DVD HEAD
21- CHASSIS RAIL RIGHT
22- CHASSIS RAIL LEFT
23- MAIN CHASSIS
24- BACKCOVER
25- BACKCOVER SCREW
26- STYROPHOR
14 NEAT CTV 002 1- FRONT CABINET 002

2- PICTURE TUBE
3- PICTURE TUBE SCREW
4- SPEAKER
5- SPEAKER SCREW
6- DVD DRIVER
7- DVD DRIVER SCREW
8- EJECT BUTTON
9- EJECT BUTTON SCREW
10- MULTIBUTON LEFT
11- MULTIBUTON LEFT SCREW
12- MULTIBUTON RIGHT
13- MULTIBUTON RIGHT SCREW
14- ON-OFF BUTON
15- ACYRILIC WINDOW 002
16- INFRA LED PCB
17- INFRA LED PCB SCREW
18- REFLECTOR
19- REFLECTOR SCREW
20- DVD HEAD
21- CHASSIS RAIL RIGHT
22- CHASSIS RAIL LEFT
23- MAIN CHASSIS
24- BACKCOVER
25- BACKCOVER SCREW
26- STYROPHOR
27- AVPCB
28- AVPCB HOLDER
7
KEYBOARD
All the keys on the keyboard are used same as the relevant keys on the RC. But navigation in menus is quite differ-
ent. In order to open Main Menu from keyboard V+ and V- keys must be pressed together. After displaying the
menus P+ and P- keys will be used as Navigation Up and Navigation Down keys. There is no enter key on the key-
board so V+ or V- will be used as Menu Right key if a submenu item is highlighted on the menu. These two keys will
also be used as Navigation Left and Navigation Right keys in order to change any highlighted options right side
value. To return previous menu V+ and V- keys should be pressed together.
2. SAFETY INSTRUCTIONS AND WARNINGS

SAFETY INSTRUCTIONS FOR SERVICE laser beam is highly dangerous and it may cause perma-
REPAIRS nent damages.
1. Use only the original spare parts with the same specifi-
HANDLING THE MOS CHIP COMPONENTS
cations for replacement.
MOS circuit requires special attention with regard to static
2. Only the original fuse value should be used. charges. Static charges may occur with any highly insulat-
3. Safety components, indicated by the symbol, should ed plastics and can be transferred to persons wearing
be replaced by components identical to the original ones. clothes and shoes made of synthetic materials. Protective
4. Main leads and connecting leads should be checked for circuits on the inputs and outputs of MOS circuits give pro-
external damage before connection. Insulation must be tection to a limited extend only due to time of reaction.
checked. Please observe the following instructions to protect the
5. Parts contributing to the safety of the product must not components against ESD.
be damaged or obviously unsuitable. This is valid especial- 1. Keep MOS components in conductive package until they
ly for insulators and insulating parts. are used. Most components must never be stored in styro-
6. Thermally loaded solder pads are to be sucked off and por materials or plastic magazines.
re-soldered. 2. Personnel must not touch the MOS components to avoid
7. Ensure that the ventilation slots are not obstructed. electrostatic discharging.
8. Potentials as high as 25 KV are present when this 3. Hold the component by the body touching the terminals.
receiver is operating. Operation of the receiver outside the 4. Use only grounded instruments for testing and process-
cabinet or with back cover removed involve a shock hazard ing purposes.
from the receiver. 5. Remove or connect MOS Ics when operating voltage is
9. Servicing should not be attempted by anyone who is not disconnected.
thoroughly familiar with precautions necessary when work- 6. Personnel in charge must make sure that they are con-
ing on high voltage equipment. Perfectly discharge the nected with the same potential as the mass of the set by a
high potential of the picture tube before handling it. The wristband with resistance.
picture tube is highly evacuated and if broken. Glass frag-
ments will be violently expelled. Always discharge the pic- X-RAY RADIATION PRECAUTION
ture tube anode to the receiver chassis to keep of the 1. Excessive high voltage can produce potentially haz-
shock hazard before removing the anode cap. ardous X-RAY radiation. To avoid such hazard, the high
10. Keep wire away from the high voltage or high tempera- voltage must not be above the specified limit. The nominal
ture components. value of the high voltage of this receiver is 25KV at zero
11. When replacing a wattage resistor, keep the resistor beam current (minimum brightness) under 220 V AC power
10mm away from the circuit board. source. The high voltage must not under any circumstance,
exceed 30KV. It is recommended the reading of the high
12. Fast heating up (e.g. by bringing the Combi from a cold
voltage to be recorded as a part of the service record. It is
place into warm and humid room) can result in moisture
important to use an accurate and reliable high voltage
condensing on the pickup lens of the DVD Module, thus
meter.
influencing the playability for a certain time. Before check-
ing the performance, the DVD Loader should be stabilized 2. The primary source of X-RAY radiation in the TV receiv-
for at least 4 hours. er is the picture tube. For continued X-RAY radiation pro-
tection, the replacement tube must be exactly the same
13. Never try to repair DVD module when it is ON. The
type tube as specified in the part list.
8
A1 TUNER A2 VIDEO PEOCESSOR A7 -CONTROLLER A8 AUDIO AMPLIFIER
IA01
TDA7057
11 -5
55 AUDOUT A8 -1
1 STV2246/47/ ST92195/921
10 -4 L/L -8
ICV1 8 IC01
52 SDA A7-1/A4-1/A1-3 CLI -1 56 KEYB -1 1 8
IF1 A-5/A1-52
5 SD-1/A2-3 MUTE_DVD
51 SCL A7-2/A1-2/A4-2 A8-10/A8-1/A10
-1 11
IF1 A-5/A1-56 VOL -1
42
CL A4
-2/A2-2 DVD SB
4
49 HEATER A6-1/A7-7 12
7 L/L -8
IF2 -4 3
IA03 2
1 -1 AUDOUT A2
-1
48 HOUT A-2 43 1MN405
AGC -1 8 TV/DVD A8-2 13 VOL -1 3B
12
3. BLOCK DIAGRAM
AV STATUS A3-1 11 47 VERT -1 B OSD A2-5 15 MUTE_DVD

A8-10/A10
-1/A7-1
41 V_OSD A-1 1 6
14 46 BCL A6-3 R_DVD
SC_IN -2 2 A10
-3
SC_I A2
-2 7
FBEXT A2-5 CVBS A2-3 16 I060
G OSD A2-4 L DVD A10-2 LM358
A3 SCART 13 44 CVBSOUT A7-6
CVBS A-3 40 HEATER A2-7/A6-1
R OSD A2-3 17
CV BSEXT A3-4 20 42 V_AMP A-2
3 13 7 17 11 21 15 5 19 9
2 4 6 8 12 10 18 16 14 20 FB_OSD
A2-10/A7-5 18
B -8 25 37 FB_OSD A7-10 CVBSOUT
SCART1 33 A2-6
9
SS01 A9 VERTICAL
AV_STATUS
SDA
A2 -1
26 36 R_OSD A-3 A2-1/A4-1/A1-1 19
B A-8 CLI A-1 G A2-7 R A2
-6 G -7
34
FB_OSD ID41 TDA177
27 35 G_OSD A7-4 SCL A7 -5/A2-10
R -6 A2-2/A4-2/A1-2 25
2 3 4
A11 A4
KEYBOARD 28 34 B_OSD A7-5
FBEXT A-5
IC02
SDA 5 VERT A2-1
A 7 -1/A2-1/A1-1
24C08
SCL 6
A 1 -2/A2-2/A7-2
KEYB A7-1 V_OSD A7-1 V_AMP A2 -2
A5 POWER SUPPLY WP0 A6 HORIZONTAL A10 AV INTERFACE

110 CONN.
IP01 14 FBT
2 SS08
16
3 1
TDA16846 12 14 15 16 18
5 8
11 BCL A2-3
AC IN 4
5 HOUT A2-2 24 V
9 3
12V 12 V
CVBS_DVD DOUT MUTE L DVD R DVD
A8-5 A8-4 _DVD A7- A8-2 A8-3
HEATER
1/A8
-1
8
A5 POWER SUPPLY 8V
A2
LV07
SA02
1
VIDEO
5V
PROC.
2 STV2246/47/48
LV01 5V
12
LV03 53
LV01
17
DV23
25 LV01
DV22 45
26
DV21
27
DV20 8V
8V 28
A8 +12V TO RA10
RA11
16
IA03
MN4 11 8V
053
RS58
10
TV01
A1
A6 A3
RD15 RD12 RV06 RV03
FBT 33V A7 T003
4. SUPPLY VOLTAGE DIAGRAM
8 R002
1 5V ST92195/92185 56
110V 8V 8V 9 TUNER 2 5V
19
4 24V R008
2 SS05 LT01 5V R011 55
16V 3 12V 7 3 5V
8V TO SS05/4 R010 R057
RT03 12 54
3
R007 D005
13
RT01 D004
R032
5V
1 5V
14 R080
46 12VDVD
R012 R081
19 45 5VDVD
5V
A9 A10 R013 R052 R028 RA09
20 43
8V 5V
9 24V 41
SS08 D002
TDA1 8 5V
771 12 14
21 40 D001
RD45 5VD
7 DV10 39 5VA
RD44 RD56 RV54 25 34
4 5V A4
EEPROM 26 5VA
RD28 RD40 8 1 5VA 33
T001
1 8V
12V RV57 TV05 5V 31 5VA
C011
+5V
A1 A2 A4 A7
TUNER
R013 R012
SDA SDA SDA SDA SDA
5 RT
RV34 R049
SCL SCL SCL SCL SCL
11
4 RT
RV33 R048
51 52 6 5 20 19
VIDEO EEPROM
u-CONTROLLER
PROC.
5. I2 BUS INTERCONNECTION DIAGRAM
6. FAULT TRACING DIAGRAM-POWER SUPPLY
Switched mode power

supply defective, +110V
is missing or level is wrong
DP01 - 04 YES
CP01 - 04 Fuse
F1 defective
CP06, TP01
NO
RP 07, RP 05 NO
open and Voltage at drain
short circuit TP 01
YES
Voltage at
YES
RP 06 IP01
PIN 11
< 1V
NO
YES Start-up voltage

RP 11, DP 07 (6)
PIN 14
< 8V
NO
YES
TP 01 Start-up voltage
varies ca. 8V
NO
IP 01
Measure
NO +115V
VAP 1, RP 03 adjustable with
VAP 01
YES
Control range of
switched-mode
power supply
12
7. CHASSIS DIAGRAM
FRONT AV
TDA 7057 2 X 2W
PLL TUNER
BU508D
H.YOKE
SCART
RGB
STV224X
AUDIO
CVBS
TDA1771
DVD
BOARD V.YOKE
ST92195
DVD
+5V
LOADER
+110V
24C08 +12V POWER
+16V
RC IR
13
8. SERVICE MENU AND BASIC ADJUSTMENTS

SERVICE MODE IS ACTIVED BY PRESSING THE DIGIT 1923
AT FEATURES MENU
8.1 OPTION BYTES
OPTION 1: MODEL CONFIGURATION

b0: 1: L Avaialable 0: not available
b1: 1: APR ON 0: APR OFF
b2: 1: no Pin 8 16:9 switching mode 0: Pin 8 16:9 switching mode
b3: 1: Turn on with AV button 0: not used
b4: 1: Keyboard with menu 0: Keyboard without menu
b5: 1: Brightness half range available 0: Brightness full range available
b6:7 Main Tuner
00 : Samsung
01 : Temic
10 : Philips UV1316
11 : Thomson/Orega
OPTION 2: FEATURE CONFIGURATION
b0: 1: AV2 mode available 0: not available
b1: 1: SVHS mode available 0: not available
b2: 1: Volume linear 0: Volume Logaritmic
b3 1: Search mono audio ident available 0: not available
b4: 1: DVD picture in SVHS mode 0: DVD picture in RGB mode
b5: 1: Headphone available 0: not available
b6: 1: No Subwoofer 0: Subwoofer available
b7: 1: 4/3 Picture tube 0: 16/9 Picture tube
OPTION 3: VIDEO/AUDIO FEATURE CONFIGURATION
b0: 1: One Crystal application (4.43 Mhz) 0:Two cystal application (for NTSC playback)
b1: 1: Intercarrier application 0: QSS application
b2: 1: STV2248E 0: Normal video IC
b3: 1: OSD contrast control ON 0: OSD contrast control OFF
b4: 1: Blue screen enable 0: disable
b5: 1: AVC Automatic Volume Correction (MSP Stereo) AVL(Mono 22XX)
0: not available
b6: 1: DVD available 0: not available
b7: 1: Standby after power on 0: No Standby after power on
Reserved bits must be set to 0
You will need following equipments to carry out the adjustment procedures;
a- PLL Pattern generator for Secam L'

b- PLL Pattern generator PAL BG
c- Patern generator for white pattern
d- Color Analyzer (CA100)
14
8.2 GEOMETRY ADJUSTMENT

a. V.S 4/3 50H
b. V.S 16/9 50H
c. V.S 4/3 60H
d. V.S 16/9 60H
e. V.P
f. H.P
Enter service menu and select the GEOMETRY settings

Standart geometrical adjustments carried out by V.S, V.P and H.P settings. V.S 16/9 50h setting have to be carried
out until 3 cm distance between upper and lower parts of the screen.
Same adjustments for 60H for 16/9 and 4/3.
Press menu button to leave service menu
Menu button to leave service menu.
8.3 G2 ADJUST
> : <
increase normal decrease
Enter the G2 menu in the service mode

Turn the G2 potentiometer on FBT until you reach the : sign
< indicator means to decrease
> indicator means to increase
8.4 VIDEO
1 RED
2 GREEN
3 BLUE
4 RED COFF
5 GREEN COFF
Apply Dark gray pattern (at 10 IRE)

Contrast 70%, brightness middle, color saturation middle.
By changing the R COF and G COF Adjust to obtain the necessary values for x and y.
Apply white pattern (at 100 IRE)
Set the contrast to 70%, brightness and color saturation to middle.
Place the color analyzer.
(R,G,B), it is possible to modify the peak white.
Adjust to obtain the necessary values for x and y.
Remark: It may be necessary after low light alignment to check and to re-align the high light and to repeat several
times the procedure to obtain good alignment for both low and high light.
15
8.5 TUNER/ IF
1. AGC
2. PC
3. PF
4. P C.L
5. P F.L
PIF adjustment for BG/DK/L systems:

38.9 MHz PAL BG signal applied Tuner via tuner output (IF output).
Leave the channel settings menu and enter service menu. Enter TUNER IF menu in the service mode.
Choose the PIF COARSE and PIF FINE item and adjust the setting until the : indicator (displayed as > : <)
turns in red color by pressing < and > on remote control.
Press Menu button to leave service menu.
PIF adjustment for L' system:

33.9 MHz SECAM L' signal applied Tuner via tuner output.
Leave the channel settings menu and enter service menu. Enter TUNE IF menu in the service mode.
Choose the PIF COARSE L and PIF FINE L item and adjust the setting until the: indicator
(displayed as > : < ) turns in red color by pressing < and > on remote control.
Press Menu button to leave service menu.
8.6 HOTEL MODE

Installation and Child Lock Menus are omitted in Hotel Mode. You can not search any channel when the
Hotel Mode is activated.
Volume level cannot be increased higher then certain level in Hotel Mode. The volume limiting level is a pre-
defined value in service menu.
Hotel mode activated from service menu.
8.7 SYSTEM VOLTAGE ADJUSTMENT

Switch the TV in AV mode by pressing AV button on remote control unit. (Minimum beam current condition)
Adjust the VAP2 potentiometer until 110Vdc measured on cathode pin of DP08 diode.
16
9. DVD MODULE
9.1 SAFETY AND HANDLING PRECAUTIONS
1. DO NOT use and store the Loader in dusty, high temperature or high humidity environments.
2. To avoid damage to the Loader by electrostatic dischargers, measuring equipment and operators should be
grounded during handling. The user of this unit takes all necessary precautions to avoid ESD (Electro-Static
Discharge) failures during handling and assembly of this unit into the end product.
3. Contamination of the PCB might influence the performance. Avoid fingerprints and stains on the PCB and
handle the Loader in a clean environment.
4. The mechanism of the Loader has been adjusted carefully during manufacturing. High shocks on this unit
may damage and should be avoided.
5. Fast heating (e.g. by bringing the Loader unit from a cold place into a warm and humid room) can result in
moisture condensing on the pickup lens, thus influencing the playability for a certain time. Before checking
the performance the Loader unit should be stabilized for at least 4 hours.
6. DO NOT disamble the loader to avoid ESD failures and to prevent from contamination.
AC Source Supply:
The Voltage Fluctuation : 110/220 V 10% tolerance
The Impulse Noise : 110/220 V 10% tolerance
Applicable Discs Format
Disc Type Description

DVD-5 (Single Layer)
DVD-9 (Double Layer) IS09660
DVD-10 (Single Layer Double Side) UDE
DVD-18 (Double Layer Double Side) DVD BOOK
Disc Format
IS09660
RED BOOK (CD-DA)
WHITE BOOK (Video-CD)
CD BLUE BOOK (CD Extra)
YELLOW BOOK (CD-ROM)
ORANGE BOOK (CD-RW, R)
DVD-5 4.70 GB
DVD-9 8.54 GB
Disc Capacity DVD-10 9.40 GB
DVD-18 17.0 GB
CD 656 MB (Mode 1)
748 MB (Mode 2)
Disc Diameter DVD/CD 12 cm/8 cm
Disc Thickness 1.2 mm
Disc center
Aperture 15 mm
Track Gap 1.6 m, CD 0.74 m, DVD
17
Functions
Data Transfer Rate:
DVD 2600kB/sec (max)
CD 870kB/sec (max)
Data Buffer Capacity
256KB (DVD/CD)
Error Rate
10e -15 MAX (DVD), 10e -12 MAX (CD)
Reading Time
Starting procedure (Less than 15seconds)
Stopping procedure (Less than 2 Seconds)
Laser Specifications
DVD CD
Laser wavelength 650-665nm 790+20nm
Laser power 0.5mW 0.7mW
Object Lens Non-spherical lens
lens Length of Ray
Coil 0.6mm 0.47mm
Moving Range 1.71mm 1.35mm
Focus Astigmatism
Searching Phase difference detection Three spot tracking
Disc Loading Mode

Motor- driven front-loading tray
Disc Fixing
Beam magnetic fixation
Reliability
Mean Time Between Failure (MTBF): Not less than 2,000 hours
Mean Time To Repair (MTTR): 0.5 hours
Working Environment
Temperature and Humidity
Operating temperature 5 to 45
Storage temperature - 20 to 60
Operating temperature varying 11/hour(max)
Storage temperature varying 20/hour(max)
Operating humidity 10% to 70%
Storage humidity 5% to 80%
Vibration
Reading data state 0.2g 10-30Hz sine wave
Playing CD audio state 0.15g 10-30Hz random
Standby 2.4g 10-30Hz random
Striking
Standby state 100kg 6ms half sine-wave (in X,Y and Z directions)
Noise
Not more than 45dB in one meter away
18
9.2 MECHANICAL AND ELECTRICAL
1. CONNECTORS
Integrated Connectors
1. DC power jack
2. IDE interface
3. Master/slave mode jumper set (not applicable as the loader configured for player)
4. Analog audio output (not applicable as the loader configured for player)
5. Digital Audio output (not applicable as the loader configured for player)
Pin Definitions
Power Jack
ITEM PIN NO. DESCRIPTION

1 +12V
2 GND
DC Power Jack 3 GND
4 +5V
ATAPI Interface
Signal Pin No. Pin Type Description

CSIEX- 37 I Driver Chip Select 0
CS3EX- 38 I Driver Chip Select 1
DA0 35 I Driver Address Bus-Bit 0
19
DASP- 39 I /O Driver Activity/Driver I Present
DD0 17 I /O Driver Data Bus-bit 0
DIOR 25 I Driver I/O Read
DIOW- 23 I Driver I/O Write
DMACK- 29 I DMA Acknowledge
DMARQ- 21 O Driver Request
INTRQ 31 O Driver 16Bit I/O
IOCS16 32 O Driver Interrupt
IORDY 27 O I/O Channel Ready
PDIAG- 34 I/ O Passed Diagnostics
RESET- 1 I Driver Reset
CSEL 28 Cable Select
KEYPIN 20 Keying Pin on Interface Connector
20
2. KEY COMPONENTS
Items Model No. Maker Location
Spindle Motor CCM03-042R1-2 MORETECH China
Loading Motor FC8A30T28_4A DM2429A SANKO TRICORE China Taiwan
Sled Motor FC8A30T18_2 DM2428 SANKO TRICORE China Taiwan
Laser Pick-up PVR-520T-HR-0101 MISTSUMI Japan
Actuator Drive BA5954FP Rohm Japan
Loading Motor Drive BA6287F Rohm Japan
RF Amp. SP3721A TI U.S.A
Servo DSP M5705 ALI Taiwan
3. MECHANICAL DIMENSIONS
21
10- BLOCK DIAGRAMS
TV CHASSIS
A 1 TUNER
22
A 2 VIDEO PROCESSOR
D2
D1
D5
D4
D3
A 3 SCART
A 4 EEPROM
24
A 5 POWER SUPPLY
E1
25
A 6 HORIZONTAL
F2
F1
26
A 7 MICRO CONTROLLER
G2
G1
27
A 8 AUDIO AMPLIFIER
28
H1
H2
A 9 VERTICAL
A10 AV INTERFACE
CONNECTOR
29
A 11 KEYBOARD
A 12 FRONT AV
30
A13 LINE OUT
A14 TUBE MODULE
31
A 15 IR MODULE
32
R201
PLLGND
TC21 PLLVCC
220U/16V 100K 3.3V 3.3V 3.3V 3.3V 3.3V
R203 51K
C201
R234R207C208
0.1U C202 R204 4K7 RA[0..9] BC21 BC22 BC23 BC24 BC25
AWRC 47K R 10K RA[0..9] 6,7
PLLGND 0.01U
C203 RN21 0.1U 0.1U 0.1U 0.1U 0.1U
Default R 47K 0.1U 18P 1 2 ROEJ 7
TC22 3.3V 3 4 RCASJ 7
RA9
47U/16V
RA3
RA2
RA1
RA0
RA4
RA5
RA6
RA7
RA8
5 6 RRASJ 7
R205 5K1 7 8 RWEJ 7
C204 R230 R
0.1U R206 10K SRN33
C205
0.1U
C206 RD[0..15]
RD[0..15] 7
RFVCC RFVCC RFVCC 47P
3.3V
C207 C208
SLRF
PLCK
PLLGND
VC2
0.1U 0.1U
BC28 BC27 BC26 R207 47K
RD7
RD8
RD6
RD9
RD5
RD4
RD10
RD11
R234 R
0.1U 0.1U 0.1U PLLGND
PLLVCC
PLLGND
RFGND RFGND RFGND
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
R231 R U21
2,4 MVREF2
RFO C209
GND
GND
GND
2 RFO
XRA3
XRA2
XRA1
XRA0
XRA4
XRA5
XRA6
XRA7
XRA8
XRA9
XRD7
XRD8
XRD6
XRD9
XRD5
XRD4
1000P
XRA10
XRA11
XRD10
XRD11
XROEJ
XSFDO
XRWEJ
XTSLRF
XTPLCK
XRCASJ
XRRASJ
VDD_3.3
VDD_3.3
VDD_3.3
AVSS_PL
XRSDCLK
XSVREFO
XSFDIREF
XSFTROPI
XSPDIREF
XSVR_PLL
AVDD5_PL
XSPLLFTR2
R208
XSPDOFTR1
R235 R 1 132 RD3
RFGND
XSAWRCVCO
4 TRAY_CNTL AVSS_DS XRD3
2 131 RD12
20K XSRFIN XRD12
C210 C211 3 130
XSIPIN GND RD2
RFVCC 4 AVDD5-DS 129
C 6800P XRD2 RD13
5 XSDSSLV 128
R209 51K XRD13 RD1
6 127
RFGND
XSRSLINT XRD1 RD14 XHD[0..15]
D21 3.3V 7 VDD-3.3 126 XHD[0..15] 6
XRD14 RD0
8 XSAWRC 125
1N4148 TRAY_CNTL XRD0 RD15
9 XSRFGC 124
3K3 XRD15 XHD7
2 1 R210 10 123
2 EFGC 3K3 FOCUS XSEFGC XHD7 XHD8
R211 11 122
4 SFOCUS 3K3 TRACK XSFOCUS XHD8 XHD6
R212 12 121
4 STRACK 3K3 SLEG XSTRACK XHD6 XHD9
R213 13 120
4 SSLEG 10K MOTOR XSSLEG XHD9 XHD5
R214 14 119
4 SMOTOR AVDD5-DA XHD5 XHD10
15 XSMOTOR 118
0 XHD10 XHD4
R228 16 117
2 RFRP AVSS-DA XHD4 XHD11
17 116
2 MIRR XSRFRPLP XHD11 3.3V
C212 C213 C214 C215 C216 18 115 3.3V
VC2 XSTELP VDD_3.3 XHD3
19 XSVREF2 114
0.47U 0.047U 470P 470P 1000P XHD3 XHD12
20 XSRFRP 113
C217 XHD12 XHD2
21 112
RFGND
0.1U XSTEXI XHD2 XHD13
22 AVSS-AD 111
R215 47K XHD13
23 XSTEI 110
0 GND XHD1
R216 24 109
2,4 MVREF2 XSFEI XHD1
33
R217 R SAEI 25 108 XHD14
XSAEI XHD14 XHD0
26 107
2 TEXI SSBAD AVDD5_AD XHD0 XHD15
C218 27 106
R218 3K3 0.1U XSSBAD XHD15
28 105 HDRQ 6
2 TEI R219 4K7 DFCT GND XHDRQJ
2 FEI 29 XSDFCT 104 IOWJ 6
C219 XSCSJ XHIOWJ
30 XSCSJ 103 IORJ 6
C220 1000P XSCLK XHIORJ
31 XSCLK 102 IORDY 6
1000P XSDATA XHIORDYJ
32 XSDATA 101 HDACKJ 6
R220 5K1 SAEI XHDACKJ
2 SAE 33 XSLDC 100 HINTJ 6
XSFGIN XHINTJ
34 XSFGIN 99 HCS16J 6
C221 XSPDON XHCS16J
35 XSSPDON 98 HA1 6
FLAG3 XHA1
36 XSFLAG3 XHPDIAGJ 97 HPDIAGJ 6
0.1U FLAG2 37 96
XSFLAG2 XHA0 HA0 6
FLAG1 38 95
XSFLAG1 XHA2 HA2 6
FLAG0 39 94
XSFLAG0 XHCS1J HCS1J 6
RFGND 6 BIT1 40 XMP1_7 XHCS3J 93 HCS3J 6
MP1_ 41 XMP1_6 92 HDASPJ 6
SSBAD XHDASPJ
42 91
DVD MODULE
2 SBAD DFCT GND XMA15

2 SDFCT 43 XMP1_5 90
OUTSW XMA14
4 OUTSW 44 XMP1_4 XMA13 89
R221 33 XSCSJ
2 SCSJ 33 XSCLK
R222
2 SCLK 33 XSDATA
R223
2 SDATA R236
XMP1_3
XMFSCSJ
XMP1_2
XGPIO2
XMP1_1
XHRSTJ
XGPIO1
XGPIO0
XCRSTJ
XMPSENJ
VDD_3.3
XMALE
XMP1_0
VDD_3.3
XOSC1
XOCS2
GND
XMD0
XMD1
XMD2
XMD3
XMD4
XMD5
XMD6
XMD7
XMCSJ
XMRDJ
XMWRJ
XMINT1J
XMA11
XMA10
VDD_3.3
XMA9
XMA8
XMA7
XMA6
XMA5
XMA4
XMA3
XMA2
XMA1
XMA0
XMA12
GND
XSFGIN R RFGND
4 SFGIN XSPDON
4 SSPDON
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
ALi M5705
INSW
4 INSW
5 MFSCSJ
PLCK PLCK LED1
5 LED1
SLRF TP SLRF R237 0
2 LDON
3.3V
TP EJECT1
5 EJECT1
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
RFO RFO R226 10

MA11
MA10
MA12
MA13
MA14
MA15
6 IDERST
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
FOCUS FOCUS TP COUNTER COUNTER R227 R

TRACK TP TRACK TP
2 PI_SIGO
SLEG SLEG TP MA[00..15]
4,5 CRSTJ MA[0..15] 5
MOTOR TP MOTOR 5 MPSENJ MWRJ 5
SSBAD SSBAD TP J21
5 A16J
DFCT TP DFCT 1
VCC VCC
XSFGIN XSFGIN TP 2
FLAG0 L21 TX
TP FLAG0 3
FLAG1 RX
FLAG1 TP 4
FLAG2 L C223 GND
TP FLAG2
FLAG3 FLAG3 TP 12P TXD RXD RS232
TP R229 TP TP DECODER.SCH
C224 Y21 Title
C 100K MD[0..7] ALI M5705 (176 PIN) DVD/CD DECODER
MD[0..7] 5
33.8688MHz
C225
12P
TC11
BC11
220U/16V
TC12 0.1U
R101
10
100U/16V
RFGND RFGND
C102 C103
0.1U 0.1U
C104 C105
E
Q11 R102 0.1U 0.1U
B CDLDO
SOT89EBC 2SB1132
PRE-AMP.
5K1 C101 3.3P
RFGND
C
C106
C107 RFVCC
1000P MEI- R103 4K7 0.1U
ALI HOP-1000
L11 R104
CDLD 3 RFO
2
10UH
8K2
D11 PUHRF C109 680P U11
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
1N4148 C110
RFGND
33P
1
RX
AIP
AIN
DIP
DIN
C111
BYP
VPA
FNP
FNN
VNA
C112
SIGO
ATOP
ATON
CDRF
33P
HOLD1
RFGND C113 RFGND
CDRFDC
RFGND
33P
0.1U 1 48 SCSJ 3
C114 DVDFRP SDEN
2 DVDRFN SDATA 47 SDATA 3
680P MVREF25 3 46
PD1 SCLK SCLK 3
C115 4 45 C116
PD2 LCP
680P 5 44 0.047U
C117 A2 LCN
6 B2 CE 43 SAE 3
680P 7 42 FEI
TC13 C2 FE FEI 3
R105 C118 8 41
D2 TE TEI 3
10 680P 9 SP3721 40 MEI-
100U/16V C119 CP MEI
10 39 C120 RFVCC TEXI 3
D CN MEV C121
100P 11 38 1000P
C D TPH
12 37 0.1U SDFCT 3
B C DFT PI
13 36
E
B PI SBAD 3
Q12 R106 A 14 35 C122
DVDLDO F A MIN MEVO C
B R107 1K2 15 34
SOT89EBC 2SB1132 E F MEVO
R108 1K2 16 33
MVREF25 E MLPF
1K R109 10K RFGND
C
C124 C123 RFVCC
150P
1000P
CDTE
VC12
NC
VNB
DVDPD
DVDLD
CDPD
CDLD
LDON
VC
VCI
VPB
MIRR
MP
MB
FDCHG
L12 R110
DVDLD
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
10K
2
10UH
34
RFVCC
D12
1N4148
R134 R135 MVREF25 BC12 0.1U
MVREF2!=MVREF25 0 R RFGND
1
RFGND
R134 0 C125 RFVCC

MVREF2=MVREF25 R 0 R135 R 4700P
RFGND
C126
DVDMDI 1000P
DVDLDO
EFGC 3
CN11 CDMDI
CDLDO
MIRR 3
24 TRACK-
TR- TRACK- 4 3 LDON
23 TRACK+ MVREF2
TR+ TRACK+ 4 MVREF2 3,4
22 FOCUS-
FO- FOCUS- 4
21 FOCUS+
FO+ FOCUS+ 4 TC14 TC15
20 DVDMDI C127 C128 R112 R
PD(MONITOR)
VCC 19 RFRP 3
18 100U/16V 0.1U 0.1U 100U/16V
VR
GND 17
16 DVDLD C129 TC16
LD(DVD) CDLD R113 0 MEVO
LD(CD) 15
0.1U 100U/16V
VR 14
GND(NC) 13 RFGND RFGND
12 CDMDI
PD 10K R114 R PI
11 R136
GND PUHRF MVREF2
RFOUT 10
9 C RFGND RFVCC C131
C B
B 8 R115
7 A U12
A D 33P 470K
D 6 1 8
F R132 AO V+
F 5 2 A- BO 7
4 E 3 6 R118 56K
E A+ B-
VCC 3 4 V- B+ 5
2 MVREF25 1K5
VS(VCC)
1 TL3472
GND R133 C134
R122 R123 C130 BC13
HOP-1000 JP24-05M 8K2 0.47U
100 100 0.1U 0.1U
Vref R132 R133

2.1V 1.5K 8.2KRFGND RFGND RFGND
RFGND RFGND
2.5V 0 R PREAMP.SCH
Title
ALI HOP 1000 PRE-AMP CIRCUIT
12V
5V VCC
POWER
L71
+12V L72
FB-1 1 2
FB-1
C701 TC71
ALI HOP-1000
C702 TC72 TC73

C703
0.1U 220U/16V PLLVCC RFVCC MVCC 3.3V
0.1U 220U/16V 0.1U 100U/16V
PAGND PAGND
PLLVCC RFVCC MVCC 3.3V

L74 TP TP TP TP
5V 1 2 M5V
FB-1
L78
5V FB-1
PLLVCC
Q73
(BA05 TO252AA) R701 PLLGND RFGND MGND GND
MVCC 1 3
3.3 0805 C704
2
C706 TC75 0.1U
0.1U 220U/16V PLLGND RFGND MGND GND
35
TP TP TP TP
PLLGND
PAGND PAGND
RFVCC
L77
1 2
FB-1
C707
0.1U
RFGND
12V 5V 3.3V
Q72
SOT223 AS1117
D71 D72 3 2
IN OUT
1 2 1 2 MVCC
GND
1N4002 C708 TC76
1N4002
1
C709
C710 0.1U 100U/16V
0.1U
0.1U
PAGND
AUX[3]/IOR#
AUX[2]/IOW#
LWRHL#
CAMIN1
CAMIN0
LCS0#
VEE
VEE
VEE
VEE
VEE
VEE
LCS3#
LCS2#
LCS1#
LOE#
VCC
LWRLL#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HA2 /AUX4[4]
AUX[7]
AUX[6]
AUX[5]
AUX[4]
AUX[1]
AUX[0]
LD15
LD14
LD13
LD12
LD10
LA3
LA2
LA1
LA0
LD9
LD8
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
LD11
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VEE 1 156 VSS
LA4 2 155 HA1/AUX4[3]
LA5 3 154 HA0/AUX4[2]
LA6 4 153 HCS3FX#/AUX3[6]
LA8 6 151 HIOCS16#/CAMCLK/AUX3[4]
LA9 7 150 HRD#/DCI_ACK#/AUX4[6]

VSS 8 149 HWR#/DCI_CLK/AUX4[5]
VCC 9 148 VEE
LA10 10 147 VSS
LA11 11 146 HIORDY/AUX3[3]
LA12 12 145 HRST#/AUX3[5]
LA13 13 144 HIRQ/DCI_ERR#/AUX4[7]
LA14 14 143 HRRQ#/AUX4[0]
LA15 15 142 HWRQ#/DCI_REQ#/AUX4[1]
LA16 16 141 HD15/AUX2[7]/IR
VSS 17 140 HD14/AUX2[6]/SQSI
VEE 18 139 VCC
LA17 19 138 VSS
LA18 20 137 HD13/AUX2[5]/SP
LA19 21 136 HD12/AUX2[4]/C2PO
LA20 22 135 HD11/AUX2[3]//IRQ
LA21 23 134 HD10/AUX2[2]/SQSK
RESET# 24 133 HD9/AUX2[1]/SQSO
TDMDX/RSEL 25 132 HD8/DCI_FDS#/AUX2[0]/VFD_CLk
VSS 26 131 HD7/DCI7/AUX1[7]/VFD_DIN
36
VEE 27 130 VEE
TDMDR 28 129 VSS
TDMCLK 29 128 HD6/DCI6/AUX1[6]/VFD_DOUT
TDMFS 30
MPEG Board
127 HD5/DCI5/AUX1[5]
TDMTSC# 31
MPEG Decoder
126 HD4/DCI4/AUX1[4]
TWS/SEL_PLL2 32 125 HD3/DCI3/AUX1[3]
TSD0/SEL_PLL0 33 124 HD2/DCI2/AUX1[2]
ES6008/18/28/38
VSS 34 HD1/DCI1/AUX1[1]
123
VCC 35 HD0/DCI0/AUX1[0]
122
208-Pin PQFP Package

TSD1/SEL_PLL1 36 VCC
121
TSD2 37 VSS
120
TSD3 38 HSYNC#/CAMIN7/AUX3[0]
119
MCLK 39 VSYNC#/CAMIN6/AUX3[1]
118
TBCK 40 PCLKQSCN/CAMIN5/AUX3[2]
117
SPDIF/PLL3 41 PCLK2XSCN/CAMIN4
116
NC 42 YUV7/CAMIN3
115
VSS 43 YUV6/VDAC
114
VCC 44 YUV5/YDAC
113
RSD 45 VSS
112
RWS 46 111 ADVEE
RBCK 47 110 YUV4/RSET
NC 48 109 YUV3/COMP
XIN 49 108 YUV2/CDAC
XOUT 50 107 YUV1/VREF
AVEE 51 106 YUV0/CAMIN2/UDAC
VSS 52 105 DCLK
57
100
101
102
103
104
91
93
94
96
53
54
55
56
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
92
95
97
98
99
VEE
VEE
VEE
VEE
VEE
VEE
DB0
DB1
DB2
DB3
DB4
DB5
VCC
DB6
DB7
DB8
DB9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQM
DB10
DB12
DB13
DB14
DB15
DB11
DSCK
DWE#
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DCS1#
DCS0#
DCAS#
DRAS#
DMA10
DMA11
DMBS1
DMBS0
DOE#/DSCK_EN
11- DESCRIPTION
OF INTEGRATED
CIRCUITS
-TV PART-
37
STV224X pos: ICV1

Multi Standard TV Processor
STV224X is a fully bus controlled IC for TV including PIF, SIF , Luminance , Chrominance and deflection processing. It is a
bus controlled PAL / SECAM / NTSC single chip TV Processor. For details of STV224X features please refer to the
STV224X datasheet. 110 , 4:3 or 16:9 CRT applications. It integrates both vertical deflection and E-W correction circuit
necessary for design of 110 chassis it allows designing a PAL/NTSC(BGDKIMN) set with very few external components
and no manual adjustment.
SIFIN1 1 56 FMCAP
SIFIN2 2 55 AUDIOOUT
AGCSIFCAP 3 54 GNDD
V REFIF 4 53 V CCD
AGCPIFCAP 5 52 SDA
PIFIN1 6 51 SCL
PIFIN2 7 50 SLPF
TUNERAGCOUT 8 49 LFB/SSC
IFPLL 9 48 HOUT
GND IF 10 47 VERT
AM /FMOUT/SC 11 46 BCL/SAF
V CCIF 12 45 V CC1
INTCVBSOUT 13 44 CVBSOUT2
EXTAUDIOIN 14 43 GND1
PIFLC1 15 42 X1/VAMP/CHROUT
PIFLC2 16 41 CLPF
V CC2 17 40 XTAL1
CVBSIN1 18 39 XTAL2
GND2 19 38 XTAL3/BTUN
CVBSIN2 20 37 FBOSD/HC
BS 21 36 ROSD
Y/CVBSIN3 22 35 GOSD
CHR 23 34 BOSD
APR 24 33 ICATH
BEXT/Cb 25 32 ROUT
GEXT/Y 26 31 GOUT
REXT/Cr 27 30 BOUT
FBEXT 28 29 NTBC/CVBSOUT1
38
STV224X
1.2 PIN DESCRIPTION
Table 1. Pin Configuration

Pin N
STV224XC/8XC STV223XD Symbol Description
SDIP56 TQFP64
1 8 SIFIN 1 SIF Input
2 9 SIFIN 2 SIF Input
3 10 AG C SIFC AP AG C SIF C apacitor
4 11 VREFIF Voltage Reference Filtering
5 12 AGCPIFCAP AGC PIF Capacitor
6 13 PIFIN1 PIF Input
7 14 PIFIN2 PIF Input
8 16 TUNERAGCOUT AGC Tuner Output
9 17 IFPLL IF PLL Filter
10 18 GND IF IF Ground
11 19 AM/FMOUT/SC AM/FM Mono Sound or Stereo Carriers Output
12 20 VCCIF 5 V IF Supply
13 21 INTCVBSOUT Internal CVBS Output
14 22 EXTAUDIOIN External Audio Input
15 23 PIFLC1 LC Input
16 24 PIFLC2 LC Input
17 25 VCC2 Video/Luma Supply Voltage (8 V)
18 26 CVBSIN1 Internal Video Input
19 27 GND2 Video/Luma Ground
20 28 CVBSIN2 External Video Input
21 29 BS Black Stretch Capacitor
22 34 Y/CVBSIN3 Y(SVHS) or CVBS3 External Input
23 35 CHR Chroma (SVHS) Input
- 37 U IN B-Y In put
- 38 VIN R -Y Input
- 39 YIN Y Input
- 40 YOUT Y O utput
- 41 VO U T R -Y O utput
- 42 UO UT B-Y O utput
30 43 BOUT Blue Output
31 44 GOUT Green Output
32 45 ROUT Red Output
33 46 I
CATH Cathode Current Measurement Input
34 47 BOSD OSD Blue Input
35 48 GOSD OSD Green Input
36 49 ROSD OSD Red Input
37 50 FBO SD /HC O SD Fast Bl ankingInput /alfH ont
C rast onSD IP56 package
38 52 XTAL3/BTUN 3.5X M Hz C rystalorC loche Filt
erTuningC apacitor
39 53 XTAL2 3.5X MHz Crystal
40 54 XTAL1 4.43/3.5X MHz Crystal
41 55 CLPF Chroma PLL Filter
XTAL1 Control Pin, Vertical Amplitude DAC Output
42 56 X1/VAMP/CHROUT
Chroma Reference Signal Output
39
Pin N
STV224XC/8XC STV223XD Symbol Description
SDIP56 TQFP64
43 57 GND1 Chroma/Scanning Ground
- 58 CVBSOUT1 Main Video Switch Output
45 59 VCC1 Chroma/Scanning Power Supply (8 V)
Beam Current Limiter Control Voltage and Safety
46 61 BCL/SAF
(XRAY)
47 62 VERT Vertical Output Pulse
48 63 HOUT Horizontal Output Pulse
49 64 LFB/SSC Line Flyback Input and Super-Sandcastle Output
50 1 SLPF Scanning PLL Filter
51 2 SCL I C Bus Clock Input
52 3 SDA I C Bus Data Input
53 4 VCCD Digital Supply Voltage (5 V)
54 5 GNDD Digital Ground
55 6 AUDIOOUT Main Audio Output
56 7 FM C AP FM D em odulati
on C apacit
or
40
CVBSOUT2
FMCAP
NTBC/CVBSOUT1
INTCVBSOUT
CHR
CVBSIN2
CVBSIN1
FBEXT
GEXT/Y
BS
BEXT/Cb
Y/CVBSIN3
REXT/Cr
IFPLL
PIFLC1
PIFLC2
15 16 9 13 56 23 22 20 18 29 44 21 28 25 26 27
STV2248
PLL BLACK
STRETCH YUV RGB
SWITCH TO YUV
AFC
PIFIN1 6
LUMA DL HALF
PIFIN2 7 PEAKING CONTRAST
W/B SPOT
INVERTER & CORING SAT./CONT
MATRIX 24 APR
AGCPIFCAP 5 AGC APR
PLL Reference 3
SOUND BP 37 FBOSD/HC
Carrier DEEMP. CHROMA
TUNERAGCOUT 8 TUNER AGC FM DEMOD TRAP
36 ROSD
RGB
SWITCH RGB
CONTRAST 35 GOSD
FM
Mono 34 BOSD
SIFIN1 1 FILTER
LIMITER TUNING
BCL/SAF 46 BCL/SAF
SIFIN2 2 AM BRIGHT.
Mono DRIVE ICATH SENSE 33 ICATH
41
ACC & ACC CUTOGG
OVERLOAD BLANKING 32 ROUT
AGCSIFCAP 3 AGC
31 GOUT
V CCD 53
30 BOUT
Sound
GNDD 54 CLOCHE BANDPASS CHROMA
FILTER FILTER DL SYNC. VERTICAL
V CCIF 54 47 VERT
SEP SCANNING
Subcarrier
GND IF 10
Mute Mute
V CC1 45 HORIZONTAL HORIZONTAL
1st LOOP 2nd LOOP 48 HOUT
AUTO IDENT.
GND1 43 CLOCHE
KILLER
AVL TUNING
V CC2 17 IC BUS AUDIO PAL/SECAM/NTSC
DECODER REF VOLUME DEMODULATOR VAMP DC
CONTROL
GND2 19
52 51 4 55 14 11 38 41 42 50 49
SDA
SCL
V REF
SLPF
CLPF
XTAL2
XTAL1
LFB/SSC
AUDIOOUT
XTAL3/BTUN
EXTAUDIOIN
AM/FMOUT/SC
X1/VAMP/CHROUT
MAIN FEATURES l Video identification circuit (independent from PLL1),

l I-C bus control (read and write modes), l Noise detector circuit,
l PIF PLL demodulator, Bus controlled VCO alignment, l Vertical countdown circuit,
l IF positive and negative modulation, l Automatic 50/60Hz selection circuit,
l Digital AFC, l Blanking and inserted cut-off pulses position adapted to
l Tuner delayed AGC output, standard (50 or 60Hz),
l White and Black spot cancellation, l Long blanking mode capability in 60Hz (same blanking as
50Hz standard),
l SIF with QSS or intercarrier structure,
l Possibility to insert cut-off pulses after a vertical oversize
l Built in sound bandpass,
blanking signal,
l Multistandard PLL FM demodulator (4.5, 5.5,
l De-interlace capability,
6.0,6.5MHz),
l Horizontal starting circuit with soft-start capability,
l AM demodulator for France,
l Horizontal and vertical position adjustments, vertical
l FM sound carriers output for Stereo chassis,
amplitude control voltage (combined with chroma subcar-
l Audio switch for external audio input, Mono chassis,
rier output),
l Digital volume control,
l 4/3, 16/9 selection voltage.
l Audio Mute,
l Video switch, 3 CVBS inputs, 1 CVBS output which can
be used to drive teletext decoder,
l SVHS switch, Y input is combined with CVBS3 input,
l OSD RGB analog inputs, fast blanking detection on OSD
fast blanking pin, contrast control capability,oversize
blanking capability on OSD fast blanking input,
l External analog RGB inputs with contrast and saturation
control (external RGB matrixed in YUV).
l Integrated chroma filters (trap, bandpass, cloche) with
automatic alignment,
l Integrated luminance delay line,
l Adjustable peaking on the luminance signal with coring
function,
l Black strech circuit,
l PAL / SECAM / NTSC color decoder with automatic iden-
tification of standards,
l Integrated chroma delay line,
l Full integrated SECAM decoder,
l Hue control, two selectable matrixes in NTSC mode,
l Automatic flesh control circuit with two selectable charac-
teristics (normal and wide),
l ACC overload circuit,
l Chroma subcarrier output, which could be used to drive
comb filter circuit,
l Automatic RGB peak regulation (APR).
l Automatic digital cut-off current loop with warm-up detec-
tion circuit,
l White point and cut-off point adjustments,
l Beam current limiter control stage,
l High performance synchronization pulses separator,
l Horizontal synchronization with two phase locked loops,
l Integrated VCO, auto-calibration using the chroma crystal
reference frequency,
l Automatic time constant selection for the first PLL, 3
selectable time constants,
42
ELEC TRICAL CHAR A CT ERISTICS
A B SO LU TE MA XIMUM RA TING S
Symbol Parameter Value Unit
V CC _8V 8 V Supply Voltage 10 V
V CC _5V 5 V Supply Voltage 7 V
V ESD serial
Capacitor 100 pF discharged via 2
1.5 k resistance (Human Body Model) kV
Toper Operating Temperature 0, +70 C
Tstg Storage Temperature -55, +150C
TH ER M A L DA TA
Typical
Symbol Parameter Unit
Value
SDIP56 40 C/W
R th (j-a)Junction-ambient Thermal Resistance (measured
D = 1 W)at P
TQFP64 50 C/W
SU PPLY
(Supplies at Typical Values, T C, I
amb = 25 C bus register at power-on reset value, autom
mode, unless otherwise specified).
Symbol Parameter Test Conditions Min. Typ Max. Unit
V CCIF IF Circuit Supply Voltage 4.75 5 5.25
V CCD Bus & Digital Supply Voltage 4.75 5 5.25
V CC1 Chroma, Scanning Supply Voltage 7.6 8 8.4 V
V CC2 Video Supply Voltage 7.6 8 8.4 V
ICCIF V CCIF Current Consumption V
CCIF = 5 V. No-load at RGB outputs. 58 m
ICC5F V CC5F Current Consumption CCDV = 5 V. No-load at RGB outputs. 48 m
ICCI V CCI Current Consumption CCIV= 8 V. No-load at RGB outputs. 40 m
ICC2 V CC2 Current Consumption CC2V = 8 V. No-load at RGB outputs. 56 m
V CCI = V CC2 = 8 V,
PD TotalPower Dissipation V CCIF =V CC5V = 5 V 1300 mW
No-load at RGB outputs.
43
ST92195C/D pos: IC01

48-96 KB ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND
TELETEXT DATA SLICER
General Features:
Register File based 8/16 bit Core Architecture with RUN, C-Compiler, Archiver, Source Level Debugger and hard-
WFI, SLOW and HALT modes ware emulators with Real-Time Operating System avail-
0C to +70C Operating Temperature Range available able from third parties
Up to 24 MHz Operation @ 5V10% Pin Compatible EPROM and OTP devices available.
Microcontroller+OSD+(Teletext decoder)+VPS/PDC/WS
Minimum instruction cycle time: 165nS at 24MHz.
decoder are embedded in one chip, where there are two
48, 56, 64, 84 or 64K Bytes ROM types with the major difference;
256 Bytes RAM of Register file (accumulators or index ST92185 No-teletext
registers) ST92195 With teletext
256 to 512 Bytes of on-chip static RAM The ST92195 microcontroller is developed and manufac-
2 or 8 Kbytes of TDSRAM (Teletext and Display Storage tured by STMicroelectronics using a pro-prietary n-well
RAM) HCMOS process. Its performance derives from the use of
28 fully programmable I/O pins a flexible 256-register pro-gramming model for ultra-fast
Serial Peripheral Interface context switching and real-time event response. The intelli-
gent on-chip peripherals offload the ST9 core from I/O and
Flexible Clock controller for OSD, Data Slicer and Core data management processing tasks allowing critical appli-
clocks running from cation tasks to get the maximum use of core resources.
a single low frequency external crystal. The ST92195 MCU supports low power consumption and
Enhanced Display Controller with 26 rows of 40/80 char- low voltage operation for power-efficient and low-cost
acters embedded systems.
2 sets of 512 characters The advanced ST9+ Core consists of the Central Process-
Serial and Parallel attributes ing Unit (CPU), the Register File and the Interrupt con-
troller. The general-purpose registers can be used as accu-
10x10 dot Matrix, definable by user mulators, index registers, or address pointers. Adjacent
4/3 and 16/9 supported in 50/60HZ and 100/120 Hz register pairs make up 16-bit registers for addressing or
mode 16-bit processing. Although the ST9 has an 8-bit ALU, the
Rounding, fringe, double width, double height, chip handles 16-bit operations, including arithmetic,
scrolling, cursor, full Background color, half-intensity loads/stores, and memory/register and memory/memory
color, translucency and half-tone modes exchanges. Two basic addressable spaces are available:
Teletext unit, including Data slicer, Acquisition Unit and the Memory space and the Register File, which includes
up to 8K Bytes RAM for Data Storage the control and status registers of the on-chip peripherals.
Power consumption of the device can be reduced by more
VPS and Wide Screen Signalling slicer than 95% (Low power WFI).
Integrated Sync Extractor and Sync Controller Up to 28 I/O lines are dedicated to digital Input/Output.
14-bit Voltage Synthesis for tuning reference voltage These lines are grouped into up to five I/O Ports and can
Up to 6 External Interrupts plus one non-maskable inter- be configured on a bit basis under software control to pro-
rupt vide timing, status signals, timer and output, analogue
8 x 8-bit programmable PWM outputs with 5V open-drain inputs, external interrupts and serial or parallel I/O. A set
of on-chip peripherals form a complete system for TV set
or push-pull capability
and VCR applications:
16-bit Watchdog timer with 8-bit prescaler
Voltage Synthesis
1 or 2 16-bit standard timer(s) with 8-bit prescaler
VPS/WSS Slicer
IC Master/Slave (on some devices)
Teletext Slicer
4-channel A/D converter; 5-bit guaranteed
Teletext Display RAM
Rich instruction set and 14-Addressing modes
OSD
Versatile development tools, including Assembler, Linker,
44
Up to 96 I/O
BLOCK Kbytes ROM PORT 0 8 P0[7:0]
DIAGRAM
256 or 512
bytes RAM I/O
6 P2[5:0]
PORT 2
Up to 8 I/O
Kbytes TRI PORT 3 4 P3[7:4]
TDSRAM
I/O
256 bytes PORT 4 8 P4[7:0]
MEMORY BUS
Register File
8/16-bit I/O
CPU 2 P5[1:0]
PORT 5
NMI MMU
INT[7:4] DATA TXCF
INT2 Interrupt SLICER
INT0 Management & ACQUI-
SITION CVBS1
ST9+ CORE
UNIT
OSCIN SYNC.
OSCOUT RCCU EXTRAC-
RESET TION
RESETO
16-BIT VPS/WSS
WSCR
REGISTER BUS
TIMER/ DATA
WATCHDOG WSCF
SLICER
CVBS2
SDO/SDI SPI
SCK ADC AIN[4:1]
EXTRG
TIMING AND
MCFM CLOCK CTRL
SYNC VSYNC
CONTROL HSYNC/CSYNC
CSO
VSO[2:1] VOLTAGE
SYNTHESIS FREQ.
ON PXFM
SCREEN MULTIP.
DISPLAY R/G/B/FB
STANDARD TSLU
STOUT0 TIMER 1) HT
PWM
D/A CON- PWM[7:0]
SDA1/SCL1
SDA2/SCL2 IC 2) VERTER
All alternate functions

(Italic characters)
are mapped on Ports 0, 2, 3, 4 and 5
Note 1
: One standard timer on ST92195C devices, two standard timers on ST92195D devic
Note 2
: C
I available on ST92195D devices only
45
PIN DESCRIPTION (Cont

d)
Figure 3. 56-Pin Package Pin-Out
INT7/P2.0 1 56 P2.1/INT5/AIN1
RESET 2 55 P2.2/INT0/AIN2
P0.7 3 54 P2.3/INT6/VS01
P0.6 4 53 P2.4/NMI
P0.5 5 52 P2.5/AIN3/INT4/VS02
P0.4 6 51 OSCIN
P0.3 7 50 OSCOUT
AIN4/P0.2 8 49 P4.7/PWM7/EXTRG/STOUT0
P0.1 9 48 P4.6/PWM6
P0.0 10 47 P4.5/PWM5/SDA2
CSO/RESET0 /P3.7 11 46 P4.4/PWM4/SCL2
P3.6 12 45 P4.3/PWM3/TSLU/HT
P3.5 13 44 P4.2/PWM2
P3.4 14 43 P4.1/PWM1
B 15 42 P4.0/PWM0
G 16 41 VSYNC
R 17 40 HSYNC/CSYNC
FB 18 39 AVDD1
SDA1/SDI/SDO/P5.1 19 38 PXFM
SCL1/SCK/INT2/P5.020 37 JTRSTO
V DD 21 36 GND
JTDO 22 35 AGND
WSCF 23 34 CVBS1
V PP /WSCR 24 33 CVBS2
AVDD3 25 32 JTMS
TEST0 26 31 AVDD2
MCFM 27 30 CVBSO
JTCK 28 29 TXCF
RESET Reset (input, active low). The ST9+VSYNC Vertical Sync. Vertical video synchro
is ini-
tialised by the Reset signal. With the deactivation
tion input to OSD. Positive or negative
of RESET, program execution begins from the
HSYNC/CSYNC Horizontal/Composite sync. Hori-
Program memory location pointed to by thezontal
vectoror composite video synchronisatio
contained in program memory locations 00h OSD.andPositive or negative polarity.
01h.
PXFM Analog pin for the Display Pixel F
R/G/B Red/Green/Blue. Video color analog DAC
Multiplier
outputs.
AVDD3 Analog V DD of PLL. This pin must be t
FB Fast Blanking. Video analog DAC output. to V externally.
DD
VDD Main power supply voltage (5V10%, digital)
GND Digital circuit ground.
WSCF, WSCR Analog pins for the VPS/WSS slic-
AGND Analog circuit ground (must be ti
er . These pins must be tied to ground or not to
nally con-
digital GND).
nected.
CVBS1 Composite video input signal for t
VPP: On EPROM/OTP devices, the WSCR pin is text slicer and sync extraction.
replaced byPP Vwhich is the programming voltage
pin. PP
V should be tied to GND in user mode.CVBS2 Composite video input signal for t
WSS slicer. Pin AC coupled.
MCFM Analog pin for the display pixel frequency
multiplier. AVDD1, AVDD2 Analog power supplies (must
tied externally to AVDD3).
OSCIN, OSCOUT Oscillator (input and output).
These pins connect a parallel-resonantTXCF Analog pin for the Teletext slicer
crystal
(24MHz maximum), or an external source CVBSO,
to the JTDO, JTCK Test pins: leave float
on-chip clock oscillator and buffer. OSCIN is the
TEST0 Test pins: must be tied to AVDD2.
input of the oscillator inverter and internal clock
JTRST0 Test pin: must be tied to GND.
generator; OSCOUT is the output of the oscillator
inverter.
46
PIN ASSIGNMENT
Pin No. Pin Name I/O Function

1 INT7/P2.0 IR INT. IN
3 P0.7 DVDDATAOUT
4 P0.6 STOP
5 P0.5 N.C.
6 P0.4 N.C.
7 P0.3 N.C.
8 AIN4 AV.STATUS
9 P0.1 N.C.
10 P0.0 N.C.
11 CSO/RESET0/P3.7 MUTE_DVD
12 P3.6 L/L'
13 P3.5 TV/DVD
14 P3.4 STDBY
28 JTCK N.C.
30 CVBSO N.C.
32 JTMS N.C.
42 P4.0/PWMO DVD_STD_BY
43 P4.1/PWM1 VOL
44 P4.2/PWM2 N.C.
45 P4.3/PWM3 DVD POWER +5V
46 P4.4/PWM4 DVD POWER +12V
47 P4.5/PWM5 N.C.
48 P4.6/PWM6 N.C.
49 P4.7/PWM7/EXTRG/STOUT N.C.
53 P2.4/NMI N.C.
54 P2.3/INT6/VS01 LED CONTROL
55 P2.2/INT0/AIN2 DVDDATAIN
56 P2.1/INT5/AIN1 KEYBOARD INPUT
47
24C08 pos: IC02

Non-Volatile Memory
These I_C-compatible electrically erasable programmable memory (E_PROM) is organized as 1024 x 8 bit and operate
with a power supply of 5 V. The memory behaves as a slave device in the I_C protocol, with all memory operations syn-
chronized by the serial clock. Read and Write operations are initiated by a START
condition, generated by the bus master. The START condition is followed by a Device Select Code and RW bit terminated
by an acknowledge bit.
DC Characteristics
(TA = 0 toC,
70 20 to C85or 40 toC;
85 CC
V = 3V to 5.5V, 2.5V to 5.5V or 1.8V to 5.5V
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIN VCC
0V 2 A
0V VOUT VCC
ILO Output Leakage Current 2 A
SDA in Hi-Z
V CC = 5V,C f
= 100kHz
Supply Current (ST24 series) 2 mA
ICC (Rise/Fall time < 10ns)
Supply Current (ST25 series) CC V C =f 100kHz
= 2.5V, 1 mA
V IN = VSS or CC
V,
100 A
Supply Current (Standby) V CC = 5V
ICC1
(ST24 series)
V IN = V
SS or CC
V,
300 A
V CC = 5V,C f= 100kHz
V IN = VSS or CC
V,
5 A
Supply Current (Standby) V CC = 2.5V
ICC2
(ST25 series)
V IN = V
SS or CC
V,
50 A
V CC = 2.5V, C =f 100kHz
V IN = VSS or CC
V,
20 A
ICC3
(ST24C08R)
V IN = V
SS or CC
V,
60 A
V CC = 3.6V, C =f 100kHz
V IN = VSS or CC
V,
10 A
ICC4
(ST24C08R)
V IN = V
SS or CC
V,
20 A
V CC = 1.8V, C =f 100kHz
V IL Input Low Voltage (SCL, SDA) 0.3 CC 0.3 VV

V IH Input High Voltage (SCL, SDA) CC 0.7 VVCC + 1 V
Input Low Voltage
V IL 0.3 0.5 V
(E, PRE, MODE,
WC)
Input High Voltage
V IH V CC 0.5 V
CC + 1 V
(E, PRE, MODE,
WC)
Output Low Voltage (ST24 series)
OL = 3mA,
I CCV = 5V 0.4 V
V OL OL = 2.1mA,
Output Low Voltage (ST25 series) I CCV = 2.5V 0.4 V
Output Low Voltage
IOL = 1mA, CCV = 1.8V 0.3 V
(ST24C08R)
48
TDA1771 pos: ID41

VERTICAL DEFLECTION CIRCUIT
DESCRIPTION
The TDA1771 is a monolithic integrated circuit in SIP10 package.
It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and
B & W television as well as in Monitor and Data displays.
.
.RAMP GENERATOR
.
.
INDEPENDENT AMPLITUDE ADJUSTEMENT
BUFFER STAGE
.
.
POWER AMPLIFIER
FLYBACK GENERATOR
.INTERNAL REFERENCE VOLTAGE

THERMAL PROTECTION
SIP10
(Plastic Package)
ORDER CODE : TDA1771
PIN CONNECTIONS (top view)
10 FLYBACK GENERATOR
9 VS
8 INVERTING INPUT
ESCRIPTION 7 BUFFER OUTPUT
6 RAMP GENERATOR
he TDA1771 is a monolithic integrated circuit in 5 GROUND
IP10 package. 4 HEIGHT ADJUSTMENT
t is a full performance and very efficient vertical 3 TRIGGER INPUT
1771-01.EPS
2 OUTPUT STAGE V S
eflection circuit intended for direct drive of a TV
1 POWER OUTPUT
icture tube in Color and B & W television as well
s in Monitor and Data displays.
LOCK DIAGRAM
9 2
VOLTAGE FLYBACK
10
REGULATOR GENERATOR
R3
TRIGGER IN 3 RAMP CLOCK POWER

1
GENERATOR PULSE AMP.
BUFFER THERMAL
STAGE PROTECTION
-02.EPS
4 6 7 8 5
49
ABSOLUTE MAXIMUM RATINGS

VS Supply Voltage 30 V
V1 , 2V Flyback Peak Voltage 65 V
V3 Trigger Input Voltage 20 V
V8 Amplifier Input Voltage GND
S to V V
I0 Output Peak to Peak Current (non repetitive t = 2ms) 6
I0 st > 10
Output Peak to Peak Current 4 A
I10 Pin 10 DC Current1 at
< V
9V 100 mA
I10 Pin 10 Peak to Peak Current
fly< @1.5ms
t 3 A
1771-01.TBL
P tot Total Power Dissipation
tab @
= TC
60 9 W
TS , JT Storage and Junction Temperature C
40, + 150
THERMAL DATA
1771-02.TBL
R th (j-tab)Thermal Resistance Junction-tab Max. 10 C/W
R th (j-a) Thermal Resistance Junction-ambient Max. 70 C/W
C unless otherwise specified)

ELECTRICAL CHARACTERISTICS (Tamb = 25
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DC (VS = 30V)
I2 Pin 2 Quiescent Current 1 = 0,
I
10 I= 0 16 36 mA
I9 Pin 9 Quiescent Current 1 = 0,
I
10 I= 0 15 30 mA
6I Ramp Generator Bias Current 6 = 0
V 0.5 A
6I Ramp Generator Current 6 A
=V 0, 4 =I 20 18.5 20 21.5 A
dI6/I
6 Ramp Gener. Linearity 6 = V0 to 15V,
4 = IA
20 0.2 1 %
V1 Quiescent Output Voltage a = R , R
30k , V
b = 10k S = 30V 17.0 17.8 18.6 V
, R
R a = 6.8k , V
b = 10k S = 15V 7.2 7.5 7.8 V
V 1L Out Saturation Voltage to GND 1 = 0.5A
I 0.5 1 V
I1 = 1.2A 1 1.4 V
V 1H Out Saturation Voltage
S to V 1I = 0.5A 1.1 1.6 V
1I = 1.2A 1.6 2.2 V
V4 Reference Voltage 4 A
= I20 6.3 6.6 6.9 V
dV4/VS Reference Voltage Drift Versus
S V S V= 10V to 30V 1 2 mV/V
dV4/dI 4 Reference Voltage Drift 4Versus
I4 = A to 30
I 10 A 1.5 2 mV/A
Vr Internal Ref. Voltage 4.26 4.40 4.54 V
Gv Ouput Stage Open Loop Gain f = 100Hz 60 dB
V fs V9 10Saturation Voltage 10 = 1.2A
I 1.5 2.5 V
V 10 Pin 10 Scanning Voltage 10 = I
20mA 1.7 3 V
V3 Trigger Input Threshold (see note 1) 2.6 3.0 3.4
1171-03.TBL
I3 Trigger Input Bias Current IN = V

3 V
0.2V 30 A
t3 Trigger Input Width (see note 2) 20 60 S th
Notes : 1. The trigger input circuit can accept, with a metal option, positive and negative going input pulses.
1.2 tS
2. th= whereS tis the vertical period
PP is
and
ramp
V amplitude at Pin 6
V PP
50
C unless otherwise specified) (continued)

ELECTRICAL CHARACTERISTICS (Tamb = 25
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DC (VS = 24V)
VS Operating Supply Voltage Range 10 30 V
I1 Peak-to-peak Operating Current Range 0.4 2.5
IS Supply Current Y =I 2.4A
pp 315 mA
V1 Flyback Voltage Y =I 2.4A
pp 51 V
1771-04.TBL
V7 Sawtooh Pedestall Voltage 1.85 V
TJS Junction Temp. for Thermal Shutdown 145 C
APPLICATION CIRCUIT
+VS
0.1F 470F 1N4001
9 2
100F
35V
VOLTAGE FLYBACK
10
REGULATOR GENERATOR
R3
TRIGGER IN 3 RAMP CLOCK POWER

1
GENERATOR PULSE AMP.
2.2

Ry = 9.6
330 YOKE Ly = 24.6mH
BUFFER THERMAL F
0.22 Iy = 1.2App
STAGE PROTECTION
2.4k
4 6 7 8 5

1.2k 1k 1500F
47nF
180k
22F
220k
1.2
1771-03.EPS
51
TDA 16846 pos: IP01

Controller for Switch Mode Power Supplies Supporting Low Power
Standby and Power Factor Correction
Features Description
Line Current Consumption with PFC The TDA 16846 is optimised to control free running or
Low Power Consumption fixed frequency flyback converters with or without Power
Stable and Adjustable Standby Frequency Factor Correction (Current Pump). To provide low power
Very Low Start-up Current consumption at light loads, this device reduces the
Soft-Start for Quiet Start-up switching frequency continuously with load, towards an
Free usable Fault Comparators adjustable minimum (e. g. 20 kHz in standby mode).
Synchronization and Fixed Frequency Facility Additionally, the start up current is very low. To avoid
Over- and Undervoltage Lockout switching stresses of the power devices, the power tran-
Switch Off at Mains Undervoltage sistor is always switched on at minimum voltage. A spe-
Temporary high power circuit (only TDA 16847) cial circuit is implemented to avoid jitter. The device has
Mains Voltage Dependent Fold Back Point Correction several protection functions: V CC over- and undervolt-
Continuous Frequency Reduction with Decreasing age, mains undervoltage, current limiting and 2 free
Load usable fault comparators. Regulation can be done by
Adjustable and Voltage Dependent Ringing Suppres- using the internal error amplifier or an opto coupler feed-
sion Time back (additional input). The output driver is ideally suited
for driving a power MOSFET, but it can also be used for
a bipolar transistor. Fixed frequency and synchronized
operation are also possible. The TDA 16846 is suited for
TV-, VCR- sets and SAT receivers. It also can be good
used in PC monitors. The TDA 16847 is identical with
TDA 16846 but has an additional power measurement
output (pin 8) which can be used for a Temporary High
Power Circuit.
Pin Configuration (top view) Pin Definitions and Functions

Pin Symbol Function
U 1 OTC Off Time Circuit
DTC 1 14 VCC
2 PCS Primary Current Simulation
PCS 2 13 OUT
3 RZI Regulation and Zero Crossing Input
RZI 3 12 GND
4 SRC Soft-Start and Regulation Capacitor
SRC 4 11 PVC 5 OCI Opto Coupler Input
OCI 5 10 FC1 6 FC2 Fault Comparator 2
FC2 6 9 REF 7 SYN Synchronization Input
SYN 7 8 N.C./PMO 8 N.C./PMO Not Connected (TDA16846)

9 REF Reference Voltage and Current
10 FC1 Fault Comparator 1
11 PVC Primary Voltage Check
12 GND Ground
13 OUT Output
14 VCC Supply Voltage
52
Short Description of the Pin Functions
Pin Functions
1 A parallel RC-circuit between this pin and ground determines the ringing suppression time
and the standby-frequency.
2 A capacitor between this pin and ground and a resistor between this pin and the positive
terminal of the primary elcap quantifies the max. possible output power of the SMPS.
3 This is the input of the error amplifier and the zero crossing input. The output of a voltage
divider between the control winding and ground is connected to this input. If the pulses at
pin 3 exceed a 5 V threshold, the control voltage at pin 4 is lowered.
4 This is the pin for the control voltage. A capacitor has to be connected between this pin
and ground. The value of this capacitor determines the duration of the softstart and the
speed of the control.
5 If an opto coupler for the control is used, it's output has to be connected between this pin
and ground. The voltage divider at pin 3 has then to be changed, so that the pulses at pin
3 are below 5 V.
6 Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops.
7 If fixed frequency mode is wanted, a parallel RC circuit has to be connected between this
pin and ground. The RC-value determines the frequency. If synchronized mode is wanted,
sync pulses have to be fed into this pin.
8 Not connected (TDA16846). / This is the power measurement output of the Temporary
High Power Circuit. A capacitor and a RC-circuit has to be connected between this pin
and ground.
9 Output for reference voltage (5 V). With a resistor between this pin and ground the fault
comparator 2 (pin 6) is enabled.
10 Fault comparator i: If a voltage > 1 V is applied to this pin, the SMPS stops.
11 This is the input of the primary voltage check. The voltage at the anode of the primary
elcap has to be fed to this pin via a voltage divider. If the voltage of this pin falls below
1 V, the SMPS is switched off. A second function of this pin is the primary voltage depen-
dent fold back point correction (only active in free running mode).
12 Common ground.
13 Output signal. This pin has to be connected across a serial resistor with the gate of the
power transistor.
14 Connection for supply voltage and startup capacitor. After startup the supply voltage is
produced by the control winding of the transformer and rectified by an external diode.
53
TDA16846 Block Diagrams
PVC
Fold Back Point Correction 11

D4 R4
SYN R6x1/3
Primary
KSY
Voltage
R7 Check
- PVA
R6 D5
5V +
30k - -
1V +
R8 R3 1.5V +
75k 15k
Control Voltage
Off Time 3.5V
G1 VCC
Limit Comparator +
1
5V
ED2 9
1
+ REF
OTC - 8
CS1 G4 N.C.
RSTC/RSTF
6
+ FC2
1
Eror
3.5V R2
5V Amplifier Error-
D2 Flipflop FC2
1.2V
3 +
RZI S
- Q
R
D3 Buffer for
Control Voltage
4
SRC
5
+
+
OCI -
R1 Output
On Time & G3 Driver
20k Comparator
S & 13
Q OUT
5V G2
2 - R
PCS + I1
ED1
Zero Crossing
1.5V Signal
D1 <25mV
Startup FC1
Diode Supply Voltage
Overvoltage
Comparator 1V
Comparator -
14 +
VCC +
12
+
GND 16V - 15.8V -
10
1) The input with the lower voltage becomes operative
54
TDA7057AQ
2 x5 W stereo BTL Audio Output Amplifier with DC Volume Control
FEATURES GENERAL DESCRIPTION

DC volume control The TDA7057AQ is astereo BTL output amplifier with DC
Few external components volume control. The device is designed for use in TV and
Mute mode monitors, but are also suitable for battery-fed portable
Thermal protection recorders and radios.
Short-circuit proof
Missing Current Limiter (MCL)
No switch-on and switch-off clicks
A MCL protection circuit is built-in. The MCL circuit is
Good overall stability activated when the difference in current between the
Low power consumption output terminal of each amplifier exceeds 100 mA (typical
Low HF radiation 300 mA). This level of 100 mA allows for headphone
ESD protected on all pins. applications (single-ended).
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VP supply voltage 4.5 18 V
Pout output power Vp = 12 V; RL = 16 3.0 3.5 W
Vp = 12 V; RL = 8 5.3 W
Gv voltage gain 39.5 40.5 41.5 dB
GC gain control 68.0 73.5 dB
Iq(tot) total quiescent current Vp = 12 V; RL = 22 25 mA
THD total harmonic current Pout=0.5w w 0.3 1 %
TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA7057AQ DBS13P Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6
SYMBOL PIN DESCRIPTION U

vc1 1
VC1 1 DC volume contol 1
n.c. 2
n.c. 2 not connected
VI(1) 3
VI (1) 3 voltage input 1
VP 4 positive supply voltage VP 4
VI (2) 5 voltage input 2 VI(2) 5
SGND 6 signal ground SGND 6
VC2 7 DC volume contol 2 TDA7057AQ

VC2 7
OUT2+ 8 positeve output 2
OUT2 8
PGND2 9 power ground 2
OUT2- 10 negative output 2 PGND2 9
OUT1- 11 negative output 1 OUT2 10
PGND1 12 powwer ground 1 OUT1- 11

OUT1+ 13 positive output 1
PGND1 12
OUT1+ 13
Pin Configuration
55
handbook, full pagewidth V P = 12 V

(1)
100 nF 220 F
4
TDA7053AQ
13
470 nF I+ 1
3
input 1
(2)
1
R s = 5 k I 1
11
TEMPERATURE
STABILIZER MCL
PROTECTION
10
470 nF I 1
5
input 2
7 (2)
I+ 1
DC- 8
volume
R s = 5 k
6 9 12
signal power
ground ground
(1) This capacitor can be omittedFifelectrolytic

the 220 capacitor is connected close to pin 5.
(2) RL = 16 .
FUNCTIONAL DESCRIPTION
The TDA7057AQ is a stereo output amplifiers with two citors can be used which results in cost reductions.
DC volume control stages. The device is designed for TV For portable applications there is a trend to decrease the
and monitors, but also suitable for battery-fed portable re- supply voltage, resulting in a reduction of output power at
corders and radios. conventional output stages. Using the BTL principle incre-
In conventional DC volume control circuits the control or ases the output power.
input stage is AC coupled to the output stage via external The maximum gain of the amplifier is fixed at 40.5 dB.
capacitors to keep the offset voltage low. The DC volume control stages have a logarithmic control
In the TDA7057AQ the two DC volume control stages are characteristic. Therefore, the total gain can be controlled
integrated into the input stages so that no coupling capa- from +40.5 dB to -33 dB. If the DC volume control voltage
citors are required and a low offset voltage is still mainta- falls below 0.4 V, the device will switch to the mute mode.
ined. The minimum supply voltage also remains low. The amplifier is short-circuit protected to ground, Vp and
The BTL principle offers the following advantages: across the load. A thermal protection circuit is also imple-
Lower peak value of the supply current mented. If the crystal temperature rises above 150 oC the
The frequency of the ripple on the supply voltage is twi- gain will be reduced, thereby reducing the output power.
ce the signal frequency. Special attention is given to switch-on and switch-off
Consequently, a reduced power supply with smaller capa clicks, low HF radiation and a good overall stability.
56
74HC4053B pos:IA03
Analog Multiplexer/Demultiplexer
.QUIESCE NT CURREN T SPECIFIED TO 20V

4053B
.FOR HCC DEVICE

LOW ON RESISTANCE : 125 (typ.) OVER
15V p.p. SIGNAL-INPUT RANGE FOR VDD -
EY F
(Plastic Package)(Ceramic Frit Seal Package)
.V EE = 15V
HIGH OFF RESISTANCE : CHANNEL LEAK-
.
.
AGE 100pA (typ.)DDV VEE = 18V
BINARY ADDRESS DECODING ON CHIP
VERY LOW QUIESCENT POWER DISSIPA-
M1 C1
(Micro Package) (Plastic Chip Carrier)
TION UNDER ALL DIGITAL CONTROL INPUT
ORDER CODES :
AND SUPPLY CONDITIONS : 0.2 W (typ.),
.V DD VSS = V DD VEE = 10V

MATCHED SWITCH CHARACTERISTICS :
HCC40XXBF
HCF40XXBEY
HCF40XXBM1
HCF40XXBC1
.R ON = 5 (typ.) for DD V
VEE = 15V
WIDE RANGE OF DIGITAL AND ANALOG SIG-
NAL LEVELS : DIGITAL 3 TO 20V, ANALOG TO DESCRIPTION
.
.
20V p.p.
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100mA AT 18V AND
TheHCC 4051B, 4052B and4053B (extended tem-
HCF4051B, 4052B and4053B
perature range) and
(intermediate temperature range) are monolith
.
.
25C FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
o
tegrated circuits, available in 16-lead dua
plastic or ceramic package and plastic microp
age. HCC/HCF4051B, HCC/HCF4052B, and
TATIVE STANDARD N 13A, STANDARD HCC/HCF4053B analog multiplexers/demult
SPECIFICATIONS FOR DESCRIPTION OF B plexers are digitally controlled analog switc
SERIES CMOS DEVICES ing low ON impedance and very low OFF leakage
FUNCTIONAL DIAGRAMS AND TRUTH TABLES (continued)
4053
A or B
Inhibit
or C
0 0 ax or bx or cx
0 1 ay or by or cy
1 X None
X = Dont care.
57
LM317 pos: IP02

1.2V TO 37V Voltage Regulator
GENERAL DESCRIPTION FEATURES

The LM117 series of adjustable 3-terminal positive vol- l Guaranteed 1% output voltage tolerance (LM317A)
tage regulators is capable of supplying in excess of 1.5A l Guaranteed max. 0.01%/V line regulation (LM317A)
over a 1.2V to 37V output range. They are exceptionally l Guaranteed max. 0.3% load regulation (LM117)
easy to use and require only two external resistors to set l Guaranteed 1.5A output current
the output voltage. Further, both line and load regulati- l Adjustable output down to 1.2V
on are better than standard fixed regulators. Also, the l Current limit constant with temperature
LM117 is packaged in standard transistor packages l P + Product Enhancement tested
which are easily mounted and handled. l 80 dB ripple rejection
In addition to higher performance than fixed regulators, l Output is short-circuit protected
the LM117 series offers full overload protection availab-
le only in ICs. Included on the chip are current limit,
thermal overload protection and safe area protection. All
overload protection circuitry remains fully functional
even if the adjustment termi-nal is disconnected.
Normally, no capacitors are needed unless the device is
situ-ated more than 6 inches from the input filter capaci-
tors in which case an input bypass is needed. An opti-
onal output capacitor can be added to improve transient
response. The adjustment terminal can be bypassed to
achieve very high ripple rejection ratios which are diffi-
cult to achieve with stan-dard 3-terminal regulators.
Besides replacing fixed regulators, the LM117 is useful
in a wide variety of other applications. Since the regula-
tor is floating and sees only the input-to-output diffe-
rential voltage, supplies of several hundred volts can
be regulated as long as the maximum input to output dif-
ferential is not ex-ceeded, i.e., avoid short-circuiting the
output. Also, it makes an especially simple adjustable
switching regulator, a programmable output regulator,
or by connecting a fixed resistor between the adjust-
ment pin and output, the LM117 can be used as a pre-
cision current regulator. Sup-plies with electronic shut-
down can be achieved by clamping the adjustment ter-
minal to ground which programs the out-put to 1.2V
where most loads draw little current. For applications re-
quiring greater output current, see LM150 series (3A)
and LM138 series (5A) data sheets. For the negative
complement, see LM137 series data sheet.
58
LM358 pos: I060

Dual Operational Amplifier
FEATURES PIN CONNECTIONS
INTERNALLY FREQUENCY COMPENSATED
LARGE DC VOLTAGE GAIN : 100dB
WIDE BANDWIDTH (unity gain) : 1.1MHz (temperature 1
compen sated)
VERY LOW SUPPLY CURRENT/OP (500mA) ESSEN- 2 -
TIALLY INDEPENDENT OF SUPPLY VOLTAGE
+
LOW INPUT BIAS CURRENT : 20nA (temperature com- 3
pensated)
LOW INPUT OFFSET VOLTAGE : 2mV
LOW INPUT OFFSET CURRENT : 2nA
INPUT COMMON-MODE VOLTAGE RANGE INCLUDES 1 - Output 1 5 - Non-inverting input 2
GROUND 2 - Inverting input 1 6 - Inverting input 2
DIFFERENTIAL INPUT VOLTAGE RANGE EQUAL TO 3 - Non-inverting input7 1- Ouput 2
THE POWER SUPPLY VOLTAGE 4 V-
- CC V+
8 - CC
LARGE OUTPUT VOLTAGE SWING 0V TO (VCC
1.5V)
DESCRIPTION and all the conventional op-amp circuits, which now can be
more easily implemented in single power supply systems.
These circuits consist of two independent, high gain, inter-
For example, these circuits can be directly supplied with
nally frequency compensated which were designed specifi-
the standard + 5V, which is used in logic systems and will
cally to operate from a single power supply over a wide
easily, provide the required interface electronics without
range of voltages. The low power supply drain is indepen-
requiring any additional power supply. In the linear mode
dent of the magnitude of the power supply voltage. Appli-
the input common-mode voltage range includes ground
cation areas include transducer amplifiers, dc gain blocks
and the output voltage can also swing to ground, even
LM7805 pos: IP03

3-Terminal 1A Positive Voltage Regulator
Features Description
Output Current up to 1A The MC78XX/LM78XX/MC78XXA series of three termi-
Output Voltage of 5,6,8,9,10,12,15,18,24 V nal positive regulators are available in the TO-220/D-
Thermal Overload Protection PAK package and with several fixed output voltages,
Short Circuit Protection making them useful in a wide range of applications.
Output Transistor Safe Operating Area Protection Each type employs internal current limiting, thermal
shutdown and safe operating are protection, making it
essentially indestructible. If adequate heat sinking is
provided, they can deliver over 1 A output current.
Although designed primarily as fixed voltage regulators,
these devices can be used with external components to
obtain adjustable voltages and currents.
59
DESCRIPTION OF INTEGRATED CIRCUITS

-DVD PART-
ES6018
DVD PROCESSOR SOLUTION
DESCRIPTION Dedicated core and I/O power supplies for low-power
operation; integrated 32-bit RISC processor for system
Built on ESSs proprietary and flexible Programmable Multi-
host, eliminating requirements of an external host CPU
media Processor architecture, the Vibratto TM series of
DVD processors combine audio/video stream data process- Supports DVD-Video, DVD-Audio, VideoCD 1.1, 2.0, and
ing, system control and housekeeping functions, video post- 3.0, Super VideoCD (SVCD), CD-DA, MP3, and Kodak
processing, and display format encoding, enabling various Picture-CD
DVD-based multimedia electronics to be built with minimal Supports parallel and serial interfaces to ATAPI, Compact
external components. The Vibratto series includes new fea- Flash, DCI, IDE and UDF DVD loaders
tures for DVD-Audio support, progressive scan video out-
Direct interface of 8- or 16-bit SDRAM of up to 128-Mb
put, and built-in TV encoder and video DACs.
capacity at a variety of speed grades
All of the Vibratto DVD processors each include two parallel
Direct interface of up to 4 banks of 8- or 16-bit EPROM or
processing units, a RISC processor, a vector engine, and
Flash EPROM; automatic firmware updating of Flash
supplemental hardware resources for implementing special-
EPROM through DVD loader
ized encoding and decoding tasks in the device architec-
tures. All of these resources are interconnected with two Video
separate data buses, each with its own DMA unit and inter-
Built-in NTSC/PAL encoder includes field-adaptive de
face to external memory. The processing units enable
interlacing for progressive scan video output for clearer
simultaneous parallel execution of system commands and
and more stable display (ES6028 and ES6038 Only)
data processing.
Macrovision 7.1 and Macrovision AGC 1.03 compliant
Both the RISC processor and vector engine are indepen-
video outputs for 480-pixel progressive scan and for
dently programmable. Each has its own on-chip cache
NTSC/PAL interlaced video
memory. The RISC processor and its associated hardware
units perform bit stream parsing, control audio data output, Four built-in 10-bit Video DACs provide simultaneous
transfer video and audio data to the vector engine and ser- video outputs of composite and S-video, or composite and
vice system control and housekeeping functions. The vector YUV; supports selectable 8-bit CCIR 601 4:2:2 YUV out-
engine and associated hardware units perform audio and puts
video microcode processing required by A/V standards such 8-bit On-Screen Display (OSD) controller with 3-bit blend-
as Dolby Digital TM, DTS TM, MPEG and JPEG. These ing provides display with 256 colors in 8 degrees of trans-
processing tasks include audio DSP, video motion compen- parency
sation and estimation, loop filtering, discrete cosine trans- On-chip Subpicture Unit (SPU) decoder supports karaoke
forms (DCT) and inverse DCT, quantization and inverse lyric, subtitles, and EIA-608 compliant Line 21 Captioning
quantization. Video error concealment, motion zoom and pan and
The Vibratto DVD processors support both JPEG/MP3 NTSC to PAL and PAL to NTSC conversion supported
audio playback and the Kodak PictureCD JPEG display for-
mat. These new features allow Picture CDs created with Audio
images and voiceovers from digital cameras to be enjoyed Dolby Digital (AC-3), DVD-Audio, Pro Logic, DTS, MPEG-
in a DVD player or Home Theater System. All of the Vibrat- 1 layer 2 and 3 Audio (MP3), and High-Definition Compat-
to DVD processors support both parallel and serial DVD ible Digital.... (HDCD) decoding
loader interfaces for system MPEG A/V data stream input, On-chip Dolby Digital (AC-3) and DTS 5.1 channel decod-
industry standard-I 2 S bus for audio data input and output, ing and output (ES6018/28/38 Only)
direct system EPROM and SDRAM access for high-speed
Dolby Digital and DTS S/PDIF digital audio output.
command fetching and audio/video data buffering and pro-
cessing. The Vibratto DVD processors are available in 208- Dolby Digital Class A, DTS, and HDCD certified
pin Plastic Quad Flat Pack (PQFP) device packages. Meridian Lossless Packing.... (MLP) decoding and Linear
PCM for DVD-Audio (ES6038 Only)
FEATURES
60
DCI
ATAPI
SDRAM
8 MB
EEPROM
AUX[3]/IOR#
AUX[2]/IOW#
CAMIN1
CAMIN0
LWRHL#
LCS0#
VEE
VEE
VEE
VEE
VEE
VEE
LCS3#
LCS2#
LCS1#
LOE#
VCC
LWRLL#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HA2 /AUX4[4]
AUX[7]
AUX[6]
AUX[5]
AUX[4]
AUX[1]
AUX[0]
LD15
LD14
LD13
LD12
LD10
LA3
LA2
LA1
LA0
LD9
LD8
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
LD11
ROM/Flash
DVD drive
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VEE 1 156 VSS
LA4 2 155 HA1/AUX4[3]
LA5 3 154 HA0/AUX4[2]
Compact FlashUDE
TVM
LA8 6 151 HIOCS16#/CAMCLK/AUX3[4]
LA9 7 150 HRD#/DCI_ACK#/AUX4[6]
VSS 8
SYSTEM BLOCK DIAGRAM
149 HWR#/DCI_CLK/AUX4[5]
VSTEM
VCC 9 148 VEE
LA10 10 147 VSS
LA11 11 146 HIORDY/AUX3[3]
LA12 12 145 HRST#/AUX3[5]
LA13 13 144 HIRQ/DCI_ERR#/AUX4[7]
LA14 14 143 HRRQ#/AUX4[0]
LA15 15 142 HWRQ#/DCI_REQ#/AUX4[1]
LA16 16 141 HD15/AUX2[7]/IR
VSS 17 140 HD14/AUX2[6]/SQSI
VEE 18 139 VCC
Vibratto
LA17 19 138 VSS

LA18 20 137 HD13/AUX2[5]/SP
LA19 21 136 HD12/AUX2[4]/C2PO
LA20 22 135 HD11/AUX2[3]//IRQ
LA21 23 134 HD10/AUX2[2]/SQSK
RESET# 24 133 HD9/AUX2[1]/SQSO
TDMDX/RSEL 25 132 HD8/DCI_FDS#/AUX2[0]/VFD_CLk
VSS 26 131 HD7/DCI7/AUX1[7]/VFD_DIN
VEE 27 130 VEE
61
TDMDR 28 129 VSS
TDMCLK 29 128 HD6/DCI6/AUX1[6]/VFD_DOUT
TDMFS 30 127 HD5/DCI5/AUX1[5]
Video
Audio
TDMTSC# 31 126 HD4/DCI4/AUX1[4]

TWS/SEL_PLL2 32 125 HD3/DCI3/AUX1[3]
TSD0/SEL_PLL0 33 124 HD2/DCI2/AUX1[2]
ES6008/18/28/38
VSS 34 HD1/DCI1/AUX1[1]
123
VCC 35 HD0/DCI0/AUX1[0]
122
208-Pin PQFP Package

TSD1/SEL_PLL1 36 VCC
121
TSD2 37 VSS
120
TSD3 38 HSYNC#/CAMIN7/AUX3[0]
119
VFD
MCLK 39 VSYNC#/CAMIN6/AUX3[1]
118
DAC
TBCK 40 PCLKQSCN/CAMIN5/AUX3[2]
117
SPDIF/PLL3 41 PCLK2XSCN/CAMIN4
116
NC 42
Driver
115 YUV7/CAMIN3
or DTS
VSS 43 YUV6/VDAC
114
VCC 44 YUV5/YDAC
113
RSD 45 VSS
112
5.1 Audio
Audio S/PDIF Out
RWS 46 111 ADVEE

RBCK 47 110 YUV4/RSET
NC 48 109 YUV3/COMP
XIN 49 108 YUV2/CDAC
XOUT 50 107 YUV1/VREF
AVEE 51 106 YUV0/CAMIN2/UDAC
VSS 52 105 DCLK
57
100
101
102
103
104
91
93
94
96
53
54
55
56
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
92
95
97
98
99
VEE
VEE
VEE
VEE
VEE
VEE
DB0
DB1
DB2
DB3
DB4
DB5
VCC
DB6
DB7
DB8
DB9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TV
DQM
DB10
DB12
DB13
DB14
DB15
DB11
DSCK
DWE#
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DCS1#
DCS0#
DCAS#
DRAS#
DMA10
DMA11
DMBS1
DMBS0
DOE#/DSCK_EN
VFD Panel
Speakers or
A/V Receiver
ES60X8 PIN DESCRIPTION
Table 1 ES60x8 Pin Description

Name Number I/O Definition
VEE 1,18, 27, 59, 68,I I/O power supply.
75, 92, 99, 104,
130, 148, 157,
159, 164, 183,
193, 201
VSS 8, 17, 26, 34, 43,
I Ground.
52, 60, 67, 76,
84, 91, 98, 103,
112, 120, 129,
138, 147, 156,
163, 171, 177,
184, 192, 200,
208
LA[21:0] 23:19, 16:10,O Device address output.
7:2, 207:204
VCC 9, 35, 44, 83, I Core power supply.
121, 139, 172
RESET# 24 I Reset input, active low.
TDMDX O TDM transmit data.
RSEL I ROM Select.
25
RSEL Selection
0 16-bit ROM
1 8-bit ROM
TDMDR 28 I TDM receive data.

TDMCLK 29 I TDM clock input.
TDMFS 30 I TDM frame sync.
TDMTSC# 31 O TDM output enable.
TWS O Audio transmit frame sync.
SEL_PLL2 I System and DSCK output clock frequency selection is made at the
RESET#. The matrix below lists the available clock frequencies an
PLL bit settings.
32
SEL_PLL2 SEL_PLL1 SEL_PLL0 Clock Type
0 0 0 VCO off.
0 0 1 DCLK
0 1 0 Bypass mode
0 1 1 DCLK x 2
1 0 0 DCLK x 4.5
1 0 1 DCLK x 3
1 1 0 DCLK x 3.5z
1 1 1 DCLK x 4
TSD0 O Audio transmit serial data port 0.

SEL_PLL0 33 I Refer to the description and matrix for SEL_PLL2 pin 32.
TSD1 O Audio transmit serial data port 1.
SEL_PLL1 36 I Refer to the description and matrix for SEL_PLL2 pin 32.
TSD[2] 37 O Audio transmit serial data output 2.
TSD[3] 38 O Audio transmit serial data output 3.
62
Table 1 ES60x8 Pin Description (Continued)

MCLK 39 I/O Audio master clock for audio DAC.
TBCK 40 O Audio transmit bit clock.
SPDIF O S/PDIF output.
SEL_PLL3 I Clock source select.
41
SEL_PLL3 Clock Source
0 Crystal oscillator
1 DCLK input
NC 42, 48 No connect pins. Leave open.

RSD 45 I Audio receive serial data.
RWS 46 I Audio receive frame sync.
RBCK 47 I Audio receive bit clock.
XIN 49 I Crystal input.
XOUT 50 O Crystal output.
AVEE 51 I Analog power for PLL.
DMA[11:0] 66:61, 58:53 O DRAM address bus [11:0].
DCAS# 69 O DRAM column address strobe.
DOE# 70 O DRAM output enable.
DSCK_EN O DRAM clock enable.
DWE# 71 O DRAM write enable.
DRAS# 72 O DRAM row address strobe.
DMBS0 73 O SDRAM bank select 0.
DMBS1 74 O SDRAM bank select 1.
DB[15:0] 96:93, 90:85,I/O DRAM data bus [15:0].
82:77
DCS[1:0]# 97,100 O SDRAM chip select [1:0].
DQM 101 O Data input/output mask.
DSCK 102 O Output clock to SDRAM.
DCLK 105 I 27 MHz clock input to PLL.
YUV0 O YUV0 pixel output data.
CAMIN2 I Camera input 2.
UDAC O Video DAC output.
Mode YDAC UDAC VDAC CDAC

A Y C Composite C
B Y Composite Composite C
C Y U Composite V
D Y U C V
106
Y: Luma component for YUV and Y/C processing.

C: Chrominance signal for Y/C processing.
U: Chrominance component signal for YUV mode.
V: Chrominance component signal for YUV mode.
63
Table 1 ES60x8 Pin Description (Continued)

YUV1 107 O YUV1 pixel output data.
VREF I Internal voltage reference to video DAC. Bypass toFground
capacitor.
with
YUV2 O YUV2 pixel output data.
CDAC 108 O Video DAC output. Refer to description and matrix for UDAC pin 1
COMP I F capacitor.
Compensation input. Bypass to ADVEE with 0.1
RSET I DAC current adjustment resistor input.
ADVEE 111 I Analog power for video DAC.
YDAC O Video DAC output. Refer to description and matrix for UDAC pin 1
VDAC O Video DAC output. Refer to description and matrix for UDAC pin 1
CAMIN3 I Camera YUV 3.
PCLK2XSCN 116 I/O 27-MHz video output pixel clock.
PCLKQSCN 117 O 13.5-MHz video output pixel clock.
VSYNC# 118 I/O Vertical sync, active low.
HSYNC# 119 I/O Horizontal sync, active low.
HD[5:0] I/O Host data I/O [5:0].
DCI[5:0] 127:122 I/O DVD channel data I/O [5:0].
AUX1[5:0] I/O Aux1 data I/O [5:0].
HD[6] I/O Host data I/O [6].
DCI[6] I/O DVD channel data I/O [6].
128
AUX1[6] I/O Aux1 data I/O [6].
VFD_DOUT I VFD data output.
HD[7] I/O Host data I/O [7].
DCI[7] I/O DVD channel data I/O [7].
131
AUX1[7] I/O Aux1 data I/O [7:0].
VFD_DIN I VFD data input.
HD[8] I/O Host data bus 8.
DCI_FDS# I/O DVD input sector start.
132
AUX2[0] I/O Aux2 data I/O 0.
VFD_CLK I VFD clock input.
HD[9] I/O Host data bus line 9.
AUX2[1] 133 I/O Aux2 data I/O [1] when selected.
SQSQ I Subcode-Q data.
HD[10] I/O Host data bus line10.
AUX2[2] 134 I/O Aux2 data I/O [2] when selected.
SQSK I Subcode-Q clock.
64

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SERVICE MANUAL

Please follow the assembly instructions

1. TECHNICAL SPECIFICATIONS, CONNECTIONS AND

Tuning System : PLL

Audio Output (RMS) : 2 x 2.5 W

I- Audio output 1. right channel 0.5 VRMS/<l k 0

CHASSIS OVERVIEW 1- FRONT CABINET 002

14 NEAT CTV 002 1- FRONT CABINET 002

2. SAFETY INSTRUCTIONS AND WARNINGS

AV STATUS A3-1 11 47 VERT -1 B OSD A2-5 15 MUTE_DVD

KEYB A7-1 V_OSD A7-1 V_AMP A2 -2

A5 POWER SUPPLY WP0 A6 HORIZONTAL A10 AV INTERFACE

6. FAULT TRACING DIAGRAM-POWER SUPPLY

Switched mode power

YES Start-up voltage

8. SERVICE MENU AND BASIC ADJUSTMENTS

8.1 OPTION BYTES

OPTION 1: MODEL CONFIGURATION

Reserved bits must be set to 0

a- PLL Pattern generator for Secam L'

8.2 GEOMETRY ADJUSTMENT

Enter service menu and select the GEOMETRY settings

Enter the G2 menu in the service mode

Apply Dark gray pattern (at 10 IRE)

PIF adjustment for BG/DK/L systems:

PIF adjustment for L' system:

8.6 HOTEL MODE

8.7 SYSTEM VOLTAGE ADJUSTMENT

Applicable Discs Format

Disc Type Description

Disc Loading Mode

9.2 MECHANICAL AND ELECTRICAL

ITEM PIN NO. DESCRIPTION

Signal Pin No. Pin Type Description

DA2 36 I Driver Address Bus-Bit 2

DASP- 39 I /O Driver Activity/Driver I Present

DD0 17 I /O Driver Data Bus-bit 0

DD1 15 I /O Driver Data Bus-bit 1

DD2 13 I /O Driver Data Bus-bit 2

DD3 11 I /O Driver Data Bus-bit 3

DD4 9 I /O Driver Data Bus-bit 4

DD5 7 I /O Driver Data Bus-bit 5

DD6 5 I /O Driver Data Bus-bit 6

DD7 3 I /O Driver Data Bus-bit 7

DD8 4 I /O Driver Data Bus-bit 8

DD9 6 I /O Driver Data Bus-bit 9

DD10 8 I /O Driver Data Bus-bit 10

DD11 10 I /O Driver Data Bus-bit 11

DD12 12 I /O Driver Data Bus-bit 12

DD13 14 I /O Driver Data Bus-bit 13

DD14 16 I /O Driver Data Bus-bit 14

DD15 18 I /O Driver Data Bus-bit 15

DIOR 25 I Driver I/O Read

DIOW- 23 I Driver I/O Write

DMACK- 29 I DMA Acknowledge

DMARQ- 21 O Driver Request

INTRQ 31 O Driver 16Bit I/O

IOCS16 32 O Driver Interrupt

IORDY 27 O I/O Channel Ready

PDIAG- 34 I/ O Passed Diagnostics

RESET- 1 I Driver Reset

CSEL 28 Cable Select

KEYPIN 20 Keying Pin on Interface Connector