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Vol. 68, July 2009,KUNDU & DAS: MICROPROCESSOR-BASED SYSTEM FOR THREE-PHASE AC SUPPLY
pp. 597-604 597
A prototype detection system based on 8085 microprocessor / 8751 microcontroller has been developed for identification
of phase sequence and detection of phase unbalance. System principle compares self-generating code by hardware circuit with
pre-defined specific codes corresponding to positive and negative sequences for successful match in each measuring cycle.
System is also capable in detecting phase unbalance, if any. Rule based intricate software algorithm is developed and operates
within a cycle. Processor generates signals for detecting phase sequence and phase unbalance up to a recommended value.
cycle of three phases and generation of 8-bit binary code signals R, Y and B, respectively. In this program, variable
corresponding to sequence of appearance of self FLAG is reset to zero initially. After entering into
generated three 3-bit binary code corresponding to three measuring cycle (FLAG = 0), processor goes on
phase signals with either positive or negative sequence; incrementing timer variables (T1, T2 and T3) as software
ii) Measurement of time count corresponding to positive counters as long as timer status variables (TFLAG1,
half cycle of each of three phase signals and computation TFLAG2 and TFLAG3) are all reset to zero.
of two differential time counts between first and second Occurrence of leading edge of any one of three
zero crossing time instants and second and third zero rectangular wave signals (R, Y and B) will result a
crossing time instants; iii) Comparison of 8-bit code with narrow pulse (duration, 1 s) through mono shot circuits,
pre-assigned elements of array code tables stored in the producing interrupt request signal input to RST-7.5 for
system memory for detection of phase sequence and microprocessor 8085 or INTR for microcontroller 8751.
checking for equality condition of pre-assigned time Interrupt request signal activates ISS, which sets variable
counts proportional to phase differences in two FLAG to 1 so as to give signal to main program regarding
consecutive phases of three phase ac signals; and iv) generation of 3-bit code. ISS also saves code into variable
Generation of signals for indicating positive or negative TCODE via input port lines (P0, P1 and P2). Main
phase sequence and any phase unbalance. program concatenates 3-bit codes serially, which is
Algorithm of software can be divided into two parts generated in a given sequence and also stores resultant
[Main program and Interrupt Service Subroutine (ISS)]. code in variable CODE. Cumulative sum of all 3-bit codes
Microprocessor / microcontroller initializes all timer in a given sequence is also computed and stored into
variables (T1, T2 and T3) with zero values. Three variable SCODE. In each time, 3-bit code is generated
variables (TFLAG1, TFLAG2 and TFLAG3) are used at intermediate stage of given sequence. Variable FLAG
as timer status variables for controlling operation of three is reset to zero. One of the three timer status variables
software timers. Initially, these variables are set to enable (TFLAG1, TFLAG2 and TFLAG3) is reset to zero
timers at beginning of measuring cycle. Variable TCODE depending on the value of generated 3-bit code in variable
is used to store 3-bit binary code, which is generated at TCODE so that incremental value of content of
the occurrence of next timing instants of leading edge of appropriate timer variable (T1, T2 and T3) ceases. While
rectangular wave signals (R*, Y* and B*). Variable comparing content of variable SCODE with 0E H,
CODE is used to store 8-bit code generated at the end processor exit from measuring cycle and disables interrupt
of measuring cycle. Variable SCODE is used to store system. In subsequent phase of algorithm, content of
cumulative sum of the content in variable TCODE in a variable CODE is compared with all elements of two
given measuring cycle. array code tables [TABLE1 (I) and TABLE2 (I) (I = 1,
For any phase sequence [R-Y-B (Fig. 3) or R-B-Y 2, 3)] for successful match. TABLE1 (I) refers to three
(Fig. 4)], only three possible combinations of 3-bit code 3-bit codes (73H, 9DH, EFH) for positive sequence case
(110, 101 and 011) may occur in sequence with six possible and TABLE2 (I) to 3-bit code (ABH, 5EH, F5H) for
permutations [a) for positive sequence: i) 101, 110, 011; negative sequence case. Accordingly, variable SEQ is
ii) 110, 011, 101; iii) 011, 101, 110; and b) for negative set to 1 for negative sequence case or reset to 0 for
sequence: 110, 101, 011; ii) 101, 011, 110; iii) 011, 110, positive sequence case.
101]. In occurrence of any one of the above possible Phase unbalance is detected by comparing relative
permutations, sequence terminates with generation of counts stored in two variables (PH1 and PH2). These
next 3-bit code, which is identical with first 3-bit code in relative counts are proportional to two-phase angle
a given sequence. In any possible combination, sum of differences among R-Y, Y-B and B-R signal pairs in
three 3-bit codes for any sequence is always 0EH. case of positive sequence and R-B, B-Y and Y-R signal
Variable SCODE is used to store this sum at the end of pairs in case of negative sequence. According to wave
measuring cycle. FLAG is used by main program for forms of R*, Y* and B* signals for both positive and
detecting occurrence of leading edge generated by negative sequences in timing diagram, software has been
narrow positive pulse by three mono shot circuits developed to compute count values for PH1 and PH2
(MV-1, MV-2 and MV-3). These leading edge may from count values stored into timer variables (T1, T2
occur at positive zero crossing instant of three phase ac and T3) by following a set of rules given as:
600 J SCI IND RES VOL 68 JULY 2009
Fig. 3-Timing waveform of three ac signals, ZCD outputs and monoshot outputs at positive (R-Y-B) sequence
Fig. 4-Timing waveform of three ac signals, ZCD outputs and monoshot outputs at negative (R-B-Y) sequence
KUNDU & DAS: MICROPROCESSOR-BASED SYSTEM FOR THREE-PHASE AC SUPPLY 601
602 J SCI IND RES VOL 68 JULY 2009
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