/BATCH

! /COM,ANSYS RELEASE 7.1 UP20030501 01:14:29 02/18/2004

/input,start71,ans,'C:\Programmer\Ansys Inc\v71\ANSYS\apdl\',,,,,,,,,,,,,,,,1

!*

/PREP7

!*

K,1,,,,

K,2,-1000,,,

K,3,1000,,,

!*

K,21,-200,,,

K,31,200,,,

!*

K,4,-1000,1000,-1000,

K,5,1000,1000,-1000,

K,6,-1000,1000,1000,

K,7,1000,1000,1000,

!* Base

!*

DIA_MEMBER1=80

LSTR, 2, 21

LSTR, 21, 1

LSTR, 1, 31

LSTR, 31, 3

!*

!* Chords

!*

DIA_MEMBER2=60

LSTR, 1, 4

LSTR, 1, 5
LSTR, 1, 6

LSTR, 1, 7

LDIV,5,0.15, ,2,0

LDIV,6,0.15, ,2,0

LDIV,7,0.15, ,2,0

LDIV,8,0.15, ,2,0

!*

!*

WPCSYS,-1

LWPL,-1,4,1

PCIRC,DIA_MEMBER1, ,0,360,

!*

WPCSYS,-1

LWPL,-1,9,1

PCIRC,DIA_MEMBER2, ,0,360,

!*

WPCSYS,-1

LWPL,-1,10,1

PCIRC,DIA_MEMBER2, ,0,360,

!*

WPCSYS,-1

LWPL,-1,11,1

PCIRC,DIA_MEMBER2, ,0,360,

!*

WPCSYS,-1

LWPL,-1,12,1

PCIRC,DIA_MEMBER2, ,0,360,

!*

!* Solid modeling

!*

VDRAG,1,,,,,,4,3,2,1
VDRAG,2,,,,,,9,5

VDRAG,3,,,,,,10,6

VDRAG,4,,,,,,11,7

VDRAG,5,,,,,,12,8

!*

!*VADD,ALL