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2Vol9No2 PDF
2Vol9No2 PDF
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ABSTRACT
Multilevel inverter (MLI) is a new breed of power converter that is suited for high power applications. The
various topologies of MLI are diode clamped, capacitor clamped and cascaded H-bridge inverter[1].This
paper focuses on cascaded MLI using two unequal dc sources in order to produce a seven-level output. The
proposed topology reduces the number of dc sources and switching elements. Various modulation methods
have been reported for the MLI in the literature [2], but this paper emphasis on unipolar inverted sine PWM
(ISPWM) technique. The unipolar Inverted Sine Carrier Pulse-Width Modulation (ISCPWM) technique
reduces the number of carriers and enhances the fundamental output voltage particularly at lower
modulation index ranges with reduction in Total Harmonic Distortion (THD), and switching losses. The
performance evaluation of the proposed PWM strategy for three-phase multilevel inverter is done using
MATLAB and the optimum switching frequency with minimized total harmonic distortion and switching
loss is determined. The gating signals are generated using Spartan FPGA processor as it provides better
resolution. The simulation results are verified experimentally.
Keywords: Asymmetric Multilevel inverter, Unipolar ISPWM, THD & Switching loss.
1. INTRODUCTION
carriers are needed [4]. But this paper employs a
Multi-level inverters have become an PWM technique which uses only three inverted
effective and practical solution for increasing sine wave carriers for producing a seven-level
power and reducing harmonics of AC output. The ISPWM technique has a better
waveforms. By synthesizing the AC output spectral quality and a higher fundamental
voltage from several levels of DC voltages, component compared to the conventional
staircase output waveform can be produced. This sinusoidal PWM without any pulse dropping [5].
allows for higher output voltage and Also, there is a reduction in the total harmonic
simultaneously lowers the stress on the distortion (THD) and switching losses.
semiconductor device. Among the various
topologies, asymmetric cascaded MLI is An inverted sine wave of high switching
employed as it requires two unequal dc sources frequency is taken as a carrier wave and is
for producing a seven-level output [3]. In
addition, this topology provides low switching compared with that of the reference sine wave.
losses and high conversion efficiency. The The pulses are generated whenever the amplitude
modulation strategy employed in this paper is the of the reference sine wave is greater than that of
phase disposition (PD) based unipolar inverted the inverted sine carrier wave.PIC
sine PWM (ISPWM) technique. In the microcontroller is used to obtain the gating
conventional PD-PWM method, triangular wave pattern for the individual IGBTS. The total
is used as carrier wherein they are replaced by harmonic distortion for the different values of
inverted sine carrier waves in this model. In switching frequencies is obtained and is found to
order to produce a m-level output,generally(m-1)
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be lesser than the conventional method. The combination of Va and Vb that has seven
switching losses are calculated for various possible values 0, + Va, + Vb, (Va + Vb), - Va, -
switching frequencies, and from the THD and Vb and (-Va - Vb).The output voltage waveforms
switching loss values, the optimum switching are shown in Figs. 2,3and 4.
frequency is obtained. The output voltage
waveform which comprises of seven levels is
obtained by modulating the inverted sine carriers
with optimum frequency. By employing this new
modulation technique it has been proved that the
fundamental voltage is improved throughout the
working range and is greater than the voltage
obtained using conventional method which
employs triangular carriers for modulation.
2. ASYMMETRIC CASCADED
MULTILEVEL INVERTER
Flexibility to enhance
Fig 2. Output voltage of the First Bridge
Reduction in complexity and cost of MLI.
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The advantages of unipolar inverted sine carrier The gating signals for the seven level inverter
employing the ISPWM technique is generated
are:
using FPGA processor.
150
Fig.7.Phase Voltage of Asymmetric MLI
100
A m p litu d e ( V )
50
0
0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 0.01
Time(Sec)
Fig.6.Carrier and Inverted Sine Waveforms for Fig.8. Line Line Voltage of Asymmetric
Unipolar ISPWM Technique. MLI.
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The variation of total harmonic distortion (THD) equations governing the switching loss is given
and fundamental voltage with the change in the by
switching frequency is shown in the figure. The ton
THD decreases with increase in switching E on = P (t) dt (1)
frequency and the fundamental component of 0
voltage increases with increase in switching toff
E off = P (t) dt (2)
frequency and is higher for inverted sine carrier 0
compared to the conventional triangular E sw = E + E
on off (3)
carrier[10,11].
1
E sw = V . I . (t on + t off ) (4)
2 CE C
P sw = f sw E sw (5)
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REFERENCES
7. CONCLUSION
[5]. P.Dananjayan,S.Jeevananthan, R.Nandhakumar
Inverted Sine Carrier for Fundamental
From the simulation and experimental Fortification in PWM Inverters and FPGA Based
results, several features of the proposed Implementations. Serbian Journal of Electrical
modulation strategy from the aspect of line Engineering, Vol. 4, No. 2, pp. 171-187, November
voltage have been identified. The line voltage 2007.
yields better spectral performance for unipolar
ISPWM compared to the conventional PWM and [6]. Dr.B.L.Mathur and R.Seyezhai Harmonic
this reduces the need for output filter. By Evaluation of Multicarrier PWM Techniques for
employing this new technique it has been proved Cascaded Multilevel Inverter. International
that the fundamental voltage is improved Conference on Electrical Engineering Applications
ICEEA 2008, Algeria.
throughout the working range and is greater than
the voltage obtained using conventional method
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Journal of Theoretical and Applied Information Technology
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[7]. M.Calais, L. J. Borle and V.G. Agelidis, [16]. Maswood, A.I. A switching loss study in
Analysis of Multicarrier PWM Methods for a SPWM IGBT inverter, Power and Energy
Single-phase Five Level Inverter, in Proc. 32nd Conference, PECon 2008, IEEE 2nd
IEEE Power Electronics Specialists International, pp. 609-613, 2008.
Conference,PESC01,July 2001,pp 1351-1356.
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