You are on page 1of 1
Save trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.viuresource.com 10cs: eventh Semester B.E. Degree Examination, June/July 2014 Advanced Compute Architectures Time: 3 hrs. Max. Mfrks: 10 Note: Answer FIVE full questions, selecting atleast TWO question from each part PART-A, @ ich lead 10 (ao starks) 1 & Define computer architecture. List and explain four important te S, lc, (02 Marks) ‘the improvements in computer system. ts Fin th numero is per 300 ram 0m) water fra de ig ©. Dene Amdahs av, Dere an eamesion fr CPU cock {tana oun sealer ad pare ee ‘oan 2. Listhen major tres of ising. Explin cgay netting data bazads sll oy heuaie aa bs Enki explaa bow the MIPS nstractions can be ime tot fv ehh eis Tha ad ep tan ofeach Regi camara 3. a, Whats insruton level pralism? E f= depenience using code fragment ans pin he ste in2—bit pe Fox dyraric rach rediin. oe rs) ee Mire of MIPS foatg punk wing Tormoule ager eon! oo Waren aga pcre vole in enceutng inition wing een tases me Wh stench rpm Wilenct diagram, expan te eps when using branch tapet buco pic Maa Rsiae qos) PART 5 a with 100 processors what fraction of the original computation ee oma) » Bo Prcrnceptocolswed fr enforcing coherence. osu) < oo fase ace br a darbuted nenmry aublpevcenr stan ond takin dagen ae ee in any fu basi cache opinion eho, (me) diag coglan th renaen Sue ofa aes tension. U0 ars) 7. & List any five advanced optimizations of cache performance and explain briefly the eomplier optifization to reduce miss rate. (10 Marks) Explain briefly how memory protection is enforced via viral memory and via virtual ines, (do Mtarks) Explain the architecture of LA64 intel processor and also the prediction and speculation support provided. (10 Maris) ', Write short notes on benchmarks. (05 Marks) . Explain the internal organization of 64M bit DRAM (oS Marks) BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Viuresource Go Green initiative

You might also like