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--use IEEE.NUMERIC_STD.ALL;
library UNISIM;
use UNISIM.VComponents.all;
entity MO_compteur is
Port ( H : in STD_LOGIC;
UN : in STD_LOGIC;
end MO_compteur;
signal I : STD_LOGIC_VECTOR(Q'range);
begin
process(H, UN)
begin
I <="000";
end if;
I <=I + 1;
end if;
end process;
Q <= I;
end Behavioral;