Dept.

of EEE, CUET
EEE 366 - Digital Electronics Sessional

Experiment No.: 13
Experiment Name: Study of shift register in all its modes
OBJECTIVES:
To design and implement
(i) Serial in serial out
(ii) Serial in parallel out
(iii) Parallel in serial out
(iv) Parallel in parallel out

REQUIRED ICs:
1. D Flip flop (7474)
2. OR Gate (7432)
3. Shift register (7495)

EXPERIMENTAL PROCEDURE:
For all ICs in this experiment; Vcc = +5 V to pin 14, 0 (ground) to pin 7.
1. Make the connections as per the circuit diagram.
2. Switch on VCC and apply various combinations of input according to truth table.
3. Note down the output readings for different modes of shift register for different
combinations of inputs.

Serial In Serial Out:

Truth table of SISO

CLK Serial in Serial out
1 1
2 0
3 0
4 1
5 X
6 X
7 X

Prepared by Muhammad Asad Rahman Page 1 of 3

Supervised by Dr. Quazi Delwar Hossain
Dept. of EEE, CUET
EEE 366 - Digital Electronics Sessional

Serial In Parallel Out:

Truth table of SIPO

Output
CLK Data
Q1 Q2 Q3 Q4
1 1
2 0
3 0
4 1

Parallel In Serial Out:

Truth table of PISO

CLK Q3 Q2 Q1 Q0 O/P
0 1 0 0 1
1 0 0 0 0
2 0 0 0 0
3 0 0 0 0

Prepared by Muhammad Asad Rahman Page 2 of 3

Supervised by Dr. Quazi Delwar Hossain
Dept. of EEE, CUET
EEE 366 - Digital Electronics Sessional

Parallel In Parallel Out:

Truth table of PIPO

Data input Output
CLK
DA DB DC DD QA QB QC QD
1 1 0 0 1
2 1 0 1 0

TASK:
1. Implement all the modes using shift register 7495.
2. Give data 1010 as input in Parallel in serial out register and use the obtained output as
input to Serial in parallel out register. Write truth table in terms of input and final
output.

REPORT:
1. For each mode of shift register experimented above, draw the circuit diagram and
show the measured truth table of your circuit. Verify this truth table.
2. Answer all the questions given in the sheet.
3. Discussion.

Prepared by Muhammad Asad Rahman Page 3 of 3

Supervised by Dr. Quazi Delwar Hossain