Save trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.vturesource.com ws [TTT a ‘Third Semester B.E. Degree Examination, June/July 2013 Logic Design ‘Time: 3 hrs. Max. 100 Note: Answer FIVE full questions, selecting @ at least TWO questions from each PART. A 1a. Wet the truth able ofthe logic circuit having 3 inputs A. as Y = ABC + ABC. Also simplify the expreion asin i 3 : Fouiput expressed and implement the logic cicit using NAND gates, (ees) b. Name universal gates, Realize basic gates using NANBBRges. tosatartsy ©. Explain postive and negative logic (ust 2 a. Give sum-of-product and product of sum cit for, F(A.B.C.D)= Som 66.8.9. 10,15. 12, Baht (os sats Find essential prime implicants for ycapression by using Quine-MeClunky method. 1(W.X.Y.2) = Fm, 3.6.7. Seg OS 5 (12 aes) 3 a Design 1610 1 multiplexes ust 8 Bt multiplexer and one 2 ~to~ 1 naskiptexer (06 Marks) b. Explain n-bit magnitude s (08 Marks) © Design 7-segments ve BLA (06 Marks) 4a, Explain Schimmit (06 Marks) 1. Give sate transi yn of SR. DIK and T FlipFhops (08 Marks} © (oo Marks 5 (#6 Macks 6 Marks) (os Macks) 6 a a0 sacks) Explain digital clock with block diagram. (lo sars) « 1of2 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiativeSave trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.vturesource.com 7. Reduce state wansition diagram (Moore model) Fig. Q7 (a) given below by. i) Row elimination method and i) Implication table method, with partition table, Fig. Q7 (a) b. Design an asynchronous sequential logic circuit for state tri sam shown below Fig. Q7 (). (08 Marks) Explain with logie dingram 3-bit sinvult Explain with neat diagram, single ~ si @ < x (10 Marks) (10 Marks) 2of2 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiative