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Fundamentals of Microelectronics

CH1 Why Microelectronics?

CH2 Basic Physics of Semiconductors

CH3 Diode Circuits

CH4 Physics of Bipolar Transistors

CH5 Bipolar Amplifiers

CH6 Physics of MOS Transistors

CH7 CMOS Amplifiers

CH8 Operational Amplifier As A Black Box

Chapter 7 CMOS Amplifiers

7.1 General Considerations

7.2 Common-Source Stage

7.3 Common-Gate Stage

7.4 Source Follower

7.5 Summary and Additional Examples

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Chapter Outline

CH7 CMOS Amplifiers 3

MOS Biasing

 RV 
VGS = −(V1 −VTH ) + V12 + 2V1 2 DD −VTH 
 R1 + R2 
1
V1 =
W
µnCox RS
L

Voltage at X is determined by VDD, R1, and R2.

VGS can be found using the equation above, and ID can be
found by using the NMOS current equation.
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Self-Biased MOS Stage

I D RD + VGS + RS I D = VDD

The circuit above is analyzed by noting M1 is in saturation

and no potential drop appears across RG.
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Current Sources

When in saturation region, a MOSFET behaves as a current

source.

NMOS draws current from a point to ground (sinks current),
whereas PMOS draws current from VDD to a point (sources
current).
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Common-Source Stage

λ=0
Av = −g m RD
W
Av = − 2µnCox I D RD
L
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Operation in Saturation

RD I D < VDD − (VGS −VTH )

In order to maintain operation in saturation, Vout cannot fall

below Vin by more than one threshold voltage.

The condition above ensures operation in saturation.
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CS Stage with λ =0

Av = − g m RL
Rin = ∞
Rout = RL
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CS Stage with λ ≠ 0

Av = −gm ( RL || rO )
Rin = ∞
Rout = RL || rO

However, Early effect and channel length modulation affect
CE and CS stages in a similar manner.
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CS Gain Variation with Channel Length

W
2µnCox
Av = L ∝ 2µnCoxWL
λ ID ID

Since λ is inversely proportional to L, the voltage gain

actually becomes proportional to the square root of L.
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CS Stage with Current-Source Load

Av = − g m1 (rO1 || rO 2 )
Rout = rO1 || rO 2

To alleviate the headroom problem, an active current-
source load is used.

This is advantageous because a current-source has a high
output resistance and can tolerate a small voltage drop
across it.
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PMOS CS Stage with NMOS as Load

Av = −gm2(rO1 || rO2 )

Similarly, with PMOS as input stage and NMOS as the load,

the voltage gain is the same as before.
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CS Stage with Diode-Connected Load

Av = −gm1 ⋅
1
=−
(W / L)1
gm2 (W / L)2
 1 
Av = −gm1 || rO2 || rO1 
 gm2 

Lower gain, but less dependent on process parameters.
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CS Stage with Diode-Connected PMOS Device

 1 
Av = − g m 2  || ro1 || ro 2 
 g m1 

Note that PMOS circuit symbol is usually drawn with the

source on top of the drain.
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CS Stage with Degeneration

RD
Av = −
1
+ RS
gm
λ =0

Similar to bipolar counterpart, when a CS stage is
degenerated, its gain, I/O impedances, and linearity change.
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Example of CS Stage with Degeneration

RD
Av = −
1 1
+
gm1 gm2

A diode-connected device degenerates a CS stage.
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CS Stage with Gate Resistance

VR = 0
G

Since at low frequencies, the gate conducts no current,

gate resistance does not affect the gain or I/O impedances.

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Output Impedance of CS Stage with Degeneration

rout ≈ gmrO RS + rO

Similar to the bipolar counterpart, degeneration boosts

output impedance.
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Output Impedance Example (I)

 1  1
Rout = rO11+ gm1  +
 gm2  gm2

When 1/gm is parallel with rO2, we often just consider 1/gm.

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Output Impedance Example (II)

Rout ≈ g m1rO1rO 2 + rO1

In this example, the impedance that degenerates the CS

stage is rO, instead of 1/gm in the previous example.
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CS Core with Biasing

R1 || R2 − RD R1 || R2
Av = ⋅ , Av = − gm RD
RG + R1 || R2 1 + R RG + R1 || R2
S
gm

Degeneration is used to stabilize bias point, and a bypass
capacitor can be used to obtain a larger small-signal
voltage gain at the frequency of interest.
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Common-Gate Stage

Av = gmRD

Common-gate stage is similar to common-base stage: a

rise in input causes a rise in output. So the gain is positive.
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Signal Levels in CG Stage

In order to maintain M1 in saturation, the signal swing at Vout

cannot fall below Vb-VTH.

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I/O Impedances of CG Stage

1
Rin =
gm λ =0 Rout = RD

The input and output impedances of CG stage are similar

to those of CB stage.
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CG Stage with Source Resistance

RD
Av =
1
+ RS
gm

When a source resistance is present, the voltage gain is
equal to that of a CS stage with degeneration, only positive.
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Generalized CG Behavior

Rout = (1 + g m rO )RS + rO

When a gate resistance is present it does not affect the gain
and I/O impedances since there is no potential drop across
it ( at low frequencies).

The output impedance of a CG stage with source resistance
is identical to that of CS stage with degeneration.
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Example of CG Stage

vout gm1RD   1  
= Rout ≈ gm1rO1 || RS  + rO1  || RD
vin 1 + ( gm1 + gm2 )RS   gm 2  

Diode-connected M2 acts as a resistor to provide the bias

current.
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CG Stage with Biasing

vout R || (1/ gm )
= 3 ⋅ gmRD
vin R3 || (1/ gm ) + RS

R1 and R2 provide gate bias voltage, and R3 provides a path

for DC bias current of M1 to flow to ground.
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Source Follower Stage

Av < 1

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Source Follower Core

vout r || R
= O L
vin 1 +r || R
O L
gm

Similar to the emitter follower, the source follower can be
analyzed as a resistor divider.
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Source Follower Example

rO1 || rO 2
Av =
1
+ rO1 || rO 2
g m1

In this example, M2 acts as a current source.
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Output Resistance of Source Follower

1 1
Rout = || rO || RL ≈ || RL
gm gm

The output impedance of a source follower is relatively low,
whereas the input impedance is infinite ( at low
frequencies); thus, a good candidate as a buffer.
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Source Follower with Biasing

1 W
ID = µnCox (VDD − I DRS −VTH )
2

2 L

RG sets the gate voltage to VDD, whereas RS sets the drain

current.

The quadratic equation above can be solved for ID.

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Supply-Independent Biasing

If Rs is replaced by a current source, drain current ID

becomes independent of supply voltage.
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Example of a CS Stage (I)

 1 
Av = − g m1  || rO1 || rO 2 || rO 3 
 g m3 
1
Rout = || rO1 || rO 2 || rO3
g m3

M1 acts as the input device and M2, M3 as the load.
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Example of a CS Stage (II)

rO2
Av = −
1 1
+ || rO3
gm1 gm3

M1 acts as the input device, M3 as the source resistance,

and M2 as the load.
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Examples of CS and CG Stages

rO 2
Av _ CG =
Av _CS = −gm2 [(1+ gm1rO1 )RS + rO1 ] || rO1 1
+ RS
gm

With the input connected to different locations, the two
circuits, although identical in other aspects, behave
differently.
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Example of a Composite Stage (I)

RD
Av =
1 1
+
gm1 gm2

By replacing the left side with a Thevenin equivalent, and
recognizing the right side is actually a CG stage, the
voltage gain can be easily obtained.
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Example of a Composite Stage (II)

1
|| rO3 || rO4
vout2 g m3
=−
vin 1 1
|| rO 2 +
gm2 gm1

This example shows that by probing different places in a

circuit, different types of output can be obtained.

Vout1 is a result of M1 acting as a source follower whereas
Vout2 is a result of M1 acting as a CS stage with
degeneration.
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