UniPak 2™ 981.0001-001 REV A SEPT 84 Copyright © Data I/O Corporation, 1984, All rights reserved.Data 1/0 has made every attempt to ensure that the information in this document is accurate and complete, However, Data 1/0 assumes no habilty for errors, or for any damages that result from use of this document or the equipment which ft ‘accompanies. Data 1/0 reserves the right to make changes to this document without notice at any time. NOTE Before using the UniPok 2", read section 1.2 for programmer mainfiame compatibility information. Apples to: Enginesing Part Number 90-0059-006TABLE OF CONTENTS SECTION 1. INTRODUCTION 1A OVERVIEW «2... cseeevenerees 1.2 PROGRAMMER COMPATIBILITY 1.3 APPLICATIONS 1.4 SPECIFICATIONS 1.5 FIELD APPLICATION SUPPORT 1.6 WARRANTY. . 1.7 SERVICE 1.8 ORDERING SECTION 2. INSTALLATION 2.1 INSPECTION 2.2 UniPak 2°™ INSTALLATION 2.3 UniPak 2 REMOVAL 2.4 REPACKING FOR SHIPMENT SECTION 3. OPERATION 3.1 OVERVIEW 3.2 POWER UP. 3.3 POWER DOWN 3.4 BASIC OPERATION 3.4.1 Load RAM With Data From Master Device. 3.42 Verity RAM Data Against Master Device Data 3.4.3 Program Device With RAM Data 3.44 Extended Select Functions 3.5 ELECTRONIC IDENTIFIERS. 3,8 FAMILY CODE AND PINOUT CODE SELECTION 3.7 DEVICE INSERTION 3.8 DEVICE REMOVAL SECTION 4, MAINTENANCE/TROUBLESHOOTING/CALIBRATION 4.1 OVERVIEW 4.2 MAINTENANCE 4.2.1 UniPak 2™ Disassembly 4.22 Cleaning 4.23 Inspection 4.24 UniPak 2™ Assembly 4.3 TROUBLESHOOTING 43.1 No System Operation 43.2 Poor Yields. 4.3.3 UniPak 2™ Failure 44 CALIBRATION 4.4.1 DC Calibration 4.4.2 Optional Verity-Voltage Checks 443 Waveform Observation 4.444 Detailed Explanation of the Timing Diagrams. 921-0001 ui M 12 42 12 12 12 12 a4 32 32 32 33 33 34 35 35 35 36 a1 41 “4 43 43 44 44 44 48 ‘410 415 415 416SECTION 5. CIRCUIT DESCRIPTION 5.1 OVERVIEW 5.2 GENERAL ARCHITECTURE 5.2.1 The Link Between the UniPak 2” and the Progamner 8.22 The Busos eg 5.3 COMPONENT LAYOUT. 5.3.1 Motherboard 5.3.2 Waveform Generator 5.3.3 Address Card 5.3.4 Socket Card 5.35 Memory Card APPENDIX A FAMILY AND PINOUT CODES ERROR CODES APPENDIX B TIMING DIAGRAMS, APPENDIX C SCHEMATICS 30:702-1650 Memory Card 30-701-1655 Address Card 30-702-1659 Socket Card 30-702-1681 Motherboard '30-701-1630 Waveform Generator 961-0001 5A 51 5A 54 5A 52 55 56 at Ag et ctLIST OF FIGURES 1-1 Example of a “Modification Status” Sticker 244 UniPak 2° Installation 31 Typical 29 Programmer Operation .. 3.2 Programmer Power Switch Location : 3.3 UniPak 2™ Sockets and Device Installation 41 UniPak 2™ Disassembly. 42 Socketboard Interconnect Cable Disconnect 43 Circuit Board Removal 44 Memory Card Removal 45 Calibration Setup 44 Pin Numbors of Device Sockets 4-7 Adjustment Locations 48 Accessing Calibration Stops 27, 28, 23, 48 Accessing Calibration Steps 27, 28, 29, 4-10 Accessing Calibration Steps 27, 28, 29, 4-11 UniPak 2" Scope Trigger Test Point 4-12 Pin Names by Pinout Code Numbers 4:13 Sample Timing Disgram ‘51 Block Diagram, UniPak 2™ Electronics. 5.2 Principal Components 5.3 Block Diagram, Motherboard ‘5-4 Block Diagram, Waveform Generator 55 Block Diagram, Address Card 5-6 Block Diagram, Socket Card 5:7 Block Diagram, Memory Card | 31 (288 Universal Programme , 31 (System 19) , 34 (Model 1008) sss LIST OF TABLES 1-1 Programmer Compatability on 41 Troubleshooting Chart : 42 Kay Sequence to Access the Calibration Mode. 43 Key Sequence to Fill RAM With Data. 4-4 Measurement Chart 5-1 Pin Functions, Device Bus (at J1) ‘A-1 UniPak 2™ Family and Pinout Codes 961-0001 "1 4-10 415 422 53SECTION 1 INTRODUCTION 1.1 OVERVIEW Data 1/0's UniPak 2 reliably programs over 600 popular MOS and bipolar devices. Values for programming variables, including pinouts, vottage levels and timing, are stored in firmware tables. When you choose the family and pinout codes for a particular device, the programmer uses information in these tables to assemble a specialized ‘programming routine in scratch RAM. This method allows, high-speed operation with minimum fiemware overhead. ‘The UniPak 21 is designed to adapt to the programming requirements of many different devices. Pinout variations ‘are handled by seven device sockets on the UniPak 27 ‘and, in some cases, by adapters which connect to socket 1 oF 2. Specially designed electronic switches allow programming of both bipolar and MOS devices. “To maximize control speed during programming, the UniPak 2° makes extensive use of addressable latches for contra signals, For flexibility in waveform generation, clgita-to-analog converters (DACs) control all major power supplies, with several rise and fll times selected by firmware, 1.2 PROGRAMMER COMPATIBILITY To be compatible with the UniPak 2, your programmer may requite @ hardware and/or firmware update, depending on the model, configuration, and age. ‘The information that folows will help you determine ‘whether your programmer requires updating. If you find that your programmer does require updating, contact your nearest Data I/O Service Center, ‘© System 17-The System 17 must be converted into 2 System 19 with the latest firmware installed and latest hardware modifications. + System 19 Check to determine whether your ‘System 19 contains 2 702-1820 or 702-1960 controler board by performing the folowing steps: 1. Remove the programming pak (section 2.3) 2, Remove the metal shield {i any) shown in figure 2-1 3, Count the number of EPROM firmware sockets located just behind the pak interface connector. If there are four sockets, it is @ 702-1520 board. f there ‘are eight sockets, i is @ 702-1980 boar. MODIFICATION STATUS fo fee Figure 1-1. Example of a “Modification Status" Sticker If your System 19 contains a 702-1820 controler board, check the modification status sticker (figure 1-1) on the bottom of the programmer. Ifthe sticker is not there or If only “1” is marked off, your System 19 requires hardware and firmware updating; contact the nearest Data 1/0 Service Center. If "2" is marked, your System 19 is compatible with the UniPak 2", If your System 19 Contains a 702-1980 controller board, it may require 3 firmware update. To display the configuration number of the firmware in your programmer, key in “SELECT: B2-START". If the configuration number displayed matches the number listed below, your firmware needs updating ‘Model Configuration Number + 990-1902 3509 + 990.1908 cca ‘284 Universal Programmer—To be compatible with the UniPak 2", the 29 programmers must have Rev C of later firmware, To determine the configuration of the firmware in your 29A, key in "SELECT-B2-START" and ‘observe the display. if the hex number matches one listed in table 1-1, your firmware needs to be updated. ‘+298 Universal Prograrmmor— The UniPak 2° is ‘compatible with Rev A or later software. + 100A Production Programmer—To be compatible with the UniPak 2™, the 100A programmers must have Rev E of later firmware, To determine the configuration lof the firmware in yout 100A, key in “SELECT-10" and. ‘observe the display. If the hex number displayed ‘matches one listed in table 1-1, your firmware needs to be updated, ‘Table 1.1. Programmer Compatibility Configuration Model Rev Number 2A A 1ECA, B 20nd 298 twith a Ba ‘computer 8 C008 remote contral) 1008, a ove 8 9405 c DEE 98D 4 81-00011.3 APPLICATIONS Table A-t (in appendix A) lists all the devices that could bbe programmed with the UniPak 2™™ when this manual was published. In many cases when a new device with industry standard pinout is introduced within a manufacturer's family, the UniPak 2™ WILL NOT require @ revision to program it. For some new applications, such as to ‘accommodate a new device family, a firmware update of the UniPak 2™ may be required, The revision number is stamped after the part number (960-0069) along the underside of the top edge of the UniPak 2™™ socket assembly 1.4 SPECIFICATIONS ‘The UniPak 2™ receives its power from the programmer mainframe. Programming waveforms are generated from raw programmer supplies using regulators: Controlled by the programmer's microprocessor. The controling firmware is located on a circuit card within the UniPake 2, ‘The physical and environmental specifications are: + Akitude: Sea level to 3 km (10,000 ft.) * Dimensions: 20.9 x 17.0 x 10.5 cm (82 x 6.7 x 4.2 in.) + Humidity (operating): 90% maximum (noncondensing) * Humigity (storage): 95% maximum (noncondensing) + Temperature (operating): 0 t0 40°C (32 to 104°F) + Temperature (storage): —40 to 55°C (—40 to 131 °F) * Weight: 1.38 kg (3 Ib. 0.5 oz.) 1.5 FIELD APPLICATION SUPPORT Data 1/0 has field applications engincers (FAE's) throughout the world. They can provide additional information about interfacing Data 1/0 products with other equipment and answer questions about equipment. FAE’s are located within the United States at the addresses listed in the back of this manual, For international applications support, contact your nearest Data I/O representative. 12 1.6 WARRANTY Data 1/0 equipment is warranted against defects in materials and workmanship. The warranty period of one year, unless specified otherwise, begins when you receive the equipment. The warranty card inside the back cover of this manual explains the length and conditions of the warranty. For warranty service, contact your nearest Data 1/0 service center. 1.7 SERVICE Data 1/0 maintains service centers throughout the worl, each staffed with factory-tained technicians to provide prompt, quality service, This includes not only repairs, but also calibration of all Data I/O products. A list of all Data 1/0 service centers is located in the back of this manual 1.8 ORDERING To order equipment, contact your Data 1/0 sales representative, Orders must contain the following information: * Description of the equipment (see the latest Data 1/0) price list or contact your sales representative for ‘equipment and part numbers) * Quantity of each item ordered Shipping and biling address of firm, including ZIP code Name of person ordering equipment Purchase order number * Desired method of shipment 961-0001SECTION 2 INSTALLATION 2.1 INSPECTION Your UniPak 2™ was tested both electrically and mechanically before it was shipped, and was carefully packaged to prevent shipping damage. It should, therefore, ative froe of any defect, without marks or scratches, and in pertect operating condition, However, carefully inspect ‘the instrument for any damage that may have occurred in ‘transit. If you note any damage, file a claim with the carrier and notify Data 1/0. 2.2 UniPak 2™ INSTALLATION The UniPak 2™™ may be installed and removed with ‘the programmer's power on; this feature allows you to retain data in RAM during module changes. if the programmer power is turned on before the UniPak 28 is installed, you will hear e beep until the UniPak 2 is installed, Nore Voltage transients can cause device damage. Thus, be sure that all sockets are empty when: * switching power on or off + instaling or removing the UniPak 2™ To install the UniPak 2”, do the following: 1. Slide the UniPak 2" into the opening in the programmer (igure 2-1, 2. Tilt the UniPak 2" up and gently push it back to hook the flange of the UniPek 2" over the back edge of the programmer opening (figure 2-1, a. 24 3, Lower the UniPak 21 into position as shown in figure 2-1, b. 4, Press gently on the front edge of the UniPak 2™ to fensure a good connection (figure 2-1, c) 2.3 UniPak 2™ REMOVAL 1. Check to make sure the programmer is not in the process of an operation. If its, wait until the ‘operation is complete (the action symbol on the display disappears) 2. Check to make sure @ device is not in a socket. If one Is ina socket, remove it as described in section 3.7. 3. Tilt the UniPak 2™ up and gently remove it from the programmer. 2.4 REPACKING FOR SHIPMENT If the UniPak 2™ is to be shipped to Data 1/0 for service or repair, attach a tag to it describing the work required and identifying the owner. In correspondence, idontity the unit by part number, revision level, and name. If the original shipping container isto be used, place the UniPak 27 in the container with the appropriate packing ‘material and seal the container with strong tape. If another container is used, be sure that itis a heavy carton, rapped with heavy paper or plastic; use appropriate packing material and seal well with strong tape. Mark the DELICATE INSTRUMENT” or “FRAGILE.” 987-0001NOTE: Although the System 294 is shown ‘here, the insertion procedure is the ‘same for all systems. ) Lower the UniPak 2" into position. ©) Push down to lock UniPak 2" into plac. Figure 21. UniPak 2™ Installation 22 987-0001SECTION 3 OPERATION 3.1 OVERVIEW ‘The UniPak 2™ can be used in 29A, 298, System 19, (or 100 programmers of any configuration; see section 1.2 {or firmware revision levels required. The typical programming operation with a 29A programmer and UniPak 27 is ilustrated in figure 3-1. As can be seen from this figure, the UniPak 2™ can obtain data from three sources (a master device, a serial port, or the keyboard) Because the serial port and keyboard operations are unique for each type of programmer, you will be referred to your 28, 238, System 19, or 100A programmer manual for dotails on how to program using these mainframes. When using a master device as the data source to program @ blank device, you must frst instruct the programmer to copy the device data into programmer RAM (shown as COPY in figure 31 and described in section 3.4 ‘Then enter the family code and pinout code as described in section 3.6. The data in the device will have been copied to the RAM of your 298 when you press START, as shown in figure 3-1. You must then remove the master device and instruct the programmer to copy the information just stored in its RAM to a blank device. This completes the basic programming operation, The procedures to perform basic operations with your UniPak 27 are described in this section. You should follow ‘those procedures to properly operate your UniPak 2™, Wherever possible, key sequences have been included for using your UniPak 2"™ with a 29A Universal Programmer with Rev C firmware (read section 1.2 carefully to determine your programmer's firmware revision level). Refer 10 your programmer manual for key sequences for the System 19, 298, and 1008 programmers. S Figure 3-1. Typical 29A Programmer Operation 34 981-00013.2 POWER UP NOTE W the UniPak 2 is not installed in the programmer before power is turned on, you wil hear @ beep until the UniPak 27m is installed. When turned on, the programmer wil perform an automatic saf-test routine When the self-test routine is complete, the programmer will signal its readiness. To turn the programmer on, do the following: Check to make sure a device is not in @ socket. If a device is in a socket, lft up the lever (located on the ‘upper lett of the socket; see section 3.81, then gently lft the device out of the socket. Plug the AC power cord into the power outlet. Flip the power switch up to the "ON" position (soe figure 3.2). POWER CORD’ on CONNECTOR OFF PowEnSwitcH Figure 3-2, Programmer Power Switch Location 32 3.3 POWER DOWN CAUTION Do not turn the power off while the programmer is doing an operation or when a device is in a socket; voltage transionts may damage the device. To turn the programmer power off, do the following procedure: 1. Check to make sure that the programmer is not in the middle of an operation. 1 itis, wait until that ‘operation is through. 2. Check to make sure a device is notin a sockat. If a ‘device isin a socket, remove it as described in section 2.8, 3, Flip the power switch down to the “OFF” position (figure 3.21 3.4 BASIC OPERATION Al data transfer or verification operations take place between the programmers internal RAM and the device or between the RAM and serial port in your programmer. Because the procedure to transfer data via @ serial port varies from programmer to programmer, this manual describes only data transfer with the 29A. For other programmers, refer to your programmer operation manual “The basic data transfer operations that can be performed with the UniPak 2'™ and the 29A Universal Programmer are: + Load RAM with data from a master device (described in section 3.4.1), © Verify RAM date against the device data (described in section 3.4.2) ‘Program a device with RAM data (described in section 3.4.3). 981-00013.4.1 Load RAM With Data From Master Device To load the 29A RAM with data from a master device, follow the steps listed below. 1. Pross COPY; 29A displays COPY DATA FROM 2. Press DEVICE; 29A displays DEV» ADDR/SIZE TO NOTE The device is the source of data. 3. Press RAM; 29A displays CO DEV > RAM a ADDR. Nore The RAM is the destination of the dato from the master device. Press START; 29A displays FAM A 00 PIN 00 5. Enter the family code and pinout code (see section 36). 6. Insert the master device into the UniPak 2"™ (see section 3.7). 7. Press START; 29A displays LOADING DEVICE J. LOAD DONE Xxx nore XXX Is the sumchock of the device. 8. Remove the master device from the UniPak 21™ (see section 3.8). During source destination operations (copy and verify) ADDR and SIZE appear in the 29 prompts. These correspond to starting address and block size, respectively. For more detail on these parameters, see your programmer ‘operation manual. When reading a device, the UniPak 2 applies @ nominal Voc level. To simulate loading on device ‘outputs, each output is driven by a 1.6 mA current source. 3.4.2 Verify RAM Data Against Master Device Data The two-pass verity consists of comparing the device {data to RAM data and is performed at two Vcc levels; these levels, plus the outputsink currents and the output- level sense voltages, vary according to each manufacturer's, requirements, To verify that data entered in the 29 RAM duplicate the master device data, follow these steps: 1. Press VERIFY; 29A displays VERIFY DATA FROM 2. Press DEVICE; 29A displays DEV a ADDR/SIZE TO NoTE The deviee is the source of data. 3. Press RAM; 29A displays VE DEV>RAM» ADDR Nore The RAM is the destination of the data from the master device. Press START; 29A displays FAM 00 PIN 00 Enter the family code and pinout code (see section 3.) 6. Insert the master device into the UniPak 2" (see section 3.7) 7. Press START: 29A displays VERIFY DEVICE Li] VE DEV DONE XXXXx wore X000% is the sumcheck of the device. 8, Remove the master device from the UniPak 21 (soe section 38). 3.4.3 Program Device With RAM Data ‘When programming a device, the system performs ilegal-bit tests and blank checks at nominal Vcc and with rominal output loading. To program a blank device with the data in the 29 RAM, follow these steps: Press COPY; 29A displays COPY DATA FROM Press RAM; 29A displays RAM « ADDR/SIZE TO Press DEVICE; 29A displays CO RAM > DEV , ADDR. Press START; 29A displays FAM » 00 PIN 09 Enter the family code and pinout code (see section 36) 6. Insert the blank device into the UniPak 2 (see section 37). 7. Press START; 29A displays TEST DEVICE 7 PROGRAM DEVICE £7 ‘VERIFY DEVICE [7 PRG DONE 01 XXXX Remove the device from the UniPak 2° (see section 3.8) Nore 2000 represents the sumcheck of the dovic. 98-00013.4.4 Extended Solect Functions ln addition to the three basic source-destination functions (copy, verify and edit) and the select functions described in the Operation section of your programmer ‘manual, the UniPak 2™ offers eight extended select functions (BC, BD, C3, CC, CD, CE, CF and EF). These functions are not required for normal operation of the UniPak 276, Functions 8C and BD are used to disable and enable the electronic identifier function for device families listed in section 3.5, with the exception of family FF To disable the electronic identifier test (BC), follow the procedure below. 1. Press SELECT; 29A displays SELECT CODE 2, Press BC START; 29A displays SELECT CODE “* To enable the electronic identifier test (BD), follow the procedure below. 1. Press SELECT; 29A displays SELECT CODE 2 Pross BD START; 29A displays SELECT CODE ** Function C3 gives access to options for specific {family/pinout code combinations. If the UniPak 2" is, beeing used in a Model 19, this select code will work only from terminal remote. To enter the options, follow the procedure below. Press SELECT: 29A displays SELECT CODE 2. Press C3 START; 29A displays FKX PYY OPTIONS 3. Press START; 29 displays “NAME OF FIRST OPTION” To select different options, press the REVIEW key. To execute an option, press START (in texminal remote, the RETURN key is used for the START key, and the space boar is used for the REVIEW key). If the option has subheadings under it, once the START kay has been pressed, the REVIEW key can select the desired subheading. The START key is then pressed to execute ‘the subheading. Once an option has been completely executed, an asterisk will be displayed after the option name. Complete execution may require doing @ number of subheadings. Pressing the START key a sacond time after {an option is completely executed will exit the options file, and the 294 will display OPTIONS DONE ** NOTE For the 87514, tho option “PROG SECTY ONLY” will program the security fuse as soon as the option is selected and executed. Funetions CC and CD are used in conjunction with electronic identifiers and may be used from the keyboard or from remote control. 34 Function CC displays the family and the last algorithm moved to RAM, usually the algorithm for the last device programmed or read. This function helps determine the family and pinout codes used by the programmer when in the automatic electron identifier mod Function CD displays in hexadecimal 16 bytes of the device's electronic identifier. Byte 0 identifies the ‘manufacturer; byte 1 identifies the device. For information ‘on the purpose of the remaining bytes, consult the device dota sheets. To display the family and pinout codes of the last algorithm moved to RAM, follow the procedure below. Press SELECT; 29A displays SELECT CODE 2, Press CC START; 28 A displays XXYY ** NOTE XX represents the family code; YY repre: sents the pinout code. To display the electronic identifier, proceed as follows: 1. Press SELECT; 29A displays SELECT CODE a Press CD START; 29A displays 0000 YY 3. To display additional bytes of electronic identifier, press START; 29A displays 000X YY. To back up through previously displayed identifier, press REVIEW; 298 displays 000x YY NoTE (000X represents the byte number of the ‘identifier displayed (i.e, 0001 represents byte 1 of the electronic identifier which is the device codel. YY represents the ‘identifier byte in hexadecimal. Functions CE and CF are used to set the reject count (the number of programming pulses applied to a fuse or cell before its rejected); CE sets the reject count back to ‘the commercial specification (this isthe default value) and CF sets the single-pulse reject count. This feature was accomplished in older UniPak™ models by adding 60 to the family code). To select the commercial (default) reject count (CE), follow the procedure below. 1. Press SELECT; 29 displays SELECT CODE » 2. Press CE START; 29A displays SELECT CODE To select the sing following steps: julse reject count (CF, take the 1. Press SELECT; 29A displays SELECT CODE 4 2. Pross CF START; 29A displays SELECT CODE 981-0001Function EF calls up a four-digit hexadecimal Configuration number and a two-digit decimal version rhumiber that correspond to the revision level and version ‘number of the UniPak 2” firmware, This function can be Useful to identify fiemware revision levels wen communicating with Data 1/0 regarding field bulletins and updates. To display the UniPak 2™ firmware configueation and version number, do the following: 1. Pross SELECT; 294 displays SELECT CODE 2. Press EF START; 29A displays XXX YY Nore XXX represents the UniPak 27 firrware configuration number, and YY represents the version number. 3.5 ELECTRONIC IDENTIFIERS ‘This version of the UniPak 2 ™ can read and use electronic identifiers in two modes. ‘The fist mode occurs when family code 79, $9, 27, AB, BE, C5, AB, AF, C1, OD, or 45 is selected. The identifier is read and used to prohibit programming a device using the wrong family and pinout codes. The naw low Vp devices ‘are protected from the old high Vp algorithms which ‘might destroy them. Older devices without signatures are permitted to program. An error will occur if you attempt to program using the wrong family or pinout codes. The second mode is automatic. It is selected by entering family and pinout codes FF/FF. (n this mode the ‘perator neod not look up any family or pinout codes; the electronic identifier is read and the correct algorithm is Used for each device. An error will occur if you attempt to program on older devices without electronic identifiers or fon newar devices whose Identifiers are not yet supported. 3.6 FAMILY CODE AND PINOUT CODE SELECTION ‘Any device that can be programmed with the UniPak 2° is specified by a unique combination of a two- digit family code and a two-digit pinout code (table A-1). Once the codes for @ particular device are entered, the UniPek 2™ remains set up for any operation with that device until new codes are entered. ‘Your programmer marval will tell you where in the key ‘sequence the family and pinout codes should be entered. If invalid family and pinout codes are entered, a beep will sound as either START or ENTER is pressed, or Err 30 {error 30) will be displayed and the operation will be aborted. To select the family and pinout codes, do the following procedure: 1. Locate the manufacturer name and part number stamped on the device, Tum to table A-1, Family and Pinout Codes, in appendix A, and find the same manufacturer name. ‘Then, in the first column (Device Part Number), find the number which corresponds to the part number stamped on the device. Move to columns two and three, entitled Family ané Pinout Codes, to find the numbers on the same line as the particular device number Enter these selected family and pinout code numbers Press “START.” NoTE An LED light-emitting diode) will light under one of the sockets. Valid family and pinout codes must be in effect to use the System 19 DEVICE DATA key. When you press the DEVICE DATA key, either nominal, first-pass, or second: pass verify level is applied to the device. The level apolied depends on the System 19's postion in executing the selected mode. If the KEYED light is on, the nominal verity level is applied, 3.7 DEVICE INSERTION ‘Once you have chosen the appropriate family and pinout codes, the UniPak 21 is ready to accept a device in the socket located above the lighted LED. wore In the automatic electronic identitior ‘mode, no LED is ighted unless Uniak 2! is performing an operation ‘on a device. An empty socket wil always ‘be unlighted. In this mode, disregard any reference to lighted LEDs; use the socket with the comect number of pins. ‘A good electical connection between the device and ‘the socket is essential, To ensure @ good connection, do the following 1. Chock to make sure the programmer is not doing an ‘operation. IF is, wait until the operation is complet. Lift up the lever on the upper lett side of the socket ‘above the lighted LED; see figure 33. (The lever will stay locked into the upright position.) Gently inser the device in the socket above the lighted LED, Make sure pin 1 of the device is aligned with pin 1 of the socket, as shown in figure 3:3, Push the lever down to lock the device in the socket, Once the family and pinout codes have bean entered, ‘the UniPak 27% is ready for device-related operations. The key sequence to load, program, and verity are described in ‘the Operation section of your programmer manual 35 e'-c0013.8 DEVICE REMOVAL 1. Check to make sure the programmer is not doing an operation. If tis, weit until the operation is complete. 2. Lift up the lever on the left side of the socket; see figure 3-3. (The lever wil lock into the upright postion.) 4, Lift the device out of the socket; the LED will remain illuminated. Figure 33, UniPak2™ Sockets and Device Installation 38 2.0001SECTION 4 MAINTENANCE/TROUBLESHOOTING/CALIBRATION 4.1 OVERVIEW ‘The support material in this section has been provided to help you keep your UniPak Z'™ in good operating condition, General maintenance practices are discussed in section 4.2, while the basic troubleshooting steps are listed in section 4.3, For those UniPak 2" users who prefer to {do their own calibration, detailed procedures, including measurement charts and timing diagrams, are provided in section 4.4 4.2 MAINTENANCE Before the UniPak 2™ can be cleaned (section 4.2.2) and/or inspected (section 4.2.3), it must be disassembled ‘as described below. 4.2.1 UniPak 2™ Disassembly To disassemble the UniPak 2", refer to figure 41 and. follow the procedure outlined below. 1. Remove the UniPak 2™™ from the programmer; see section 2.3 for details. 2. Place the UniPak 2 face down on a flat surface. 3. Unscrew the captive fasteners (figure 4-1a) until they hang loosely; the screws will not separate from their standoffs. 4. Lift the card cage up slightly, then pull out (as shown in figure 4-1b) to unlock the flanges. CAPTIVE FASTENERS CARD CAGE PERMANENTLY ATTACHED TO ‘STANDOFF Figure 4-1a) Unscrew captive fasteners, FLANGE Figure 4-1b) Lift card cage up and out. Figure 4-1, UniPak 2™ Disassembly 41 981-00015. Lift the card cage up until you can see the socketboard interconnect cable and its connector (figure 4-2). 6. Flip the extraction tabs out on each side of the connector (figure 42) 7. Pull the cable out of the connector. 8. Disconnect the ground wire from the socketboard (see figure 4-2). 9. Flip the extraction tabs out on the top card (waveform generator card) and unplug the interconnect cable from its connector (figure 43). 10. Flip the extraction tabs out on the top card (waveform generator cara 11. Pull the waveform generator card out along the guides figure 4-3) 12, Repeat steps 9, 10, and 11 for the extraction tabs on the address card, 12, Remove the two sorews and the shield, and pull the memory card down to unplug it from the edge connector (as shown in figure 4-4) ‘SOCKETBOARD INTERCONNECT EXTRACTION CABLE TAB GROUND: WIRE FLANGES ‘SOCKETBOARD INTERCONNECT CABLE CONNECTOR EXTRACTION TABS GUIDE sTaIp (FOR THE WAVEFORM GENERATOR CARD) SOCKETBOARD GUIDE STRIP INTERCONNECT (FOR THE ‘CABLE ADDRESS CARD) Figure 4:3. hoe 8 ah ORS CONNECTOR PULL MYLAR Down SHIELD jroult Board Removal MEMORY ‘CARD Figure 42. Sooketboard Interconnect Cable Disconnect 42 987-0001 Figure 4-4. Memory Gard Removal42.2 Cleaning Inspect the UniPak 2™ inside and out for accumulated dirt or dust. To clean the UniPak 2", follow the procedure below. 1. Wipe any dust and/or dirt off the outside of the UniPak 227 with a clean, damp cloth NOTE Do not use abrasive cleaners or solvents. They wil atch the point. Remove dust from the circuit boards with 9 blast of dry, ‘compressed air or a clean, soft-bisted brush. 4.2.23 Inspection You can help prevent malfunctions by periodically inspecting your UniPak 27, Check cable connections, card ‘seating, mounting of socksted components, etc., for shorts, opens or unstable continuity. If you find heat-damaged components, be particularly careful to find and correct the cause of the overheating. ‘This will prevent further damage. 43 4.24 UniPak 2™ Assembly 1. Plug the memory card onto its edge connector, as shown in figure 4-4. Replace the shield, washers, and the two screws. Flip the two extraction tabs down on the address card. . Using the flat surfaces of the extraction tabs, gently push the address card along the guides into its connector. (Moke sure the extraction tabs on the interconnect cable Connector are flipped open. Firmly, but gently, push the socketboard interconnect cable into the connector. Notice that the extraction tabs will move back to their locked positions when the cable is locked into the connector. Repeat stops 3 through 6 to generator car. Reconnect the ground wire to the socketboard. Plug the socketboatd interconnect cable into its ‘connector on the socketboard (figure 4-2). Replace the card cage by ting it up to lock the flanges, as shown in figure 4-1, then gently setting it down. Make sure the captive fasteners line up with the fastener holes on the UniPak 2™ frame. Tighten the captive fasteners finger tight. face the waveform 10. n 81-00014.3 TROUBLESHOOTING This section will help you interpret and isolate failures, in the UniPak 2°". Use it in conjunction with saction 5 {Circuit Description) and the schematics provided in the back of this manuel. There are three major classes of fslures that can occur ina system comprised of @ programmer and a UniPak 2" The frst is no system operation, the second is poor yields, and the thid is UniPak 2 fair. Aftor successfully twoubleshooting the UniPak 2", you ‘must calibrate it according to the instructions in section 4.4. Itis very important thatthe programmer be calibrated before the UniPak 27 is calibrated, 4.3.1 No System Operation You should pertorm the following steps f the system will not intiize with the UniPak 20" installed. After ‘completing each stop, determine whether the problem stil exists, 1. Check to be sure the UniPak 27 is property installed in your programmer. 2. Check the UniPak 2 programmer mating connector (21 for bent or broken pins. (Pin HH is intentionally shorter 3. Check the UniPak 21 cards to be sure they are ‘correctly installed in their connectors (section 4.2), 4. Check the ribbon cable to be sure itis propery inserted in the connectors (section 4.2. 5. Chock the programmer power supplies for proper voltage output levels (so0 programmer marwal). 6. If steps 1 through 5 fai to isolate the problem, contact ‘your local Data 1/0 Service Center 4.32 Poor Yields Perform the folowing steps ifthe yield rate begins to docroaso. Alter completing each step, determine whether the problem stil exists. 1. Do 2 complete calibration; be sure that the programmer has been calibrate fist, 2. Perform waveform observations (seetion 4.4) for the family of the device being programmed, being careful to note any discrepancies. You may find the circuit description (section 5) and the schematics at the end of, this manual useful in isolating the problem. 44 961-0001 3. Perform calibration steps 27 and 28 on the measurement chart for the device family that is giving problems. The Circuit description (section 6}, schematics, and suspected components in tests 1 through 4 of table 41 ‘may be helpful in isolating the problem, 4. If steps 1 through 3 fal to resolve the problem, contact Your local Data 1/0 Service Center. 4.3.3 UniPak 2" Failure Perform the following steps i @ device will not program at all or if error messages are displayed. After ‘completing each step, determine whether the problem stil 1. Check that the family and pinout codes are correct for the device, and that the device is being inserted in the correct socket, 2. If possible, try 3 known-good device to determine whether there is @ hardware problem Check to be sure the UniPak 2° is properly installed. Check the UniPak 2" programmer mating (Jt) connector for bent or broken pins. (Pin HH is intentionally shorter.) 5. Check the UniPak 21 cards to be sure they are correctly installed in their connectors (section 4.2) 6. Check to be sure the ribbon cable is correctly oriented ‘and properly insorted in the connectors 7. Perform a complete calibration, noting any ‘measurements faling outside the indicated limits. Refor to the coresponding test number in table 41 for suspected boards and components, as wel as the circuit description section 6) and the schematics, to attempt 10 isolate the problem. 8. Perform waveform observations and note any discrepancies, Referring to the circult description and the schematics may be helpful in isolating the problem, 9. If stops 1 through & fail to resolve the problem, contact, your local Data 1/0 Service Center.Table 4-1. Troubleshooting Chart ‘TEST NUMBER SUSPECT CARDS ‘SUSPECT COMPONENTS 1 701-1655, VAI, UI7, U25 2 701-1655 VR1, U6, U25, 02, 03 3 701-1655 VR1, UI6, U25, 02 4 701-1690 15, U7, Ur2, O21, RBZ, CRIS, CRI6, VAI, O15 702-1659 Rig, U10 5 701-1680 14, U7, U3, O3, R15, CRA, CRB, UIO, UB, UI1, 024, 025, 19, CRI4, O16, UI8, UI7, VAI, O15 702-1659 C5, RIT, CRB 6 701-1690 U1, U7, US, 3, ABT, CRIO, CRI, 02, CRIB, VAT, QIS 701-1655, 23, RI, Q15, Q7, RPB, RP3, RPA, RP2, QS, U24, UII, cre 7 ‘702-1660 U23, U22, V2, CRB, O2, R28 702-1859 CcA2s, a0, U20 701-1655 U4, U6 8 701-1655 vat, U7, U25 ° 701-1655 VAI, U16, U25, 02 10 701-1655 vt, UI7, U25 0" 702-1650 U17, 03, R3, VRI, U2, Q1, CRI, CR 701-1655 U2, RI, Q15, Q17, APB, AP3, RP4, RP2, Q4, CRE, U24, un 2 702-1650 UIT, 03, RB, VRI, U2, QI, CRI, CR2, VRB, US, U22, UIT 701-1655 U2, RI, Q15, O17, APS, AP3, RP4, RP2, O4, U26, Ut1, cre 13 701-1690 17, UIB, Utt, 22, 025, a2, CRIB 701-1655 23, RI, RPB, 16, AP3, a14, RPA, RP2, O12, UI9, U24, cre 4 701-1690 15, U7, UI2, 021, UI6 702-1658 cris, U10 6 701-1680 Ut6, U13, U7, U6, 08 16 701-1690 16, Ur4, U7, U3, 03 ” 701-1685, 28, UI7, U25, VAT 18 701-1655, U28, UI6, U25, VR, 02 19 702-1850 US, U22, UI7, UIT, 03, U2, CRI, CR2, 1 701-1655 U23, RI, RPB, O15, RP3, Q17, RPA, AP2, Q4, CRE, UT1, 2a 2 701-1690, 701-1655, 702-1658 a 702-1659 ua, ps2 701-1655 ure 2 701-1690 U16, U7, UI2, 21, CRIS, CRI4, UIE 702-1658 cri, U10 702-1659 (€R26, 06, 07, 05 701-1680 U16, U13, U7, UB, 08, CRIO, CRIT 702-1650 UI6, U3, UI0, UT2, UIt, U7 4 701-1690 UI6, UI4, U7, U3, a3, UB, UI0, UTI, 024, a25, 219, R14, 016, Cha, CRB 702-1659 5, RI 45 921-0001Table ‘Troubleshooting Chart (Continued) ‘TEST NUMBER ‘SUSPECT CARDS ‘SUSPECT COMPONENTS 3B 707-1650 Ui6, UT4, U7, U3, 03, U9, UT0, UIT, 024, O25, US, 08, (08, CRE, CRA, CRS 702-1658 C5, AIT 6 701-1690 16, U14, U7, U3, 03, U9, U10, UI1, 024, 025, US, 013, CRG, 04, G10, 12, 05, 7, CRE, CRI 702-1859 5, RI a 701-1690 UI, UI3, U7, U6, a9, CRIO, CRI1, 02, CRID 701-1855 U2, RI, QI6, RPS, Q17, APA, RP2, QB, CR, UI9, U24 8 701-1690 UI6, U13, U7, UB, a9, a2, 018, UI7, a1, CR2, a14, US a 701-1690 UI6, UI5, U7, Ur2, O21, CRIB, CRIE "702-1659 RIB, U10 701-1680 U16, Ur4, U7, U3, 03, CRE, CR, UB, UI0, UI1, 024, O25, U5, 06, 08, CRE 702-1659 5, Rit a 702-1650 23, U22, VR2, CR, 02, R2B 702-1659 R24, a0, U20 701-1655 ua, ua 2 701-1690 18, U10, U5, U7, 020, 07, 05, 212, UB, CRB, O13, UIT, 2s 702-1659 cre, C5, RIT 701-1690 tt, CRIT, VA2, Ur8, 019, 216, UB, O24, UIO 702-1859 (CRS, RI1, C5 701-1690 16, U13, U7, UB, 09, CRIO, CRI 702-1659 (CR4, CR3, CR2, U22, CRS, Q1, CR32, CR31, CRIB, C3, C13 702-1860 US, V3, U22, UI7, UNI, 3, U2, 01, CRI, CR2, VRI 701-1655 UI9, U24, U23, RI, Q16, RP3, 17, R4, AP2, 08, CRS 38 702-1650 US, VA3, U22, UT7, U11, 3, U2, Q1, CRI, CR2, VAI 701-1655 UI9, U24, U23, AI, O16, AP3, QI7, APs, AP2, 08, CRI 6 701-1690 UI6, UI5, U7, Ut2, O21, CRIS, CRIE 702-1659 R18, U10 a 701-1690 UI6, U14, U7, U3, 3, CRS, CRS, UB, UIO, UII, 024, 025, US, Q13, CRS, O7, 05, a12, 020, U7 702-1659 5, RIT 38 701-1690 16, U13, U7, UB, 09, CRIO, CRIT 702-1659 (CRA, CR3, CR2, U22, CRS, Q1, CR32, CRIT, CAB, C3, C13 702-1650 Us, V3, U22, U17, U11, 03, U2, G1, CRI, CR2, VRT 701-1655, [U24, UNT, U23, RI, RPB, O16, RPS, Q17, RPA, RP2, 4, cro 701-1690 UI6, UI5, U7, U12, 021, CRIS, CRIB 702-1859 cri, U10 701-1655, VR1, U6, U26, 02, RPS, U28, U22, CRB, CRG, U24, UIT, uI9, CRs, CRT 702-1659 22, CR29, R90, CR2B, CR31, CRIZ a 701-1655 RI, UI6, U25, 02, RPS, U28, U22, CRS, U24, UIT, UI9, cra 702-1659 2, CR29, R30, CRIB, CRBI, CRIZ 2 701-1655 VAI, UI6, U25, 2, RPS, U28, U22, CRS, U24, UII, UNS, cra 702-1659 2, CR, R30, CA2B, CASI, CRIZ «a 701-1655 Vat, U16, U25, 02, RPS, U28, U22, CRB, CRE, U24, U1, 19, CRA, CR 702-1659 02, CR29, R30, CA2B, CRBI, CRIZ 46 981-0001Table 4 |. Troubleshooting Chart (Continued) ‘TEST NUMBER SUSPECT CARDS, SUSPECT COMPONENTS “a 702-1659 ps1, ua 701-1655 ue 6 701-1690 UI6, UNS, U7, UI2, O21, CRIS, CRIS 702-1659 cr, UI0 6 701-1655 2, U3, Us, U4 702-1650 U2, U22, VA2, CRB, 02 702-1859 (R24, QO, U20, U2!, UI a 701-1655 2, U3, U4, U4 702-1850 U23, U22, VR2, CRB, a2 702-1859 (CR24, O10, U20, U21, UI3 cy 701-1855 v2, U3, U4, U4 702-1850 23, U22, VR2, CR, a2 702-1659 CR2, AO, U20, U2", UI3 ry 701-1655 2, U3, U4, Ur4 702-1650 23, U22, VA2, CR3, 02 702-1659 R24, O10, U29, U21, UI 50 701-1055 04, 08, 012, 05, 014-17, U23 5 701-1655 06, 11, 09, 07, 014-017, U28 82 701-1655 (04, 08, 012, 05, 014-17, U23 53 701-1655 06, 011, 09, a7, 014-17, U23 54 702-1659 s3, ua 701-1655 ure 5 701-1690 16, UI5, U7, U12, O21, CRIB, CRIE "702-1653 cRz2, UI0 6 702-1659 bs4, us 701-1655 ue 7 701-1690 UI6, UI5, U7, UI2, 021, CRIS, CRIG 702-1659 Uto, crt 8 702-1659 ss, us 701-1655 ure 59 701-1690 16, UIS, U7, U12, O21, CRIS, CRIE 702-1658 to, CRIT o 702-1659 ps6, us 701-1055 urs eo 701-1690 U6, Ut5, U7, U12, 021, CRIB, CATE 702-1659 10, CRI a 702-1059 ps7, ua 701-1655 ure 6 701-1690 U16, UI5, U7, U12, O21, CRIS, CRIE 702-1659 to, cR23 64 702-1659 (03, CR14, RPI, 810, CRI7, UIO 701-1855 18, UZ 6 701-1690 16, U15, U7, Ut2, 021, CRIB, CRI 701-1655, VRI, UI, UI7, U25, 02, 03, 01 702-1659 CRIZ, CRI, CRIT, CRI9, CR23, CRZ2, CRT, CRIB, UI0 6 701-1680 U16, UI5, U7, U12, 021, CRIS, CRIG 701-1685 VRI, UI6, UI7, U2s, 02, 03, a1 702-1659 R17, CRI, CRIT, CRIB, CRZ3, CR22, CR7, CRIB, UIO 47 961-00014.4 CALIBRATION ‘The need for calibration varies with the amount of use your UniPak 2° receives. Generally, we suggest calloration whenever: 1) programming yields fall below the manufacturer's recommended minimums, or 2) ‘troubleshooting has been completed, or 3) the user's company policy requires periodic calibration certification. NOTE Jf caliration or repair is required but you lack the facilities to accomplish it contact the nearest Data I/O Service Contr. Because of differences in programmer mainframes, this ‘manual does not attempt to cover all areas of programmer calibration. Instead, it lists the stops necessary to calibrate only the UniPak 2, Calibration of the UniPak 27™ consists of three parts: 1. Power Supply Calibration—measures the DC supply voltages of the programmer. All other voltages depend ‘on these supplies; therefore, this part of the calibration procedure must be done first. Refer to your programmer manual DC Calibration—consists of measuring and adjusting critical DC voltage levels generated by the UniPak 2™, 3. Waveform Observation—enables observation of waveforms on an oscilloscope to ensure compliance with the device manufacturers’ critical voltage and timing specifications. ‘The fist part of the calibration procedure (power supply calibration) varies with the type of programmer you have. Therefore, this manual refers you to your programmer manual for details on power supply calibration DC calibration is discussed in section 4.4.1, the optional verify voltage checks are described in 4.4.2, and waveform ‘observation is detailed in section 4.4.3. For information on how to carry out these steps on various programmers, consult your programmer man. 48 The following equipment is necessary to calibrate the UniPak 2m ‘Data 1/0 calibration extender (part number 910-1521) Three and a haif-digit digital voltmoter (DVM) + Dual-trace oscilloscope (Tektronix 465 or equivalent) Check the appropriate programmer manual for any ‘additional equipment that you may need to calibrate the programmer. ‘To prepare your UniPak 2™ for calibration, follow the procedures outlined below. 1. Turn the programmer power off; s80 section 3.3 for details 2. Remove the UniPak 2” from the programmer; see section 2.8 for details. 3. Insert the calibration extender into the programmer the ssame way you insert the UniPak 27 (section 2.2). Unscrew the two thumb screws (captive fasteners) located on the underside of the top cover of the UniPak 2™ (figure 4-1); they connect the card cage to the socket assembly. Separate the two parts of the assembly. CAUTION Do not let the fasteners short to the motherboard, 5. Insert the 64-pin connector of the card cage into the ‘mating connector on the calibration extender (figure 45, detail B 6. Lean the top portion of the UniPak 2™ against its bottom portion at a 45-degree angle; see figure 45. NOTE Be sure the socket assembly flange locks into the card cage flange (see figure 4-5, detail Al. Do not allow the frame of the socket assembly to short to the memory board. Be caretul not to strain the cable or scratch the top of the programmer. 981-0001DETAIL A CALIBRATION FLANGE SOCKET ASSEMBLY LANGE ~ CALIBRATION EXTENDER, Insert the 64-pin connector into the mating connector. 64-PIN CONNECTOR DETAILE MATING ‘CONNECTOR Figure 45. Calibration Setup 49 987-00014.4.1 DC Calibration ‘The DC calibration procedure described in this section ‘enables you to adjust critical DC voltage levels generated by the UniPak 2, To follow this procedure, use the ‘measurement chart at the end of this section. This ‘measurement chart contains the information needed forall DC calibration tests. This information is included on the ‘measurement chat in columns with the following headings: ‘Step No.—tels which step to use for each test. Step rhumbers are set at the programmer keyboard and raflacted in the display, Test No.— identities individual tests Test Description —identities the functions being tested. ‘Measurement Test Location—tells which socket pins, Circuit boards, or test points to probe for measuring voltages. Measurement specifies allowable measurement ranges. If @ reading falls outside the range and you cannot adjust i to within the range, do not use the UniPak 21 tntil the problem is corrected, Adjustment Location—tells which potentiometer to adjust if a measurement is out of range ‘Comments—gives special instructions for particular ‘The DC calibration procedure is as follows: CAUTION Remove all devices from the sockets before entering the calibration mode {see section 3.8 for details Waveform generation may damage any device in the UniPak 2™ sockets, Turn the programmer power on (section 3.2) Put the programmer into the calibration made by following the key sequences in table 4-2. Perform the general calibration steps (steps 1 through 28) on the measurement chart, For stops 5, 6, and 7, refer to the figures at the end of the measurement chart to observe the bit switch rise waveform the DAC step waveforms, and the current DAC step waveform. 410 Table 4:2. Key Sequence To Access the Calibration ‘Mode Programmer Key Sequence To To To System Enter Calibration Increment Decrement ‘Mode ‘Stop No. Stop No. 19 Press SELECT Pross C2 Press ENTER Press Press ENTER REVIEW Enter Step Numbert Prose START 29A/ Pros SELECT 298 Prose Ct Press START Pross Press START REVIEW Emer Step Number* Pross START 100A Press SELECT Prose 12 Prose Press START BACK. ‘SPACE Enter Step Number* Prose START *Optional For each general calibration step on the measurement chart do the following ‘+ Take measurement readings at the device sockets or test points indicated on the measurement chart; figure 4-6 shows the pin numbers for the sockets; figure 47 shows test points, Ground the digital voltmeter to socket 7, pin 10 on the front panel of UniPak 2™ The adjustment pots on the waveform generator, memory board, and the address card enable you to ‘make adjustments when your measurements do not ‘match the measurement chat; figure 47 shows the location of these adjustment points 981-0001‘+ Access each new step by pressing the START (or ENTER) key. The new step number will appear in the display when the UniPak 2% is ready for the next step. To go back to @ previous test, press the REVIEW (or BACKSPACE) key. ‘NOTE The remaining steps on the ‘measurement chart (steps 26 through 28) ‘are family specific. These steps are ‘optional and have been included for your 4. For each family-specific calibration step on the ‘measurement chart, do the following to enter the famity and pinout codes: ‘+ Perform a load operation; refer to your programmer manual for details ‘+ Enter the family and pinout codes when prompted by the programmer; refer to your programmer ‘manual for further information, yi 1s. ‘+ Fl RAM with data specified on the timing diagram, ‘+ Put the programmer back into the calibration mode; s00 figures 48, 4-9, and 4-10 for the key sequence. ‘Enter the step number from the measurement char. 0 «Press START, 1 1 28 : : » 3 Ks CCG ) Adore Card, 701-1855 re " sa 3 wL__}n 2 Fa 5 : 6 1 <. 16 ye 7 ra Figure 46. Pin Numbers of Device Sockets €} Memory Boars, 72-1650 an 927-0001‘Steps 27, 28, 28, 30, 31 (298 Universal Programmer) Figure 4-8, Accessing CalibrationUSS4.42 Optional Verity-Voltage Chocks 4 ‘Two calibration steps (27 and 28) have been provided for the measurement of fist- and second-pass verity voltages, The family characteristics table in the applicable family timing diagram defines the levels for first- and ssecond-pass verifications for each family. These are provided for the investigation of yield problems; no adjustments are available. Under normal circumstances, these steps can be eliminated from a routine calibration, 4.4.3 Waveform Observation Programming waveforms of your UniPak 2™ can be observed with an oscilloscope and compared with the timing diagrams that are provided in appendix B. In this Fill your programmer's RAM with programming data listed in the timing diagram for the family code fentered: the correct data depends on the polarity and technology of the device. Refer to table 4-3 for the “Fi RAM" key sequence. CAUTION Remove the cal yn may damage any device in the UniPak 2™ sockets Table 43. Key Sequence To Fill RAM With Data way, timing and magnitude relationships can be measured against known specifications to confirm that the UniPak System Key Sequence 21's performing to the device manufacturer's Specifications. Since the UniPak 2" generates a large ‘number of waveforms and all calibration adjustments are ‘accomplished in DC calibration, itis necessary only to ‘observe waveforms for commonly used devices or those ‘that are presenting yield problems. During the waveform observation phase of the calibration procedure, your UniPak 2" uses a firmware routine that generates programming waveforms for the data stored in system RAM, An oscilloscope trigger pulse is generated for every address increment. This occurs after the reject pulse count has been reached for all the bits being programmed in the previous data word. The address is automaticaly reset to @ when the maximum PROM address is reached, and incremonting continues. Waveform 9 Press SELECT A2 Press ENTER Enter data Press START 290/298 Press SELECT A2 Prose START Enter data Press START 100 Press SELECT 13, Enter Password (SHIFT 2/ ‘BACKSPACE Enter data Press START ‘observation can be done with the UniPak 2" either on the calibration extender or plugged into the programmer. “The waveform observation procedure described below calls for filing RAM with data so that itis possible to observe bit-to-program waveforms. The procedure takes into account the device type (VOL or VOH) so that for ‘either type of PROM a bit-to-program will appear on the 6 same socket contact. When used with a timing diagram, this procedure allows you to compare waveforms on the oscilloscope with the waveform photographs on the timing diagram for any 7, type of device; a detailed explanation of the timing diagrams Is provided in section 4.4.4, The waveform ‘observation procedure is as follows: 1. Refer to table A-1 to determine the family and pinout codes, polarity, and technology of the selected device. Nore Polarity is indicated in the family code. Odd-numbered families are VOL and ‘even-numbered families are VOH. 2, Initiate @ load operation; refer to section 3.4 for details 3. Key in the family and pinout codes when prompted by the programmer; see section 3.6 418 81-0001 Enter the waveform generation mode at step 27 on the measurement chart by following the key sequences listed in figure 48, 48, or 4-10, depending on your programmer. waveforms for EEPROMs aro observable at stop 30 or 31 of the measurement chart by following the key sequences listed in figure 4-8, 49 or 4-10, depending on your programmer. Era Trigger your oscilloscope by connecting to the test point under the top edge of the socket assembly (seo figure 4-11), Ground the scope to the GND contact of the socket with its LED illuminated; the GND contacts are shown in figure 4-12. To observe individual waveforms, rofer to figure 4-13 Under the pinout code number entered in step 3. The individual socket illustrations give the numbers of the socket contacts 10 probe when observing the waveforms on the timing diagram. NoTe Considerations helpful in setting up and interpreting the waveform displays are explained in section 4.4.4‘SCOPE TRIGGER ‘TEST POINT, Figure 4-11. Unil sak 2™ Scope Trigger Test Point 4.4.4 Detailed Explanation of the Timing Diagrams This manual contains a timing diagram for each dovice family that can be programmed by the UniPak 2™. Each timing diagram contains a set of waveform photographs ‘that show critical programming parameters. To use these diagrams and photographs, read the information provided below and refer to the sample timing diagram {figure 4-13). 1. FAMILY CODE NUMBER— corresponds to the family code number of the device (refer to table A) 2, FAMILY CHARACTERISTICS TABLE—lists the ‘minimum and maximum parameter values; voltage and timing parameters other than those listed in this table are to be considered noncrtical with @ + 10% tolerance, 3. NOTES—important information pertaining to a timing diagram. 416 10. 98-0001 WAVEFORM NAMES— correspond to the pin names Con the pinout chart (figure 4-12); the pinout chart tel ‘you which socket pins to probe when you are ‘observing the waveforms for a particular device pinout within a family. (The pinout is indicated by the number ‘above each socket on figure 4-12 which corresponds ‘to the pinout code on table A-1.) ‘We recommend that you use the osciloscope's single- sweep mode for address observation, since one trigger pulse is generated for each address change. + BIT NO PROG— Always use the 02 (bit 2) contact (shown in figure 4-12). + BIT TO PROG— always use the 01 (bit 1) contact, (shown in figure 4-12) LAYOUT SEQUENCE NUMBER—used as @ reference point within each diagram, DELAY TIME POSITION-- indicates the time from the start of the main sweep to the start of the delay time. OSCILLOSCOPE GROUND REFERENCE ground ‘contact on the socket with its LED illuminated TIME-BASE AND VOLTS-PER-DIVISION SETTINGS— Horizontal positioning of the waveforms is not critical and may vary slightly from the photographs. The important observation is the timing relationship betwen the waveforms in the photographs. You can ‘adjust this timing relationship on your oscilloscope to ‘set convenient reference points, By taking into ‘account any time-base variance, you can also make ‘time comparisons between photographs. The time base is always the same for different waveforms in the same photograph, EXPANDED PHOTOGRAPH NUMBER— corresponds to ‘the photograph number. These detailed photographs ate included to magnify rapid voltage changes or particular pulses in @ pulse train. VOLTAGE— indicates volts per division. The one in the Uupper left corner is for the top trace, and that in the lower left comer is for the bottom trace,Janney aaaaaeege Szaesease Sevcmossassa Seabucrsssss Saztszasie aaedenedes seeemssss aeaaeeeeey SERERPESSESE RRRRREED SETS aap GHEY Sesmwessssse Sasinosssses SERERERESETE Sabeaaa ge Baxb2ifessss SERTTa Te e8 SazboSisasss [RRRERERSERES | SHHHD GHE aaFaaiaeey to ci - Fi Yetonosases Seazeas aeneenseass Srcesses * aaaaaay PTRy aeaddeseey gagiaaeaseag = aiiiiiegy Setumeasssa Sastoossssss cunemanuetet leeneeeeees Raaannsesere Beret caneseunett2 Beet vtisssss eaaaestesey ERRERREESESS Pvaocorssass Seammesssess [aneeeesees® HEREREEESESE z € 652 8 6 7 | 5 2 i ee ee ef 5 fe BE bab 834 3} Wy dig ees eff Sngeetrtencsas peeeaaaiseag Yarttezeszes aagaaadess Figure 4-12, Pin Names by Pinout Code Numbers aay 981-0001SBvaavstusesss Farsdicnesld Seashassasss RRARRERDRESE eee eaaanayfay ayaaeaaasasaeg : Ssearintescsas Bidtiesss _bbezeietvesses RRaNaRAaREsEEE daliecssees : : cunsnonnenenns SHS aeadeaatetey apaaevaaiaeeay 8 Svrzietwsssss LIED Saadhasssses ‘ 2 Sp teziwtusssas Sassvasiesoses RORRRRBERERORE BgRaeegzegscag Seabgtesssss_ [Ransnsereere ~RaatauTass8y ] £ & fartedouesss Beereaca gga pueaaaaverses, $8 Seeeete tenes: 5 cecal tarlEb roses Yartbasseoes aagga7t508: Baatibcooetl Paaaagcteeeg saeeae ta Wepeaaaagusteaag 858g Figure 4-12. Pin Nemes by Pinout Code Numbers (Continued) 981-000110, VOLTAGE 9. EXPANDED. 8, DELAY TIME-BASE PHOTOGRAPH = AND MAIN TIME-BASE |_| | ——; || [e [ ses se. as-c05e + 5, 2 OSCILLOSCOPE GROUND REFERENCE DELAY TIME POSITION LAYOUT SEQUENCE NUMBER WAVEFORM NAME Notes FAMILY CHARACTERISTICS TABLE FAMILY CODE NUMBER. Figure 4-13. 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GTS HE | ep ~~ MOr's Nee oe a Kidans sbea[on RTS TST GST p TSHGE Feu MAIO] GH WHS og] Ze are ae et Tiaans ateazon ™% 5] | ‘Uo St G31 € 38y00S Uy WAT FO] (ko we Te T ETT FR aS |S S| |e T SanToe eur eTeP PPO] es] Oe OP WET OTE OF Wad PURO | — aww | wow] Sal sunannoo uoniseray [~nanaunsvan | ouvaotsnanzunsy a ouavorsoisas | 504 | a za rare} aug auauasnseaq 42 xediun aS eer} a % ‘SNOISIASH (Penunueg) weyD wuoWeINseoW “4 428 981-00019 40 9 1200 “Aue SOF : SeeseTe A eSATS IOs 7 | Tueabe ip Bonus eLRaTL dae 995 SHTOTONER SSRIS STG | 6] TE “Fae 5957095 BiaeseIs Awa ADF IOS “bee Bapars aLaeTHIw ST TERR TER TTS | HH OE “ariBeypBUVwIy BLASIO 5 | t ‘SLTOJBNEW BUTUIETBOTS | — Ta] 6z wee | T ae ae 1p Basu A1GeiTGae B55 | Baars wTaeST ade ow uy | + agey Soyae saaaEIeY FTHURT BOS = ae _ Rua TS Bae TE URNS TE SHS | TET T TE OT WN POE] oar RR [ mew [ ae ~ ated mea TORI] —r {y4eug avauaunseow 2 weatUn u —_—— : = ¥ (Penunuog) weyD wewelNseOW “ry 8191, 961-0001DAC Step Waveform LOAD SUPPLY DAC Current DAC Stop Waveform 430 921-0001on REVISION RECORD [on] Toe 3a Bit Switch Rise-Time Waveform variasie] min | vom | max] unr ] COMMENTS Prograne m |» [2 |» = m |e | « | » we | Aus 01180 NOTE: All TR's are measured from 10% to 90%. 431 981-0001DAC Step Waveform DAC Step Waveform 432 981-0001= ‘BIT SUPPLY DAC Vaer SUPPLY DAC 338 81-0001“This page left intentionally blank 434 981-0001SECTION 5 CIRCUIT DESCRIPTION 5.1 OVERVIEW This section defines the functions of UniPak 2" principal hardware components. Each circult-card assembly is depicted by 2 block diagram accompanied by a waitten description 5.2 GENERAL ARCHITECTURE 5.2.1 The Link Between the UniPak 2™ and the Programmer The UniPak 2" i controlled by the programmer's extended processor bus through the UniPak 2™ mating connector (J1). The control software for the UniPak 2™ is located in EPROM on the memory card (702-1650) 522 The Buses “The programmers aderess bus, data bus, R/W line and Vo, ine accass the software onthe mornory card and Control the gates and registers on the waveform gonerstor (701-1690) and addr cards (701-1655), The UniPak 27's device bus gathers the programming waveforms produced by these cards and transmits them to the socket card (702-1659). Figure 5-1 shows the relationships between the buses. 5.3 COMPONENT LAYOUT ‘The principal components of the UniPak 2™ are the motherboard, the waveform generator, the address card, the socket card, and the memory card. The component layout of the UniPak 2™ is shown in figute 5-2 and described in the following subsections, bof Figure 52. Principal Components Memory canD 72 189 ‘SOCKET CARD 72658 {bs a Figure 6-1. Block Diagram, UniPak 2 Electronics 54 983-00015.3.1 Motherboard ‘The motherboard accepts the signals and power ‘supplies from the J6 of the programmer and transmits them to two identical 72-pin edge connectors and a 50-pin ‘edge connector (see figure 6-3 and schematic 30-72-1661). SSSA AD” Figure 5-3, Block Diagram, Motherboard 5.3.2 Waveform Generator “The waveform generator provides signals required for programming devices. These signals are generated by the blocks shown in figure 5-4, Three major supplies are the Vcc supply, the TE ‘supply and the bit supply, which are used to generate the respective signals. Each supply is software-controled via @ D/A converter. All DACs obtain their reference voltage from the DAC reference. The Vc¢ waveforms are generated by writing appropriate DAC values from the firmware. The rise and fall times are fixed by the slewing rate of the op amp. Two overcurrent detectors are included, one for low currents land one for high currents {above 1 amp). if @ detector is ‘activated, the control latch is reset; the DAC-reference kill ‘output then causes the DAC reference to go to 26", in ‘tun causing all supplies to return to zero, The Vcc supply senses the Vcc voltage at the PROM socket via the Vcc sense ine. This remote sensing compensates forall cable drops between the supply and the socket. a The CE waveforms are generated by using the CE supply in conjunction with one of the pin switches. The voltage level is solected by writing the appropriate value to the CE DAC. One of two rise times is selected by the Control latch and ris-time control circuitry Either the pin 18, 20 oF 21 switch can be enabled by the switch-control latch to output the high-level CS voltage. Switches that are not enabled can output TTL levels. Each pin switch consists of an emitter follower with the collector tied to the CE supply. A current source is provided for the base of each switch to charge the common rise-time capacitor. When the base is released, 2 linear ramp is generated which is truncated at the CE supply level. An NPN-transistor pulldown is included in the switch to provide a 20V/s controlled fall time. Logic Circuitry prevents the pulldown and pullup circuits from being active simultaneously. Figure 6-4. Block Diagram, Waveform Generator 52 981-0001The pin 21 switch uses the same principles as the pin 18 and pin 20 switches. However, a power amplifier output (0/-8V supply) provides the ground reference for the switch, For certain programming algorithms this amplifier ‘output is brought to -BV. The pin 20 switch includes pullup that is connected to the +12/+5V supply, thus allowing the switch in the TTL mode to switch from 0 to 12V as well as from 0 t0 5V. The + 12/ +8V supply consists of a monolithic regulator and a 5.1V zener diode contollad by the switch- control latch. ‘Signals to be applied to the data lines of a device are ‘generated with the bit-supply signals and controlled by the bit-supply switch. The bit supply is nearly identical to the CE supply, but has one less diode in the feedback path, compensating for one less drop in the switch paths. Tho bitsupply switch consists of an emitter follower, a current source, and three rise-time control capacitors. The collector of the emitter follower is connected to the bit supply; the base is connected to the current source and timing capacitor. The control latch can select the timing capacitor and also control the base of the switch. When the base is released, the output ramps linearly to the bit-supply level ‘The output on the bit-supply switch is sent to the address card and to the pin 19 switch; unlike the pin 20, 21 and 18 switches, the pin 19 switch consists of a simple PNP. saturating switch controled by the switch-contro! latch. ‘The current-sense integrator smoothes the transient overcurrent pulses occurring from charging supply capacitors. When an overcurrent condition from the Vcc, CE, bit or (0/-5V) supply exists for sufficient time, the control latch is reset, in turn causing the DAC reference land the supplies to go to zero. The state of the fovercurrent-control line can be read by the address card and used by the programmer to detect shorted devices, Table 6-1 lists the functions ofthe devce-bus pins. The data latch butfers the data bus and holds data to satisfy the long DAC datahold requirement, The adcress latch buters the lower-order address lines and tho primary decode bus. These buored tines are then sent to the decoder and the address latches. The decoder provides decode signas to the DACs forthe Vcc, CE and bit supplies. The switch-contrl latch and the conto latch receive ther clocks from s decoder on the address card Table 5-1. Pin Functions, Device Bus (at J1) een 2 PA, 2 PA zm 2 Ph 2% PR 4 PAY 2 PAL 5 PA mPa, 5 Pay a PR 7 PR BPA, 8 PAL BPA, 8 GND a vee % Ve 3% GND nt 38 GND 2 378i Supoly 12 P20 Pine 4 Pn2t BD Pid 6% Ww ae, 7 ay 2 PO, we Dvercarant PO, 19 Pul-Down Cont “aos 2 Vee PullUp Contal % 2 21 Adaress Supsly “SV Select 48 53 2 Py a Vcc Pube 2 0, 48 adress OAC 24 PO, By PO, 50 Bi Switeh Control 53 981-000153.3 Address Card The address card, illustrated in figure 5:5, provides the device address, device data, data loads and supply ‘measurement capabilty of the UniPak 2"™, The address drivers consist of addressable latches driving the device address bus. The addressable latches receive data from the most-signticant-bit line of the data bus. ‘The data switch register drives PNP data switches Which direct the output of the bit switch to the appropriate device-data line. The PNP switches are driven by current soutees to provide a constant-base drive at al bit-switch voltages. The data sink register is used to shunt programming currents to ground, Device data is read via the data comparators and strobed to the processor bus via the data gate. The comparators receive their reference voltage from the VReF amplifier, which is controlled by the VREF DAC. Loading the device data bus is controlled by the load DAC, the load amplifier and the high/low-range load switch. This supply develops a voltage that is applied to either the low- range or high- and low-range load resistor banks. These resistors are fed through isolation diodes, which are connected to the device data pins. The load sink register ‘enables the UniPak 2™ to select which device data pins will have loads applied to them. The diode clamps limit the voltage applied by the load resistors to the date bus to approximately 5V when the load clamp switch is closed, ___ The supply comparators read the Vcc-sense line, the EE supply and the bit-switch line. The comparator {gate/multiplexor strobes the data from the supply comparators and the overcurrent-read line to the most significant-bit line of the data bus. The socket-select latch provides a control line for the high-/low-range switch and control lines for the socket card, ‘The data latch buffers the data bus and holds data to satisfy the DAC requirements ‘The current source latch will supply @ 4-mA current to 2 device provided there is @ 18V zener diode inside the device on pin 18, 19 oF 20. The address supply 5V select determines whether the address supply DAC or a fixed 6V will be applied to PA0-PAS. + og | T Figure 5-5. Block Diagram, Address Card 987-0001‘The address latch butfers low-order addresses for the secondary decoder. The secondary decoder provides the ‘appropriate signals for the DACs and registers, as well as the latches on this card and on the waveform generator. ‘The Ve0, signal controls the timing of the various clock signals developed by the decoder. 5.3.4 UniPak 2™ Socket Card The socket card distributes to the device sockets the ‘signals developed on the address card and the waveform generator (refer to figure 68) The device address bus (PAQ-PAIS) is generated on ‘the address card and fed to the socket card via the ribbon cable. On the socket card, the bus is fed into CMOS butfers, The address supply DAC connects to the VoD. ‘supply on these buffers. This allows the VOH level to be under DAC control. The address supply BV select lin allows PAQ-PA3 to switch at TTL levels while all other ‘address lies switch between 0” and the address supply lovel. The address clamps provide overvoltage protection ‘and are connected to @ comparator that senses fovervoltage, shutting down ail the supplies when excessive voltage is detected, The device-data bus connects directy to all sockets. Four-bit devices are connected to PDI-PD4. The data pulldowns consist of 1K-ohm resistors and a diode retwork. The data clamp has two modes of operation controlled by the bit switch control line. When voltage pulses are being applied to a device, the pass element of the data clamp is switched out of the Circuit. The op amp and 2.2K-ohm resistor precharge the 0.1 F capacitors to the level set by the bit supply so that the network does not absorb energy from the actual data: line programming pulses. When current pulses are being applied to a device, the pass element is switched into the circuit. The data clamp will be set to a voltage level by the bit supply and wil sink all unnecessary current. igure 6-6. Block Diagram, Socket Card 55 981-0001Pins 18, 19, 20 and 21 of the 24-pin device socket receive signals directly from the waveform generator via the corresponding pin switches. A spike-suppression network is provided where the CE supply charges the RC network. Voc is applied to all sockets through seven diodes. Remote sensing of the voltage at the selected socket is provided by the analog switch of the Vcc-sense ‘multiplexer. When Voc is brought to zero, the device's Vcc lines can be pulled up by the Vcc pulps. The Voc sense-multiplexer and a comparator on the address card are then used to read the Vcc voltage. If 3 device is properly inserted in a socket, the Vcc voltage will be above 2V. If itis in backwards it will be below 1V, and if no device is in the socket, the vottage will approach 4V. ‘The VC pulse switch is used to switch from a level set by the VCC supply to a level set by the bit supply. The ‘switch uses a HEX JFET with an RC network to control the rise and fall times. When the HEX FET is switched on, the VcC isolation diode is reversed biased and the Vcc sense line sees a dummy load. The Vcc pulse switch is applied only to the 24-pin socket. When the switch is on, the .01 uF decoupling capacitor for the 24-pin socket is, switched off ‘The LED decoder is used to light the LEDs below the selected socket. 5.3.5 Memory Card ‘The UniPak 21 memory card ie shown in figure 67 EPROMSs which store the UniPak 2° firmware are contained on the memory card. These EPROMs connect t0 the address bus directly and to the data bus through data buffers = St Figure &:7. Block Diagram, Memory Card 56 981-0001Paging is used whan the 16K x 8 PROMS are installed. Two EPROMs and a latch comprise the primary decoding {for the entire UniPak 2™, The EPROMs connect to the 12 high-order address lines and the R/W fine. Outputs from the primary-decoder latch connect to the secondary decoder and also to secondary decoders on the address card and the waveform generator. A t-of-8 decoder, timed with Ve0,, provides the secondary decoding for the software EPROMS, Two additional lines from this decoder connect to the address card to provide the decode signals or the data gate and comparator gate/multiploxer. ‘Additional outputs from the binary decoder enable the deta buffer during all software-read operations and lower the data gate enable line during any access of the UniPak 2™, 57 The pulse generator consists of a count-up ripple counter, an B-bit latch, and a 10-mHz crystal-controlled clack. The latch is connected to the data bus and is used 10 load the counter, allowing the pulse generator to be programmable between 0.1 and 25.5 us. ‘The current source consists of a fixed 20-mA current source and a programmable current source. The control logie selects which current source is active. The pulse ‘generator can be selected to control the programmable current source. ‘The address supply generates the voltage necessary to drive the CMOS butters located on the socket card. The voltage is generated from the 24V power supply using an NPN transistor driven by an op amp. The input of the op ‘amp is 8 DAC, which allows the voltage to be software selectable 91-0001APPENDIX A FAMILY AND PINOUT CODES ERROR CODES KEY TO HEADINGS AND FOOTNOTES Device Part Number. The number essigned by the device rmanufactoree, Family Code. A 2cigt number that designates the programming algorithm. Pinout Code. A 2ciit umber used to diferonta typee based on pin assigrment and avey size doviee Software Version, A number inthis column specifies the est software version of the 22A that wil program the ‘evice tothe manufacture’ latest specications Approval Status. The following is an explanation of the ‘symbols used inthis column, ‘A. Written approval obtained (0 - Davie is obsolete and no longer in production. No approval can be obtained. Aigrthm has been used and ‘approved in previous Data 1/0 equipmant. ' - This algorithm isin the process of submission for ‘anufocturer approval. The algorithm hes been tested by Dota 1/0 or the manufacturer, but no representation 25 0 yield love ie made or iid CAUTION Velid family code and a valid pinout ‘may be combined to produce an invalid combination for your davies In this table. All famity/pinout in this table 3. Data 1/0 sasumes cosas Published fare considered" ‘no responsiblity produced by entry of family/pinout combinations. At 927-0001Table A-1. UniPak 2™ Family and Pinout Codes or Family and Software Approval | “bar Famly and Software Approval Number Pinout Codes ‘Version Adapter “Statur” | Number Pinout Codes “Version Adapter" Statue ‘Advanced Micro Davices [Advanced Mlero Devices (Continued) Firma a2 987-0001(Continued) + Famly and Sofware Approval Family and Softw Approval Number -Panout Codes Varson’ Adapter ‘Status | Number Pinout Codes Version’ Adaptor Status rojas Fajen (Continued Aa 997-0001Table A-1. UniPak 2™ Family and Pinout Codes (Continued) Devin Device Pent Family and Software Aoprovt | “Pare Famty and Software Approval Number Pinout Codes Version Adapter “Status | Number Pinout Codes Version Adapter Statun Hien (Continued Intl (Continued! Aa 981-0008‘Table A-1, UniPak 2™ Family and Pinout Codes (Continued) Device Device Pen Family and Sofware Approval 4 Famly and Software Approval Number Pinout Codes ‘Varsion Adapter “Statue | Number Pout Codes ‘Version Adapter Statue Monoihie Memor Monolithic Memorae (Continued) AS 981-0001Table A-1. UniPak 2™ Family and Pinout Codes (Continued) Device Device Pare Fomty and Software aporovat | “Pan Famly and Software Approval Number Pinout Codes Version Adapter “Statue | Number“ Plnout Codes ‘Version Adapter “Statue Mostok National Semiconductor (Continved) ane = 2 oe | Mopon Etecuie Company. As 92-0001Table A-1. UniPak 2™ Family and Pinout Codes (Continued) Part amy and Software Approval Family and Software Approval note praout'Gadea ‘Version’ Adapter “Starue’ | Number Pinout Codes ‘Version. Adapter Statue Nippon Eletric Company Ld. (Continued) Raytheon (Continued oi ee u nw 4 me * = om S| Rocka Reytheon Se0a me 0 on | S68 Tectnotosy 08 » ow 2 | sioneticn a7 81-0001Table A-1. UniPak 2™ Family and Pinout Codes (Continued) art Famiy and Software ity sod Software Approval Number Pinout Codee ‘Version Adapter Pinout Codes ‘Version Adapter "Statue Signotics (Continued! “Texas introments (Continued) AB 961-0001ERROR CODES NOTE In the case of an error condition, be sure that the family and pinout codes are correct for the PROM installed: refer to table A-1 in appendix A to cross check family and pinout codes. CODE NAME DESCRIPTION a egal-Bit Ervor ‘The device cannot be programmed due to already programmed locations of incorrect polarity 2B First Pass Verity Error ‘The device data was incorrect on the frst pass of the automatic verify sequence during device programming. 24 ‘Second-Pass Verify Error The device data was incorrect on the second pass of the automatic verity sequence during device programming. 2 Insufficient RAM Due to the value of the Begin RAM Address, there is insufficient RAM to program the device, or the total allotment of RAM resident is less than the Word limit of the device. 30 No Programming Valid family and pinout codes are not selected, or family code selection not Algorithm followed by pinout code selection. 3 Excesive Current Drain The operation aborted due to excessive current drain by a device. 32 Backward Device The operation aborted due to Vc¢ level test indicating a backward device. 35 Faulty Chip Select ‘The operation aborted due to data being present while a device is disabled, 7 Socketing Error Operation aborted due to a low Vcc level indication on sockets presumed to be empty. A device may be in the wrong socket, oF two or more devices may be socketed simultaneously 38 Wiogal Operation During An illegal or invalid operation was attempted during calibration Calibration 39 Failure to Lock ‘The security bit did not program and the device is not locked, Security Fuse 70 Faulty Bit Supply ‘The operation aborted due to @ faulty bit supply. Do not use UniPak 2” unt repaired. n Faulty CS Supply ‘The operation aborted due to @ faulty CS supply. Do not use UniPak 2" until repaired. n Faulty Voc Supply ‘The operation aborted due to @ faulty V¢c. Do not use UniPak 27 until repaired. al No Identifier Found The device does not have an electronic identifier. The electronic identifier mode cannot be used. an Invalid Identifier ‘The electronic identifier of the device has been read and it indicates that the device cannot be programmed using the selected family and pinout codes. Consult table A-1 for the correct family and pinout codes. Try again using these codes. Be Byte Erase Error The device does not have a byte erase mode. Block limits must be removed and €@ chip erase performed. The entire chip may then be reprogrammed, BI Chip Erase Error The device does not have a chip erase mode. Ag 83-0001‘This page lot itertonaty blank Aso 961-0001APPENDIX B TIMING DIAGRAMSAPPENDIX C SCHEMATICS 320-702-1850 Rev E Memory Card 30701-1855 Rev B Address Card 30702-1859 Rev D Socket Card 30702-1661 Rev A Motherboard 390-701-1690 Rev A Waveform Generator4 EBbon 2a VEC CTR] TESCO * [om [orn] APPR D] OATE a (288) ese PULSE [a RELEASE Vee [el a, fee. GNP) OEY, DATA BUFFERS SOFTWARE PROMS $e [14] [ojos [2 een are tlie 73 Tales v7 a c ECN 4768. feu re: Zi PULSE GENERATOR ceo 3788 GI | 2%8[F. q alas, Ey ccna vor[rs ul dd Dog[N rider 2 A, us 005/12] cafe rasies J. 04m > | ooshrs ous tH Peael ar ca bebe an 20, [10 ey a = ge BT Ioan ane 2 NOTES: umess Sivenwise sreciie, EAE {RESISTORS ARE 74h A408, OM c 2 CAPACITORS AME 20 AO WM HHCROPARADS ys oF 3. LAST REFERENCE DESIOWATORS USEDE 74 Le 88,014, cR4,VR3,U23,03,"10P2 Ao ax 9 hertnence DESINATORS WOT USED: mt DECODE LaTcH trenazsn “ 4 cOMECTIONS HOT SHOW: 42 leo : ee] we. : 134 rasoa 200°F — Has04 va, 14 z >” 7] 72,5 fis —- a n is + Me 373 a 8 uwseo cates DATA BUS . |e ear p> B ‘CURRENT DAC PULSE EN fURgENT onc conn [E>-002 insta Jet AND JPEN FOSHTEN 8, “G08 msTa i ANO JP POSTION ae 7 Sa BEE [— teRayss one & aeprone e 702-650-002 SHOWN 702-1650-003 AS NOTED R/ A woos [aenceat«| DATA I/O ae “S) "SCHEMATIC DIAGRAM, rie a MEMORY BOARD fl aa » PARI EIEY x 8Rewe freeze [reel eon S85] FP 30-702-1650 } PAcEVPRED Ca C1 CA OS OF mn an mo2 4 DATA BUS (183) aay ase commot REP EPA Soon SORTREL PAS 20.Ma conreot/ ooness oAc & CURRENT SOURCE +48 BIT SwiTcH gee 55 R] Blosae vt on SX 19) Peg = oman : ADDRESS SUPPLY 0 ADDRESS SUPPLY DATAI/O = me | SCHEMATIC DIAGRAM, 3 MEMORY BOARD Sx enor [oPme | 350-702-16508 | z | 6 | 5 v 4 | 3 2 i a STOR oa [EAR ROTOR PAI, PAIZ, PATA = P87 pag PAD ; 3 [eens efit a fs PEPE SE ISR PP 9GOG LATCHED ADDRESS at ho At? ZocKer _S\cunRENT SOURCE 4 aola ADDRESS pata ‘SELECT PIN 18 Peres Ho ‘ace eee? ADDRESS CLAMP SWITCH ae rasase] | “LatcH ay G9PIN 19 af D> é opness suePty eke — Owes sal oe sz SECONDARY “ ONE (over comneNT enantesao as[B a7[e eg 6 oo (vce sense é 3°) (Pw 20 a BIT SW.eom 1 7] enn eae GATED DATAwse) LATCHED DATA@oe SUPPLY COMPARATORS, NOTES: untess ornenwise specifics 1 ALL RESISTORS ARE LAW AND IN-OHMS, 9%. 2.ALL CAPACITORS ARE IN MICROFARAOS.IO%, NOT SHOWN “oR, P01, C18, 029,17. ROB, RID, 1 TENG] -5 | Guo NOT USED CLERHLUS, U7, UE, UB, UI0, Ui2,UI8, U8, R28, R10 uaz [ews] POT 4 DELETED AT REV. eer UNUSED GATES: og | 3 pps m4 30-701-1655-002 SHOWN “ : ee & [an Sites] bes Ge el wmone Teeetn| DATAI/O al | Dee] Pp pe — Teter omg [rr SCHEMATIC GIAGRE ofl A 188 ee re] ase Teas) | | we - Yatsos eat She ADDRESS CARD ono fe3fee]o9} Ps hi] G2 4] G5] De 2] Y py ¥ ze wpe. Ppl iS Lo Da! 602 003 004 DOS DOE 007 DOB “ROG 8 18 rais0s PAGE 17PAGED [EEE pam 27 afvr bee noe EEE8 7 | 6 5 Vv 4 3 2 [ 1 2 amy oa ESCRTION om oar arr Bad eaT or DATA COMPARATORS: ACTS SEE SHEET OE "oy . bir switcn Laroneo ot Data Z cae bara. sin revister L(G) roe ® 3 Recarea ences) Ree) came me ga (Gn ee Se 1) ate Le, fhe 4 at oa 8 ee (eles > = =| DATAI/O a pw ewan” Pare owerncre uness | TLE SCHEMATIC DIAGRAM , om [wrc-ewan—Joare] xxx = ADDRESS CARD gpa - = aa “ RANGE SWITCH prox mts fore me a © | m 320-701-1685 a Le z8 | 7 “| 6 I 5 vy 4 =) 2 t a R12 Ra CE SPIKE CLAMPS: a ce O— he [igee a yrmue rmie pawzo ewes roi poe p03 poe FDS FOS FO? POR Release pureey “3 ss TNO OOO 660 66 6 8 6 © ewes ree Lote | ecw a63r a we tk ok Th ok I 0 ey Vo BRE Pk R28 op 121 = me DATA CLAMPS a ee 3@ 4vec ens cos 5 eae. e 2 uly J! to 5 he

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