Siemens S7 Mnemonic Description Mnemonic Description

BTI BCD to Integer JO Jump if OV = 1

Statement List (STL) Change Byte JOS Jump if OS = 1
sorted alphabetically CAD Sequence in ACC1 JP Jump if Plus
Mnemonic Description Double Jump if Plus or
Call JPZ
) Nesting Closed CALL Zero
FC,FB,SFC,SFB Jump
Add Integer JU
+ Constant (16, 32- Exchange Address Unconditional
Bit) Register 1 JUO Jump if Unordered
CAR
Add ACC1 to with Address JZ Jump if Zero
+AR1 Address Register Register 2
L Load
1 Change Byte
CAW Sequence in ACC1 Load Current
Add ACC1 to Timer/Counter
+AR2 Address Register Word
L Value into ACC1
2 CC Conditional Call as Integer (i.e.
+I +D +R Add ACC1 and ACC2 L T 32)
Subtract ACC1 CD Counter Down Load Length of
-I -D -R L DBLG
from ACC2 Exchange Shared Shared DB in ACC1
Multiply ACC1 and CDB DB and Instance Load Number of
*I *D *R L DBNO
ACC2 DB Shared DB in ACC1
Divide ACC2 by CLR Clear RLO (=O)
/I /D /R Load Length of
ACC1 COS Cosine of Angles L DILG Instance DB in
= Assign ACC1
CU Counter Up
==I ==D ACC2 is equal to Load Number of
DEC Decrement ACC
==R ACC1 L DINO Instance DB in
Double Integer to
<=I <=D ACC2 is less then DTB ACC1
BCD
<=R equal to ACC1
Double Integer to Load Status Word
<>I <>D ACC2 is not equal DTR L STW
Floating-Point into ACC1
<>R to ACC1
ACC2 is less then ENT Enter ACC Stack Load Address
<I <D <R EXP Exponential Value LAR1 Register 1 from
to ACC1
ACC2 is greater FN Edge Negative ACC1
>=I >=D Load Address
then equal to FP Edge Positive
>=R Register 1 with
ACC1 Enable LAR1 <D>
ACC2 is greater Double Integer
>I >D >R FR Timer/Counter (32-Bit Pointer)
then to ACC1 (Free) Load Address
A And INC Increment ACC Register 1
A( And with Nesting LAR1 AR2
Ones Complement from Address
Open INVD
Double Integer Register 2
ABS Absolute Value Ones Complement Load Address
ACOS INVI
Arc Cosine Integer LAR2 Register 2 from
AD AND Double Word ITB Integer to BCD ACC1
AN And Not Integer to Double Load Address
ITD Register 2 with
And Not with Integer LAR2 <D>
AN( JBI Jump if BR = 1 Double Integer
Nesting Open
JC Jump if RLO = 1 (32-Bit Pointer)
ASIN Arc Sine
Load Current
ATAN Arc Tangent Jump if RLO = 1
JCB Timer/Counter
with BR
AW AND Word LC Value into ACC1
JCN Jump if RLO = 0 as BCD (i.e. LC T
BE Block End
JL Jump to Labels 32)
Block End
BEC JM Jump if Minus
Conditional LEAVE Leave ACC Stack
Block End Jump if Minus or
BEU JMZ
Unconditional Zero LN Natural Logarithm
Program Display JN Jump if Not Zero
BLD Instruction Jump if RLO = 0
JNB LOOP Loop
(Null) with BR
BTD BCD to Integer JNBI Jump if BR = 0
Mnemonic Description Mnemonic Description Formats
Save RLO in MCR SET Set RLO (=1) B# Byte (8 bit)
MCR(
Stack, Begin MCR SF Off-Delay Timer W# Word (16 bit)
)MCR End MCR SIN Sine of Angles L# Long (32 bit)
MCRA Activate MCR
Shift Left Double S5 Time
MCRD Deactivate MCR SLD S5Time#
Word (2H46M30S0MS)
Division SLW Shift Left Word IEC Time
MOD Remainder Double T#
SP Pulse Timer (24D20H31M23S648MS)
Integer IEC Date
Twos Complement SQR Square D#
NEGD (2007-10-28)
Double Integer SQRT Square Root Time of Day
Twos Complement Shift Right TOD#
NEGI SRD (23:59:59.999)
Integer Double Word C# BCD
Negate Floating- SRW Shift Right Word
NEGR P# Pointer Address
Point Number Retentive On-
NOP 0 Null Instruction SS 2# Binary
Delay Timer
NOP 1 Null Instruction Shift Sign Double 16# Hexadecimal
SSD
NOT Negate RLO Integer Local stack
#Symbol
O Or Shift Sign variable
SSI
Integer // Comment
Or with Nesting
O( T Transfer
Open OBs
Transfer ACC1
OD OR Double Word T STW
into Status Word 1 Main Program Scan
ON Or Not Toggle ACC1 with
TAK 10-17 Time of Day
Or Not with ACC2
ON( 20-23 Time Delay
Nesting Open TAN Tangent of Angles
OPN Open a Data Block 30-38 Cyclic (Periodic)
Transfer Address
OW OR Word TAR1 Register 1 to 40-47 Hardware
POP Pop accumulators ACC1 80 Time Error
PUSH Transfer Address 81 Power Supply Error
Push accumulators
Register 1 to 82 Diagnostic Interrupt
R Reset TAR1 <D>
Destination (32-
Reset Insert/Remove Module
Bit Pointer) 83
Timer/Counter Interrupt
R Transfer Address
Value (i.e. R T 84 CPU Hardware Fault
Register 1
32) TAR1 AR2 85 Program Cycle Error
to Address
Rotate Left Register 2 Rack Failure –
RLD
Double Word Transfer Address 86 Missing Profibus
Rotate ACC1 Left TAR2 Register 2 to device
RLDA
via CC 1 ACC1 87 Communication Error
RND Round Transfer Address 100 Warm restart
Round to Lower Register 2 to
RND- TAR2 <D> 101 Hot restart
Double Integer Destination (32-
Round to Upper Bit Pointer) 102 Cold restart
RND+ 121 Programming Error
Double Integer TRUNC Truncate
Rotate Right Unconditional 122 I/O Access Error
RRD UC
Double Word Call
Rotate ACC1 Right X Exclusive Or
RRDA
via CC 1
Exclusive Or with
S Set X(
Nesting Open
Set Counter XN Exclusive Or Not
S Preset Value
Exclusive Or Not
(i.e. S C 15) XN(
with Nesting Open
Save RLO in BR
SAVE Exclusive Or
Register XOD
Double Word
SD On-Delay Timer XOW Exclusive Or Word
Extended Pulse
SE
Timer

v2.0