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#1

(************************************)
(* *)
(* Operaciones complejas con *)
(* memoria intermedia *)
(* *)
(************************************)
VAR
(************************************)
(* Variable de entrada *)
S1 AT %IX0.0 : BOOL;
S2 AT %IX0.1 : BOOL;
S3 AT %IX0.2 : BOOL;
S4 AT %IX0.3 : BOOL;
S5 AT %IX0.4 : BOOL;

(***********************************)
(* Variable de salida *)
H1 AT %Q2.0 : BOOL;
LAMPARA_M1 AT %Q2.1: BOOL;
LAMPARA_M2 AT %Q2.2: BOOL;
LAMPARA_M3 AT %Q2.3: BOOL;
(***********************************)
(* Memoria intermedia *)
M1 : BOOL; (* Memoria intermedia de la 1a red parcial *)
M2 : BOOL; (* Memoria intermedia de la 2da red parcial *)
M3 : BOOL; (* Memoria intermedia de la 3ra red parcial *)
END_VAR
(***********************************)
(* 1a red parcial *)
LD S2
OR S4
AND S3
ST M1
(***********************************)
(* 2a red parcial *)
LD S1
AND S2
OR M1
ST M3
(***********************************)
(* 3a red parcial *)
LD S2
OR S3
AND S1
ST M2
(***********************************)
(* Red principal *)
LD M3
AND S5
OR M2
ST H1

#2
(************************************)
(* *)
(* Operaciones complejas con *)
(* memoria *)
(* *)
(************************************)
VAR
(************************************)
(* Variable de entrada *)
S1 AT %IX0.0 : BOOL;
S2 AT %IX0.1 : BOOL;
S3 AT %IX0.2 : BOOL;
S4 AT %IX0.3 : BOOL;
(***********************************)
(* Variable de salida *)
MOTOR AT %Q2.7 : BOOL;
LAMPARA_M1 AT %Q2.1: BOOL;
LAMPARA_M2 AT %Q2.3: BOOL;
(***********************************)
(* Memoria intermedia *)
M1 : BOOL; (* Memoria intermedia de la 1a red parcial *)
M2 : BOOL; (* Memoria intermedia de la 2da red parcial *)
END_VAR
(***********************************)
(* Monitoreso de Red *)
(***********************************)
(* 1a red parcial *)
LD S1 AND S2
ST M1
(***********************************)
(* 2a red parcial *)
LD S3 AND S4
ST M2

(***********************************)
(* Red principal *)
LD M1 OR M2
ST MOTOR
(***********************************)
(* Memoria Principla *)
LD M1 ST LAMPARA_M1
LD M2 ST LAMPARA_M2

#3
(************************************)
(* *)
(* Operaciones complejas con *)
(* memoria *)
(* *)
(************************************)
VAR
(************************************)
(* Variable de entrada *)
S1 AT %IX0.0 : BOOL;
S2 AT %IX0.1 : BOOL;
S3 AT %IX0.2 : BOOL;
S4 AT %IX0.3 : BOOL;
(***********************************)
(* Variable de salida *)
MOTOR AT %Q2.7 : BOOL;
LAMPARA_M1 AT %Q2.1: BOOL;
LAMPARA_M2 AT %Q2.3: BOOL;
(***********************************)
(* Memoria intermedia *)
M1 : BOOL; (* Memoria intermedia de la 1a red parcial *)
M2 : BOOL; (* Memoria intermedia de la 2da red parcial *)
END_VAR
(***********************************)
(* Monitoreso de Red *)
(***********************************)
(* 1a red parcial *)
M1 := S1 AND S2;
(***********************************)
(* 2a red parcial *)
M2 := S3 AND S4;
(***********************************)
(* Red principal *)
MOTOR := M1 OR M2;
(***********************************)
(* Memoria Principla *)
LAMPARA_M1 := M1;
LAMPARA_M2 := M2;

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