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c6h Xoc Guide v04
c6h Xoc Guide v04
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BIOS 5803
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- Timer is skewed when changing REFCLK in Windows 8+. Additionally the default systimer
has issues with OS ratio changes unless HPET is enabled. To summarize, always enable
HPET on this platform.
The above values are based on the Auto-rules and are a good indication of the margins. PCI
Express bandwidth values are at default 100MHz REFCLK and increases linearly when
increased. From internal testing most PCI Express devices including graphics cards and storage
controllers handle increased REFCLK very well. At the moment there’s no list with proven
devices.
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1.3. USB
I/O configuration
1.4. SATA
All 6x SATA-ports are from the Promontory chipset.
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2. DRAM overclocking
DRAM frequency on ambient cooling, fully stable
- Only DRAM timings available are TCL, TRCRDD, TRCWRD, TRPT and TRAS. The
only way to affect sub-timings is by lowering your DRAM ratio (essentially behaving like
strapping) and increase reference clock. For example at 2400 ratio TWCL=11, at 2133 ratio
TWCL=10 and at 1866 ratio TWCL=9.
- Most CPUs have a memory “hole” where it’s unable to train memory from 3350-3450
MHz up to 3500-3600. This means you might be unable to run 3400 MHz DRAM frequency
but 3600 is OK.
- DRAM controller is always running Command Rate = 1T
- Best performance with Samsung B-die is achieved at 145 MHz REFCLK with 2400 DRAM
ratio (3480 MHz) at 11-10-10-10-22 timings. Alternatively 135 MHz REFCLK with 2666
DRAM ratio and 11-11-11-11-22 timings. This depends on the CPU/MB/DRAM capability.
- DRAM Ratio and timings are applied very early during POST before BIOS has control
which might give problems when changing both REFCLK and DRAM Ratio, if you get
problems because DRAM Ratio applies first use Retry button.
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- AMD has their own DRAM recovery mechanism that automatically lowers the DRAM
Ratio and resets timings if DRAM training fails (F9 → 0d) during early POST). If you reset
at this point you might get stuck at CF or 90 POST codes, manually reset again and the
system should POST with the lower ratio and default timings. AMD CBS settings are also
reset when this happens.
- Use MemTweakIt to read out sub-timings.
3. LN2 overclocking
- Enable LN2 mode and load the LN2 profile for a starting base
- Platform is Cold Bug/Cold Boot Bug free, except for PCIE/DRAM issues.
- Use top 4x blue USB3.0 ports from the CPU
- Put VGA in 2nd PCIE slot if not running 3D benchmarks
- Typically you want to start with 141 REFCLK at 2133 ratio (3000 MHz DRAM frequency)
at 11-11-11-11-22 timings, CPU Core Ratio = 28, CPU SOC Voltage = 1.20V, DRAM
Voltage = 1.80V using Samsung B-die memory.
- The CPU IMC has problems with low
temperatures (below 20*C) which means
memory frequency will be lower on LN2. A
good CPU is able to do up to 3500 MHz
DRAM on LN2. An average CPU will do
3200 MHz. Really bad ones might be
limited even to 2600 MHz on LN2.
Additionally the behavior varies with
temperature, see typical behavior in the
graph to the right. Increasing the 1.8V PLL
voltage can help improve this situation, as
well as setting PLL Reference Voltage to
55 (best value for your setup might differ).
- The CPU PCIE controller also has problems on LN2, typically below -120*C and especially
after cold reset (power down). The behavior is like when pushing high REFCLK (getting
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stuck at 54/55/E4 POST codes). For best margin use 105-140+ MHz REFCLK and 1.05V SB
Voltage = 1.30V, default 100MHz has problems at very low temperatures. You can also try
PLL Reference Voltage under Tweaker’s paradise for improved margins, its behavior is
quantized meaning several different values needs to be tested. Typically 55 is a good starting
point.
- Safe Boot is tuned to be able to POST at lowest possible temperature, recovery options under
LN2 mode:
o Safe Boot = 105 REFCLK + CBB settings + safe settings
o 4-second Power Button = 100 REFCLK + CBB settings
o CMOS clear = 100 REFCLK + CBB settings + safe settings
- You might get POST issues if DRAM voltage is too high (above 1.8V, stall at 54/55 POST
code)
Ambient LN2
Ambient max LN2 max
recommended recommended
CPU Core
1.40V Up to 1.45V 1.80V Up to 1.95V
Voltage
SOC Voltage 1.15V Up to 1.30V 1.20V Up to 1.40V
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DRAM Voltage 1.40V Up to 1.90V 1.80V Up to 1.90V
1.8V PLL Voltage 1.80V Up to 2.10V 3.00V Up to 3.20V
1.05V SB Voltage 1.05V Up to 1.40V 1.30V Up to 1.40V
1.8V Standby
1.80V Up to 2.10V 2.10V Up to 2.30V
Voltage
2.5V SB Voltage 2.50V Up to 2.80V 2.70V Up to 2.80V
1. Depends on the DRAM sticks, the limit is considered from CPU IMC side.
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5. Common POST codes
Q-Code Description
8 Equivalent to 00 on other platforms, CPU not operational
4b/FA No DRAM detected/installed
DRAM Training failed. Note that 0d is also displayed during final
F9(→0d)
POST before boot.
90/CF DRAM recovery, reset to proceed
06 DRAM unstable
3b DRAM unstable, could be because of unsupported DRAM Ratio
0C Displays at runtime when CPU enters “OC Mode”
6. Known issues
1. After BIOS flash reset your bios date/time, crazy values can cause weird issues with
certain software
2. You might get up to 3 POST attempts in some scenarios including CMOS clear, changing
CPU and sometimes when using Safe Boot.
3. If you disable SMT it will not re-enable until CMOS clear even if changing the option.
Additionally S3 resume (sleep mode) is not working if SMT is disabled.
4. If DRAM Ratio is 2666 or higher TCL will be rounded to nearest even higher number
(i.e. TCL=15 → 16)
5. Safe boot is not working 100% with DRAM Ratio/timings, might have to clear CMOS in
some cases to restore defaults.