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Instruction Op-Code Operand Bytes Machine - Cycles T - States Detail
Instruction Op-Code Operand Bytes Machine - Cycles T - States Detail
Add
immediate to
ACI Accumulator
Instruction ACI 8 bit data 2 2 7 with Carry
Add register
to
accumulator
ADC ADC Reg., Mem. 1,1 1,2 4,7 with carry
Add register
to
ADD ADD Reg., Mem. 1,1 1,2 4,7 Accumulator
Add
immediate to
ADI ADI 8-bit, data 2 2 7 accumulator
Logical AND
with
ANA ANA Reg., mem. 1,1 1,2 4,7 Accumulator
AND
immediate
with
ANI ANI 8-bit, data 2 2 7 accumulator
Unconditiona
l Subroutine
CALL CALL 16-bit address 3 5 18 call
Complement
CMA CMA None 1 1 4 Accumulator
Complement
CMC CMC None 1 1 4 Carry
Compare
with
CMP CMP Reg., Mem. 1,1 1,2 4,7 accumulator
Compare
Immediate
with
CPI CPI 8-bit 2 2 7 accumulator
Decimal
Adjust
DAA DAA None 1 1 4 Accumulator
Add register
pair to H and
DAD DAD Reg.Pair 1 3 10 L registers
Decrement
DCR DCR Reg., Mem. 1,1 1,3 4,10 source by 1
Decrement
register pair
DCX DCX Reg. Pair 1 1 6 by 1
Disable
DI DI None 1 1 4 Interrupts
Enable
EI EI None 1 1 4 Interrupts
Halt and
5 or enter wait
HLT HLT None 1 2 or more more state
Input data to
accumulator
from a port
8-bit port with 8-bit
IN IN address 2 3 10 address
Increment
contents of
register/Mem
INR INR Reg.,Mem. 1,1 1,3 4,10 ory by 1
Increment
register pair
INX INX Reg. Pair 1 1 6 by 1
Jump
unconditional
JMP JMP 16 bit 3 3 10 ly
Load
accumulator
LDA LDA 16 bit address 3 4 13 direct
Load
accumulator
LDAX LDAX B/D reg. Pair 1 2 7 indirect
Load H and L
registers
LHLD LHLD 16 bit address 3 5 16 direct
Load
Reg. Pair, 16 Register Pair
LXI LXI bit data 3 3 10 Immediate
Move
Reg., Data 2 2 7 immediate 8
MVI MVI Mem., Data 2 3 10 bit
Logically OR
with
ORA ORA Reg., Mem. 1,1 1,2 4,7 Accumulator
Logically OR
ORI ORI 8 bit data 2 2 7 Immediate
Output Data
from
Accumulator
8-bit port to a port with
OUT OUT address 2 3 10 8 bit address
Load
program
counter with
PCHL PCHL None 1 1 6 HL contents
POP OFF
Stack to
POP POP Reg. pair 1 3 10 register pair
Push register
pair into
PUSH PUSH Reg. pair 1 3 12 stack
Rotate
accumulator
left through
RAL RAL None 1 1 4 carry
Rotate
accumulator
right through
RAR RAR None 1 1 4 carry
Rotate
Accumulator
RLC RLC None 1 1 4 Left
Rotate
Accumulator
RRC RRC None 1 1 4 Right
Return from
subroutine
unconditional
RET RET None 1 3 10 ly
Read
Interrupt
RIM RIM None 1 1 4 Mask
Substract
source and
borrow from
SBB SBB Reg., Mem. 1,1 1,2 4,7 accumulator
Aubstract
immediate
SBI SBI 8 bit data 2 2 7 with borrow
Store H and
L registers
SHLD SHLD 16 bit address 3 5 16 direct
Set Interrupt
SIM SIM None 1 1 4 Mask
Store
Accumulator
STA STA 16 bit 3 4 13 Direct
Store
Accumulator
STAX STAX B/D reg. pair 1 2 7 Indirect
Substract
register or
memory from
SUB SUB Reg. , Mem. 1,1 1,2 4,7 Accumulator
Substract
immediate
from
SUI SUI 8 bit data 2 2 7 accumulator
Exchange H
and L with D
XCHG XCHG None 1 1 4 and E
Exclusive OR
with
XRA XRA Reg., Mem. 1,1 1,2 4,7 accumulator
Exclusive OR
immediate
with
XRI XRI 8 bit data 2 2 7 accumulator
Exchange H
and L with
XTHL XTHL None 1 5 16 top of stack