Toshiba NB300-305 PDF

A B C D E
1 1
Compal Confidential
2 2
Tampa Bay NPVAA

LA-5841P Schematics Document
Intel PineView Processor/ Tiger point
3
2009-10-21 3
REV: 1.0
4 4
Security Classification Compal Secret Data Compal Electronics,Inc

Issued Date 2009/10/21 Deciphered Date 2012/10/21 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5841
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401799
Date: Tuesday, December 15, 2009 Sheet 1 of 39
A B C D E
A B C D E
Compal Confidential
Model Name : NPVAA
File Name : LA-5841P
1
Fan Control Thermal Sensor Clock Generator 1
page 24
EMC1402 SLG8SP556VTR
Intel Pineview-M page 5 page 8
CRT Conn.
page 10
(22x22mm) Memory BUS(DDRII) 200pin DDRII-SO-DIMM
page 7
LED Conn. LVDS

page 9 ONE CHANNEL 1.8V DDRII 667
page 4,5,6
2
DMI x 2 USB Conn X3 Int. Camera 2
PCIeMini Card PCIeMini Card USB port 0,1,4 USB port 7

WWAN WLAN page 16 page 17
USB port 6 USB port 5 USB USB
page 15 page 15
5V 480MHz 5V 480MHz BT conn
PCIeMini Card PCIeMini Card USB port 2
PCIe 1x [2,4]
WLAN GPS 1.5V 2.5GHz(250MB/s)
Tiger Pointer page 17
PCIe port 2 PCIe port 4
page 15 page 15
PCIe 1x
(17x17mm)
RJ45 RTL8103EL 10/100M 1.5V 2.5GHz(250MB/s)
page 20
SATA port 0 SATA HDD
PCIe port 3 page 20 5V 1.5GHz(150MB/s)
page 17
USB page 11,12,13,14

3
Card Reader 3
RTS5159 2IN1 5V 480MHz
RTC CKT.
page 13
USB port 3 page 21 3.3V 24.576MHz/48Mhz
HD Audio
3.3V 33 MHz
LPC BUS
DC/DC Interface CKT. HDA Codec
page 26 ALC272-GR
page 18
Debug Port ENE KB926 D3

Power Circuit DC/DC page 24 page 22
AMP.
page 28~34 Int. TPA6017
MIC CONN MIC CONN HP CONN
page 19 page 19 page 19 page 19
Touch Pad Int.KBD SPI ROM GSENSOR
page 25 page 24 page 24 page 23
4
IO/B SPK CONN 4
page 16 page 19

SCHEMATICS,MB A5841
D
401799
A B C D E
A B C D E
Voltage Rails
1 SIGNAL 1
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 G3
Full ON HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+0.89VS 0.89VS GFX support voltage ON OFF OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.05VS VCCP switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF OFF
+1.8VS 1.8VS switched power rail ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
BTO Option Table
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
2 +3V_WLAN 3.3V power rail for LAN ON ON OFF OFF 2
+3VS 3.3V switched power rail ON OFF OFF OFF Function Mini PCI-E SLOT STAR
+5VALW 5V always on power rail ON ON ON OFF
+5V_SB 5V power rail for SB ON ON OFF OFF
description
+5VS 5V switched power rail ON OFF OFF OFF explain Wi-Fi WiMax 3GGPS 3G POWER SAVING
+VSB VSB always on power rail ON ON ON OFF
+RTCVCC RTC power ON ON ON ON
BTO WLAN@ WIMAX@ 3GGPS@ 3G@ STAR@
Function
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
description
explain
BTO
3 3
EC SM Bus1 address EC SM Bus2 address

Device Address Device Address
Smart Battery 0001 011X b EMC1402 1001 010X b
Tiger point SM Bus address

Device Address
Clock Generator 1101 001Xb

(SLG8SP556VTR)
DDR DIMMA 1010 000Xb
4 4

SCHEMATICS,MB A5841
Custom D
401799
A B C D E
5 4 3 2 1
<7> DDR_A_DQS#[0..7]
PINEVIEW_M
<7> DDR_A_D[0..63]
U1B
REV = 1.1
<7> DDR_A_DM[0..7]
DDR_A_MA0 AH19 AD3 DDR_A_DQS0
<7> DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DDR_A_MA2 AK18 AD4 DDR_A_DM0
<7> DDR_A_MA[0..14] DDR_A_MA3 DDR_A_MA_2 DDR_A_DM_0
AK16 DDR_A_MA_3
DDR_A_MA4 AJ14 AC4 DDR_A_D0
DDR_A_MA5 DDR_A_MA_4 DDR_A_DQ_0 DDR_A_D1
AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1
PINEVIEW_M DDR_A_MA6 AK14 AF4 DDR_A_D2
U1A DDR_A_MA7 DDR_A_MA_6 DDR_A_DQ_2 DDR_A_D3
AJ12 DDR_A_MA_7 DDR_A_DQ_3 AG2
DDR_A_MA8 AH13 AB2 DDR_A_D4
D DDR_A_MA9 DDR_A_MA_8 DDR_A_DQ_4 DDR_A_D5 D
REV = 1.1 AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
DMI_RXP0_C F3 G2 DMI_TXP0 <12> DDR_A_MA10 AK20 AE2 DDR_A_D6
DMI_RXN0_C DMI_RXP_0 DMI_TXP_0 DDR_A_MA11 DDR_A_MA_10 DDR_A_DQ_6 DDR_A_D7
F2 DMI_RXN_0 DMI_TXN_0 G1 DMI_TXN0 <12> AH12 DDR_A_MA_11 DDR_A_DQ_7 AE3
DMI_RXP1_C H4 H3 DMI_TXP1 <12> DDR_A_MA12 AJ11
DMI_RXN1_C DMI_RXP_1 DMI_TXP_1 DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TXN1 <12> AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
DMI DDR_A_MA_14 DDR_A_DQS#_1 DDR_A_DM1
DDR_A_DM_1 AA9
DDR_A_WE# AK22 AB6 DDR_A_D8

<7> DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
<7> DDR_A_CAS# DDR_A_CAS# DDR_A_DQ_9
<8> CLK_CPU_EXP# N7 L10 DDR_A_RAS# AK21 AE5 DDR_A_D10
EXP_CLKINN EXP_RCOMPO <7> DDR_A_RAS# DDR_A_RAS# DDR_A_DQ_10
<8> CLK_CPU_EXP N6 L9 DMI_IRCOMP R1 AG5 DDR_A_D11
EXP_CLKINP EXP_ICOMPI R2 49.9_0402_1% DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
EXP_RBIAS L8 <7> DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
R10 750_0402_1% DDR_A_BS1 AH20 AB5 DDR_A_D13
EXP_TCLKINN <7> DDR_A_BS1 DDR_A_BS_1 DDR_A_DQ_13
R9 N11 DDR_A_BS2 AK11 AB9 DDR_A_D14
EXP_TCLKINP RSVD_TP T1 <7> DDR_A_BS2 DDR_A_BS_2 DDR_A_DQ_14
N10 RSVD RSVD_TP P11 T2 Pull-down must be placed DDR_A_DQ_15 AD6 DDR_A_D15
N9 RSVD within 500 mils from Pineview-M AD8 DDR_A_DQS2
DDR_CS0# DDR_A_DQS_2 DDR_A_DQS#2
<7> DDR_CS0# AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS1# AK25 AE8 DDR_A_DM2
<7> DDR_CS1# DDR_A_CS#_1 DDR_A_DM_2
K2 RSVD RSVD K3 AJ21 DDR_A_CS#_2
J1 L2 AJ25 AG8 DDR_A_D16
RSVD RSVD DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
M4 RSVD RSVD M2 DDR_A_DQ_17 AG7
L3 N2 DDR_CKE0 AH10 AF10 DDR_A_D18
RSVD RSVD <7> DDR_CKE0 DDR_A_CKE_0 DDR_A_DQ_18
DDR_CKE1 AH9 AG11 DDR_A_D19
<7> DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
AK10 AF7 DDR_A_D20
1 OF 6 DDR_A_CKE_2 DDR_A_DQ_20 DDR_A_D21
AJ8 AF8
PINEVIEW-M_FCBGA8559 DDR_A_CKE_3 DDR_A_DQ_21
AD11 DDR_A_D22
M_ODT0 DDR_A_DQ_22 DDR_A_D23
<7> M_ODT0 AK24 DDR_A_ODT_0 DDR_A_DQ_23 AE10
M_ODT1 AH26
<7> M_ODT1 DDR_A_ODT_1
AH24 AK5 DDR_A_DQS3
DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
AK27 DDR_A_ODT_3 DDR_A_DQS#_3 AK3
C DDR_A_DM3 C
DDR_A_DM_3 AJ3
<12> DMI_RXP0 C1 1 2 DMI_RXP0_C AH1 DDR_A_D24

0.1U_0402_10V6K M_CLK_DDR0 DDR_A_DQ_24 DDR_A_D25
<7> M_CLK_DDR0 AG15 DDR_A_CK_0 DDR_A_DQ_25 AJ2
M_CLK_DDR#0 AF15 AK6 DDR_A_D26
<7> M_CLK_DDR#0 DDR_A_CK_0# DDR_A_DQ_26
<12> DMI_RXN0 C2 1 2 DMI_RXN0_C M_CLK_DDR1 AD13 AJ7 DDR_A_D27
<7> M_CLK_DDR1 DDR_A_CK_1 DDR_A_DQ_27
0.1U_0402_10V6K M_CLK_DDR#1 AC13 AF3 DDR_A_D28
<7> M_CLK_DDR#1 DDR_A_CK_1# DDR_A_DQ_28
AH2 DDR_A_D29
C3 1 DMI_RXP1_C DDR_A_DQ_29 DDR_A_D30
<12> DMI_RXP1 2 DDR_A_DQ_30 AL5
0.1U_0402_10V6K AC15 AJ6 DDR_A_D31
DDR_A_CK_3 DDR_A_DQ_31
AD15 DDR_A_CK_3#
<12> DMI_RXN1 C4 1 2 DMI_RXN1_C AF13 AG22 DDR_A_DQS4
0.1U_0402_10V6K DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
AD19 DDR_A_DM4
DDR_A_DM_4
Close to CPU +1.8V AE19 DDR_A_D32
DDR_A_DQ_32
7/20 Add R238 and R239 for Ref board design AD17 RSVD DDR_A_DQ_33 AG19 DDR_A_D33
AC17 AF22 DDR_A_D34
RSVD DDR_A_DQ_34
1
AB15 AD22 DDR_A_D35
+1.8V R238 RSVD DDR_A_DQ_35 DDR_A_D36
AB17 RSVD DDR_A_DQ_36 AG17
10K_0402_5% AF19 DDR_A_D37
XDP Reserve +1.05VS DDR_A_DQ_37
DDR_A_DQ_38 AE21
AD21
DDR_A_D38
DDR_A_D39
2
DDR_A_DQ_39
XDP_TDI R3 1 2 AE26 DDR_A_DQS5
DDR_A_DQS_5
1
51_0402_5% +1.8V AB4 AG27 DDR_A_DQS#5
XDP_TMS R4 R6 DDR_RPU R239 @ RSVD DDR_A_DQS#_5 DDR_A_DM5
1 2 AK8 RSVD DDR_A_DM_5 AJ27
51_0402_5% 1 10K_0402_5%
1
XDP_TDO R5 1 2 80.6_0402_1% AE24 DDR_A_D40
51_0402_5% C302 R8 DDR_A_DQ_40 DDR_A_D41
AG25
2
XDP_PREQ# R7 0.01U_0402_16V7K DDR_A_DQ_41 DDR_A_D42
1 2 T3 AB11 RSVD_TP DDR_A_DQ_42 AD25
51_0402_5% 2 1K_0402_1% DDR_A_D43
T4 AB13 RSVD_TP DDR_A_DQ_43 AD24
B DDR_A_D44 B
AC22
2
DDR_VREF DDR_A_DQ_44 DDR_A_D45
AL28 DDR_VREF DDR_A_DQ_45 AG24
DDR_RPD AK28 AD27 DDR_A_D46
DDR_RPD DDR_A_DQ_46
1
XDP_TRST# R10 1 2 7/21 Add C302 to GND for Intel request 1 DDR_RPU AJ26 DDR_RPU DDR_A_DQ_47 AE27 DDR_A_D47
51_0402_5% R9 DDR_RPD R11 C5
XDP_TCK R12 1 2 7/27 Change C302 to GND for +1.8V pull up AK29 RSVD DDR_A_DQS_6 AE30 DDR_A_DQS6
51_0402_5% 80.6_0402_1% 1K_0402_1% 0.1U_0402_16V4Z AF29 DDR_A_DQS#6
2 DDR_A_DQS#_6 DDR_A_DM6
AF30
2
DDR_A_DM_6
DDR_A AG31 DDR_A_D48
DDR_A_DQ_48
8/14 Add +DDR_VREF net name DDR_A_DQ_49 AG30 DDR_A_D49
AD30 DDR_A_D50
DDR_A_DQ_50
8/24 Change net to DDR_VREF DDR_A_DQ_51 AD29 DDR_A_D51
AJ30 DDR_A_D52
JXDP DDR_A_DQ_52 DDR_A_D53
DDR_A_DQ_53 AJ29
<5> XDP_PREQ# XDP_PREQ# 1 AE29 DDR_A_D54
XDP_PRDY# 1 DDR_A_DQ_54 DDR_A_D55
<5> XDP_PRDY# 2 2 DDR_A_DQ_55 AD28
3 3
<5> XDP_BPM#3 XDP_BPM#3 4 AB27 DDR_A_DQS7
XDP_BPM#2 4 DDR_A_DQS_7 DDR_A_DQS#7
<5> XDP_BPM#2 5 5 DDR_A_DQS#_7 AA27
6 AB26 DDR_A_DM7
XDP_BPM#1 6 DDR_A_DM_7
<5> XDP_BPM#1 7 7
<5> XDP_BPM#0 XDP_BPM#0 8 AA24 DDR_A_D56
8 D33 D34 DDR_A_DQ_56 DDR_A_D57
9 9 DDR_A_DQ_57 AB25
<5,13> H_PWRGD R13 1 2 1K_0402_5% 10 XDP_TDI 1 6 XDP_TDO 1 6 W24 DDR_A_D58
R14 10 I/O1 I/O4 I/O1 I/O4 DDR_A_DQ_58
<13> SLPIOVR 1 2 1K_0402_5% 11 11 DDR_A_DQ_59 W22 DDR_A_D59
12 2 5 +3VS 2 5 +3VS AB24 DDR_A_D60
T5 12 REF1 REF2 REF1 REF2 DDR_A_DQ_60
13 AB23 DDR_A_D61
T6 13 DDR_A_DQ_61
+1.05VS 14 XDP_TMS 3 4 XDP_PREQ# XDP_TRST# 3 4 XDP_TCK AA23 DDR_A_D62
PLTRST# 14 I/O2 I/O3 I/O2 I/O3 DDR_A_DQ_62
<5,13,15,20,24> PLTRST# 2 R15 1 1K_0402_5% 15 15 DDR_A_DQ_63 W27 DDR_A_D63
16 CM1293A-04SO_SOT23-6 CM1293A-04SO_SOT23-6
T7 16
17 @ @
A XDP_TDO 17 A
<5> XDP_TDO 18 18 2 OF 6
<5> XDP_TRST# XDP_TRST# 19 19 PINEVIEW-M_FCBGA8559
<5> XDP_TDI XDP_TDI
XDP_TMS
20
21
20 Place diff CPU side
<5> XDP_TMS 21
22 22 10/19 Change footprint T5, T6 and T7 from TPC24 to TPC12
23 23
<5> XDP_TCK XDP_TCK 24 24
25
26
G1
G2
ACES_87151-24051
@
SCHEMATICS,MB A5841
Custom D
401799
5 4 3 2 1
5 4 3 2 1
U1C
PINEVIEW_M 8/14 Add CRT_IRTN net name U1D PINEVIEW_M
8/24 Det CRT_IRTN net name

T8 D12 XDP_RSVD_00 REV = 1.1 REV = 1.1
T9 A7 M30 U25 E7 H_SMI#
XDP_RSVD_01 CRT_HSYNC GMCH_CRT_HSYNC <10> <9> LVDS_ACLK# LA_CLKN SMI# H_SMI# <11>
T10 D6 M29 U26 H7 H_A20M#
XDP_RSVD_02 CRT_VSYNC GMCH_CRT_VSYNC <10> <9> LVDS_ACLK LA_CLKP A20M# H_A20M# <11>
T11 C5 <9> LVDS_A0# R23 H6 H_FERR#
XDP_RSVD_03 LA_DATAN_0 FERR# H_FERR# <11>
T12 C7 <9> LVDS_A0 R24 F10 H_INTR
XDP_RSVD_04 LA_DATAP_0 LINT0 H_INTR <11>
D T13 C6 N31 GMCH_CRT_R <9> LVDS_A1# N26 F11 H_NMI D
XDP_RSVD_05 CRT_RED GMCH_CRT_R <10> LA_DATAN_1 LINT1 H_NMI <11>
T14 D8 P30 GMCH_CRT_G <9> LVDS_A1 N27 E5 H_IGNNE#
XDP_RSVD_06 CRT_GREEN GMCH_CRT_G <10> LA_DATAP_1 IGNNE# H_IGNNE# <11>
T15 B7 P29 GMCH_CRT_B <9> LVDS_A2# R26 F8 H_STPCLK#
XDP_RSVD_07 CRT_BLUE GMCH_CRT_B <10> LA_DATAN_2 STPCLK# H_STPCLK# <11>
ICH
T16 A9 XDP_RSVD_08 CRT_IRTN N30 <9> LVDS_A2 R27 LA_DATAP_2
XDP_RSVD_9 D9
VGA
XDP_RSVD_09 H_DPRSTP#
T17 C8 XDP_RSVD_10 DPRSTP# G6 H_DPRSTP# <13>
T18 B8 XDP_RSVD_11
R17 be placed <500 mils to U1.P28 R16 L_IBG R22 LIBG DPSLP# G10 H_DPSLP#
H_DPSLP# <13>
T19 C10 L31 2.37K_0402_1% J28 G8 H_INIT#
XDP_RSVD_12 CRT_DDC_DATA GMCH_CRT_DATA <10> LVBG INIT# H_INIT# <11>
T20 D10 XDP_RSVD_13 CRT_DDC_CLK L30 GMCH_CRT_CLK <10> R16 be placed U1.R22 N22 LVREFH PRDY# E11 XDP_PRDY#
XDP_PRDY# <4>
B11 N23 F15 XDP_PREQ# +1.05VS
T21 XDP_RSVD_14 R17 665_0402_1% LVREFL PREQ# XDP_PREQ# <4>
T22 B10 P28 DAC_IREF ENBKL L27
XDP_RSVD_15 DAC_IREF <22> ENBKL LBKLT_EN
LVDS
T23 B12 XDP_RSVD_16 <9> GMCH_INVT_PWM L26 LBKLT_CTL
T24 C11 Y30 CPU_DREFCLK L23 E13 H_THERMTRIP#
XDP_RSVD_17 REFCLKINP CPU_DREFCLK <8> LCTLA_CLK THERMTRIP# H_THERMTRIP# <11>
Y29 CPU_DREFCLK# K25 R18
REFCLKINN CPU_DREFCLK# <8> LCTLB_DATA
AA30 CPU_SSCDREFCLK K23 68_0402_5%
REFSSCLKINP CPU_SSCDREFCLK <8> <9> LVDS_SCL LDDC_CLK
AA31 CPU_SSCDREFCLK# <9> LVDS_SDA K24
REFSSCLKINN CPU_SSCDREFCLK# <8> LDDC_DATA
<9> GMCH_ENVDD H26 LVDD_EN
T25 L11 RSVD 8/14 Add DAC_IREF net name +3VS PROCHOT# C18 H_PROCHOT#
W1 H_PWRGD
CPUPWRGOOD H_PWRGD <4,13>
0_0402_5% Close to CPU
R19
1
K29 PM_EXTTS#1
PM_EXTTS#_1/DPRSLPVR PM_DPRSLPVR <13>
J30 PM_EXTTS#0 R20 A13 H_GTLREF
PM_EXTTS#_0 PM_EXTTS#0 <7> GTLREF
L5 PCH_POK 10K_0402_5% H27
PWROK PCH_POK <13> VSS
AA3 PLTRST#
RSTIN# PLTRST# <4,13,15,20,24>
8/14 Change net name to +H_GTLREF
2
PM_EXTTS#0
HPL_CLKINN W8 CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK# <8> RSVD L6 8/24 Change net name to H_GTLREF
CLK_CPU_HPLCLK <8> Close to Processor pin
W9 CLK_CPU_HPLCLK E17
C
HPL_CLKINP RSVD C
<4> XDP_BPM#0 G11 BPM_1_0#
AA7 E15 H10 CLK_CPU_BCLK#
MISC
T26 RSVD_TP <4> XDP_BPM#1 BPM_1_1# BCLKN CLK_CPU_BCLK# <8>

T27 AA6 G13 J10 CLK_CPU_BCLK
RSVD_TP <4> XDP_BPM#2 BPM_1_2# BCLKP CLK_CPU_BCLK <8>
T28 R5 RSVD_TP <4> XDP_BPM#3 F13 BPM_1_3#
T29 R6 RSVD_TP
To be placed <250 mils to U1 ball BSEL_0 K5 CPU_BSEL0
CPU_BSEL0 <8>
T30 B18 H5 CPU_BSEL1
BPM_2_0#/RSVD BSEL_1 CPU_BSEL1 <8>
T31 AA21 T32 B20 K6 CPU_BSEL2
RSVD_TP R21 BPM_2_1#/RSVD BSEL_2 CPU_BSEL2 <8>
GMCH_CRT_R
CPU
T33 W21 RSVD_TP 1 2 T34 C20 BPM_2_2#/RSVD
T35 T21 150_0402_1% T36 B21 H30 CPU_VID0
RSVD_TP BPM_2_3#/RSVD VID_0 CPU_VID0 <34>
T37 V21 GMCH_CRT_G 1 R22 2 H29 CPU_VID1
RSVD_TP VID_1 CPU_VID1 <34>
150_0402_1% H28 CPU_VID2
VID_2 CPU_VID2 <34>
GMCH_CRT_B 1 R23 2 G30 CPU_VID3
VID_3 CPU_VID3 <34>
150_0402_1% T38 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 <34>
ENBKL R24 D14 F29 CPU_VID5
<4> XDP_TDI TDI VID_5 CPU_VID5 <34>
100K_0402_5% D13 E29 CPU_VID6
<4> XDP_TDO TDO VID_6 CPU_VID6 <34>
<4> XDP_TCK B14 TCK
<4> XDP_TMS C14 TMS RSVD L7
To be placed <500 mils to U1 ball <4> XDP_TRST# C16 TRST# RSVD D20
RSVD H13
RSVD D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP K9 T39
RSVD_TP D19 T40
XDP_RSVD_9 K7 H_EXTBGREF
EXTBGREF
8/14 Change net name to +H_EXTBGREF

2
B
R137 8/24 Change net name to H_EXTBGREF B
1K_0402_5% C30 THRMDA_2/RSVD
D31 THRMDC_2/RSVD
1
3 OF 6
4 OF 6
PINEVIEW-M_FCBGA8559 PINEVIEW-M_FCBGA8559
7/21 Pull down 1K to GND for Intel request placed within 0.5" placed within 0.5" of processor
H_DPRSTP# C151 1 @2 220P_0402_50V7K of processor pin. pin and 5 mils spacing
H_DPSLP# C152 1 @2 220P_0402_50V7K
+1.05VS +1.05VS
H_PWRGD C154 1 @2 220P_0402_50V7K
H_A20M# C134 1 @2 220P_0402_50V7K

R25 R26
+3VS H_IGNNE# C135 1 @2 220P_0402_50V7K 1K_0402_1% 976_0402_1%
CPU THERMAL SENSOR H_INIT# C136 1 @2 220P_0402_50V7K
H_GTLREF H_EXTBGREF
H_INTR C137 1 @2 220P_0402_50V7K
0.1U_0402_16V4Z
1
2 1
C6 H_FERR# C138 1 @2 220P_0402_50V7K C336 R27 C335 R28
U2 @ 2K_0402_1% 3.3K_0402_1%
2 H_NMI C139 1 @2 220P_0402_50V7K 220P_0402_50V7K 1U_0402_6.3V6K
1 2
1 8 EC_SMB_CK2 EC_SMB_CK2 <22,23> H_SMI# C140 1 @2 220P_0402_50V7K
VDD SMCLK
A A
H_THERMDA 2 DP SMDATA 7 EC_SMB_DA2
EC_SMB_DA2 <22,23>
H_STPCLK# C141 1 @2 220P_0402_50V7K 7/20 Reserve C336 for Ref board design 7/20 Add C335 for Ref board design
C7
1 2 H_THERMDC 3 DN ALERT# 6 2 1 +3VS ESD request
2200P_0402_50V7K @ R29 10K_0402_5%
CPU_THERM# 4 5
THERM# GND
+3VS 1 2
R30 10K_0402_5% 2009/10/21 2012/10/21 Title
EMC1402-1-ACZL-TR_MSOP8
Issued Date Deciphered Date
Address:0100_1100 EMC1402-1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5841
Address:0100_1101 EMC1402-2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B D
401799
5 4 3 2 1
5 4 3 2 1
+1.05VS
R31
1 2 +VCCA_VCCD
U1F PINEVIEW_M
0_0603_5%
22U_0805_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
U1E +CPU_CORE A11 REV = 1.1
F24
VSS VSS
PINEVIEW_M 3500mA 1U_0402_6.3V6K 1 2 1 1 1 A16 VSS VSS F28
1U_0402_6.3V6K
C15
C16
C8
C9
C17
VCC A23 A19 VSS VSS F4
VCC A25 A29 RSVD_NCTF VSS G15
+0.89VS REV = 1.1
A27 A3 G17
VCC 1 1 1 1 RSVD_NCTF VSS
1380mA B23 C18 C19 C10 C11 @2 @1 2 2 2
A30 G22
D VCC RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 B25 1U_0402_6.3V6K AA13 G31
VCCGFX VCC 2 2 2 2 VSS VSS
T16 VCCGFX VCC B26 AA14 VSS VSS H11
T18 VCCGFX VCC B27 AA16 VSS VSS H15
T19 VCCGFX VCC C24 1U_0402_6.3V6K AA18 VSS VSS H2
V13 VCCGFX VCC C26 +1.05VS AA2 VSS VSS H21
V19 VCCGFX VCC D23 AA22 VSS VSS H25
W14 VCCGFX VCC D24 R32 AA25 VSS VSS H8
W16 VCCGFX VCC D26 Please closed U1 ball 1 2 +RING_EAST AA26 VSS VSS J11
1U_0402_6.3V6K
W18 D28 0_0603_5% AA29 J13
GFX/MCH
VCCGFX VCC VSS VSS
W19 VCCGFX VCC E22 1 AA8 VSS VSS J15
+1.8V
C20
R33 VCC E24 AB19 VSS VSS J4
E27 +CPU_CORE AB21 K11
CPU
VCC VSS VSS
1 2 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K +VCC_SM
VCC F21 2 x 330uF(9mohm/2) AB28 VSS VSS K13
2
VCC F22 AB29 VSS VSS K19
0_0603_5% 2 2 2 2 2 F25 1 1 AB30 K26
@ VCC VSS VSS
VCC G19 AC10 VSS VSS K27
C12 C13 C14 C21 C22 G21 + C23 + C24 1 R34 2 +RING_WEST AC11 K28
VCC VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
VCC G24 0_0603_5% AC19 VSS VSS K30
1 1 1 1 1 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M
H17 1 1 AC2 K4
GND
VCC 2 2 VSS VSS
C25
C26
VCC H19 AC21 VSS VSS K8
2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K H22 AC28 L1
VCC VSS VSS
VCC H24 AC30 VSS VSS L13
2 2
VCC J17 AD26 VSS VSS L18
+VCC_SM AK13 J19 AD5 L22
VCCSM VCC +CPU_CORE VSS VSS
Please closed U1 ball AK19 VCCSM VCC J21 AE1 VSS VSS L24
AK9 VCCSM VCC J22 1 R35 2 +LGI_VID AE11 VSS VSS L25
1U_0402_6.3V6K
AL11 VCCSM VCC K15 AE13 VSS VSS L29
AL16 K17 0_0603_5% @ 1 AE15 M28
VCCSM VCC VSS VSS
C27
AL21 VCCSM VCC K21 AE17 VSS VSS M3
+1.8V
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
R36 AL25 VCCSM VCC L14 AE22 VSS VSS N1
VCC L16 1 1 1 AE31 VSS VSS N13
2
C28
C29
C30
C 22U_0805_6.3V6M +VCCCK_DDR C
1 2 VCC L19 AF11 VSS VSS N18
VCC L21 AF17 VSS VSS N24
0_0603_5% 2270mA VCC N14 AF21 VSS VSS N25
2 2 2 +VCC_DMI
1 1 @ VCC N16 1 R37 2 AF24 VSS VSS N28
1U_0402_6.3V6K
1U_0402_6.3V6K
C31 C32 +VCCCK_DDR AK7 N19 AF28 N4
VCCCK_DDR VCC 0_0603_5% VSS VSS
AL7 VCCCK_DDR VCC N21 1 1 AG10 VSS VSS N5
C33
C34
0.1U_0402_10V6K AG3 N8
2 2 VSS VSS
AH18 VSS VSS P13
+VCCA_VCCD U10 AH23 P14
VCCA_DDR 2 2 VSS VSS
1320mA
DDR
U5 VCCA_DDR AH28 VSS VSS P16

U6 +CPU_CORE AH4 P18
VCCA_DDR VSS VSS
Please closed U1 ball U7 VCCA_DDR AH6 VSS VSS P19
POWER
U8 VCCA_DDR AH8 VSS VSS P21
1
U9 VCCA_DDR AJ1 RSVD_NCTF VSS P3
V2 R38 AJ16 P4
VCCA_DDR VSS VSS
V3 VCCA_DDR AJ31 RSVD_NCTF VSS R25
V4 100_0402_5% AK1 R7
VCCA_DDR RSVD_NCTF VSS
W10 AK2 R8
2
VCCA_DDR RSVD_NCTF VSS
W11 VCCA_DDR AK23 VSS VSS T11
C29 VCCSENSE AK30 U22
VCCSENSE VCCSENSE <34> +1.8VS RSVD_NCTF VSS
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE <34> RSVD_NCTF VSS
AA11 VCCACK_DDR VCCA Y2 +1.5VS AL13 VSS VSS U24
80mA AL19 VSS VSS U27
1
+1.05VS 1 AL2 RSVD_NCTF VSS V14
R39 1 R40 2 +VCCSFR_AB_DPL AL23 V16
0_0603_5% VSS VSS
D4 C35 AL29 V18
VCCP 100_0402_5% RSVD_NCTF VSS
0.01U_0402_16V7K 1 1 AL3 V28
2 RSVD_NCTF VSS
B4 1 AL30 V29
2
VCCP C38 C36 C37 RSVD_NCTF VSS
VCCP B3 AL9 VSS VSS W13
@ 1U_0402_6.3V6K 1U_0402_6.3V6K B13 W2
2 2 VSS VSS
AA19 VCCD_AB_DPL
0.1U_0402_10V6K Please closed U1.Y2 B16 VSS VSS W23
2
B19 VSS VSS W25
B B
B22 VSS VSS W26
Please closed U1.D4 B30 RSVD_NCTF VSS W28
V11 VCCD_HMPLL 1 R41 2 +VCC_CRT_DAC B31 RSVD_NCTF VSS W30
0_0603_5% B5 VSS VSS W4
1 B9 VSS VSS W5
+VCCSFR_AB_DPL AC31 C1 W6
VCCSFR_AB_DPL +VCC_ALVD C39 RSVD_NCTF VSS
VCCALVDS V30 C12 VSS VSS W7
W31 +VCC_DLVD 1U_0402_6.3V6K C21 Y28
VCCDLVDS 2 VSS VSS
154mA 60mA C22 VSS VSS Y3
C25 Y4
LVDS
+VCC_CRT_DAC VSS VSS

T30 C31
EXP\CRT\PLL
VCCACRTDAC +DMI_HMPLL RSVD_NCTF

1 R42 2 D22 VSS
+3VS 0_0603_5% E1 RSVD_NCTF
5mA 1 E10 VSS
T31 T1 +VCC_DMI E19
VCC_GIO VCCA_DMI VSS
+RING_EAST J31 VCCRING_EAST VCCA_DMI T2 480mA C40 E21 VSS
+RING_WEST C3 T3 1U_0402_6.3V6K E25 T29
DMI
VCCRING_WEST VCCA_DMI 2 VSS VSS

305mA B2 VCCRING_WEST E8 VSS
C2 VCCRING_WEST RSVD P2 T41 F17 VSS
+LGI_VID A21 AA1 +DMI_HMPLL F19
VCC_LGI VCCSFR_DMIHMPLL VSS
104mA 1 R43 2 +VCC_ALVD
VCCP E2 +1.05VS 0_0603_5% 6 OF 6
1 PINEVIEW-M_FCBGA8559
C41
5 OF 6 22U_0805_6.3V6M
2
PINEVIEW-M_FCBGA8559
+0.89VS R44
1 2 +VCC_DLVD
0_0603_5%
1
A A
0.1U_0402_10V6K
C42
330U_D2_2.5VY_R9M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
2.2U_0603_10V6K
1 1U_0402_6.3V6K
2
C44
C45
C46
C47
C48
C49
C50
2 1 1 1 1 1 1 1 2 1
C43
C51
C52
C53
1 2 2 2 2 2 2 2 1 2 2
Close Chipset pin THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5841
Custom D
401799
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V +1.8V
JDDR
1
<4> DDR_A_DQS#[0..7] +DIMM_VREF 1 VREF VSS 2
R45 3 4 DDR_A_D5
DDR_A_D0 VSS DQ4 DDR_A_D4
<4> DDR_A_D[0..63] 5 DQ0 DQ5 6
1K_0402_1% DDR_A_D1 7 8
DQ1 VSS DDR_A_DM0
<4> DDR_A_DM[0..7] 9 10
2
DDR_A_DQS#0 VSS DM0
+DIMM_VREF 11 DQS0# VSS 12
<4> DDR_A_DQS[0..7] Layout Note: DDR_A_DQS0 13 DQS0 DQ6 14 DDR_A_D6
1
15 16 DDR_A_D7
<4> DDR_A_MA[0..14]
Place near JDDR1 R46 Share +DIMM_VREF for DDR_A_D2 17
VSS DQ7
18
DDR_A_D3 DQ2 VSS DDR_A_D12
19 20
1K_0402_1% 1.DDRII VREF 21
DQ3 DQ12
22 DDR_A_D13
VSS DQ13
2.PineView DDR_VREF DDR_A_D9 23 24
2
D DDR_A_D8 DQ8 VSS DDR_A_DM1 D
25 DQ9 DM1 26
27 VSS VSS 28
DDR_A_DQS#1 29 30 M_CLK_DDR0 M_CLK_DDR0 <4>
DDR_A_DQS1 DQS1# CK0 M_CLK_DDR#0
31 DQS1 CK0# 32 M_CLK_DDR#0 <4>
+DIMM_VREF 33 34
+1.8V DDR_A_D10 VSS VSS DDR_A_D14
20mils DDR_A_D11
35 DQ10 DQ14 36
DDR_A_D15
37 DQ11 DQ15 38
39 VSS VSS 40
1 1
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C59 C60
2 2 2 2 2 @ 41 42
0.1U_0402_16V4Z 2.2U_0603_6.3V6K DDR_A_D28 VSS VSS DDR_A_D24
43 DQ16 DQ20 44
2 2
C54
C55
C56
C57
C58
DDR_A_D29 45 46 DDR_A_D25
DQ17 DQ21
1 1 1 1 1 Please closed SO-DIMM 47 VSS VSS 48
+1.8V 7/21 Reserve C60 DDR_A_DQS#3 49 DQS2# NC 50 R47 1 2 PM_EXTTS#0 <5>
DDR_A_DQS3 51 52 DDR_A_DM3 0_0402_5%
DQS2 DM2
53 VSS VSS 54
DDR_A_D31 DQ18 DQ22 DDR_A_D27
57 DQ19 DQ23 58
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
59 VSS VSS 60
1 1 1 1 DDR_A_D16 61 62 DDR_A_D20
DQ24 DQ28
220U_B2_2.5VM_R35
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 DDR_A_D17 63 64 DDR_A_D21
DQ25 DQ29
C217
C216
C238
C291
1 1 1 1 65 VSS VSS 66
+ DDR_A_DM2 67 68 DDR_A_DQS#2
2 2 2 2 DM3 DQS3#
C61
C62
C63
C64
C65
@ 69 70 DDR_A_DQS2
NC DQS3
71 VSS VSS 72
2 2 2 2 2 DDR_A_D18 DDR_A_D22
73 DQ26 DQ30 74
DQ27 DQ31
77 VSS VSS 78
7/8 Add 4PCS CAP on 1.8V for EMI request <4> DDR_CKE0 DDR_CKE0 79 CKE0 NC/CKE1 80 DDR_CKE1 DDR_CKE1 <4>
81 VDD VDD 82
83 NC NC/A15 84
C DDR_A_BS2 DDR_A_MA14 C
<4> DDR_A_BS2 85 BA2 NC/A14 86
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
A8 A6
Layout Note: 95 VDD VDD 96
Place one cap close to every 2 pullup DDR_A_MA3 99
A5 A4
100 DDR_A_MA2
A3 A2
resistors terminated to +0.9VS DDR_A_MA1 101 A1 A0 102 DDR_A_MA0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_A_BS1 <4>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
<4> DDR_A_BS0 107 BA0 RAS# 108 DDR_A_RAS# <4>
<4> DDR_A_WE# DDR_A_WE# 109 110 DDR_CS0# DDR_CS0# <4>
WE# S0#
111 VDD VDD 112
<4> DDR_A_CAS# DDR_A_CAS# 113 114 M_ODT0 M_ODT0 <4>
DDR_CS1# CAS# ODT0 DDR_A_MA13
<4> DDR_CS1# 115 NC/S1# NC/A13 116
117 VDD VDD 118
+0.9VS <4> M_ODT1 M_ODT1 119 120
NC/ODT1 NC
121 VSS VSS 122
DDR_A_D33 123 124 DDR_A_D36
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 132
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DQS4 VSS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
133 134 DDR_A_D38
1 1 1 1 1 1 1 1 DDR_A_D39 VSS DQ38 DDR_A_D35
1 1 1 1 1 1 1 1 1 1 1 1 1 135 DQ34 DQ39 136
@ @ @ @ @ @ @ @ @ @ @ @ @ DDR_A_D34 137 138
C85
C86
C79
C80
DQ35 VSS
C66
C67
C68
C69
C70
C71
C72
C73
C74
C75
C76
C77
C78
C81
C82
C83
C84 139 140 DDR_A_D44

DDR_A_D41 VSS DQ44 DDR_A_D45
2 2 2 2 2 2 2 2 141 142
2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_D40 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
B B
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
159 DQ49 DQ53 160
161 VSS VSS 162
9/4 Reserve C66, C67, C68, C69, C72, C75, C77, C78, C79, C81, C83, C84, C85 163 NC,TEST CK1 164 M_CLK_DDR1 M_CLK_DDR1 <4>
165 166 M_CLK_DDR#1 M_CLK_DDR#1 <4>
+0.9VS DDR_A_DQS#6 VSS CK1#
167 DQS6# VSS 168
RP1 RP2 DDR_A_DQS6 169 170 DDR_A_DM6
DDR_A_WE# DDR_A_MA3 DQS6 DM6
1 8 8 1 171 VSS VSS 172
DDR_A_CAS# 2 7 7 2 DDR_A_MA1 DDR_A_D50 173 174 DDR_A_D54
DDR_CS1# DDR_A_MA10 DDR_A_D51 DQ50 DQ54 DDR_A_D55
3 6 6 3 175 DQ51 DQ55 176
M_ODT1 4 5 5 4 DDR_A_BS0 177 178
Layout Note: DDR_A_D56 VSS VSS DDR_A_D60
179 DQ56 DQ60 180
47_0804_8P4R_5% 47_0804_8P4R_5% Place these resistor DDR_A_D57 181 DQ57 DQ61 182 DDR_A_D61
RP3 RP4 closely DIMMA,all 183 184
DDR_A_MA12 1 VSS VSS
8 8 1 M_ODT0 trace length<1000 mil
DDR_A_DM7 185 DM7 DQS7# 186 DDR_A_DQS#7
DDR_A_MA9 2 7 7 2 DDR_A_MA13 187 188 DDR_A_DQS7
DDR_A_MA8 3 VSS DQS7
6 6 3 DDR_CS0# DDR_A_D62 189 DQ58 VSS 190
DDR_A_MA5 4 5 5 4 DDR_A_RAS# DDR_A_D59 191 192 DDR_A_D58
DQ59 DQ62 DDR_A_D63
193 VSS DQ63 194
47_0804_8P4R_5% 47_0804_8P4R_5% <8,15> CLK_SMBDATA CLK_SMBDATA 195 196
RP5 RP6 CLK_SMBCLK SDA VSS R48
<8,15> CLK_SMBCLK 197 SCL SA0 198 1 2 10K_0402_5%
DDR_A_BS1 1 8 8 1 DDR_A_MA4 +3VS 199 200 R49 1 2 10K_0402_5%
DDR_A_MA0 VDDSPD SA1
2 7 7 2 DDR_A_MA11
DDR_A_MA2 3 6 6 3 DDR_A_MA7 201 202
DDR_A_MA6 G1 G2
4 5 5 4 DDR_A_MA14 1 1
C87 C88
47_0804_8P4R_5% 47_0804_8P4R_5% FOX_AS0A426-N4SN-7F_200P
0.1U_0402_16V4Z 0.1U_0402_16V4Z @
A 2 2
DIMMA A
DDR_CKE1 1 R50 2
47_0402_5% Layout Note:
DDR_A_BS2 1 R51 2 Place these resistor
47_0402_5% closely DIMMA,all
DDR_CKE0 1 R52 2
47_0402_5% trace length Security Classification Compal Secret Data Compal Electronics,Inc
Max=1000 mil Issued Date 2009/10/21 Deciphered Date 2012/10/21 Title
SCHEMATICS,MB A5841
Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401799
5 4 3 2 1
5 4 3 2 1
+3VM_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB R53
250 mA CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1 2
FBMH1608HM601-T_0603 1 1 1 1 1 1
C89 C90 C91 C92 C328
0 0 0 266 100 33.3 14.318 96.0 48.0 C300 @ C301 @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J 7/13 For RF request 33P_0402_50V8K 33P_0402_50V8K
2 2 2 2 2 2
0 0 1 133 100 33.3 14.318 96.0 48.0
+1.05VM_CK505 7/13 Add 33pFfor RF request
R54
0 1 0 200 100 33.3 14.318 96.0 48.0 80 mA 7/21 Reserve 33pFfor RF request
+1.05VS 1 2
FBMH1608HM601-T_0603 1 1 1 1 1 1 +3VS
0 1 1 166 100 33.3 14.318 96.0 48.0 C96 C97 C98 C99 C100 C101 C329
D D
7/13 For RF request 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J
2 2 2 2 2 2
1 0 0 333 100 33.3 14.318 96.0 48.0 R55 R56
2.2K_0402_5% 2.2K_0402_5%
1 0 1 100 100 33.3 14.318 96.0 48.0 +1.5VM_CK505
R57 8/27 Delete C93, C94, C95, C102 for low power CLK GEN Q1A
2N7002DW-T/R7_SOT363-6
@
1 1 0 400 100 33.3 14.318 96.0 48.0 +1.5VS 1 2 <13> PCH_SMBDATA 6 1 CLK_SMBDATA
FBMH1608HM601-T_0603
10U_0805_10V4Z
1
1 1 1 Reserved SA000020K00 (Silego : SLG8SP556VTR )
C103
@ +3VS
2
5
2
7/13 For RF request 7/21 Delete C296, C297 for RF request
7/13 Add 22pF to gnd and close to U3 for RF request <13> PCH_SMBCLK 3 4 CLK_SMBCLK
+3VM_CK505 +3VM_CK505 Q1B 2N7002DW-T/R7_SOT363-6

U3
7/21 Reserve 22pF to gnd and close to U3 for RF request
R58 9 CLK_SMBDATA
+3VM_1.5VM_R SDA CLK_SMBDATA <7,15>
1 2 55
+1.5VM_CK505
0_0603_5%
VDD_SRC
SCL 10 CLK_SMBCLK
CLK_SMBCLK <7,15>
SRC PORT LIST
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
6 VDD_REF
@ R60 1 1 1
C104
C105
C106
1 2 12 VDD_PCI CPU_0 71 CLK_CPU_BCLK
CLK_CPU_BCLK <5> PORT DEVICE
0_0603_5% 72 70 CLK_CPU_BCLK#
2 2 2 VDD_CPU CPU_0# CLK_CPU_BCLK# <5>
1
R59
2 19 68 CLK_CPU_HPLCLK
SRC0 CPU_DREFCLK
+1.05VM_CK505 VDD_48 CPU_1 CLK_CPU_HPLCLK <5>
0_0603_5% 27 67 CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK# <5>
SRC2 CPU_EXP
VDD_PLL3 CPU_1#
@ R61 +1.05VM_CK505
SRC3
+1.05VS +1.05VM_1.5VM_R CPU_DREFCLK
C +1.5VM_CK505 1 2 66 VDD_CPU_IO SRC_0/DOT_96 24 CPU_DREFCLK <5> SRC4 PCIE_SATA C
47P_0402_50V8J
0.1U_0402_16V4Z
0_0603_5% CPU_DREFCLK#
1 31 VDD_PLL3_IO SRC_0#/DOT_96# 25 CPU_DREFCLK# <5> SRC6 PCIE_WLAN
1
C107
C330
@
R248
470_0402_5%
62 VDD_SRC_IO
28 CPU_SSCDREFCLK
CPU_SSCDREFCLK <5>
SRC7
R251 2 LCDCLK/27M
2.2K_0402_5%
7/13 For RF request 52 VDD_SRC_IO CPU_SSCDREFCLK# SRC8
29 CPU_SSCDREFCLK# <5>
2
FSA 2 LCDCLK#/27M_SS
1 23 VDD_IO SRC9 PCIE_LAN
8/24 Change net name to FSB for U3.2 CLK_CPU_EXP
<5> CPU_BSEL0 1
R252
2 38 VDD_SRC_IO SRC_2 32 CLK_CPU_EXP <4> SRC10 PCIE_PCH
0_0402_5% 7/13 Add 33pF to GND for RF request 22_0402_5% 1 2 R62 CLK_CPU_EXP#
SRC_2# 33 CLK_CPU_EXP# <4> SRC11 PCIE_WWAN
1
<21> CLK_48M_CR
@ R253 7/21 Reserve 33pF to GND for RF request 22_0402_5% 1 2 R63 FSA 20
<12> CLK_PCH_48M USB_0/FS_A
SRC_3 35
1K_0402_5% 8/27 C303, C324, C325, C326, C327 to GND for RF request 1 2 FSB 2
C303 22P_0402_50V8J FS_B/TEST_MODE
36
2
33_0402_5% 1 SRC_3#
2 R65 FSC 7 REF_0/FS_C/TEST_
<13> CLK_PCH_14M
1 2 8 39 CLK_PCIE_SATA
REF_1 SRC_4 CLK_PCIE_SATA <11> +3VS
+3VS R241 1 2 H_STP_CPU# C324 22P_0402_50V8J
10K_0402_5% 40 CLK_PCIE_SATA#
SRC_4# CLK_PCIE_SATA# <11>
VGATE 1
+1.05VS <13,22,34> VGATE CKPWRGD/PD#
7/22 Add R241 pull up to +3VS for RF Intel request 11 57 CLK_PCIE_WLAN WLAN_CLKREQ# R67 2 1 10K_0402_5%
NC SRC_6 CLK_PCIE_WLAN <15>
WWAN_CLKREQ# R68 2 1 10K_0402_5%
1
56 CLK_PCIE_WLAN# LAN_CLKREQ# R69 2 1 10K_0402_5%

SRC_6# CLK_PCIE_WLAN# <15>
R249
470_0402_5% H_STP_CPU# 53
R244 <13> H_STP_CPU# CPU_STOP#
SRC_7 61
1K_0402_5% R71 1 2 @ 0_0402_5% H_STP_PCI#_R 54
2
FSB <13> H_STP_PCI# PCI_STOP#

2 1 SRC_7# 60
1 2 CLK_XTAL_IN 5
<5> CPU_BSEL1 XTAL_IN
B R242 64 B
0_0402_5% CLK_XTAL_OUT SRC_8/CPU_ITP
4 XTAL_OUT
1
+3VS R70 1 2 H_STP_PCI#_R 1 2 63

@ R243 10K_0402_5% C325 22P_0402_50V8J SRC_8#/CPU_ITP#
0_0402_5% 33_0402_5% 1 2 R72 CLK_PCI_DDR_R 13 CLK_PCIE_LAN

<24> CLK_PCI_DDR PCI_1 SRC_9 44 CLK_PCIE_LAN <20>
REQ PORT LIST
2
PCI2_TME 14 45 CLK_PCIE_LAN#
PCI_2 SRC_9# CLK_PCIE_LAN# <20>
1 2
C326 22P_0402_50V8J 15 PCI_3
50 CLK_PCIE_PCH
CLK_PCIE_PCH <12>
PORT DEVICE
+1.05VS 33_0402_5% 1 PCI4_SEL SRC_10
8/14 Add R250 pull up for Intel request <22> CLK_PCI_LPC 2 R73 16 PCI_4/SEL_LCDCL
33_0402_5% 1 2 R74 ITP_EN 17
SRC_10# 51 CLK_PCIE_PCH#
CLK_PCIE_PCH# <12> REQ_3#
<11> CLK_PCI_PCH PCIF_5/ITP_EN
1
R250 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

CLK_PCIE_WWAN <15>
REQ_4#
470_0402_5% C327 22P_0402_50V8J SRC_11
R246 18 47 CLK_PCIE_WWAN#
CLK_PCIE_WWAN# <15>
REQ_6# PEIC_WLAN
VSS_PCI SRC_11#
10K_0402_5% For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# REQ_7#
2
FSC 2 1 3 VSS_REF
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# REQ_9# PCIE_LAN
1 2 22 37
<5> CPU_BSEL2
R247 Pin28/29 : LCDCLK / LCDCLK# VSS_48 CLKREQ_3#
0_0402_5% 1 = Pin24/25 : SRC_0 / SRC_0# 26 41
REQ_10#
VSS_IO CLKREQ_4#
1
@ R245 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

WLAN_CLKREQ# <15>
REQ_11# PEIC_WWAN
VSS_CPU CLKREQ_6#
For PCI2_TME:0=Overclocking of CPU and SRC allowed REQ_A#
0_0402_5% 30 65
(ICS only) 1=Overclocking of CPU and SRC NOT allowed VSS_PLL3 CLKREQ_7#
2
34 43 LAN_CLKREQ#
VSS_SRC CLKREQ_9# LAN_CLKREQ# <20>
+3VS 59 49
VSS_SRC SLKREQ_10#
7/22 Add R242 to R253 for Intel request WWAN_CLKREQ#
42 VSS_SRC CLKREQ_11# 46 WWAN_CLKREQ# <15>
2
A A
R75 73 21
CLK_XTAL_IN VSS USB_1/CLKREQ_A#
C108 22P_0402_50V8J 10K_0402_5% 7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
1
SLG8SP556VTR_QFN72_10X10
1
Y1
14.31818MHZ_16PF_DSX840GA ITP_EN PCI4_SEL PCI2_TME
2
CLK_XTAL_OUT
2
C109 22P_0402_50V8J @
R76 R77 R78 Security Classification Compal Secret Data Compal Electronics,Inc
Routing the trace at least 10mil Issued Date 2009/10/21 Deciphered Date 2012/10/21 Title
10K_0402_5% 10K_0402_5% 10K_0402_5%
SCHEMATICS,MB A5841
1
D
401799
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT
D D
+LCDVDD
+3VS W=40mils
1
R79 +3VS
150_0603_5%
1
1
C110
2
1 @
R80 C111 4.7U_0805_10V4Z
3
100K_0402_5% 2
Q2B 0.1U_0402_10V6K 2A
3
2
S
G
2N7002DW-T/R7_SOT363-6 5 2 1 2
R81 47K_0402_5%
D Q10
1
1 AO3413_SOT23
C112
+LCDVDD
6
0.01U_0402_25V7K W=40mils
2
Q2A
<5> GMCH_ENVDD 2 1 1
1
2N7002DW-T/R7_SOT363-6 C113 C114 +3VS
@
1
R82 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2
C 100K_0402_5% C
2
2.2K_0402_5%
2.2K_0402_5%
R83
R84
1
1
LVDS_SCL LVDS_SCL <5>
LVDS_SDA
LED/PANEL BD. Conn. LVDS_SDA <5>
680P_0402_50V7K 2 1 C115
68P_0402_50V8J 2 1 C116
JLVDS
250mA B+ R85 1 2 0_0805_5% +LEDVDD 1 21
1 GND
2 2
450mA +LCDVDD R86 1 2 0_0805_5% (20 MIL) +LCDVDD_L 3 R87 1 2 0_0402_5% LCD_PWM
3 <22> INVT_PWM
+3VS 4 R88 1 2 0_0402_5%
B 4 <5> GMCH_INVT_PWM B
LCD_PWM 5 @
BKOFF# 5
1 1 <22> BKOFF# 6 6
C117 C118 LVDS_SDA 7 7 7/2 EVT:Add support DPST function from CPU
@ @ LVDS_SCL 8 8
680P_0402_50V7K
2
680P_0402_50V7K
2
9 9 8/14 DVT:Add R87 and Det R88 for no support DPST
<5> LVDS_A0 LVDS_A0 10
LVDS_A0# 10
<5> LVDS_A0# 11 11
12 12
<5> LVDS_A1 LVDS_A1 13
LVDS_A1# 13
<5> LVDS_A1# 14 14
15 LVDS_ACLK C331@ 1 2 LVDS_ACLK#
15
For EMI request <5> LVDS_A2 LVDS_A2 16 16
<5> LVDS_A2# LVDS_A2# 17 10P_0402_50V8J
17
18 18
LVDS_ACLK 19
<5> LVDS_ACLK 19
<5> LVDS_ACLK#
LVDS_ACLK# 20 20 GND 22 7/21 Reserve Shunt Capacitor for EMI request
ACES_87213-2000G
@
A A

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
A B C D E
CRT CONNECTOR
8/24 Det D1, D2, D3 for ESD request
1 1
Place closed to conn.

L1
GMCH_CRT_R 1 2 CRT_R_L
<5> GMCH_CRT_R
NBQ100505T-800Y_0402
L2
GMCH_CRT_G 1 2 CRT_G_L
<5> GMCH_CRT_G
NBQ100505T-800Y_0402
L3
GMCH_CRT_B 1 2 CRT_B_L
<5> GMCH_CRT_B
NBQ100505T-800Y_0402
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
1
1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1
R89 R90 R91 C119 C120 C121 C122 C123 C124
2 2 2 2 2 2
2
2 2
+CRT_VCC
1 2 1 2
C125 0.1U_0402_16V4Z R92 10K_0402_5%
5
1
P U4
OE# CRT_HSYNC_1 R93
<5> GMCH_CRT_HSYNC 2 A Y 4 1 2 10_0402_5% HSYNC
G
SN74AHCT1G125DCKR_SC70-5 CRT_VSYNC_1 R94 1 2 10_0402_5% VSYNC

3
33P_0402_50V8K
33P_0402_50V8K
+CRT_VCC
1 1
1 2
C126 0.1U_0402_16V4Z C127 C128
5
1
U5
2 2 7/10 Add J2 for cost down PolySwitch
P
OE#
<5> GMCH_CRT_VSYNC 2 A Y 4 9/28 Reserve F1 for cost down PolySwitch

G
J2
SN74AHCT1G125DCKR_SC70-5 @
3
If=1A +CRT_VCC_R 2 1
+5VS 2 1
D4 JUMP_43X39 +CRT_VCC
2 F1 30mil
1 1 2
3 RB491D_SOT23-3 1.1A_6V_MINISMDC110F-2 1
3 @ 3
C129
+3VS +CRT_VCC 0.1U_0402_16V4Z
2
+3VS
1
+CRT_VCC
1
R95 R96 JCRT

R97 R98 6
4.7K_0402_5% 4.7K_0402_5% RGND
11 ID0
4.7K_0402_5% 4.7K_0402_5% CRT_R_L 1
2
Red
7
2
GGND
5
CRT_DDC_DAT 12
Q4B CRT_G_L SDA
2 Green
4 3 CRT_DDC_DAT 8
<5> GMCH_CRT_DATA HSYNC BGND
13 Hsync
2N7002DW-T/R7_SOT363-6 CRT_B_L 3 Blue
2
9 +5V
VSYNC 14
CRT_DDC_CLK Vsync
<5> GMCH_CRT_CLK 1 6 4 res
Q4A 10
2N7002DW-T/R7_SOT363-6 CRT_DDC_CLK SGND
1 1 15 SCL
5 GND
C130 C131
470P_0402_50V8J 470P_0402_50V8J 16
@ 2 2 @ GND
17 GND
SUYIN_070546FR015S263ZR
4 4
@

SCHEMATICS,MB A5841
D
401799
A B C D E
5 4 3 2 1
+3VS
U6A TGP
R99 1 2 8.2K_0402_5% RSVD01
A5 PAR AD0 B22
R100 1 2 8.2K_0402_5% RSVD02 PCI_DEVSEL# B15 D18
CLK_PCI_PCH DEVSEL# AD1
<8> CLK_PCI_PCH J12 PCICLK AD2 C17
PCI_RST# A23 C18
<22> PCI_RST# PCIRST# AD3
PCI_IRDY# B7 B17
+3VS IRDY# AD4
C22 PME# AD5 C19
1
100K_0402_5%
RP7 PCI_SERR# B11 B18 PCI_RST#
PCI_PIRQB# R101 PCI_STOP# SERR# AD6
D 1 8 F14 STOP# AD7 B19 D
2 7 PCI_PIRQF# PCI_PLOCK# A8 D16
PCI_PIRQC# PCI_TRDY# PLOCK# AD8 CLK_PCI_PCH
3 6 A10 TRDY# AD9 D15
PCI_PIRQA# PCI_PERR#
0.1U_0402_16V4Z
4 5 D10 A13
2
PERR# AD10
1
PCI_FRAME# A16 E14 1
8.2K_0804_8P4R_5% FRAME# AD11 R102 @
AD12 H14
For EC request.
C132
L14 @ 10_0402_5%
+3VS AD13
AD14 J14
RP8 2
A18 E10 1
2
PCI_PIRQE# GNT1# AD15 @
1 8 E16 GNT2# AD16 C11
2 7 PCI_PLOCK# E12 C133
PCI_PIRQG# REQ1# AD17 8.2P_0402_50V8D
3 6 G16 B9
4 5 PCI_IRDY# REQ2# A20
REQ1# PCI AD18
B13
2
REQ2# AD19
AD20 L12
8.2K_0804_8P4R_5% B8
AD21
G14 GPIO48/STRAP1# AD22 A3
+3VS A2 B5
RP9 GPIO22 GPIO17/STRAP2# AD23
C15 GPIO22 AD24 A6
1 8 PCI_SERR# GPIO1 C9 G12
PCI_PERR# GPIO1 AD25
2 7 AD26 H12
3 6 PCI_TRDY# R103 R104
AD27 C8 For EMI, close to TigerPoint
4 5 GPIO1 10K_0402_5% 10K_0402_5% D9
@ @ PCI_PIRQA# AD28
B2 PIRQA# AD29 C7
8.2K_0804_8P4R_5% PCI_PIRQB# D7 C1
+3VS PCI_PIRQC# PIRQB# AD30
B3 PIRQC# AD31 B1
RP10 PCI_PIRQD# H10
GPIO22 PCI_PIRQE# PIRQD#
1 8 E8 PIRQE#/GPIO2
2 7 PCI_DEVSEL# PCI_PIRQF# D6
PCI_PIRQD# PCI_PIRQG# PIRQF#/GPIO3
3 6 H8 PIRQG#/GPIO4 C/BE0# H16
C 4 5 PCI_PIRQH# PCI_PIRQH# F8 M15 C
PIRQH#/GPIO5 C/BE1#
C/BE2# C13
8.2K_0804_8P4R_5% D11 L16
RSVD01 STRAP0# C/BE3#
K9 RSVD01
RSVD02 M13 RSVD02
+3VS 2 1
RP11 R105
1 8 REQ2# @ 1K_0402_5% +1.05VS
TIGERPOINT_ES1_BGA360
2 7 REQ1#
PCI_STOP# U6C TGP
3 6
1
4 5 PCI_FRAME#
R12 AE6 SATA_IRX_C_DTX_N0 <17> R111
8.2K_0804_8P4R_5% RSVD03 SATA0RXN 56_0402_5%
AE20 RSVD04 SATA0RXP AD6 SATA_IRX_C_DTX_P0 <17>
AD17 RSVD05 SATA0TXN AC7 SATA_ITX_DRX_N0 <17>
AC15 RSVD06 SATA0TXP AD7 SATA_ITX_DRX_P0 <17>
AD18 AE8 H_FERR#
RSVD07 SATA1RXN
Y12 RSVD08 SATA1RXP AD8
AA10 RSVD09 SATA1TXN AD9 R111 closed TigerPoint within 1"
AA12 RSVD10 SATA1TXP AC9
Y10 RSVD11
AD15 RSVD12
SATA
W10 RSVD13
V12 RSVD14
AE21 RSVD15
AE18 RSVD16
AD19 RSVD17
U12 RSVD18
SATA_CLKN AD4 CLK_PCIE_SATA# <8> Please closed Tiger point
AC17 AC4
B
AB13
RSVD19 SATA_CLKP CLK_PCIE_SATA <8> PIN within 500 mils +3VS B
RSVD20
AC13 RSVD21 SATARBIAS# AD11 SATARBIAS R106 24.9_0402_1%
AB15 RSVD22 SATARBIAS AC11 R107
Y14 RSVD23 SATALED# AD25 SATALED# <25>
SATALED#
AB16 RSVD24 10K_0402_5%
AE24 RSVD25
AE23 R108
RSVD26 GATEA20
10K_0402_5%
AA14 U16 GATEA20 GATEA20 <22> R109
RSVD27 A20GATE H_A20M# SERIRQ
V14 RSVD28 A20M# Y20 H_A20M# <5> 1 2
CPUSLP# Y21
Y18 H_IGNNE# 8.2K_0402_5%
IGNNE# H_IGNNE# <5>
AD16 AD21 +1.05VS
RSVD29 INIT3_3V# H_INIT#
AB11 RSVD30 INIT# AC25 H_INIT# <5>
+3VS AB10 AB24 H_INTR
RSVD31 INTR H_INTR <5>
HOST
1
R236 Y22 H_FERR#
FERR# H_FERR# <5>
1 2 AD23 GPIO36 NMI T17 H_NMI
H_NMI <5> R110 R110 to be within 1" from the Tiger
AC21 EC_KBRST#
8.2K_0402_5% RCIN#
AA16 SERIRQ
EC_KBRST# <22>
SERIRQ <22> 56_0402_5% Point chipset.
SERIRQ H_SMI#
SMI# AA21 H_SMI# <5>
2
V18 H_STPCLK#
STPCLK# H_STPCLK# <5>
THRMTRIP# AA20 H_THERMTRIP# <5>
3
A A

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
5 4 3 2 1
D D
USB PORT LIST
PORT DEVICE Modify

TGP
U6B
USB0 USB3(Left) USB2(Right)
<4> DMI_TXN0 R23
R24
DMI0RXN USBP0N H7
H6
USB20_N0
USB20_P0
USB20_N0 <16> USB1 BT USB1(Right)
<4> DMI_TXP0 DMI0RXP USBP0P USB20_N1
USB20_P0 <16> USB2(Right) USB2
<4> DMI_RXN0 P21
P20
DMI0TXN USBP1N H3
H2 USB20_P1
USB20_N1 <16> Card Reader BT
<4> DMI_RXP0 DMI0TXP USBP1P USB20_N2
USB20_P1 <16> USB1(Right) USB3
<4> DMI_TXN1 T21 DMI1RXN USBP2N J2
USB20_P2
USB20_N2 <17> USB2(Right) Card Reader
<4> DMI_TXP1 T20
T24
DMI1RXP USBP2P J3
K6 USB20_N3
USB20_P2 <17> BT USB4
<4> DMI_RXN1 DMI1TXN USBP3N USB20_P3
USB20_N3 <21> USB1(Right) USB3(Left)
<4> DMI_RXP1 T25 DMI1TXP USBP3P K5 USB20_P3 <21> Card Reader
DMI
T19 DMI2RXN USBP4N K1 USB20_N4
USB20_P4
USB20_N4 <16> USB5 WWLAN WWLAN
T18 DMI2RXP USBP4P K2
USB20_N5
USB20_P4 <16> USB3(Left) USB6
U23
U24
DMI2TXN USBP5N L2
L3 USB20_P5
USB20_N5 <15> WLAN WLAN
DMI2TXP USBP5P USB20_N6
USB20_P5 <15> WWLAN USB7
V21
V20
DMI3RXN USBP6N M6
M5 USB20_P6
USB20_N6 <15> CMOS CMOS
V24
DMI3RXP USBP6P
N1 USB20_N7
USB20_P6 <15> WLAN
DMI3TXN USBP7N USB20_N7 <17>
USB20_P7
V23 DMI3TXP USBP7P N2 USB20_P7 <17> CMOS
OC0# D4 USB_OC#0_1_D 7/17 Reassign Tiger point USB port for TOSHIBA concern
USB_OC#0_1_D
USB
K21 PERN1 OC1# C5
K22 D3 USB_OC#2
PERP1 OC2# USB_OC#3
J23 PETN1 OC3# D2
J24 E5 USB_OC#4_D
C PCIE_PTX_C_IRX_N2 PETP1 OC4# SLP_CHG_M3 C
<15> PCIE_PTX_C_IRX_N2 M18 PERN2 OC5#/GPIO29 E6 SLP_CHG_M3 <16>
PCIE_PTX_C_IRX_P2 SLP_CHG_M4 +3V_SB
WLAN <15> PCIE_PTX_C_IRX_P2
C142 2
M19 PERP2 OC6#/GPIO30 C2 SLP_CHG_M4 <16>
<15> PCIE_ITX_C_PRX_N2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N2 K24 PETN2 OC7#/GPIO31 C3 USB_OC#7 RP12
<15> PCIE_ITX_C_PRX_P2 C143 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_P2 K25 USB_OC#3 4 5
PCIE_PTX_C_IRX_N3 PETP2 SLP_CHG_M4
<20> PCIE_PTX_C_IRX_N3 L23 PERN3 3 6
PCI-E
LAN PCIE_PTX_C_IRX_P3 L24 USB_OC#0_1_D 2 7
<20> PCIE_PTX_C_IRX_P3 PERP3
<20> PCIE_ITX_C_PRX_N3 C144 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N3 L22 G2 1 8
C145 2 PETN3 USBRBIAS
<20> PCIE_ITX_C_PRX_P3 1 0.1U_0402_10V6K PCIE_ITX_PRX_P3 M21 PETP3 USBRBIAS# G3 R112 10K_0804_8P4R_5%
<15> PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_N4 P17 PERN4
22.6_0402_1% Please closed Tiger point
PCIE_PTX_C_IRX_P4 P18 RP13
WWLAN
<15>
<15>
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4 C146 2 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_N4 N25
PERP4 PIN within 200 mils USB_OC#7 4 5
C147 2 PETN4
<15> PCIE_ITX_C_PRX_P4 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_P4 N24 PETP4
USB_OC#2 3 6
F4 CLK_PCH_48M USB_OC#4_D 2 7
CLK48 CLK_PCH_48M <8>
1
SLP_CHG_M3 1 8
R113 10K_0804_8P4R_5%
Please closed Tiger point 33_0402_5%
@
PIN within 500 mils 1
2
+1.5VS C148
R114 24.9_0402_1% @ 22P_0402_50V8J
2
1 2 H24 DMI_ZCOMP
J22 For EMI, Close to TigerPoint
DMI_IRCOMP
<8> CLK_PCIE_PCH# W23 DMI_CLKN

<8> CLK_PCIE_PCH W24 DMI_CLKP
2
+3VALW +3VALW
B B
2
R115 R116
330K_0402_5% 330K_0402_5%
@ @
@ @
1
D5 D6
USB_OC#0_1_D 2 1 USB_OC#4_D 2 1
USB_OC#0_1 <16,22> USB_OC#4 <16,22>
CH751H-40PT_SOD323-2 CH751H-40PT_SOD323-2
1 2 1 2
R117 0_0402_5% R118 0_0402_5%
A A

SCHEMATICS,MB A5841
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401799 D
5 4 3 2 1
5 4 3 2 1
+3V_SB
2.2K_0402_5% 1 R119 2 PCH_SMBCLK

7/2 For EMI, Close to TigerPoint
2.2K_0402_5% 1 R120 2 PCH_SMBDATA
9/1 C207 change to SE071100J80 for EMI request
HDA_BITCLK
+3V_SB
D D
2
10K_0402_5% 2 R121 1 SYS_RST# C207
10P_0402_50V8J
1
8.2K_0402_5% R122 ICH_RI#
10K_0402_5% 2 R123 1 EC_SWI# U6D TGP
AA5 T15 GPIO0

LDRQ1#/GPIO23 BMBUSY#/GPIO0 BT_DET#
<22,24> LPC_AD0 V6 LAD0/FWH0 GPIO6 W16 BT_DET# <17>
LPC
AA6 W14 SLPIOVR
<22,24> LPC_AD1 LAD1/FWH1 GPIO7 SLPIOVR <4>
Y5 K18 EC_SMI#
<22,24> LPC_AD2 LAD2/FWH2 GPIO8 EC_SMI# <22>
W8 H19 EC_SCI#
<22,24> LPC_AD3 LAD3/FWH3 GPIO9 EC_SCI# <22>
+3V_SB
9/1 R125 change to SM010027780 for EMI request Y8 LDRQ0# GPIO10 M17 PCH_ACIN
Y4 A24 GPIO12
<22,24> LPC_FRAME# LFRAME#/FWH4 GPIO12
C23 EC_LID_OUT#
GPIO13 EC_LID_OUT# <22>
KC FBMA-11-100505-301T_0402 1 R125 2 BITCLK_PCH P6 P5 SLP_CHG#
<18> HDA_BITCLK R126 2 HDA_BIT_CLK GPIO14 SLP_CHG# <16>
33_0402_5%1 RST#_PCH U2 E24 GPIO15
<18> HDA_RST# HDA_RST# GPIO15
AUDIO
<18> HDA_SDIN0 W2 HDA_SDIN0 DPRSLPVR AB20 PM_DPRSLPVR <5>
V2 HDA_SDIN1 STP_PCI# Y16 H_STP_PCI# <8>
P8 HDA_SDIN2 STP_CPU# AB19 H_STP_CPU# <8>
33_0402_5%
1 R124 2 SDOUT_PCHAA1 R3
<18> HDA_SDOUT HDA_SDOUT GPIO24
RP15 33_0402_5%
1 R127 2 SYNC_PCH Y1 C24 1 R128 2
<18> HDA_SYNC HDA_SYNC GPIO25
5 4 LINKALERT# <8> CLK_PCH_14M AA3 CLK14 GPIO26 D19 1K_0402_5%
1
6 3 GPIO11 GPIO27 D20
7 2 SMLINK0 R129 U3 EE_CS GPIO28 F22
8 1 SMLINK1 AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN#
For EMI, Close to TigerPoint @ 10_0402_5% T6 EE_DOUT EPROM GPIO33 U14
10K_0804_8P4R_5% V3 AC1
2
C C149 EE_SHCLK GPIO34 C
GPIO38 AC23 BT_RST# <17>
18P_0402_50V8J 1 T4 AC24
LAN_CLK GPIO39 BT_OFF <17>
2 1 RTCX1 C150 P7 PLTRST#
LANR_RSTSYNC H_PWRGD
B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD <4,5>
10M_0402_5%
+3V_SB Y2 @ 4.7P_0402_50V8C AA2
LAN
MISC
LAN_RXD0
1
RP16 32.768K_1TJS125BJ4A421P 2 EC_THERM#
AD1 LAN_RXD1 THRM# AB17 EC_THERM# <22>
2
1 8 GPIO15 2 NC R130 VGATE
IN 1 AC2 LAN_RXD2 VRMPWRGD V16
2 7PCH_LOW_BAT# W3 LAN_TXD0 MCH_SYNC# AC18 MCH_SYNC# R254
3 6 GPIO12 3 NC OUT 4 T7 LAN_TXD1 PWRBTN# E21 PBTN_OUT#
PBTN_OUT# <22>
100K_0402_5%
4 5 EC_LID_OUT# U4 H23 ICH_RI#
2
C153 LAN_TXD2 RI# T43

G22
1
SUS_STAT#/LPCPD#
8.2K_0804_8P4R_5% 18P_0402_50V8J W4 D22 T44 7/20 Add test point
RTC
RTCX2 RTCX1 SUSCLK SYS_RST#
2 1 V5 RTCX2 SYS_RESET# G18
RTCRST# T5 G23 PLTRST#
RTCRST# PLTRST# PLTRST# <4,5,15,20,24>
C25 EC_SWI#
WAKE# EC_SWI# <22>
GPIO11 E20 T8 INTRUDER#
PCH_SMBCLK SMBALERT#/GPIO11 INTRUDER# PCH_POK
<8> PCH_SMBCLK H18 SMBCLK PWROK U10
SMB
+RTCVCC R131 1 2 <8> PCH_SMBDATA PCH_SMBDATA E23 SMBDATA RSMRST# AC3 PCH_RSMRST# 8/24 Add R254 pull down for EC request
20K_0402_5% LINKALERT# H21 AD3 INTVRMEN
SMLINK0 LINKALERT# INTVRMEN SB_SPKR
F25 SMLINK0 SPKR J16 SB_SPKR <18>
+RTCVCC @ J1 SMLINK1 F24 SMLINK1
1 2 SLP_S3# H20 PM_SLP_S3# <22>
1M_0402_5% 1 R132 INTRUDER# 3MM
2 R2 SPI_MISO SLP_S4# E25 PM_SLP_S4# <22>
T1 SPI_MOSI SLP_S5# F21 PM_SLP_S5# <22>
1 R133
SPI
332K_0402_1% 2 INTVRMEN M8
C155 SPI_CS# PCH_LOW_BAT#
P9 SPI_CLK BATLOW# B25
1U_0402_6.3V4Z R4 AB23 H_DPRSTP#
SPI_ARB DPRSTP# H_DPRSTP# <5>
1 2 AA18 H_DPSLP#
DPSLP# H_DPSLP# <5> +3V_SB
RSVD31 F20
+3VS
2
B 8.2K_0402_5% R256
7/20 Add SLPIOVR pull up 8.2k to +3vs B
SLPIOVR TIGERPOINT_ES1_BGA360 R134
8.2K_0402_5% R257
9/23 Change RP17 to R256, R257, R258 for layout request 330K_0402_5%
PM_CLKRUN#
1
8.2K_0402_5% R258 GPIO0 D7
PCH_ACIN 2 1 ACIN <22,25,28>
PCH_POK CH751H-40PT_SOD323-2
1 R240 2 +RTCBATT 1 2
+3VS R136 10K_0402_5%
4.7K_0402_5%
EC_PWROK 1 2
1
7/21 Pull up 4.7K to +RTCBATT for Intel request R139 10K_0402_5%
1K_0402_5% 1 R135 2 MCH_SYNC# D8

BAS40-04_SOT23-3 1 @ 2
+RTCVCC R141 0_0402_5%
+3VS R138 2 1 @ 0_0402_5%
3
+CHGRTC
1 PCH_RSMRST# 1 Q11 3
C
EC_RSMRST# <22>
C156 1 1 2
E
1U_0402_6.3V6K R140 MMBT3906_SOT23-3
C293 10K_0402_5%
B
2
2 0.1U_0402_16V4Z 1 2 +3V_SB
2 R142
1
4.7K_0402_5%
5
7/21 Change C156 to 1u for Intel request U7 D9B D9A

1 BAV99DW-7_SOT363 BAV99DW-7_SOT363
P
<22> EC_PWROK B
Y 4 PCH_POK <5>
<8,22,34> VGATE 2 A
G
6
TC7SH08FUF_SSOP5 2 1
RSMRST# circuit
3
A R143 A
2.2K_0402_5%

SCHEMATICS,MB A5841
5 4 3 2 1
5 4 3 2 1
D U6F TGP D
TGP
+5VS +3VS U6E A1
VSS01
VSS02 A25
F12 +V5REF_RUN B6
VCC5REF VSS03
1
VSS04 B10
R145 D10 B16
VSS05
VSS06 B20
100_0402_5% RB751V-40TE17_SOD323-2 F5 +V5REF_SUS B24
VCC5REF_SUS VSS07
E18
2
+SATAPLL VSS08
VCCSATAPLL Y6 VSS09 F16
+V5REF_RUN 2mA VSS10 G4
1 6mA VCCRTC AE3 +RTCVCC VSS11 G8
C157
0.01U_0402_16V7K
H1
0.1U_0402_10V6K
1U_0402_6.3V6K +DMIPLL VSS12
VCCDMIPLL Y25 1 1 VSS13 H4
C158
VSS14 H5
2
C159
VCCUSBPLL F6 VSS15 K4
1432mA R144
2 2 VSS16 K8
+VCC1_5 1 2 +1.5VS K11
VSS17
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
10U_0805_10V4Z
VSS18 K19
W18 0_0603_5% K20
V_CPU_IO VSS19
14mA 2 2 1 1 1 L4
C160
C161
+5V_SB +3V_SB VSS20
C162
C163
C164
VSS21 M7
VSS22 M11
VCC1_5_1 AA8 VSS23 N3
1
D11 1 1 2 2 2
VCC1_5_2 M9 VSS24 N12
R146 M20 N13
VCC1_5_3 VSS25
POWER
VCC1_5_4 N22 VSS26 N14
10_0402_5% RB751V-40TE17_SOD323-2 N23
R147 VSS27
P11
2
C +V5REF_SUS +VCC1_05 1 VSS28 C

2 +1.05VS VSS29 P13
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
P19
1
10mA 955mA 1 1 1 0_0603_5% VSS30
R14
C165 VSS31
C166
C167
C168
VCC1_05_1 J10 VSS32 R22
VCC1_05_2 K17 VSS33 T2
0.1U_0402_10V6K P15 T22
2 VCC1_05_3 2 2 2 VSS34
VCC1_05_4 V10 VSS35 V1
VSS36 V7
1 2 VSS37 V8
R148 0_0603_5% V19
VSS38
216mA R149
VSS39 V22
2N7002DW-T/R7_SOT363-6 H25 +VCC33 1 2 +3VS V25
VCC3_3_1 VSS40
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+5V_SB 1 6 +5VALW VCC3_3_2 AD13 VSS41 W12
Q3A F10 1 1 1 1 1 1 1 0_0603_5% W22
C169
C170
VCC3_3_3 VSS42
C171
C172
C173
C174
C175
<22,26> SBPWR_EN# SBPWR_EN# STAR@ G10 @ @ Y2
Q3B VCC3_3_4 VSS43
R10 Y24
2
VCC3_3_5 VSS44
5
STAR@ T9 AB4
2N7002DW-T/R7_SOT363-6 VCC3_3_6 2 2 2 2 2 2 2 VSS45
VSS46 AB6
4 3 1 R150 2 +VSB VSS47 AB7
47K_0402_5% F18 AB8
VCCSUS3_3_1 VSS48
1 R151 2 STAR@ VCCSUS3_3_2 N4 VSS49 AC8
@ 330K_0402_5% K7 R152 AD2
VCCSUS3_3_3 +VCCSUS33 VSS50
1 2 VCCSUS3_3_4 F1 1 2 +3V_SB VSS51 AD10
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C176 STAR@
10U_0805_6.3V4Z
VSS52 AD20
0.1U_0402_25V6 92mA 0_0603_5%
VSS53 AD24
1 1 1 1 VSS54 AE1
C177
C178
C179
C180
SBPWR_EN# 1 2 +5VALW @ AE10
R153 100K_0402_5% VSS55
VSS56 AE25
STAR@ 2 2 2 2
5
B B
VSS57 G24
VSS58 AE13
Place closely pin Y25 within 100mlis. VSS59 F2
+1.5VS
R154
RSVD32 AE16
1 2 +DMIPLL
24mA
0.01U_0402_16V7K
4.7U_0603_6.3V6K
0_0603_5% 1 1
C181
C182
@ TIGERPOINT_ES1_BGA360
2 2
Place closely pin Y6 within 100mlis.

+1.5VS
R155
1 2 +SATAPLL
45mA
10U_0805_10V4Z
0.1U_0402_10V6K
0_0603_5% 1 2
C183
C184
A A
2 1

SCHEMATICS,MB A5841
5 4 3 2 1
A B C D E
Mini-Express Card for WLAN/WiMax

+3VALW +1.5VS
120 mil
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C185 C186 C187 C188 C189 C190
WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@
2 2 2
4.7U_0805_10V4Z 2 2 4.7U_0805_10V4Z
2
1 0.01U_0402_25V7K 0.01U_0402_25V7K 1
+3VALW
+1.5VS
JWLAN
1 1
<17> WLAN_BT_DATA WLAN_BT_DATA 3 2
WLAN_BT_CLK 3 2
<17> WLAN_BT_CLK 5 5 4 4
<8> WLAN_CLKREQ# WLAN_CLKREQ# 7 6
7 6
9 9 8 8
<8> CLK_PCIE_WLAN# 11 11 10 10
<8> CLK_PCIE_WLAN 13 13 12 12
15 15 14 14
16 16
17 17
19 19 18 18
21 20 WL_OFF#
21 20 WL_OFF# <22>
<12> PCIE_PTX_C_IRX_N2 23 22 PLTRST#
23 22 PLTRST# <4,5,13,20,24>
<12> PCIE_PTX_C_IRX_P2 25 25 24 24
27 27 26 26
29 29 28 28
<12> PCIE_ITX_C_PRX_N2 31 31 30 30 CLK_SMBCLK <7,8>
<12> PCIE_ITX_C_PRX_P2 33 33 32 32 CLK_SMBDATA <7,8>
35 35 34 34
37 37 36 36 USB20_N6 <12>
WLAN/ WiFi +3VALW 39 39 38 38 USB20_P6 <12>
41 41 40 40
2 LED_WIMAX# 2
43 43 42 42 LED_WIMAX# <25> WiMax
45 45 44 44
47 46 R158
R156 1 0_0402_5% 47 46 100K_0402_5%
<22> EC_TX_P80_DATA 2 49 49 48 48
R157 1 2 0_0402_5% 51 50 1 2 +3VS
<22> EC_RX_P80_CLK 51 50
52 52
Debug card using 53 GND
1
AGND 54
R159 GND
100K_0402_5% P-TWO_A54402-A0G16-N
@
9/29 Change JWLAN PIN 54 to AGND
2
10/6 From JGPS change to JWLAN
Mini-Express Card for 3G/GPS

3G current need to 2750mA
+3VS +1.5VS
120 mil
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C191 C192 C193 C194 C195 C196
3GGPS@ 3GGPS@ 3GGPS@ 3GGPS@ 3GGPS@ 3GGPS@
2 2 4.7U_0805_10V4Z
2 2 2 2
4.7U_0805_10V4Z +UIM_PWR
0.01U_0402_25V7K 0.01U_0402_25V7K
1
3 R160 3
4.7K_0402_5%
@
+3VS
J3GSIM
120 mil
2
+1.5VS +UIM_PWR 1 4
+UIM_PWR VCC GND
JGPS UIM_RST 2 5 UIM_VPP
RST VPP
1
1 1 UIM_CLK 3 6 UIM_DATA
1 D12 CLK I/O
3 3 2 2
5 4 C197 GLZ20A LL-34 7 8 1
5 4 NC NC
1
<8> WWAN_CLKREQ# WWAN_CLKREQ# 7 6 0.1U_0402_16V4Z 3G@ 1 1
7 6 +UIM_PWR 3G@ 2 MOLEX_47273-0001 C200
9 8 +UIM_PWR
2
9 8 UIM_DATA C198 C199 @ 22P_0402_50V8J

<8> CLK_PCIE_WWAN# 11 11 10 10
UIM_CLK 10P_0402_50V8J 10P_0402_50V8J D13 D14 D15 2 @
<8> CLK_PCIE_WWAN 13 13 12 12
15 14 UIM_RST 3G@ 2 2 3G@ DAN217_SC59 DAN217_SC59 DAN217_SC59
15 14 UIM_VPP @ @ @
16
2
16
+UIM_PWR
17 17
19 19 18 18
21 20 UWB_OFF#
21 20 UWB_OFF# <22>
<12> PCIE_PTX_C_IRX_N4 23 22 PLTRST#
23 22
<12> PCIE_PTX_C_IRX_P4 25 25 24 24
27 27 26 26
29 29 28 28
31 30 CLK_SMBCLK CLK_PCIE_WWAN# C334@ 1 2 CLK_PCIE_WWAN
<12> PCIE_ITX_C_PRX_N4 31 30
33 32 CLK_SMBDATA
<12> PCIE_ITX_C_PRX_P4 33 32 10P_0402_50V8J
35 35 34 34
37 37 36 36 USB20_N5 <12>
+3VS 39 39 38 38 USB20_P5 <12>
41 41 40 40
4
43 43 42 42 LED_WIMAX# 7/16 Reserve C333 and C334 for EMI request 4
45 45 44 44
47 47 46 46 7/21 Reserve Shunt Capacitor C334 for EMI request
49 49 48 48
51 51 50 50
52 52
53 GND
54 GND
P-TWO_A54402-A0G16-N
@ 2009/10/21 2012/10/21 Title
SCHEMATICS,MB A5841
D
401799
A B C D E
5 4 3 2 1
USB CONN--Right
+USB_VCCA
JPIO
1
D
+5VALW 1.4A +USB_VCCA 2
3
D
U12
W=60mils 4
5
1 GND VOUT 8 <12> USB20_N1 6
2 VIN VOUT 7 <12> USB20_P1 7
3 VIN VOUT 6 1 8
<22> USB_EN# USB_EN# 4 5 C201
EN FLG @ 9
<12> USB20_N0 10
RT9715BGS_SO8 4.7U_0805_10V4Z <12> USB20_P0
2 11
12
13
<18> HP_R 14
<18> HP_L 15
AGND
MIC1_L 16
<19> MIC1_L 17
MIC1_R
USB_OC#0_1 <12,22> <19> MIC1_R 18
<18> NBA_PLUG 19
8/24 Change U12 to SA00002XX00 for discharge +USB_VCCA <18> MIC_SENSE 20
AGND 21
22
D23 7/8 Pin swap for AGND

USB20_N1 1 6 USB20_P1 ACES_85201-20051
I/O1 I/O4
9/3 Add PIN 21, PIN 22 for GND pad
2 REF1 REF2 5 +5VALW
9/3 Change JPIO PIN 22 to AGND
USB20_P0 3 4 USB20_N0
C
I/O2 I/O3 C
CM1293A-04SO_SOT23-6
@
7/8 ESD diode change location from Sub board to M/B

9/28 D36 for ESD request
+USB_VCCB
W=30mils
USB Board--Left +USB_VCCB
+3VALW 0.1U_0402_16V4Z
please close to SB under 30mm 1
1 1
+USB_VCCB +USB_VCCB U9 0.1U_0402_16V4Z C202 + C204 C205
C203
1
USB20_P4_S 1 10 1 2 150U_B_6.3VM_R40M
R161 R162 1D+ VCC 2 2 2
75K_0402_1% 43K_0402_1% USB20_N4_S 2 9
1D- S SLP_CHG# <13>
1000P_0402_50V7K
USB20_P4 3 8 USB20_P4_R JUSBC
<12> USB20_P4
2
2D+ D+
1 VCC
USB20_P4_S_O USB20_N4 4 7 USB20_N4_R USB20_N4_R_S 2
<12> USB20_N4 2D- D- D-
USB20_N4_S_O USB20_P4_R_S 3
USB_CHG_EN# D+
5 GND OE# 6 4 GND
1
B R163 R164 B
51K_0402_1% 51K_0402_1% TS3USB221RSER_QFN10_2X1P5
7/27 Swap USB20_P4_R_S and USB20_N4_R_S 5 GND1
6 GND2
8/21 USB_CHG_EN# has to be connected to OE# pin for SPEC REV 0.5 7 GND3 @
8
2
D16 GND4
1 6 SUYIN_020173MR004S50DZL
I/O1 I/O4
SLP_CHG FUNCTION 2 REF1 REF2 5 +5VALW

U10 USB20_P4_R_S 3 I/O2 I/O3 4 USB20_N4_R_S 8/19 Change JUSBC to DC233004W00 for ME request
<12> SLP_CHG_M3 1
4
1OE# LOW D=1D CM1293A-04SO_SOT23-6
2OE# @
<12> SLP_CHG_M4 10 3OE#
13 4OE# HIGH D=2D
USB20_P4_S 2 3 USB20_P4_S_O
USB20_N4_S 1A 1B USB20_N4_S_O
5 2A 2B 6
9 3A 3B 8 R165 1 2 100_0402_5% W=30mils 1 2
12 4A 4B 11
+5VALW 1.4A
U11
+USB_VCCB
USB20_P4_R
R166 0_0402_5%
USB20_P4_R_S
+USB_VCCB 14 VCC GND 7
1 GND VOUT 8
2 SN74CBT3125PWRG4_TSSOP14 2 7
VIN VOUT USB20_N4_R USB20_N4_R_S
3 VIN VOUT 6
C206 <22> USB_CHG_EN# 4 5 USB_OC#4 <12,22>
EN FLG
0.1U_0402_16V4Z
1 RT9715BGS_SO8 1 2
R167 0_0402_5%
A 7/16 USB_OC#0 dis-connect to +USB_VCCB A
7/2 For EMI request and change to SM070001310
7/17 Change U11 to SA00002XX00 for discharge +USB_VCCB 10/20 Delete L4 for EMI request
SLP_CHG_M3 SLP_CHG_M4
Mode 3 HIGH LOW Issued Date 2009/10/21 Deciphered Date 2012/10/21 Title
SCHEMATICS,MB A5841
Mode 4 LOW HIGH AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
401799
5 4 3 2 1
A B C D E F G H
SATA Conn.
For 1.8" SSD +3VALW
+5VS
Place closely JHDD SATA CONN. +3VS SSD HDD need 400mA for 3V(PHISON)
1.2A U22
APX9132ATI-TRL_SOT23-3
1 1 1 1 1 1 1 1
1 C208 C209 C210 C211 C212 C213 C214 C215 1
@ @ @ @ 2 3
GND
VDD VOUT LID_SW# <22>
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2
1 1
1
C333 C332
0.1U_0402_16V4Z 10P_0402_50V8J
JSATA 2 2
GND 1
2 SATA_ITX_C_DRX_P0 C218 1 2 0.01U_0402_25V7K
RX+ SATA_ITX_DRX_P0 <11>
3 SATA_ITX_C_DRX_N0 C219 1 2 0.01U_0402_25V7K
RX- SATA_ITX_DRX_N0 <11>
GND 4
5 SATA_IRX_DTX_N0 C220 1 2 0.01U_0402_25V7K
TX- SATA_IRX_C_DTX_N0 <11>
6 SATA_IRX_DTX_P0 C221 1 2 0.01U_0402_25V7K
TX+ SATA_IRX_C_DTX_P0 <11>
GND 7
8/19 Add Lid switch function on M/B for ME request
3.3V 8 +3VS
26 boss 3.3V 9
25 boss 3.3V 10
GND 11
24 GND GND 12
23 GND GND 13
5V 14 +5VS
15
5V
5V
GND
16
17
Camera Conn.
Rsv 18
2 19 2
GND
12V 20
21
12V
12V 22 Int. Camera 7/21 Swap USB20_P7, USB20_N7 for layout request
ALLTO_C16674-12204-L W=20mils 8/14 Swap USB20_P7, USB20_N7 for layout request
10/20 Delete L5 for EMI request
8/24 Change JSATA for ME request +5VS 1 2
C222
0.1U_0402_16V4Z
1 2
R168 0_0402_5%
JCAM
BlueTooth Interface 1
2
1
2 USB20_N7_R
USB20_P7_R
USB20_N7 <12>
3 3 USB20_P7 <12>
4 4
5 5
+3VS 6
+3VS GND1
GND2 7 1 2
R169 0_0402_5%
ACES_88266-05001
1
@
R170 C223
100K_0402_5% 2 1 For EMI request
3
S
47K_0402_5% 0.1U_0402_10V6K
2
G
<13> BT_OFF 1 2 2
3 R171 3
1
C224 D Q12
1
AO3413_SOT23
0.01U_0402_25V7K
2
+BT_VCC
Bluetooth Connector
JBT
1 1
USB20_P2 2
<12> USB20_P2 2
USB20_N2 3
<12> USB20_N2 3
<15> WLAN_BT_CLK 4 4
<13> BT_DET# 1 2 5 5
<13> BT_RST# 1 2 BT_RESET# R172 0_0402_5% 6 6
R173 100K_0402_5% 7
<15> WLAN_BT_DATA 7
8 8
+3VS 1 2 9 9
R174 @ 10
4.7K_0402_5% 10
+BT_VCC
C225
2
0.1U_0402_16V4Z 1 (MAX=200mA)
R175 11
C226 C227 GND1
12 GND2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7K_0402_5%
2 ACES_87213-1000G
1
@
4 4
WLAN_BT_CLK C228@ 1 2 10P_0402_50V8J

SCHEMATICS,MB A5841
Custom D
401799
A B C D E F G H
A B C D E
HD Audio Codec +3VS_DVDD

30mil RA1 Audio regulator
10U_0805_10V4Z 2 1 +3VS
1 1 0_0603_5%
CA1 CA2
+AVDD
40mil 2 2
RA2 0.1U_0402_16V4Z
+VDDA 2 1 10U_0805_10V4Z 0.1U_0402_16V4Z
0_0603_5% 1 1 1 1 1 2 +5VS
CA3 CA4 CA5 CA6 10U_0805_10V4Z 1 2
1 1 1 @ PJ19 1
(output= 300mA) JUMP_43X79
2 2 2 2 CA7 CA8
10U_0805_10V4Z 0.1U_0402_16V4Z
2 2 +5VS +VDDA
0.1U_0402_16V4Z UA2
25
38
30mil
9
UA1 4.75V
1 5 2
DVDD_IO
DVDD
AVDD1
AVDD2
VIN VOUT CA10
2
CA9 2 @
@ GND CA11 @ 1U_0402_6.3V4Z
1U_0402_6.3V4Z 1
14 LINE2-L LOUT1_L 35 AMP_SPK_L <19> 3 SHDN# BP 4 2 1
1
15 36
SPK out 0.22U_0402_10V4Z
LINE2-R LOUT1_R AMP_SPK_R <19>
@
16 39 APL5151-475BC-TRL_SOT23-5
<19> MIC2_L MIC2_L LOUT2_L
Int. Mic 17 41
<19> MIC2_R MIC2_R LOUT2_R
23 LINE1_L SPDIFO1 48
24 LINE1_R SPDIFO2 45
21 33 HP_L_R 1 2
<19> MIC1_C_L MIC1_L HPOUT_L HP_L <16>
RA3 63.4_0402_1%
HP_R_R HP out
Ext. Mic <19> MIC1_C_R 22 MIC1_R HPOUT_R 32 1
RA4
2
63.4_0402_1%
HP_R <16>
1 2 MONO_IN 12 37 8/14 Add net name to HP_L_R and HP_R_R for layout request
2 CA12 0.1U_0402_16V4Z BEEP_IN MONO_OUT Beep sound 2
8/14 Add net name to CPVEE for layout request
<13> HDA_BITCLK 6 BITCLK DMIC_CLK1/2 46
10/5 Add RA7 and RA11 for ESD request
<13> HDA_SDOUT 5 SDATA_OUT DMIC_CLK3/4 44
<13> HDA_SDIN0 2 1 HDA_SDIN0_R 8 SDATA_IN LINE2_VREFO 20 Layout need to open channel

RA5 33_0402_5%
11 18
<13> HDA_RST# RESET# LINE1_VREFO
1 2 EC Beep
<13> HDA_SYNC 10 SYNC MIC1_VREFO 28 10mil +MIC1_VREFO RA7 0_0603_5%
<22> BEEP# 1
RA6
2
19
10mil 47K_0402_5%
MIC2_VREFO +MIC2_VREFO
2 GPIO0/DMIC_DATA1/2 1 2
7/8 For EMI request and closed UA1 31 CPVEE 1 2 RA9 0_0603_5%
3 GPIO1/DMIC_DATA3/4
CPVEE CA13 2.2U_0603_6.3V6K PCI Beep RA8
CA14
8/14 Add R235 VREF 27 AC_VREF CA16 CA17
<13> SB_SPKR 1 2 1 2 MONO_IN
SENSE_A
10U_0805_10V4Z
0.1U_0402_16V4Z
13 SENSE A 1 2 47K_0402_5%
8/24 Change R235 to RA21 JDREF 40 AC_JDREF 1 RA10 2 1 1 RA11 0_0603_5% 0.1U_0402_16V4Z
SENSE_B 34 20K_0402_1%
SENSE B
CBN 30 1 2
1 2 47 CA15 2.2U_0603_6.3V6K
<22> EAPD EAPD 2 2
RA21 0_0402_5% 29
CBP
43 NC DGND AGND
1
1
CA33 4 DVSS AVSS1 26
@ @ RA31 7 42 RA12 CA18
HDA_BITCLK DVSS AVSS2 10K_0402_5%
1 2 1 2 0.1U_0402_16V4Z
@ CA34 @ RA32 2
2
3 22P_0402_50V8J 22_0402_5% ALC272-GR_LQFP48_7X7 HDA_RST# 3
1 2 2 1 +3VS
DGND AGND 0.01U_0402_16V7K 4.7K_0402_5%
7/2 For EMI request and closed UA1

7/2 For ESD request and closed UA1
Sense Pin Impedance Codec Signals Function place close to chip

39.2K PORT-A (PIN 39, 41) SENSE_A
<16> MIC_SENSE 1 2
RA13 20K_0402_1%
20K PORT-B (PIN 21, 22) Ext. MIC
SENSE A
10K PORT-C (PIN 23, 24) <16> NBA_PLUG 1 2 SENSE_B
RA14 5.1K_0402_1%
5.1K PORT-D (PIN 35, 36) SPK out 1

RA15
2
20K_0402_1%
4 39.2K PORT-E (PIN 14, 15) 4
20K PORT-F (PIN 16, 17) Int. MIC

SENSE B
10K PORT-H (PIN 37) Security Classification Compal Secret Data Compal Electronics,Inc
5.1K PORT-I (PIN 32, 33) Headphone out SCHEMATICS,MB A5841
Custom D
401799
A B C D E
A B C D E
TPA6017 Medium Range Amplifier

+5VS
0.1U_0402_16V4Z
1 Rin =70Kohm 1 1 1 1
CA21 CA22 CA23

10U_0805_10V4Z
2 2 2 10 dB
RA34
1 2 +5VS
0.1U_0402_16V4Z
8.2K_0402_5%
CA24 RA33 CA35
1
LINE_R_OUTR+ LINE_OUTR+ 2 LINE_C_OUTR+
16
15
1 2 1 2 1
6
UA3 RA26 RA22
0.033U_0402_16V7K 2K_0402_5% 1U_0402_6.3V6K 100K_0402_5% 100K_0402_5%
VDD
PVDD1
PVDD2
@
RA36
2
1 2
7 RIN+ GAIN0 2
8.2K_0402_5%
GAIN1 3
CA28 RA35 CA36
1
<18> AMP_SPK_R 1 2 LINE_R_OUTR- 1 2 LINE_OUTR- 1 2 LINE_C_OUTR- 17 RIN- SPKR+ RA29 RA30
ROUT+ 18
0.033U_0402_16V7K 2K_0402_5% 1U_0402_6.3V6K 100K_0402_5% 100K_0402_5%
@
CA31 RA38 CA38 14 SPKR-
2
LINE_R_OUTL+ LINE_OUTL+ LINE_C_OUTL+ ROUT-
1 2 1 2 1 2 9 LIN+
0.033U_0402_16V7K 2K_0402_5% 1U_0402_6.3V6K 4 SPKL+
LOUT+
2 RA39 5 2
LIN- SPKL-
1 2 LOUT- 8
8.2K_0402_5% GAIN0 GAIN1 Av(db) Rin(ohm)
0 0 6 90K
CA29 RA37 CA37 12 Keep 10 mil width
NC
<18> AMP_SPK_L 1 2 LINE_R_OUTL- 1 2 LINE_OUTL- 1 2 LINE_C_OUTL- 7/13 Reserve CA25 for RF request 0 1 10 70K
10 AMP_BYPASS
BYPASS
0.033U_0402_16V7K 2K_0402_5% 1U_0402_6.3V6K 19 SHUTDOWN 1 0 15.6 45K
2 1
RA40 CA32 CA25 1 1 21.6 25K
GND5
GND1
GND2
GND3
GND4
1 2 @
0.47U_0603_10V7K 0.1U_0402_16V4Z
8.2K_0402_5% 1 2
TPA6017A2_TSSOP20
21
20
13
11
1
<22> EC_MUTE#
Use mono SPK
setting 68Hz
F=1/2πRC --> -3db
Ext. Mic CH751H-40PT_SOD323-2
RA17 2 RA16 1 1 2 +MIC1_VREFO
C=0.033U,R=70K,F=68Hz CA19 1K_0402_5% 4.7K_0402_5% DA1
4.7U_0805_10V4Z 2 1 2 1 MIC1_L
<18> MIC1_C_L MIC1_L <16>
7/21 Add RA33~RA40, CA35~CA38 for AMP gain 4.7U_0805_10V4Z MIC1_R
<18> MIC1_C_R 2 1 2 1 MIC1_R <16>
1K_0402_5%
3 CA20 RA18 RA19 1 3
2 1 2 +MIC1_VREFO
4.7K_0402_5% DA2
CH751H-40PT_SOD323-2
Right Speaker Connector Int. Mic

2 1 +MIC2_VREFO
4.7K_0402_5% RA20
RA23
@ CA26 1K_0402_5% JMIC
DA4
PESD5V0U2BT_SOT23-3 1U_0402_6.3V4Z 2 1 2 1 INT_MIC 1
<18> MIC2_L 1
2 1 2 2 2
1 1U_0402_6.3V4Z 2 1 2 1 CA27
<18> MIC2_R
3 1K_0402_5% 220P_0402_50V7K 3
JSPKR CA30 RA28 GND
4 GND
SPKR+ LA1 1 2 0_0603_5% SPK_R1 1 3
SPKR- LA2 1 1 NC1
2 0_0603_5% SPK_R2 2 2 NC2 4 ACES_88231-02001
3
@
ACES_85204-0200N
@
7/3 Change to SCA00000T00 for ESD request DA3
PESD5V0U2BT_SOT23-3
Left Speaker Connector 9/3 Add PIN 3, PIN 4 for GND pad
1
@
DA5
PESD5V0U2BT_SOT23-3
4 4
2
1 7/3 Change to SCA00000T00 for ESD request
3
JSPKL
SPKL+ LA4 1 2 0_0603_5% SPK_L1 1 3
SPKL- LA3 1 1 NC1
2 0_0603_5% SPK_L2 2 4
2 NC2 Security Classification Compal Secret Data Compal Electronics,Inc
ACES_85204-0200N 2009/10/21 2012/10/21 Title
@ SCHEMATICS,MB A5841
7/3 Change to SCA00000T00 for ESD request THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
10/27 Delete DA4 and DA5 for ESD request DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
401799 D
A B C D E
A B C D E
+LAN_VDD12
Close to Pin10,13,30,36
4 2 2 2 2 4
CL1 CL2 CL3 CL4
Place Close to Chip 1

0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
UL1
<12> PCIE_PTX_C_IRX_P3 CL5 1 2 0.1U_0402_10V6K PCIE_PTX_IRX_P3 20 33 LAN_DO PAD

HSOP LED3/EEDO T42
34 LAN_DI 1 2 +3V_LAN
CL6 LED2/EEDI/AUX
<12> PCIE_PTX_C_IRX_N3 1 2 0.1U_0402_10V6K PCIE_PTX_IRX_N3 21 HSON LED1/EESK 35 RL1 3.6K_0402_5%
32 LAN_CS 1 2
EECS RL2 1K_0402_5%
<12> PCIE_ITX_C_PRX_P3 15 HSIP
LED0 38
<12> PCIE_ITX_C_PRX_N3 16 HSIN Close to Pin48 Close to Pin1,37,29
RTL8103EL-GR MDIP0 2 LAN_MDI0+
+3V_LAN
<8> CLK_PCIE_LAN 17 3 LAN_MDI0-
REFCLK_P MDIN0 LAN_MDI1+
<8> CLK_PCIE_LAN# 18 REFCLK_M MDIP1 5
6 LAN_MDI1- VCTRL12
MDIN1
<8> LAN_CLKREQ# 25 CLKREQB NC 8
NC 9 2 2 2 2
27 11 CL7 CL8 CL9 CL10
<4,5,13,15,24> PLTRST# PERSTB NC
NC 12
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
RL3 1 1 1 1
1 2 2.49K_0402_1% 46 RSET NC 4
<22> LOM_WAKE# 26 48 VCTRL12

ISOLATEB LANWAKEB VCTRL12A
<22> ISOLATEB 28 ISOLATEB
+3V_LAN 2 1 VDDTX 19 +EVDD12
RL4 100K_0402_5% LAN_X1 41 30 +LAN_VDD12
LAN_X2 CKXTAL1 DVDD12
42 CKXTAL2 DVDD12 36
3 13 3
DVDD12
8/24 Connect ISOLATEB to EC DVDD12 10 Close to Pin 45 Close to Pin19
39 +LAN_VDD12 +EVDD12
+3VS NC
23 NC NC 44
24 NC VCTRL12D 45 +LAN_VDD12
1
RL5 7 29 +3V_LAN 1 2 2 2
1K_0402_5% GND VDD33 CL11 CL12 CL13 CL14
14 GND VDD33 37
31 GND
47 1 10U_0805_10V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
2
ISOLATEB GND AVDD33 2 1 1 1

NC 40
22 GNDTX NC 43
RL6 RTL8103EL-VB-GR_LQFP48_7X7
15K_0402_5%
YL1
LAN_X1 2 1 LAN_X2 7/17 Change JLAN for don't support LAN LED fuction LAN Conn.
25MHz_20pF_6X25000017 7/23 Change JLAN for ME request
1 1
CL17 CL15 8/24 Change JLAN for Deep connecter
JLAN
27P_0402_50V8J 27P_0402_50V8J
2 2 2 2
8 PR4-
7 PR4+
RJ45_MIDI1- 6 PR2-
5 PR3-
4 PR3+
RJ45_MIDI1+ 3 PR2+
Place CL20,CL21 closed to UL3 UL2 RJ45_MIDI0- 2 PR1-
LAN_MDI0+ 1 16 RJ45_MIDI0+ RJ45_MIDI0+ 1
LAN_MDI0- TD+ TX+ RJ45_MIDI0- PR1+
2 TD- TX- 15
1 2 3 14 RL10 9
CT CT CL19 1 SHLD1
4 NC NC 13 2 1000P_0402_50V7K 1 2 75_0402_1%
CL18 0.01U_0402_16V7K 5 12 1 2 1 2 RJ45_GND 10
NC NC CL20 1000P_0402_50V7K 75_0402_1% SHLD2
1 2 6 CT CT 11
LAN_MDI1+ 7 10 RJ45_MIDI1+ RL12
CL22 0.01U_0402_16V7K LAN_MDI1- RD+ RX+ RJ45_MIDI1- SANTA_130452-C
8 RD- RX- 9
8456E
RJ45_GND 1 2 1000P_1808_3KV7K LANGND
CL23 1 1
CL24 CL25
1 1
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2

SCHEMATICS,MB A5841
Custom D
401799
A B C D E
5 4 3 2 1
+3VS_CR
RC1 0_0603_5%
+3VS 1 2
+3VALW 1 2
@ RC2 0_0603_5% 1
CC1
0.1U_0402_16V4Z
confirm that whether can be removed 2 RC3 0_0402_5%
2 1
D CC2 0.1U_0402_16V4Z D
1 2
UC1
+3VS_CR
CC3 0.1U_0402_16V4Z 1 AV_PLL
2 1 3 NC
2
7 NC
RC4 +VCC_3IN1 9
100K_0402_5% CARD_3V3
11 D3V3
+3VS_CR 33 D3V3 VREG 10
22 1
1
MS_D4 CC4
NC 30
RC5 0_0402_5% +3VS_CR 8 1U_0402_6.3V4Z
RST# RST#_R CC5 RST#_R 3V3_IN
2 1 44 RST#
MODE SEL 2
45 MODE_SEL
1 4.7U_0603_6.3V6K 47 43
CC6 CLK_48M_CR XTLO XD_CLE_SP19
48 XTLI XD_CE#_SP18 42
1U_0402_6.3V4Z 41
XD_ALE_SP17 SD_DATA2
<12> USB20_N3 4 DM SD_DAT2/XD_RE#_SP16 40
2 SD_DATA3
<12> USB20_P3 5 DP SD_DAT3/XD_WE#_SP15 39
CR_LED# 14 38
GPIO0 XD_RDY_SP14
48Mhz SD_DAT4/XD_WP#/MS_D7_SP13 37
35
SD_DAT5/XD_D0/MS_D6_SP12 SD_MS_CLK RC6 SDCLK
SD_CLK/XD_D1/MS_CLK_SP11 34 1 2 33_0402_5%
CLK_48M_CR 31
<8> CLK_48M_CR SD_DAT6/XD_D7/MS_D3_SP10
MODE SEL 29
MS_INS#_SP9
SD_DAT7/XD_D2/MS_D2_SP8 28
27 SD_MS_DATA0
10_0402_5% 10P_0402_50V8J SD_DAT0/XD_D6/MS_D0_SP7
SD_DAT1/XD_D3/MS_D1_SP6 26
CLK_48M_CR 1 2 25
XD_D5_SP5
1
C SD_DATA1 C
1 XD_D4/SD_DAT1_SP4 23
CC8 RC8 RC7 CC7 21 SDCD#
0.1U_0402_16V4Z SD_CD#_SP3 SDWP#
0_0402_5% SD_WP_SP2 20
@ @ 19
2 XD_CD#_SP1
18 8/24 Det RC9
2
EEDI
2 RREF XTAL_CTR 13 +3VS_CR
MS_D5 24
12 DGND
32 DGND EEDO 15
6
EECS 16
17
XTAL_CTR Description
AGND EESK SDCMD
46 AGND SD_CMD 36 0 Use 12MHz Crystal
1 Use 48MHz CLK Gen
2
2
RTS5159-GR_LQFP48_7X7
RC11 RC12
6.19K_0402_1% 0_0402_5%
+3VS
1
1 2 in 1 Card Reader
1
RC10
220_0402_5%
2
JCARD
SD_DATA3 1 D3
2
SDCMD 2
B DC1 CMD B
3 VSS1
HT-191UYG-DT YEL/GRN_0603 +VCC_3IN1 4 VDD
SDCLK 5 CLK
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 1 6 VSS2
1
SD_MS_DATA0 7
CC9 CC10 SD_DATA1 D0
8 D1
2 2 SD_DATA2 9 D2
CR_LED# SDWP# 10
SDCD# WP
11 CD
7/23 Change to TOP view LED
12 GND1
R C USB AUTO DE-LINK MS FORMATTER Description 13
14
GND2
GND3
15 GND4
0 NC YES Recommended
TAITW_PSDAT3-09GLAS1N14N
NC 47P YES YES
NC NC Compatible with RTS5158E
8/19 Change push pull Conn for ME request
NC 680P YES LED ON 10_0402_5% 10P_0402_50V8J
SDCLK 1 2
10K 180P LED ON @ RC14 @ CC11
A A
10K 680P YES

SCHEMATICS,MB A5841
5 4 3 2 1
+3VALW
+3VALW
1 1 1 1 1 1 C235
0.1U_0402_16V4Z
C229
0.1U_0402_16V4Z
C230
0.1U_0402_16V4Z
C231
0.1U_0402_16V4Z
C232
1000P_0402_50V7K
C233
1000P_0402_50V7K
C234
1 2
0.1U_0402_16V4Z CLK_PCI_LPC
2 2 2 2 2 2
111
125
1
22
33
96
67
9
U13 R176
@ 10_0402_5%
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
1
GATEA20 1 21
<11> GATEA20 EC_KBRST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP# C236
<11> EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 BEEP# <18>
SERIRQ 3 26 @ 22P_0402_50V8J
<11> SERIRQ SERIRQ# FANPWM1/GPIO12 2
LPC_FRAME# 4 27 ACOFF
<13,24> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <30>
LPC_AD3 5
<13,24> LPC_AD3 LAD3
LPC_AD2 7 PWM Output
<13,24> LPC_AD2 LAD2
LPC_AD1 8 63 BATT_TEMPA
<13,24> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA <29>
LPC_AD0
<13,24> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
ADP_I/AD2/GPIO3A 65 ADP_I <30>
CLK_PCI_LPC 12 AD Input 66 ADP_V
<8> CLK_PCI_LPC PCICLK AD3/GPIO3B ADP_V <30>
PCI_RST# 13 75
<11> PCI_RST# PCIRST#/GPIO05 AD4/GPIO42
ECRST# 37 76 HDPACT
ECRST# SELIO2#/AD5/GPIO43 HDPACT <23>
EC_SCI# 20
<13> EC_SCI# SCI#/GPIO0E
WL_BT_LED# 38 Place closely pin 109
+3VALW <25> WL_BT_LED# CLKRUN#/GPIO1D R178
R177 68
47K_0402_5% DAC_BRIG/DA0/GPIO3C EN_DFAN1 LID_SW#
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 <24> +3VALW 1 2
2 1 ECRST# DA Output 71 IREF
IREF/DA2/GPIO3E IREF <30>
KSI0 55 72 CHGVADJ
KSI0/GPIO30 DA3/GPIO3F CHGVADJ <30> 47K_0402_5%
2 1 KSI1 56
C237 0.1U_0402_16V4Z KSI2 KSI1/GPIO31
57 KSI2/GPIO32
KSI3 58 83 EC_MUTE#
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <19>
KSI4 59 84 USB_EN#
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# <16>
KSI5 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
KSI7 62 87 TP_CLK
KSO[0..15] KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <25>
KSO0 39 88 TP_DATA
<24> KSO[0..15] KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <25>
KSO1 40
KSI[0..7] KSO2 KSO1/GPIO21
41 KSO2/GPIO22
<24> KSI[0..7] KSO3 42 97 VGATE
KSO3/GPIO23 SDICS#/GPXOA00 VGATE <8,13,34>
KSO4 43 98 WOL_EN#
KSO4/GPIO24 SDICLK/GPXOA01 WOL_EN# <26> +3VALW
KSO5 SBPWR_EN#
confirm battery team change +5VALW to +3VALW
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
SBPWR_EN# <14,26>
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <17>
KSO7 46 SPI Device Interface 1 2
RP18 KSO8 KSO7/GPIO27 330K_0402_5% R179
47 KSO8/GPIO28
+3VALW 1 8 EC_SMB_CK1 KSO9 48 119 EC_SI_SPI_SO D17
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO <24>
2 7 EC_SMB_DA1 KSO10 49 120 EC_SO_SPI_SI ACIN_D 2 1
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <24> ACIN <13,25,28>
+5VS 3 6 TP_CLK KSO11 50 SPI Flash ROM 126 EC_SPICLK_R
TP_DATA KSO12 KSO11/GPIO2B SPICLK/GPIO58 SPI_CS# CH751H-40PT_SOD323-2
4 5 51 KSO12/GPIO2C SPICS# 128 SPI_CS# <24>
KSO13 52
4.7K_0804_8P4R_5% KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E Add D21 for AC-IN leakage issue
KSO15 54 73 USB_OC#0_1
KSO15/GPIO2F CIR_RX/GPIO40 USB_OC#0_1 <12,16>
81 74 USB_OC#4
KSO16/GPIO48 CIR_RLC_TX/GPIO41 USB_OC#4 <12,16>
82 89 FSTCHG
+3VS KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <30>
90 BATT_FULL_LED#
BATT_CHGI_LED#/GPIO52 BATT_FULL_LED# <25>
91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <24>
EC_SMB_CK2 EC_SMB_CK1 77 GPIO 92 BATT_CHG_LOW_LED#
<29> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# <25>
R180 2.2K_0402_5% EC_SMB_DA1 78 93 PWR_ON_LED#
<29> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_ON_LED# <25>
EC_SMB_DA2 EC_SMB_CK2 79 SM Bus 95 SYSON
<5,23> EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <26,32>
R181 2.2K_0402_5% EC_SMB_DA2 80 121 VR_ON
<5,23> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <34>
127 ACIN_D L6
AC_IN/GPIO59
7/15 INVT_PWM from PIN 21 change to PIN 25 EC_SPICLK_R 1 2 EC_SPICLK <24>
For EC recommend 10/17 KC FBMA-11-100505-900T 0402
PM_SLP_S3# 6 100 EC_RSMRST#
<13> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <13>
PM_SLP_S5# 14 101 EC_LID_OUT# C323
<13> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <13>
EC_SMI# 15 102 EC_ON 6P_0402_50V8D
<13> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <25>
16 103 EC_SWI#
LID_SW#/GPIO0A EC_SWI#/GPXO06 EC_SWI# <13>
17 104 EC_PWROK
<20> ISOLATEB SUSP#/GPIO0B ICH_PWROK/GPXO06 EC_PWROK <13>
BATT_TEMPA 1 2 18 GPO 105 BKOFF# BKOFF# <9>
C239 100P_0402_50V8J HDPINT PBTN_OUT#/GPIO0C BKOFF#/GPXO08 WL_OFF#
<23> HDPINT 19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106 WL_OFF# <15>
INVT_PWM 25 107 UWB_OFF# UWB_OFF# <15>
<9> INVT_PWM EC_THERM#/GPIO11 GPXO10
ACIN_D 1 2 <24> FAN_SPEED1
FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108 ARROW_LED#
ARROW_LED# <25> Add R235 and C323 for EMI and closed U13.126
C240 100P_0402_50V8J USB_CHG_EN# 29
<16> USB_CHG_EN# FANFB2/GPIO15
<15> EC_TX_P80_DATA
EC_TX_P80_DATA 30 EC_TX/GPIO16 7/6 Change R235 to L6 for EMI request
EC_RX_P80_CLK 31 110 PM_SLP_S4#
<15> EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <13>
ON/OFFBTN# 32 112 ENBKL
<25> ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL <5>
PWR_SUSP_LED# 34 114 EAPD
<25> PWR_SUSP_LED# PWR_LED#/GPIO19 GPXID3 EAPD <18>
NUM_LED# 36 GPI 115 EC_THERM#
<25> NUM_LED# NUMLED#/GPIO1A GPXID4 EC_THERM# <13>
116 SUSP#
GPXID5 SUSP# <26,30,32,33>
7/15 USB_CHG_EN# from PIN 68 change to PIN 29 GPXID6 117 PBTN_OUT#
PBTN_OUT# <13>
118 LOM_WAKE#
CRY1 GPXID7 LOM_WAKE# <20>
122 XCLK1
+3VALW CRY2 +EC_V18R
123 XCLK0 V18R 124
20mil
AGND
KSO1 1 2
GND
GND
GND
GND
GND
R184
R182 47K_0402_5% C241
KSO2 1 2 CRY1 1 2CRY2 4.7U_0603_6.3V6K
R183 47K_0402_5% KB926QFC0_LQFP128
11
24
35
94
113
69
@ 20M_0402_5%
to avoid EC entry ENE test mode

1 1
C242 C243
1
4
15P_0402_50V8J
15P_0402_50V8J
X1
OUT
IN
2 2
NC
NC

2
SCHEMATICS,MB A5841
32.768KHZ_12.5PF_1TJS125BJ4A421P AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom D
401799
5 4 3 2 1
G-Sensor
U14
+3VS_HDP 2 3 VOUTX C244 1 2 0.033U_0402_16V7K
Vdd1 Voutx VOUTY C245 1
12 Vdd2 Vouty 5 2 0.033U_0402_16V7K
D 7 VOUTZ C246 1 2 0.033U_0402_16V7K D
Voutz
SELF_TEST 4 10
ST NC1
6 PD NC2 11
8 FS NC3 14
NC4 15
NC5 16
+3VS_HDP 9 Rev GND1 1

GND2 13
TSH35TR LGA
CH751H-40PT_SOD323-2
+5VS D18 +3VS_HDP +3VS_HDP
U16
1 2
@ C247 0.1U_0402_16V4Z 2 1VOUTX 2 XOUT VDD 6
2 U15
C249 @ C248 0.1U_0402_16V4Z 2 1VOUTY 3
1U_0402_6.3V4Z YOUT
1 IN OUT 5 2 NC 1
@ @ C250 0.1U_0402_16V4Z 2 1VOUTZ 4 8
C 1 C251 ZOUT NC C
2 GND NC 11
@ C252 1U_0402_6.3V4Z 9 12
1 0G-DET NC
3 SHDN# BYP 4 2 1 NC 14
+3VS_HDP 7 SLEEP#
G9191-330T1U_SOT23-5 0.22U_0402_10V4Z 10
SELF_TEST G-SELECT
13 ST VSS 5
MMA7360LR2_LGA14
@
U17
EC_SMB_CK2 1 11 HDPACT <22>

<5,22> EC_SMB_CK2 P3_5/SSCK/SCL/CMP1_2 P1_6/CLK0/SSI01
1
SELF_TEST 2 12
P3_7/CNTR0#/SSO/TXD1 P1_5/RXD0/CNTR01/INT11# R186
47K_0402_5%
+3VS_HDP R185 2 1 4.7K_0402_5% 3 13
RESET# P1_4/TXD0
2
R187 2 1 4.7K_0402_5% XOUT 4 14
XOUT/P4_7 P1_3/KI3#/AN11/TZOUT
B 5 15 VOUTZ B
VSS/AVSS P1_2/KI2#/AN10/CMP0_2
R188 2 1 4.7K_0402_5% XIN 6 16 +3VS_HDP

XIN/P4_6 P4_2/VREF
1
7 17 VOUTX C253
VCC/AVCC P1_1/KI1#/AN9/CMP0_1 0.1U_0402_16V4Z
R189 2 2
1 4.7K_0402_5% 8 MODE P1_0/KI0#/AN8/CMP0_0 18 VOUTY
HDPINT R190 2 1 1K_0402_5% 9 19

<22> HDPINT P4_5/INT0#/RXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0
10 20 EC_SMB_DA2
P1_7/CNTR00/INT10# P3_4/SCS#/SDA/CMP1_1 EC_SMB_DA2 <5,22>
R5F211B4D34SP LSSOP 20
1 1
C254 C255
7/17 From R5F211B4D31SP change to R5F211B4D34SP
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2
A A

SCHEMATICS,MB A5841
Custom 401799 D
5 4 3 2 1
SPI Flash (8Mb*1)
FAN Control Circuit +3VALW
330P_0402_50V7K
U28 1 1 1
+5VS 1 8 C257 C258 C259
<22> SPI_CS# CE# VDD @ @ @
0.1U_0402_16V4Z
2 2 2
8/19 Change JFAN to SP02000JR00 for ME request <22> EC_SI_SPI_SO 2 SO HOLD# 7
1 470P_0402_50V8J
1
10U_0805_10V4Z
C256 D19 +3VALW 3 6 EC_SPICLK
WP# SCK EC_SPICLK <22>
1A @ 1SS355_SOD323-2
U19 2 JFAN 1
1 8 +FAN1 1 C260 @ 4 5 EC_SO_SPI_SI
EC_SO_SPI_SI <22>
12
EN GND 1 VSS SI
2 VIN GND 7 2 2
+FAN1 3 6 2 3 330P_0402_50V7K
VOUT GND @ D20 C261 3 2 MX25L8005M2C-15G_SO8
<22> EN_DFAN1 4 VSET GND 5
@ 4
APL5607KI-TRG_SO8 1000P_0402_25V8J GND
1 5
2
1 GND @
C262 BAS16_SOT23-3 ACES_85204-0300N
10U_0805_10V4Z C263 @ R192 @
2 R191 10K_0402_5% EC_SPICLK
1 2 1 2
2 1 +3VS 33_0402_5%
33P_0402_50V8K
FAN_SPEED1 <22>
2 8/14 Change U28 from SA00000XT00 to SA00002TO00 for BIOS ROM size
C264 11/12 Change U28 from SA000002T00 to SA0000XTO00 for BIOS ROM size
@
1 0.01U_0402_16V7K
LPC Debug Port

KSI0 C265 1 2 100P_0402_50V8J
KSI1 C266 1 2 100P_0402_50V8J
KSI2 C267 1 2 100P_0402_50V8J
KSI3 C268 1 2 100P_0402_50V8J
KEYBOARD KSI4 C269 1 2 100P_0402_50V8J
Please place the connector neer to DDR door

CONN.
KSI5 C270 1 2 100P_0402_50V8J
KSI6 C271 1 2 100P_0402_50V8J

JLPC
1 KSI[0..7] KSI7 C272 1 2 100P_0402_50V8J
+3VS 1 KSI[0..7] <22>
CLK_PCI_DDR 2
<8> CLK_PCI_DDR 2 KSO[0..15]
3 KSO0 C273 1 2 100P_0402_50V8J
3 KSO[0..15] <22>
LPC_AD0 4
<13,22> LPC_AD0 4
LPC_AD1 5 KSO1 C274 1 2 100P_0402_50V8J
<13,22> LPC_AD1 5
LPC_AD2 6
<13,22> LPC_AD2 6
LPC_AD3 7 JKB @ KSO2 C275 1 2 100P_0402_50V8J
<13,22> LPC_AD3 7
LPC_FRAME# 8
<13,22> LPC_FRAME# 8 1
9 KSO3 C276 1 2 100P_0402_50V8J
PLTRST# 9 2
<4,5,13,15,20> PLTRST# 10 10 3 CAPS_LED# <22>
11 R193 1 2 300_0402_5% +3VS
GND 4 KSI1
12 GND 5 KSI6
ACES_85201-1005N 6 KSI5
@ 7 KSI0 KSO4 C277 1 100P_0402_50V8J
8 2
KSI4
9 KSI3 KSO5 C278 1 100P_0402_50V8J
10 2
KSI2
11 KSI7 KSO6 C279 1 100P_0402_50V8J
12 2
CLK_PCI_DDR KSO15
13 KSO12 KSO7 C280 1 100P_0402_50V8J
14 2
KSO11
15
2
KSO10 KSO8 C281 1 2 100P_0402_50V8J

R194 16 KSO9
22_0402_5% 17 KSO8 KSO9 C282 1 100P_0402_50V8J
18 2
@ KSO13
19 KSO7 KSO10 C283 1 100P_0402_50V8J
2
1
20 KSO6
2 21 KSO14 KSO11 C285 1 2 100P_0402_50V8J
C284 22 KSO5
22P_0402_50V8J 23 KSO3 KSO12 C286 1 100P_0402_50V8J
24 2
1 KSO4
@ 25 KSO0 KSO13 C287 1 2 100P_0402_50V8J
26 KSO1
27 KSO2 KSO14 C288 1 100P_0402_50V8J
28 2
29 KSO15 C289 1 100P_0402_50V8J
30 2
31 CAPS_LED# C290 1 100P_0402_50V8J
32 2
33
34
35
36
ACES_88170-3400 7/8 Add C265 to C290 for EMI request
9/3 Add PIN 35, PIN 36 for GND pad
SCHEMATICS,MB A5841
D
401799
A B C D E
Power Button +3VALW
Touch/B Connector
2
R195
7/3 Lid switch from M/B change to T/P board
100K_0402_5%
D21 8/19 Lid switch from T/P change to M/B board
1
SW2 @ 2 ON/OFFBTN# <22>
1 3 ON/OFFBTN#_R 1 P-TWO_161011-04021
TOP side 3 51_ON# <28> 6 GND
2 4 5 GND
CHN202UPT SC-70 4 4
1 SMT1-05_4P +5VS 1
<22> TP_CLK 3 3
6
5
2 <22> TP_DATA 2 2
1 1
C292
1
D 1U_0402_6.3V4Z @ JTOUCH
1 D22
2 Q13
SW3 @ <22> EC_ON G 2
2
1 3 S 2N7002_SOT23 1 7/14 Change to NON-ZIF Conn for ME request
3
R196 3
BTM side 2 4 10K_0402_5% 8/19 TP Conn from 6P to 4P for ME request
7/2 Reserve ESD Diode PESD5V0U2BT_SOT23-3
SMT1-05_4P
6
5
1
7/15 Delete ESD Diode 7/3 Change to SCA00000T00 for ESD request
debug phase using

7/14 Change to NON-ZIF Conn for ME request
ISPD
JPOWER
PWR_ON_LED# R232 1 2 0_0402_5% 1 ZZZ PJP1
PWR_ON_LED R233 1 0_0402_5% 1
2 2 2
ON/OFFBTN#_R R234 1 2 0_0402_5% 3 3
4
5
4
GND
PCB DC-IN
2
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
6 GND
D35 PCB LA-5841PR01 BOM PJP1
1 1 1 P-TWO_161011-04021 10/27 MP PCB P/N Change to DAZ0BH00100 45@
C320
C321
C322
@ @
U1
@ @ @ PESD24VS2UT_SOT23-3~D
1
2 2 2
2
7/8 Reserve ESD Diode CPU 2
CPU N470
LED Conn
N470@
POWER LED
+5VALW 1 2 PWR_ON_LED
R197 300_0402_5%
7/21 Change R197 to 300 ohm HDD LED SATALED#

SATALED# <11>
2
DC-IN LED Vf=2.0V(typ),2.4V(max) +3VS 2 R199 1 6
2N7002DW-T/R7_SOT363-6
1
If=20mA(max) ACIN 10K_0402_5%
ACIN <13,22,28> D25
5
Q8A
D24
2
G
+3VS 1 2 2 1 3 4
R200 220_0402_5%
+3VALW 1 2 2 1 1 3 Q8B 2N7002DW-T/R7_SOT363-6
R198 220_0402_5%
D
HT-191UYG-DT YEL/GRN_0603
7/23 Change to TOP view LED Q14 2N7002_SOT23
BATT CHARGE/FULL LED WiMAX&3G LED

Vf=2.1V(typ),2.4V(max) for amber WIMAX_LED_GND 1 R202 2 LED_WIMAX# <15>
3 0_0402_5% 3
Vf=2.2V(typ),2.4V(max) for green
2
@
If=25mA(max) Q5A 2N7002DW-T/R7_SOT363-6
Vf=3.3V(typ),3.9V(max) +5VS 2 R203 1 6 1
If=20mA(max) 10K_0402_5%
5
D26 WIMAX@ WIMAX@
D27
+3VALW 1 2 4 3 +5VS 1 2 2 1 WIMAX_LED_GND 3 4

BATT_CHG_LOW_LED# <22>
A
R235 510_0402_5% R204 300_0402_5%

WIMAX@ Q5B 2N7002DW-T/R7_SOT363-6
HT-191NBQA_BLUE_0603 WIMAX@
+3VALW 1 2 2 YG 1 BATT_FULL_LED# <22>
R201 220_0402_5% WIMAX@
HT-297DQ-GQ_AMB-YG 7/23 Change to TOP view LED
POWER/SUSPEND LED 8/28 Change to SC5191UD000 and SC591UYG000 for HW design WL&BT LED
9/23 Change R235, R255 to SD028220080 and +5VALW to +3VALW for HW design
D28 8/28 Delet D37, D38 and Change D26 and D28 to SC500001900 for ME request
+3VALW 1 2 4 A 3 PWR_SUSP_LED# <22> Vf=1.9V(typ),2.4V(max)
R255 510_0402_5% If=30mA(max)
D29
+3VALW 1 2 2 YG 1 PWR_ON_LED# <22>
R205 220_0402_5% +3VS 1 2 2 1 WL_BT_LED# <22>
R206 510_0402_5%
HT-297DQ-GQ_AMB-YG WLAN@
HT-191UD_AMBER_0603
ARROW MODE LED
D30
WLAN@
4 4
+3VS 1 2 2 1 ARROW_LED# <22>
R207 220_0402_5%
NUMERIC MODE LED
D31
+3VS 1 2 2 1 NUM_LED# <22>

R208 220_0402_5% 2009/10/21 2012/10/21 Title
SCHEMATICS,MB A5841
HT-191UYG-DT YEL/GRN_0603 Size Document Number Rev
7/23 Change to TOP view LED DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
401799 D
A B C D E
A B C D E
+3VALW TO +3VS +5VALW TO +5VS

+3VALW +3VS Vgs=-0V,Id=9A,Rds=18.5mohm +5VALW +5VS
1 1 1 1
Q15 Q16
470_0805_5%
470_0805_5%
8 1 C294 C295 8 1 C298 C299
D S D S
2
7 2 1U_0402_6.3V4Z 4.7U_0805_10V4Z 7 2 1U_0402_6.3V4Z 4.7U_0805_10V4Z
D S 2 2 D S 2 2 R210
1 6 D S 3 6 D S 3 1
5 4 R209 5 4
D G D G
SI4800BDY_SO8 1 R211 2 +VSB SI4800BDY_SO8 1 R212 2 +VSB
3 1
3 1
0.01U_0402_25V7K
0.01U_0402_25V7K
47K_0402_5% 47K_0402_5%
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1 1 1
6
1
C304 C305 C306 C307 R214 Q9A
R213 Q7A Q7B 200K_0402_5% Q9B
2 2 SUSP 2 2 @ SUSP
2 5 2 5
330K_0402_5% 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4
+3VALW TO +3V_LAN
+3VALW TO +3V_SB Vgs=10V,Id=6A,Rds=35mohm
+3VALW +3V_SB +5VALW
+3VALW +3VALW PJ17
2 2 1 1
2
Vgs=-4.5V,Id=3A,Rds<97mohm
2
Q17 @ JUMP_43X79 R216

R215 4.7U_0603_6.3V6K 100K_0402_5%
D
2 100K_0402_5% 1 6 2
S
STAR@ 1 5 4
1
2
STAR@ C308 2 1 1 SYSON#
1
2
S
STAR@ 0.1U_0402_10V6K PJ18 C309 4.7U_0603_6.3V6K
1 C311
2
2 G
C310 STAR@ R218
1 2 2 JUMP_43X79 STAR@
G
<22> WOL_EN# 2
R217 47K_0402_5% Q18 @ @ 1U_0402_6.3V4Z STAR@
3
2 2
1
AO3413_SOT23 D STAR@ 470_0805_5%
1
1
STAR@ SI3456BDV-T1-E3_TSOP6 D
+VSB 2 1
6 1
+3V_LAN R219 47K_0402_5% SYSON 2
<22,32> SYSON
3
1 2 STAR@ 1 G
C312 0.01U_0402_25V7K STAR@R220
STAR@R220 C313 Q19 S 2N7002_SOT23
3
2
STAR@ 120K_0402_5% 0.1U_0402_25V6
1 1 SBPWR_EN# 5 STAR@ Q6A 2 SBPWR_EN#
<14,22> SBPWR_EN# Q6B 2 R221
C314 C315 1U_0402_6.3V4Z 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 10K_0402_5%
1
4.7U_0805_10V4Z STAR@ STAR@ STAR@
1
@ 2 2
+5VALW
+1.8V TO +1.8VS
2
+0.89VS +1.5VS +1.8VS

R222
100K_0402_5% +1.8V +1.8VS
2
3 R223 R224 R225 3

1
@ 470_0603_5% @ 470_0603_5% @ 470_0603_5%

SUSP Q20 1 2
<33> SUSP IRF8113PBF_SO8 C316
1
8 1 C317
7 2 10U_0805_10V4Z
1
D D D D 2 1
6 3
2 @ 2 SUSP @ 2 SUSP @ 2 SUSP 5
<22,30,32,33> SUSP#
G G G G 1U_0402_6.3V4Z
2
Q21 2N7002_SOT23 Q22 Q23 Q24
4.7U_0805_10V4Z
S S S S 1
3
4
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
R226 C318 8/31 Change Q20 from SB000002880 to SB00000DW00 for HW design
10K_0402_5%
2
1 R227 2 +VSB
1
200K_0402_5%
47K_0402_5%
1
10/5 Reserve R223~R225, R229~R231 Q22~Q24, Q26~Q28 for HW cost down 1
+3VALW
R237 C319
0.01U_0402_25V7K
2
2
2
+0.9VS +1.8V +1.05VS R228
10K_0402_5%
2
1
D
8/14 R237 for HW design Q29
1
R229 R230 R231 2
@ 470_0603_5% @ 470_0603_5% @ 470_0603_5% G
1
D Q30
S
3
2N7002_SOT23-3 2 VCCP_POK <32>
1
G
4 4
S
3
1
D D D 2N7002_SOT23-3
@ 2 SUSP @ 2 SYSON# @ 2 SUSP 7/9 Add Q29, Q30, R228 for Intel power sequence
G G G
S Q26 S Q27 S Q28
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

SCHEMATICS,MB A5841
Custom D
401799
A B C D E
A B C D E
+5VALW +5VALW +3VS +5VALW +5VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
2
1 2 2 2
C343
C352
@ @
C342
C348
C349
1
2 1 1 1
1 1
10/5 Placed closed H6

7/21 Placed closed H1 7/21 Placed closed H2 7/23 Placed closed R42
+3VALW +3VS +3VS +3VS +5VALW

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2
2 2 2
C350
C353
C345
C341
C339
1 1
1 1 1
7/21 Placed closed H6 7/21 Placed closed H7 7/21 Placed closed H8 10/5 Placed closed Q2 10/5 Placed closed H1
B+ B+ B+ +CRT_VCC_R +5VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2
2 2 2
C351
@ @ C354
C340
C346
C347
2 1U_0402_6.3V6K 2
1 1
1 1 1
7/21 Placed closed H9 7/23 Placed closed PJ14 7/23 Placed closed PJ9 10/5 Placed closed H4 10/5 Placed closed H2
7/21 These cap for ESD request
10/5 Add C339, C340~C342, C345, C350~C354 for ESD request

10/5 Change C343 to SE000000K80 for ESD request
10/6 Change C354 to SE000000K80 for ESD request
Screw Hole 9/23 Change H12, H13 to 3P3 for ME request

M/B
KB FAN
H1 H2 H4
H7 H9 H12 H13 H14 H17 H21
3 H25 3
@ @ @ @ @
@ @ @ @ @
1
1
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 @
1
H_3P3 H_3P3 H_3P3 H_3P3 H_3P3
1
H_2P0X5P0N
H5 H6 H8 H23
8/28 Add H25 with H_5P0X2P0N for ME request
@ @ @ @
1
1
H_3P0 H_3P0 H_3P0 H_3P0 H18 H20 H22
@ @ @
1
H_3P5X4P5N H_3P5N H_2P1N
8/19 Add NON PTH hole H22 for Thermal module

MINI Card
FIDUCIAL_C40M80
H10 H11 H15 H16
FM1 FM2 FM3 FM4
8/28 Add H24 with H_2P0X5P5N for ME request
@ @ @ @ 9/2 Det H24 with H_2P0X5P5N for ME request @ @ @ @
1
1
4 4
H_3P3 H_3P3 H_3P3 H_3P3 9/29 Det H19 with H_2P0X5P5N for ME request

SCHEMATICS,MB A5841
Custom D
401799
A B C D E
A B C D
PF1 VS
VIN PR1
5A_24VDC_429007.WRML PL1 VIN 1M_0402_1%
SMB3025500YA_2P
DC301001M80 DC_IN_S1 1 2 1 2
1 2
1
1
PJP1 VS PR3
PR2 5.6K_0402_5% PR4
+ 2 84.5K_0402_1% 10K_0402_1%
1
PC1 1 2 ACIN <13,22,25>
2
PC11 PC2 PC3 PC4 PR5
8
1000P_0402_50V7K PC12 1000P_0402_50V7K 100P_0402_50V8J 22K_0402_1% PU1A
2
- 1 1U_0603_25V6K 100P_0402_50V8J 1 2 3
P
1
1U_0603_25V6K + PACIN
1
O 1 PACIN <30>
2 -
G
@ SINGA_2DW-0005-B03
1
PR6 LM393DG_SO8
4
PC5 20K_0402_1% PC6 PD1 PR7
0.068U_0402_10V6K .1U_0402_16V7K GLZ4.3B_LL34-2 10K_0402_1%
2
2
2
2 1 RTCVREF
PR8
VIN 10K_0402_1%
3.3V
Vin Detector
2
PD2
RLS4148_LL34-2 High 18.384 17.901 17.430
1
Low 17.728 17.257 16.976
BATT+ 2 1
1
PD3 PR9 PR10
RLS4148_LL34-2 PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3
PR11
2
200_0603_5%
CHGRTCP 1 2 N1 3 1 VS
1
1
2
PC8 2
PR13 PC7 0.1U_0603_25V7K
8
100K_0402_1% 0.22U_0603_25V7K PU1B
2
2
5
P
2
+
O 7
<25> 51_ON# 1 2 6 -
G
PR15
22K_0402_1% LM393DG_SO8
RTC Battery
4
RTCVREF
1
PR17
200_0603_5%
- PBJ1 +
PR21 PR22 PU2 G920AT24U_SOT89-3 2 1 +RTCBATT
560_0603_5% 560_0603_5% 3.3V +RTCBATT
2
1 2 1 2 3 2 N2
+CHGRTC OUT IN
@ MAXEL_ML1220T10
1
GND
PC9 PC10
10U_0805_10V4Z 1
2
1U_0805_25V4Z
SP093MX0000
3 3
PJ1 PJ2
+3VALWP 2 2 1 1 +3VALW +1.8VP 2 2 1 1 +1.8V
@ JUMP_43X118 @ JUMP_43X118
(5A,200mils ,Via NO.= 10) (6A,240mils ,Via NO.= 12)
(OCP min=6.52A) (OCP min=7.16A)
PJ3 PJ4
+5VALWP 2 2 1 1 +5VALW +1.05VSP 2 2 1 1 +1.05VS
@ JUMP_43X118 @ JUMP_43X118
(5A,200mils ,Via NO.= 10) (3.5A,140mils ,Via NO.=7)
(OCP min=3.95A)
(OCP min=6.39A)
PJ5
PJ6
+VSBP 2 1 +VSB +1.5VSP 2 1 +1.5VS
2 1 2 1
@ JUMP_43X39 @ JUMP_43X79
(3A,120mils ,Via NO.=6)
(120mA,40mils ,Via NO.= 1)
PJ7 PJ8
+0.9VSP 2 2 1 1 +0.9VS +0.89VSP 2 2 1 1 +0.89VS
4 4
@ JUMP_43X79 @ JUMP_43X118
(1A,40mils ,Via NO.= 2) (1.5A,60mils ,Via NO.=3)
(OCP min=2.1A)

SCHEMATICS,MB A5841
Size
Document Number Rev
D
401799
A B C D
A B C D
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
1
PD8
PJSOT24C_SOT23-3
Recovery at 56 degree C
100K_0402_1%_TSM0B104F4251RZ
VMB VL
PF2 PL2 VL
3
PJP2 7A_24VDC_429007.WRML SMB3025500YA_2P VL
1 BATT_S1 1 2 1 2
1 BATT+
2
2 BATT_P3 1 2 1 2 PR30
2 +3VALWP
1
3 BATT_P4 PR28 PR29 47K_0402_1%
1
3 1
PH1
4 BATT_P5 1K_0402_1% 47K_0402_1% PC14 PC15 PC16
4 0.01U_0402_25V7K MAINPWON <31>
9 5 EC_SMDA 1000P_0402_50V7K 0.1U_0603_25V7K PR31
1
9 5 EC_SMCA 47K_0402_1%
6 6
1
8 7 1 2
2
8 7 PR33 PR32
8
@ SUYIN_250005MR007G163ZR 1K_0402_1% 12.4K_0402_1% PU3A
1 2 3
P
+
1 2 1 2
2
O
2
2
TM_REF1 2 PQ4
-
G
PR34 PR35 PD6 DTC115EUA_SC70-3
100_0402_1% 100_0402_1% LM393DG_SO8 RLS4148_LL34-2
4
3
3
0.22U_0805_16V7K
1
15.8K_0402_1%
1
1
PC17
PD18 PR36
1000P_0402_50V7K
PR37
6.49K_0402_1%
1
PJSOT24C_SOT23-3 2 1 2 1
+3VALWP VL
PC18
PR38
2
100K_0402_1%
2
1
1
PR39
1K_0402_1%
PR40
100K_0402_1%
2
2
BATT_TEMPA <22>
2 2
EC_SMB_DA1 <22>
EC_SMB_CK1 <22>
PH2 near main Battery CONN :
BAT. thermal protection at 92 degree C
Recovery at 53 degree C
VL VL
PQ5
2
TP0610K-T1-E3_SOT23-3
1
PH2 PR41
47K_0402_1%
B+ 3 1 +VSBP PR42
100K_0402_1%_TSM0B104F4251RZ 47K_0402_1%
1
100K_0402_1%
@ 0.22U_1206_25V7K
@ 0.1U_0603_25V7K
1 2
2
1
1
PR43
PC19
PC20
PR44
8
12.1K_0402_1% PU3B
1 2 5
P
2
+
7 2 1
2
TM_REF1 O
6 -
G
VL PR45 PD7
1
3 3
22K_0402_1% LM393DG_SO8 RLS4148_LL34-2
4
1 2 PC21 PR46
2
0.22U_0805_16V7K 16.9K_0402_1%
2
PR47
2
100K_0402_1%
PR48
1
0_0402_5% D
1 2 2 PQ6
<31> POK
G SSM3K7002FU_SC70-3
@.1U_0402_16V7K
S
3
1
PC22
2
4 4

SCHEMATICS,MB A5841
Size
Document Number Rev
D
401799
A B C D
A B C D
P2
PQ7
AO4407A_SO8 P3 PR49 0.05_1206_1%
B+ CHG_B+ B+
PD9 PJ9
VIN 2 1 1 8 1 4 2 2 1 1
2 7 PQ8
B340A_SMA2 3 6 2 3 @ JUMP_43X118 CSIN P2003EVG_SO8
1 5 1
0.1U_0402_25V6
1 8
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
CSIP 2 7
4
1
3 6
1
PC131
PQ10 TP0610K-T1-E3_SOT23-3 PR123 5
PC23
PC24
PC124
PQ9 PR50 10_0603_5%
2
DTA144EUA_SC70-3 200K_0402_1% 3 1 1 2 DCIN
4
PC26 P3
2
1
1
2 5600P_0402_25V7K
1
PC27 PR52 PQ11 PR53
1
PR51 0.1U_0603_25V7K 100K_0402_1% DTC115EUA_SC70-3 1 2
2
47K_0402_1% VIN
2
PR54 PD10 47K_0402_1%
2
2
100K_0402_1% 2 FSTCHG PR55 PD11
1
2
1
PD12 2 1 2 1 10K_0402_1% 1 2 ACOFF

1SS355_SOD323-2 3
1 2 6251VDD SUSP# <22,26,32,33> 1SS355_SOD323-2
1
2.2U_0603_6.3V6K
RB715F_SOT323-3 PR57
PC28
2 PR56 200K_0402_1%
3
1
1
PQ12 10K_0402_1% 1 2 VIN
DTC115EUA_SC70-3 2 1 PU5 PC31
<22> FSTCHG 0.1U_0603_25V7K
2
1
100K_0402_1%
1 2 1 24 DCIN 2 1 PQ15 PD13
3
VDD DCIN
1
1
2 DTC115EUA_SC70-3 2 1 2
PR59
PC29
SIS412DN-T1-GE3_POWERPAK8-5
G
S PQ13 PR58 .1U_0402_16V7K 2 23 1SS355_SOD323-2
3
SSM3K7002FU_SC70-3 150K_0402_1% ACSET ACPRN PR60

20_0603_5%
2
1
6251_EN CSON D
3 EN CSON 22 1 2
1
@PC30
@ PC30 PC32 PC33 2 PACIN
5
680P_0402_50V7K 0.047U_0603_16V7K 0.1U_0603_25V7K G
CSON 1 2 4 21 1 2 CSOP S PQ14
3
2 CELLS CSOP PR61 SSM3K7002FU_SC70-3 2
PQ16
PC34 6800P_0402_25V7K 20_0603_5%
1 2 5 ICOMP CSIN 20 2 1
1
2
D PR62 4
2 PQ17 PC35 PR63 6.81K_0402_1% PC36 20_0603_5%
G SSM3K7002FU_SC70-3 1 2 1 2 6 19 0.1U_0603_25V7K
1 2 PR66
1
VCOMP CSIP PL3 0.02_1206_1%
S
3
0.01U_0402_25V7K 1 2 PR65 47K_0402_1% PR64 10UH_MPL73-100_3A_20% BATT+
3
2
1
PR67 1 2 7 18 LX_CHG 2.2_0603_5% 1 2 CHG 1 4
22K_0402_1% @PC37
@ PC37 100P_0402_50V8J ICM PHASE
4.7_1206_5%
PACIN 1 2 1 2 2 3
<28> PACIN
10U_1206_25V6M
10U_1206_25V6M
PC38 6251VREF 8 17 DH_CHG
VREF UGATE
PR19
PR68
<22> ADP_I .1U_0402_16V7K PR69 PC39
309K_0402_1% 2.2_0603_5% 0.1U_0603_25V7K
1
PC40
PC41
2 1 9 16 BST_CHG 1 2 BST_CHGA 2 1
<22> IREF CHLIM BOOT
1
1
PQ19 PR70 4
2
0.01U_0402_25V7K
DTC115EUA_SC70-3 24.9K_0402_1% PD14
2
6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
680P_0603_50V8J
1
PQ18
PC42
PC13
ACOFF 2 PR71 1 26251VDD
<22> ACOFF
3
2
1
100K_0402_1% PR72 11 14 DL_CHG
2
VADJ LGATE
2
20K_0402_1% PR73
2
4.7_0603_5%
2
12 13 PC43
3
1
GND PGND 4.7U_0805_6.3V6K
ISL6251AHAZ-T_QSOP24
<BOM Structure>
PR74
15.4K_0402_1%
1 2
<22> CHGVADJ
1
3 3
PR75
Iada=0~1.579A(30W) CP= 92%*Iada; CP=1.4526A 31.6K_0402_1%
2
CP mode
Vaclim=2.39*(20K//152K/(24.9K//152K+20K//152K))=1.0817V
VIN
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.0817V, Iinput=1.4526A
1
PR76
CC=0.25A~2A CHGVADJ=(Vcell-4)/0.10627 309K_0402_1%
IREF=1.636*Icharge Vcell CHGVADJ PR12
2
10K_0402_1%
IREF=0.409V~3.272V 4V 0V 1 2 ADP_V <22>
VCHLIM need over 95mV 4.2V 1.2V
1
4.35V 3.3V PR77
47K_0402_1% PC44
.1U_0402_16V7K
2
CELLS VDD GND Float 2
4 4
CELL number 4 3 2

SCHEMATICS,MB A5841
- THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Document Number Rev
D
401799
A B C D
5 4 3 2 1
TPS51427_B+
TPS51427_B+
PR78
PJ10 0_0805_5%
2 1 1 2
B+ 2 1
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@ JUMP_43X118
Ipeak=5A
0.1U_0402_25V6
0.1U_0402_25V6
1
5
VL Imax=3.5A
5
PC45
PC46
PC47
PC48
PC49
PC50
D D
1
PC129
PC130
F=400K
2
2
PQ21
2
2
2
PQ20
1U_0603_10V6K
PC51
Ipeak=5A 4
2
0.1U_0603_25V7K
4.7U_0805_6.3V6K
4
1
PC52
Imax=3.5A
PC53
1
+5VALWP
F=300K
3
2
1
1
2
3
PL5
PL4 4.7UH_PCMC063T-4R7MN_5.5A_20%
7
4.7UH_PCMC063T-4R7MN_5.5A_20% PU6 PC54 2 1
1 2 1U_0603_10V6K
V5FILT
LDO
VIN
+3VALWP
5
33 TP V5DRV 19 1 2
1
AON7702L_DFN8-5
1
PR79 DH3 DH5 PR83 @ PR82
AON7702L_DFN8-5
26 DRVH2 DRVH1 15
PQ22
@ PR81 2.2_0603_5% 2.2_0603_5% 4.7_1206_5%
4.7_1206_5% 1 2 BST3A 24 17 BST5A 1 2
VBST2 VBST1
1
PQ23
@ 61.9K_0402_1%
4
2
2
2
.1U_0402_16V7K
1 PR80 4 PC57
PR84
0_0402_5% PC56 0.1U_0603_25V7K
2
+
.1U_0402_16V7K
PC55 0.1U_0603_25V7K
1
1
1
PC99
LX3 25 16 LX5 @ PC59 1

2
3
2
1
150U_B2_6.3VM_R35M @ PC58 LL2 LL1 680P_0603_50V8J
1
2
3
1
2 + PC60
PC120
680P_0603_50V8J
2
2
DL3 23 18 DL5 150U_B_6.3VM_R45M
1
DRVL2 DRVL1
2
2
2
0_0402_5%
C 22 C
PGND
2
FB3 30 VOUT2
PR86
@ PR85
10K_0402_1% 10
VOUT1
VL 32
1
REFIN2
1
11 FB5
2VREF_TPS51427 FB1
1 2 1 VREF2
PC61 0.22U_0603_10V7K
Toatal Capacitor 150u 8 LDOREFIN
VSW 9
@ PR87 0_0402_5%
SKIPSEL 29 2 1 VL Toatal Capacitor 150u
ESR=35 mohm PR88 0_0402_5%
1 2
PD16 PR89
20 NC PGOOD2 28
ESR=45 mohm
GLZ5.1B_LL34-2 100K_0402_1%
1 2 1 2 4 13 POK <29>
VS EN_LDO PGOOD1 PR91
2
200K_0402_1%
200K_0402_1%
2
PR90
14 12 ILM1 2 1
PC62 EN1 TRIP1
0.22U_0603_10V7K
TONSE
VREF3
1
27 31 ILIM2 2 1
GND
1
EN2 TRIP2
1
B B
2
PR92
VL
2
0_0402_5%
PD17 @ PR93 SN0806081RHBR_QFN32_5X5 200K_0402_1%
21
PR94
1SS355_SOD323-2 0_0402_5%
2
2
PR95
1
1
1U_0603_10V6K
806K_0603_1%
2VREF_TPS514271
PR97 @ PR98 PR96

1
2
PC63
0_0402_5% 47K_0402_5% 0_0402_5%
2 1 1 2
2VREF_TPS514272
<29> MAINPWON
1
0.047U_0603_16V7K
1
PC64
2
@ PC65
3
0.047U_0402_16V7K
2
2 PQ24
TP0610K-T1-E3_SOT23-3
A A
1

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
A B C D
PJ11 B+
1.05V_B+ 2 1
2 1
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@ JUMP_43X118
1
PC127
1
1
PC66
PC67
PC125
PC25 PC132
PD4
1U_0603_25V6K 1U_0603_25V6K
2
5
1 1
1 2
2
@ RLS4148_LL34-2
PQ25
PR99 4
1 2
PR100 255K_0402_1% PR101
0_0402_5% 2.2_0603_5%
<22,26,30,33> SUSP# 1 2 BST_1.05V1 2
Ipeak=3.5A
3
2
1
Imax=2.45A
1
PL6
15
14
PC69 F=315K
1
@PC68
@PC68 PU7 2.2UH_PCMC063T-2R2MN_8A_20%
.1U_0402_16V7K BST_1.05V-1 1 2 1 2
EN_PSV
TP
VBST
+1.05VSP
4.7_1206_5%
2 13 DH_1.05V 0.1U_0603_25V7K
TON DRVH
1
Toatal Capacitor 220u
PR102
PR103 3 12 LX_1.05V
VOUT LL
5
100_0402_1% 1 ESR=35 mohm
@ .1U_0402_16V7K
+5VALW
AON7702L_DFN8-5
+5VALW 1 2 4 V5FILT TRIP 11 1 2
PR104 +
2
5 10 5.36K_0402_1% PC70
VFB V5DRV
1
PQ26
PC121
220U_B2_2.5VM_R35
1
2
680P_0603_50V8J
<26> VCCP_POK 6 9 DL_1.05V 4
PGOOD DRVL
PGND
PC72
PC71
GND
2
4.7U_0805_10V6K @PC73
@ PC73
2
2
2
1
47P_0402_50V8J
1 2 PR124 TPS51117RGYR_QFN14_3.5x3.5 PC74
3
2
1
10K_0402_1% 4.7U_0805_10V6K
2
2 2
1
PR105
8.25K_0402_1% +3VS
1 2
1
PR106
20.5K_0402_1%
2
PJ12
51117_B+ 2 1 B+
2 1
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@ JUMP_43X118
1
PC128
1
1
PC75
PC76
PC126
PC133 PC134
1U_0603_25V6K 1U_0603_25V6K
2
5
2
PR107
PQ27
255K_0402_1% 4
1 2
PR108 PR109
0_0402_5% 2.2_0603_5%
1 2 BST_1.8V 1 2
<22,26> SYSON
3
2
1
3 3
1
PL7
15
14
PC78 Ipeak=6A
1
@PC77
.1U_0402_16V7K BST_1.8V-1 1 2 1 2
Imax=4.2A
EN_PSV
TP
VBST
+1.8VP
2
4.7_1206_5%
DH_1.8V 0.1U_0603_25V7K
2 TON DRVH 13
F=312K
PR110
PR111 3 12 LX_1.8V
VOUT LL
@ .1U_0402_16V7K
100_0402_1%
+5VALW 1 2 4 11 1 2 +5VALW 1
V5FILT TRIP PR112
AON7702L_DFN8-5
1
PC122
5 10 10K_0402_1% + PC79
VFB V5DRV 220U_B2_2.5VM_R25M
1
1
PQ28
680P_0603_50V8J
6 9 DL_1.8V 4
2
PGOOD DRVL 2
PGND
PC81
PC80
GND
4.7U_0805_10V6K PC82
2
2
1
@ 47P_0402_50V8J
1 2 TPS51117RGYR_QFN14_3.5x3.5 PC83 Toatal Capacitor 440u
7
3
2
1
4.7U_0805_10V6K
2
PR113 ESR=14.5 mohm

28.7K_0402_1%
1 2
1
PR114
20.5K_0402_1%
2
4 4

SCHEMATICS,MB A5841
Size
Document Number Rev
D
401799
A B C D
5 4 3 2 1
+1.8V +1.8V
+5VALW
1
1
1
PJ13 PJ15
@ JUMP_43X79 @ JUMP_43X39
1
2
D D
PU9
1
2
1U_0603_10V6K
1 6
VIN VCNTL
+3VALW
PC91
2
2 5
2
GND NC
1
PC85
1
PC84 3 7 1U_0603_10V6K
VREF NC
1
4.7U_0805_6.3V6K PR115
2
1K_0402_1% 4 8 PC92
VOUT NC
2
9
2
TP 10U_0805_6.3V6M
APL5331KAC-TRL_SO8
.1U_0402_16V7K
PR117 PU11
+0.9VSP
1
0_0402_5% D
6 VCNTL
PC88
<26> SUSP 1 2 2 PR118 5 VIN VOUT 3 +1.5VSP
1
G 1K_0402_1% PR119 9 4
2
VIN VOUT
1
0.01U_0402_25V7K
S PQ29 PC90 0_0402_5%
3
PC93
PC89 SSM3K7002FU_SC70-3 10U_0805_6.3V6M 1 2 8
<22,26,30,32> SUSP#
2
EN
22U_0805_6.3V6M
@ 0.1U_0402_16V7K 7 2 PR120
GND
2
POK FB
1
2.7K_0402_1%
2
1
PC94
2
PC95 APL5930KAI-TRG_SO8
2
@ 0.47U_0402_6.3V6K
1
PR121
3K_0402_1%
2
C C
PJ14 B+
0.89V_B+ 2 1
2 1
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@ JUMP_43X118
1
PC137
1
1
PC146
PC87
PC143
PC142 PC136
Ipeak=1.5A
2
5
1U_0603_25V6K 1U_0603_25V6K
2
Imax=1.05A
F=316K
PR156 4
0.89V_TON 1 2
PR159 255K_0402_1% PR161 PQ32
0_0402_5% 2.2_0603_5% SIS412DN-T1-GE3_POWERPAK8-5
1 2 0.89V_EN BST_0.89V1 2
<22,26,30,32> SUSP#
3
2
1
1
B PL10 B
15
14
PC138
1
@PC140
.1U_0402_16V7K BST_0.89V-1 1 2 1 2
EN_PSV
TP
VBST
+0.89VSP
2
4.7_1206_5%
2 13 DH_0.89V 0.1U_0603_25V7K
TON DRVH
PR162
PR157 3 12 LX_0.89V
VOUT LL
5
100_0402_1% 1
@ .1U_0402_16V7K
0.89V_V5FILT +5VALW
AON7702L_DFN8-5
+5VALW 1 2 4 V5FILT TRIP 11 1 2
PR158 + PC145
Toatal Capacitor 550u
2
0.89V_FB 5 10 6.49K_0402_1% 220U_B2_2.5VM_R35
VFB V5DRV
1
PQ33
PC123
1
1
2
680P_0603_50V8J
DL_0.89V
6 PGOOD DRVL 9 4
ESR=8.07 mohm
PGND
PC144
PC139
GND
2
4.7U_0805_10V6K @PC141
@ PC141
2
2
1
47P_0402_50V8J
1 2 TPS51117RGYR_QFN14_3.5x3.5 PC86
7
3
2
1
4.7U_0805_10V6K
2
PR116
3.92K_0402_1%
1 2
1
PR160
21K_0402_1%
2
A A

SCHEMATICS,MB A5841
Size
Document Number Rev
D
401799
5 4 3 2 1
A B C D E F G H
1 1
<5>
<5>
<5>
<5>
<5>
<5>
<5>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
<22>
VR_ON
+3VS
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PR194
10K_0402_1% +5VS
+CPU_B+ PL9
2
FBMA-L11-201209-121LMA50T_0805
2
PR195
PR196
PR197
PR198
PR199
PR201
PR202
PR203
PR204
0_0402_5% 1 2 B+
4700P_0402_25V7K
2200P_0402_50V7K
13211_PWRGD PR200
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
<8,13,22> VGATE 2
10_0603_1%
0.1U_0402_25V6
1
1
PC100
PC101
PC104
PC102
PC147
PC148
3211_EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
2
1
3211_VCC
5
+3VS PC182
1U_0805_25V6K
32
31
30
29
28
27
26
25
2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
1
PQ30
24 PR206 PC183 4 SIS412DN-T1-GE3_PAK1212-8
PR205 VCC 0_0603_5% 0.22U_0603_25V7K
1 PWRGD
10K_0402_1%
BST 23 CPU_BOOST 1 2CPU_BOOST-1
1 2
1
2
PC184 IMON 3211_DRVH PL14
22 PJ16
3
2
1
1000P_0402_50V7K DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
2 CLK_ENABLE# 3 2
2
CLKEN# 3211_SW +CPU_COREP

21 1 2 1 2
4
SW 1 2 +CPU_CORE
FBRTN
1
ADP3211AMNR2G_QFN32_5X5 20 +5VS @
PVCC JUMP_43X118
5
1 2 3211_FB 5 FB PU15 3211_DRVL PR122
DRVL 19 2 1
PC185 PC187 1 3211_COMP 6
COMP
4.7_1206_5%
390P_0402_50V7K 47P_0402_50V8J 18 PC186 LL=5.9m ohm
2
PGND 2.2U_0603_10V6K
7
OCP=6.2A
2
GPU
1 2 1 23211_COMP-1
1 2 AGND 17 4
1
3211_ILIM 8 VID:0.75V~1.1V
CSCOMP
PR208 PC188 PR207 ILIM PQ31 PC109
33 Io(max)=3.5A
CSREF
AGND
RAMP
LLINE
CSFB
1K_0402_1% 470P_0402_50V8J 28K_0402_1% AON7702L_DFN8-5 680P_0603_50V8J
IREF
RPM
2
RT
3
2
1
9
10
11
12
13
14
15
16
2
PR209
2.8K_0402_1%
3211_IREF
3211_RAMP
3211_RT
3211_CSCOMP
3211_CSFB
3211_CSCOMP
2 3211_RPM
PH4
3211_CSCOMP 1
100K_0402_1%_TSM0B104F4251RZ
80.6K_0402_1%
1 2
200K_0402_1%
274K_0402_1%
2
Avoid high dV/dt

PR210
Place RTH1 close to inductor

PR211
PR212
PR213
35.7K_0402_1% on the same layer
1
499K_0402_1%
2 1
1
1
2
PR214
1
PR150 PR152
1
0_0402_5% 0_0402_5% PC190
220P_0402_50V7K PR217
2
PC189 75K_0402_1%
1
2
1000P_0402_50V7K
2
PR219 2 1
1K_0402_1%
3 3
+CPU_B+ 2 1 3211_RAMP-1 PR218
309K_0402_1%
<6>
<6>
VSSSENSE
VCCSENSE
Connect to input caps

1
PC191 PC192
1000P_0402_50V7K 1000P_0402_50V7K
2
Shortest the
net trace
4 4

SCHEMATICS,MB A5841
D
401799
A B C D E F G H
NO DATE PAGE MODIFICATION LIST PURPOSE
-------------------------------------------------------------------------------------------------------------
EVT P37-CPU_CORE Change PU15 SA00003DA0L --> SA00003DA00 Choice the A51 material
EVT P35-1.05VSP/1.8VP Change PR124 422 ohm -->10K ohm Deign change
DVT P33-CHARGER Delete PD15 Deign change(Cause layout)
DVT P35-1.05VSP/1.8VP Change PR104 13.7K-->5.36K Deign change(OCP point)
DVT P35-1.05VSP/1.8VP Change PR124 the same part number with PR4 Deign change(Use the same part number)
DVT P32-Battery conn/otp Reserve the ESD diode Deign change
PVT P37-CPU_CORE Change PR209 1.8K-->2.8K Change the OCP 6A-->9A
PVT P34-+5VALWP/+3VALWP Reserve the sunnber PR82&PR81&PC58&PC59 EMI approvel
PVT P28-DCIN&DECTOR Change PC7 1206-->0603 For cost down
PVT P32-Battery conn/otp Add the ESD diode EMI require
PVT P28-DCIN&DECTOR Change DC-IN jack DC301009G00 Design change
pre-mp P29-Battery conn / OTP Change PR32 -->12.4K , PR37-->15.8k,PR44-->12.1k,PR46-->16.9K Thermal commond
pre-mp P33-0.9VSP/1.5VSP/0.89VP Change PR158 2.49K-->6.49K Design change

SCHEMATICS,MB A5841
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401799 D
5 4 3 2 1
PIR (Product Improve Record)

KAVAA LA-5841P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1

---------------------------------------------------------------------------------------------------------------------
Item Date Page Component Solution Request

------------------------------------------------------------------------------------------------
D
1) 7/2 9 Reserve R87 with 0 ohm For support DPST function D
2) 7/2 22 Add R235 90 ohm bead and C323 with 6P For EMI request
3) 7/2 13 Reserve C207 with 22P For EMI request
4) 7/2 18 Reserve CA33 with 22P and RA31 with 22 ohm For EMI request
5) 7/2 16 Change Change L4 to SM070001310 For EMI request
6) 7/2 18 Reserve CA34 with 0.01U to GND and RA32 with 4.7K ohm up +3VS For ESD request
7) 7/2 25 Reserve D32 with SCA00000R00 For ESD request
8) 7/3 25 Change Lid switch from M/B change to T/P board For design change
9) 7/3 19 Change Change DA3,DA4,D22 to SCA00000T00 For ESD request
10) 7/3 4 Reserve D33,D34 with SC300000O00 For ESD request
11) 7/3 16 Reserve D23 with SC300000O00 from Sub board to M/B For ESD request
12) 7/6 22 Change Change R235 to L6 with SM010009E00 For EMI request
13) 7/8 24 ADD Add C265~C290 with SE071101J80 For EMI request
14) 7/8 16 Swap Pin swap for AGND For layout
15) 7/8 18 Reserve R235 withSD028000080 For EMI request
16) 7/8 27 Modify Modify screw hole location
17) 7/8 25 Reserve D32 with SCA00000R00 For ESD request
18) 7/8 16 Reserve D36 with SC300000O00 from Sub board to M/B For ESD request
19) 7/8 07 Add C216,C217,C238,C291 with SE070104Z80 For EMI request
20) 7/9 26 Add D29, D30 with SB570020020 and R228 with SD028100280 For power sequence
21) 7/9 13 Add C293 with SE070104Z80
22) 7/9 25 Change R232, R233, R234 with SD028000080 Need to EMI confirm on EVT
C C
23) 7/9 18,19 Modify modify 2 SPK solution For TOSHIBA request
24) 7/10 20 Change UL1 with SA00002XC10 For low power solution
25) 7/10 16 Change JUSBC1 to DC233004Q00 For ME suggest
26) 7/10 16 Swap USB20_P0_R USB20_N0_R, USB20_P0_R_S, USB20_N0_R_S For layout request
27) 7/10 10 Add J2 For cost down PolySwitch
28) 7/13 8 Add C296, C297 with SE071220J80 For RF request
29) 7/13 8 Add C300, C301 with SE068330K80 For RF request
30) 7/13 8 Add C302, C303, C324 with SE068330K80 For RF request
31) 7/13 8 Add C325, C326, C327 with SE068330K80 For RF request
32) 7/13 8 Change R53, R54, R57 to SM01000B200 For RF request
33) 7/13 8 Add C328, C329, C330 with SE071470J80 For RF request
34) 7/13 19 Reserve CA25 with SE070104Z80 For RF request
35) 7/14 21 Delete YC1, CC12, CC13 For cost down
36) 7/14 25 Change JTOUCH1 to NON-ZIF For ME suggest
37) 7/14 25 Change JPOWER1 to NON-ZIF For ME suggest
38) 7/15 22 Change INVT_PWM from PIN 21 change to PIN 25 For EC suggest
39) 7/15 22 Change USB_CHG_EN# from PIN 68 change to PIN 29 For EC suggest
40) 7/15 5 Change SB to CPU signal to CPU side For placement
41) 7/15 16 Swap USB20_N3 and USB20_P4 location For layout request
42) 7/15 25 Delete D32 For ESD request
43) 7/16 17 Delete BT and Camera BTO item For BOM request
B
44) 7/16 19 Delete MIC BTO item For BOM request B
45) 7/16 21 Change For RC8 change to reserve For realtek request
46) 7/16 23 Delete G-senser BTO item For BOM request
47) 7/16 16 modify USB_OC#0 dis-connect to +USB_VCCB For schematic error
48) 7/16 26 modify Change Q22 pull up from 0.89V to 0.89VS For schematic error
49) 7/16 9 Reserve C331 and C332 with SE071100J80 For EMI request
50) 7/16 9 Reserve C333 and C334 with SE071100J80 For EMI request
51) 7/17 23 Change U17 from R5F211B4D31SP change to R5F211B4D34SP For TOSHIBA request
52) 7/17 12 Change Reassign Tiger point USB port For TOSHIBA concern
53) 7/17 21 Delete RC13 For cost down
54) 7/17 20 Change JLAN from SANTA_130452-3_13P-T to Santa_130452-8_8P-T For not support LAN LED fuction
55) 7/17 20 Delete RL7, RL8, RL9, RL11, CL16, CL21 For not support LAN LED fuction
56) 7/17 15 Change R156, R157 for JWLAN1 change to JGPS1 For debug
57) 7/20 4 Add R238, R239 with SD028100280 For Ref board design
58) 7/20 5 Add C335 with SE000000K80 For Ref board design
59) 7/20 5 Reserve C336 with SE074221K80 For Ref board design
60) 7/20 13 Delete EC_THERM# pull up Follow NIM10
61) 7/20 13 Add T43, T44 Follow NIM10
62) 7/20 13 Add SLPIOVR pull up 8.2k to +3vs Follow NIM10
63) 7/21 3 Swap XDP_TRST#, XDP_TDO, XDP_TDI, XDP_TCK, XDP_TMS For layout request
64) 7/21 7 Reserve C60 with SE107225K80
A A

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
5 4 3 2 1

KAVAA LA-5841P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1-->0.2

---------------------------------------------------------------------------------------------------------------------
65) 7/21 8 Reserve C303,C324,C325,C326,C327,C296,C297,C300,C301
66) 7/21 8 Change WWAN_CLKREQ# from REQ4 to REQ11 For silego suggest
67) 7/21 9 Change C331 to Shunt Capacitor For EMI request
D 68) 7/21 15 Change C334 to Shunt Capacitor For EMI request D
69) 7/21 17 Swap USB20_N7, USB20_P7 For layout request
70) 7/21 19 Add RA33, RA34 with SD028820180 For AMP gain
71) 7/21 25 Change R197 to 300ohm For common design
72) 7/21 4 Add R137 to GND For Intel request
73) 7/21 13 Add R240 pull up to +RTCBATT For Intel request
74) 7/21 13 Change C156 with SE000000K80 For Intel request
75) 7/21 27 Add C339~C345 with SE070104Z80 For ESD request
76) 7/22 8 Add R241 pull up to +3VS For Intel request
77) 7/22 19 Add RA33~RA40, CA35~CA38 For AMP gain
78) 7/22 8 Delete R64, R66 For Intel suggest CLK schematic
79) 7/22 8 Add R242~R253 For Intel suggest CLK schematic
80) 7/23 20 Change JLAN from Santa_130452-8_8P-T to SANTA_130452-6 For ME request
81) 7/23 21 Change JCARD with TAITW_PSDAT3-09GLAS1N14N For TOSHIBA request
82) 7/23 21 Change DC1 for TOP view LED For ME request
83) 7/23 25 Change D24~D31 for TOP view LED For ME request
84) 7/23 27 Reserve C346~C348 with SE070104Z80 For ESD request
85) 7/27 4 Change C302 to GND for +1.8V pull up For schematic error
86) 7/27 16 Swap USB20_P4_R_S and USB20_N4_R_S For schematic error
87) 8/14 4 Add DDR_VREF net name For layout request
88) 8/14 5 Add CRT_IRTN net name For layout request
88) 8/14 5 Add DAC_IREF net name For layout request
89) 8/14 5 Change Net name from H_GTLREF to +H_GTLREF For layout request
90) 8/14 5 Change Net name from H_EXTBGREF to +H_EXTBGREF For layout request
C C
91) 8/14 8 Add R250 pull up with SD028470080 For Intel request
92) 8/14 13 Add R254 pull down with SD028100380 For EC request
93) 8/14 17 Swap USB20_N7, USB20_P7 For layout request
94) 8/14 18 Add R235 with SD028000080
95) 8/14 18 Add Net name to HP_L_R and HP_R_R For layout request
96) 8/14 18 Add Net name to CPVEE For layout request
97) 8/14 26 Add R237 with SD028200380 For HW design
98) 8/14 9 Add R87 with SD028000080 For not support DPST
99) 8/14 9 Det R88 with SD028000080 For not support DPST
100) 8/14 24 Change U28 from SA00000XT00 to SA00002TO00 For BIOS ROM size
101) 8/19 25 Det Lid switch from T/P change to M/B board For ME request
102) 8/19 17 Add U22, C332, C333 for Lid function For ME request
103) 8/19 21 Change JCARD for push pull Conn For ME request
104) 8/19 24 Change JFAN to SP02000JR00 For ME request
105) 8/19 16 Change JUSBC to DC233004W00 For ME request
106) 8/19 25 Change JTOUCH to SP01000WX00 For ME request
107) 8/19 27 Add H22 NON PTH hole For Thermal module
108) 8/21 16 Add USB_CHG_EN# has to be connected to OE# pin For SPEC REV 0.5
109) 8/24 4 Change +DDR_VREF to DDR_VREF For HW schematic review
110) 8/24 5 Det CRT_IRTN net name For HW schematic review
111) 8/24 5 Change +H_GTLREF to H_GTLREF For HW schematic review
112) 8/24 5 Change +H_EXTBGREF to H_EXTBGREF For HW schematic review
113) 8/24 16 Change U12 to SA00002XX00 For HW schematic review
B 114) 8/24 8 Change Net name to FSB for U3.2 B
115) 8/24 10 Change D1, D2, D3 For ESD request

116) 8/24 17 Change JSATA to ALLTO_C16674-12204-L For ME request
117) 8/24 18 Change R235 to RA21
118) 8/24 20 Change JLAN for Deep connecter For ME request
119) 8/24 20 Add Connect ISOLATEB to EC
120) 8/24 21 Det RC9
121) 8/23 27 Reserve C343, C342, C345, C341, C339, C340
122) 8/27 8 Det C93, C94, C95, C102 For low power CLK GEN
123) 8/27 8 Add C303, C324, C325, C326, C327 to GND For RF request
124) 8/27 8 Det 296, C297 For RF request
125) 8/28 27 Add H24 with H_2P0X5P5N For ME request
126) 8/28 25 Change SC5191UD000 and SC591UYG000 For HW design
127) 8/31 27 Add H25 with H_5P0X2P0N For ME request
128) 8/31 26 Change Q20 from SB000002880 to SB00000DW00 For HW design
129) 9/1 13 Change R125 to SM010027780 For EMI request
130) 9/1 13 Add C207 to SE071100J80 For EMI request
131) 9/2 27 Det H24 with H_2P0X5P5N For ME request
132) 9/3 16 Add PIN 21, PIN 22 on JUSB For layout request
132) 9/3 16 Add PIN 3, PIN 4 on JSPKR, JSPKL For layout request
132) 9/3 16 Add PIN 35, PIN 36 on JKB For layout request
133) 9/4 7 Reserve C66, C67, C68, C69, C72, C75, C77, C78, C79, C81,
C83, C84, C85
A A

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
5 4 3 2 1

NPVAA LA-5841P SCHEMATIC CHANGE LIST

---------------------------------------------------------------------------------------------------------------------
134) 9/23 13 Change RP17 to R256, R257, R258 For layout request
135) 9/23 27 Change H12, H13 to 3P3 For ME request
D
136) 9/23 25 Change R235, R255 to SD028220080 and +5VALW to +3VALW For HW design D
137) 9/28 16 Det D36 with SC300000O00 For ESD request
138) 9/28 10 Reserve Reserve F1 for cost down PolySwitch
140) 10/5 27 Add C339, C340~C342, C345, C350~C354 with SE070104Z80 For ESD request
141) 10/5 27 Change C343 to SE000000K80 For ESD request
142) 10/5 18 Add RA7 and RA11 with SD013000080 For ESD request
143) 10/5 26 Reserve R223~R225, R229~R231 Q22~Q24, Q26~Q28 for HW cost down For HW cost down
144) 10/6 25 Change/Det Delet D37, D38 and Change D26 and D28 to SC500001900 For ME request
145) 10/6 15 Change R156, R157 for JWLAN change to JGPS For debug
146) 10/6 27 Change C354 to SE000000K80 For ESD request
C C
B B
A A

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1
5 4 3 2 1

NPVAA LA-5841P SCHEMATIC CHANGE LIST

---------------------------------------------------------------------------------------------------------------------
147) 10/19 4 Change footprint T5, T6 and T7 from TPC24 to TPC12 For layout request
148) 10/20 16,17 Det L4, and L5 For EMI request
D
149) 10/27 19 Det DA4 and DA5 For ESD request D
150) 11/12 24 Change U28 from SA000002T00 to SA0000XTO00 For BIOS ROM size
C C
B B
A A
Security Classification Compal Secret Data Compal Electroinc,Inc.

SCHEMATICS,MB A5841
D
401799
5 4 3 2 1

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A B C D E

Tampa Bay NPVAA

Security Classification Compal Secret Data Compal Electronics,Inc

Fan Control Thermal Sensor Clock Generator 1

LED Conn. LVDS

PCIeMini Card PCIeMini Card USB port 0,1,4 USB port 7

USB page 11,12,13,14

Debug Port ENE KB926 D3

Security Classification Compal Secret Data Compal Electronics,Inc

EC SM Bus1 address EC SM Bus2 address

Tiger point SM Bus address

Clock Generator 1101 001Xb

Security Classification Compal Secret Data Compal Electronics,Inc

DDR_A_WE# AK22 AB6 DDR_A_D8

<12> DMI_RXP0 C1 1 2 DMI_RXP0_C AH1 DDR_A_D24

8/24 Det CRT_IRTN net name

T26 RSVD_TP <4> XDP_BPM#1 BPM_1_1# BCLKN CLK_CPU_BCLK# <8>

8/14 Change net name to +H_EXTBGREF

H_A20M# C134 1 @2 220P_0402_50V7K

U5 VCCA_DDR AH28 VSS VSS P16

U8 VCCA_DDR AH8 VSS VSS P21

+VCC_CRT_DAC VSS VSS

VCCACRTDAC +DMI_HMPLL RSVD_NCTF

VCCRING_WEST VCCA_DMI 2 VSS VSS

+1.8V +1.8V +1.8V

C84 139 140 DDR_A_D44

+3VM_CK505 +3VM_CK505 Q1B 2N7002DW-T/R7_SOT363-6

56 CLK_PCIE_WLAN# LAN_CLKREQ# R69 2 1 10K_0402_5%

FSB <13> H_STP_PCI# PCI_STOP#

+3VS R70 1 2 H_STP_PCI#_R 1 2 63

0_0402_5% 33_0402_5% 1 2 R72 CLK_PCI_DDR_R 13 CLK_PCIE_LAN

R250 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

@ R245 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

LCD POWER CIRCUIT

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Place closed to conn.

SN74AHCT1G125DCKR_SC70-5 CRT_VSYNC_1 R94 1 2 10_0402_5% VSYNC

<5> GMCH_CRT_VSYNC 2 A Y 4 9/28 Reserve F1 for cost down PolySwitch

R95 R96 JCRT

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Security Classification Compal Secret Data Compal Electronics,Inc

PORT DEVICE Modify

<8> CLK_PCIE_PCH# W23 DMI_CLKN

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2.2K_0402_5% 1 R119 2 PCH_SMBCLK

8.2K_0402_5% R122 ICH_RI#

10K_0402_5% 2 R123 1 EC_SWI# U6D TGP

AA5 T15 GPIO0

C153 LAN_TXD2 RI# T43

7/21 Pull up 4.7K to +RTCBATT for Intel request R139 10K_0402_5%

1K_0402_5% 1 R135 2 MCH_SYNC# D8

7/21 Change C156 to 1u for Intel request U7 D9B D9A

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C +V5REF_SUS +VCC1_05 1 VSS28 C

Place closely pin Y6 within 100mlis.

Security Classification Compal Secret Data Compal Electronics,Inc

Mini-Express Card for WLAN/WiMax

10/6 From JGPS change to JWLAN

Mini-Express Card for 3G/GPS

9 8 UIM_DATA C198 C199 @ 22P_0402_50V8J

D23 7/8 Pin swap for AGND

7/8 ESD diode change location from Sub board to M/B

SLP_CHG FUNCTION 2 REF1 REF2 5 +5VALW