Service Manual: Arcam Arcam

Service
Manual
Issue 1.0
DV29 DVD Player
ARCAM
Bringing music & movies to life
DV29
Contents List
Circuit Description
Power Supply L959AY

! CCT diagram
! Component layout diagram
! Parts list
Main Board L971AY

! CCT diagram
! Parts list
Display Board L972AY

! CCT diagram
! Parts list
Transformers
! L924TX
! L925TX
! L931TX
Mechanical Assembly
! Mechanical and packing part list
FMJ Dv29 Circuit description.
Overview
Fig 1 PSU clock control and IC305 line status
The DV29 is effectively a no compromise version both
electronically and mechanically of the DV79. Fs PSUFS1 PSUFS0 PSUCLK
Frequency Pin 11 Pin 12 Output Pin 5
The player is based around acclaimed Zoran Vaddis select IC305a IC305a of IC305a
V chipset coupled to high specification Wolfson D to A 44.1 kHz 0 0 44.1 kHz
converters for all six audio output channels, also 48 kHz 0 0 48 kHz
88.2 kHz 0 1 44.1kHz
featured in this design is a HDMI transmitter with
96 kHz 0 1 48 kHz
digital Video and a Audio output capable of Digital 176.4 kHz 1 0 44.1 kHz
Surround. 192 kHz 1 0 48 kHz
Others 1 1 OFF
The DV29 and the DV79 use the same main board
and power supply stage but with many of the The PSU sync signal is driven into the power supply via
components either upgrade or replaced with different Resistor R9 if no Sync is present the unit is set to free run at
topologies, many of the critical audio/video xxxx due to the RT/RC network attached to Pin 4.
components with 0.1% tolerance within the DV29 and
we also have an extra toroid power supply for the IC1 is running in regulated mode and monitors the voltage
Audio stages. output on the +5V and +3V3 D.C lines, the two voltages are
summed by TR8 and Driven into the VFB and Comp inputs
Both the HDMI chip and Video encoder are of a higher of IC1, the Voltage is then regulated by changing the time
quality than those found inside the DV79. base of the PWM output at pin 6 (longer the time base the
lower the voltage), the PWM switching frequency is driven
Power supply board. into the switch-mode transformer by the high speed Nmos
device at position M1, R5 is used to sense the Current
Non-switching across the gate of the Nmosfet and in the event of a short
circuit will safely shut the power supply down. We derive the
Mains power arrives at IEC inlet socket SKT1 and is 12v Mech supply from the output of M1 using the Ultra-fast
filtered by EMC choke LI and Y caps C3 and C4, Diode at location D8 to rectify the PWM line.
mains switch SW2a/b switches both Negative and Live
phases before the power reaches the mains select The D.C outputs from the switch mode have extensive
switch at location SW1 the switch allows the primary switch mode noise removing filters these are seen as 100n
windings of the transformer TX1 to be wired in either caps down to ground and Wire wound inductors in series
Parallel or Series configuration. with the supply rail.
The Bridge rectifying Diode package at location D1 Power supply main board
forms the basis of the conventional power stage and
supplies a VN35V6 (-35.6v) to the Switch mode All the power supply rails are supplied to the main board via
stage, transistor TR1 is biased by 2v7 Zener diode the 32 way FFC conector at location CON1001.
DZ1 and allows for the series Zener diodes DZ2, DZ3,
DZ3 to supply the VN13V5 and VN19V rails. The Digital supplies from the switch mode stage of the
power supply arrive as 3V3D, +5VD and +12VD we also see
We will also see a simple A.C present circuit this is the Display board power supplies arrive as –19V, -9V and
used for delayed output relay operation and fast relay –13.5V all of the supplies have a second stage of
closure under interrupted supply conditions thus implemented on the board to remove all traces of ultra-sonic
preventing op-amp offsets from reaching the Audio noise.
output sockets.
The 3V3D rail is the main 3V3 rail used to power the digital
Switch mode circuitry; +5VD is used for all 5v Digital/Video supplies the
+12VD is used for Scart switching and to power the HDMI
The switch mode supply is formed around the circuit (not DV78).
Driver/Control chip IC1 UC3843 (used in regulating
mode). The chip is referenced the –36.5V supply line The 1V8 rail is derived from the 3V3 rail and is regulated by
and the Digital ground DGND, the supply for the chip the adjustable regulator at location REG1003.
is formed by the 12v Zener at location DZ6 and can be
seen on Pin 7 as VCC. The power supply allows for
the switch-mode to be tied the to Audio sampling
frequency for any given compatible format see Fig 1.
The DV29 uses a separate isolated Toroid transformer Main Board electronics
and Rectification stages based around Bridge rectifiers
DBR1000 and DBR1001 and bulk smoothing caps Zoran Vaddis V.
C1048 and C1049 to supply the Analogue stages the
smoothed D.C output from this stage is fed L1013 (+) The main processor/control chip on the main board is the
and L1015 (-). Zoran Vaddis V at location IC202, this is the latest
incarnation of the very popular Vaddis range of processors
Regulator REG1001 is fed from the +15V3 rail and and allows for a much lower component count when
forms the Audio DAC supply. compared to our earlier players as many of the playback
functions have moved onto the Vaddis V silicon.
The Display board requires several supply voltages
these are simply passed through the main board, Below you will see the major functions of the Vaddis V
being filtered on the way to prevent transmission of
noise through to the surrounding electronics. The
display takes the +5V, -19V, -13V5 and -9V the –13V5 o 20 Bit digital video output for external Video
and –9V form a floating 4.5V supply biased relative to DAC’s and HDMI output stage.
the –19V grid voltage.
o Decoded Analogue Video output (internal
Display Board DAC) used on the DV78 only.
The main component of the Display board is IC1 this is o Digital Audio output 3 data lines 6 channels for
a Vacuum Florescent Display driver with keyboard san internal L + R DAC’s and L + R + C + LS + RS
and a serial data in/out interface. for DV79 and DV29 also used for HDMI for the
DV79 and DV29.
The Chip receives display drive serial data from the
Vaddis V chip on the main board via Con1 on pins 12, o SPDIF output.
13 and 14 these will be seen a DIN, STS and CLK this
data is used to drive the VFD a DOUT line interfaces o Internal display interface.
with the VADDIS V and supplies Keyboard Scan
information. The keyboard scan is a 6 x 4 matrix with o Internal ATAPI interface.
the Key Source appearing at S3, S4, S5, S6 and the
Keyscan data returns appearing a K2, K3 and K4. o Internal IR interface.
Please see: above for power supply information. o Serial in/out for RS232 DV79/DV29
The Infra red pick-up at location RXI receives RC5

data and send the data to the Vaddis V on the main A more detailed explanation of the Vaddis V and
board via transistors TR2 and TR3, LED 2 is used to peripheral components follows.
mix the rear panel RC5, this is covered in-depth within
the Coms and Video output section of this guide. Vaddis Power
The Vaddis V is powered by two separate supplies the

Vaddis requires a 1.8v supply for the core, this is regulated
from the 3.3v rail by REG1003, the 3.3v rail is used to
supply power to the I/P – O/P ports of the chip.
ATAPI interface
CON203 is an ATAPI interface on a 40 way IDE

connector. This is decoupled from the Drive via an array of
decoupling resistors as required by the ATAPI spec.
Display Board interface Flash/ SDRAM
The display board interface is on the 16 way FFC flexi IC203 is a 64Mbit (32 bit x 2Meg) SDRAM. It runs at
foil connector at location CON202. Power for the 135MHz
display also travels on the connector. There are 4 –
wires to interface with the VFD driver chip these are IC205 is a 16Mbit (16 bit x 1Meg) intel type flash IC for
seen as. program storage (Player software).
o XFPDIN - Data to the display board The flash interfaces to the Vaddis V using the SDRAM bus
o FPDOUT - Data from the display board it may appear that the bus connects to the flash in a
o XFPCLK - Clock random manner, however this is simply because the
o XFPSEL - Chip select Vaddis bus is multiplexed that way. The Flash will be
accessed at power up and the contents are copied to the
The above control lines are level shifted to 5v logic SDRAM the program will then be run from the SDRAM.
from 3.3v levels by IC200 (74HCT125) these are the Series resistors are employed to isolate the flash bus from
levels required by the VFD drive chip. the main SDRAM bus.
The IR output from the Display board arrives as EEPROM

IRRCV this is an open collector signal, which can be
wire-Ord with the re-panel remote input. IC204 is a 8kBit (1K x 8) Serial EEPROM. This is used for
storage of non-volatile storage of player settings, region
Digital Audio settings and bookmark data.
The Digital audio leaves the chip 3 sets of data lines Clocks
labelled as.
CLK27MV is the 27Mhz clock for video. It is used to
o ADAT0 - Left and Right channel data generate the 135Mhz clock for the Vaddis microprocessor
o ADAT1 - Left and Right surround and DSP. The MCLKV is the audio master clock for the
o ADAT2 - Centre and Sub Vaddis.
Along with the ADAT line we will also see the ABCLK We run the Vaddis in PLL bypass mode and generate or
and ALRCK as required for IS2 data conversion. own master clock (see main clock section of manual) for
higher accuracy and improved performance across Audio
The Vaddis V also supplies a direct SPDIF output for and Video.
interfacing with ancillary processing equipment.
RESET
Digital Video
IC201 is a reset generator chip that monitors the +3.3V rail
The Digital Video output from the Vaddis V consists of and ensures a reset signal PWR_ON_RESET* is
the following signals: generated on power up, or if the mains power dips below
an operational level.
o VIDPO to 19 - 20 Bit wide digital video data This signal is used to reset the Vaddis V and Flash micro
o CLK_27M - 27 Mhz Video clock only. The Vaddis V line labelled as RESET* resets the
o VSYNC - Vertical sync remaining circuitry of the player apart from the HDMI chip,
o HSYNC - Horizontal Sync this has it’s own reset line labelled as HDMI_RESET this is
necessary if we require to reset the HDMI chip only (for
The 20 bit wide bus VIDP0 to 19 provides video data example when the HDMI sink is connected and then
as follows. disconnected).
Interlaced video mode: VIDP0 to 7 provide Serial Port

multiplexed 8 bit Y, Cb and Cr data with VIDPO being
the Isb. The VADDIS V can interface with the external world via
the RS232 connector at location CON900 and the RS232
Progressive scan video mode: VIDP0 to 9 provide Transceiver at location IC900, the serial data lines are
10 bit multiplexed Cb, Cr data with VIDP0 being the shown as SERIAL RX and SERIAL TX these lines allow
Isb. VIDP10 to 19 provide 10 bit Y data with VIDP10 for direct control over the unit via RS232.
being the Isb.
Fig 3. GPIO control signals from the Vaddis V Clock Buffer
Single Name I/P-O/P Function IC301 us used to buffer the audio master clock. The circuit
PSUFSO-1 Output Control PSU Clock is arranged so that each device that requires the audio
divider master clock has it’s own driver these are seen as.
ENABLE_AV Output SCART control High
in normal operation
and low in standby o MCLK_DAC0 - Pin 18
16/9 Output Scart 16/9 o MCLK_DAC1 – Pin 16
anamorphic control o MCLK_DAC2 – Pin 14
line
o MCLK_VADDIS – Pin 3
9190INT* Input Interrupt signal
from SII9190 HDMI o MCLK_HDMI – Pin 9
transmitter
GAIN_SCALING Output High for HDCD gain We also run the Mute Line from the Vaddis V IC301 this
scaling can be seen on Pin 12 and drives transistor TR401, the
ML_8740_0-2 Output SPI load signal for
Audio DACs 0,1 and transistor pulls the relays RLY400, RLY500, RLY600 to
2 (see note 1) ground and un-mutes the audio outputs.
MC Output SPI clock signal for
DAC control IS2 Audio Data
MD Output SPI data signal for
DAC control
FSELE0-1 Output Frequency select IC302 and IC309 are buffers for the 12S signals these
generator ensure that the signals travelling to the DAC’s are point to
MUTE* Output Active low audio point. IC302 deals with the ALRCK and ABCLK and
mute signal IC309 the ADAT0,1,2 all signal are split into three
DDC_SDA,DDC,SCL I/O 12C bus for DDC
channel on HDMI separate lines for the three stereo DACS.
interface
PROG_INT* Output High for Progscan PSU Clock Divider
mode, Low for
interlaced mode.
Controls Sil9130
IC304 and IC305 form a clock divide by 1, 2 or 4 to ensure
data mux the PSU clock is always either 44.1kHz or 48Khz (See fig
HDMI_RESET* Output Reset signal for 1 within the power supply description section).
HDMI transmitter This circuit will also switch the PSUCLK off when
RESET* Output System reset switching between sample rates (the PSU will free run
when the PSUCLK is not present).
Clocks and SPDIF stage. SPDIF Output
IC300 is a SM8707E clock generator IC. This IC is The SPDIF output consists of IC308 implemented as a
sensitive to noise on it’s power supply, which causes inline buffer and parallel output buffer. Gate A buffers the
clock jitter for this reason we have a independent Low signal so that the SPDIF line from the VADDIS sees fewer
dropout – low noise +3v3 power supply for the chip loads and form a feed to the Optical output transmitter,
based around the regulator at location REG300. gates B,C and D drive the SPDIF in parallel so that we can
drive a 75ohm load adequately. The resistors at the output
X300 is a 27Mhz crystal that IC300 uses to generate of IC308 are arrange so that the output will be 500mV pk-
all the video and audio clocks required by the system pk when the output is terminated with a 75 ohm load at the
the crystal sits on the XTI and XTO pins of the chip, same time the output impedance of the circuit is 75ohms
the 27Mhz output at Pin 4 (MO2) is used to drive the as required by the Sony Philips Digital Interface
Vaddis chip directly bypassing the internal PLL. specification, the transformer at location TX301 electrically
isolates the SPDIS output.
The frequency of the audio master is dependent on
the on the current audio sample rate (I.e the sample
rate required by the format CD=44.1Khz and
DVD=48khz etc) and this is set by the system micro
via the FSLO and FSEL1 this selects either the
22.5792Mhz or 24.576Mhz clock from frequency from
IC300 this may then be divided by 2 by the clock
divide chip at location IC306 depending on the status
of FSEL1. Therefore 4 clock frequencies may be
obtained to support all required audio samples rates.
Nand gate IC303 is used to gate FSEL1 with

ENABLE_AV (which is low in standby mode) as such
when in standby mode the audio clock is disabled.
Left and Right channel D to A stages
The six analogue output signals are seen as.
The Wolfson WM8740 stereo DAC requires +5V(A)
and a +3V3 supply along with the Digital Audio data o DAC_A = Composite
lines already described in this guide. o DAC_B = SVID Y
o DAC_C = SVID C
The Left channel output only will be described in this o DAC_D = Y or Green
section as all audio output stages are the identical (all o DAC_E = U or Blue
six channels of a DV79) apart from the HDCD gain o DAC_F = V or Red
switching for L + R only.
Please note: When the player is in Progressive scan
IC400B and associated components for a 2nd order mode the composite and S-Video signals will be
Bessel filter with a differential input and a gain of 1 this switched off.
follow by a output buffer IC401B, the gain of IC401B is
control by the switching chip at location IC402, in The Video outputs from IC703 are filtered by six identical
normal use the Gain of IC401B is set to 1.1 but in filters. For instance if we look at the Composite stage we
HDCD mode the IC402 switches a second 10k resistor will see a very slow roll off filter comprising of C719,
in parele with R413 and the gain is set to 2.2 allowing C721 with L701 and L703 the –3dB point of the filter
for the higher audio output required by the HDCD stage is around 40Mhz, resistors R700 and R702 form a
standard. load for the current output DAC and as such set the
relative output level.
C436 is a A.C coupling capacitor used to remove the
few mV of offset that the DAC produces, D400 The outputs are driven by the Video op-amp at location
provides protection against from ESD. IC700A this has a gain of 2.15 and is terminated by a
75ohm resistor, D701 forms protection against ESD.
The all output relays are under control of the Vaddis
V chip but will also mute the outputs instantly under These signals now travel to the COMMS and Video
mains failure conditions. Switching drive is provided extension card on Con 901.
by TR401 (MUTE_BUF) and TR400 (AC_PRES) the
relays are in mute mode if either the input to TR401 is SCART Output
Low or if the input to TR400 is high.
RGB and Composite video signals as well as left and
Please note: The Scart left/right audio is fed from the right audio signals are all present on the SCART output
outputs of the left/right audio stages. socket. As the RGB and YUV signals share the same
output port at the Vaddis V the player must be set to
Video Encoder RGB SCART operation to have a RGB output on the
SCART. Please note: When in RGB SCART mode the
The video encoder at location IC703 is an Analogue RGB does not contain a Sync signal and the sync must
devices ADV7310 video encoder, supporting be taken from the Composite out (4 wire RGB).
interlaced and progressive scan video. Please note
the 0.1% tolerance components around this stage. Also present at the Scart are a number of control flags
IC703 runs on a 2.5V supply provided by REG700 the for the monitor these include 2 GPIO control lines direct
voltage reference for the chip of 1.225V is provided by from the Vaddis.
REF700 and should be seen on Pin 46. C730-731 and
R736 form an external PLL filter. o ENABLE_AV
o 16/9
The Data lines into the encoder arrive as VIDP0 – 19
from the outputs of the VADDIS V chip. These are seen at the SCART output pins as.
The external current setting resistors for the internal o O/6/12

DACS are seen as R721-R722 and R738-R739 these o RGB STAT
set the correct output level for the DACS.
The 0/6/12 line (SCART pin 8) is used to inform the
The encoder gives out 6 video signals, for composite, monitor of the screen format being sent by the player as
S-Video (Y and C) and shared YUV/RGB signals. The set in the video set-up section of the software.
setting of the RGB or YUV mode is select with the
Video settings page of the Setup menu. o Standby = 0V
o 16:9 aspect ratio = 6V
o 4:3 aspect ration = 12V
The RGB status line (SCART pin 16) will be seen as 0v

= no RGB and >1v is RGB present.
HDMI output stage
Please note: Due to the plug and play nature of the TMDS (Transistion Minimised Differential Signalling) this
HDMI/DVI interface, if presented with a reported no consists of a clock signal (TXC+/TXC-) and 3 data
HDMI problem it is worth checking all set-up signals (TX0+/TX0-, TX1+/TX1- and TX2+/TX2-).
parameters of both the DVD player and the All signals are differential and use current switching
Plasma/Projector in use before performing component techniques therefore no signals will be observed unless
level diagnostics on this section. the output is correctly terminated. In this application the
clock signal will always be 27MHz and the data signals
HDMI is a system that transmits uncompressed digital will be clock X10 so 270Mbit/s.
video and digital audio over a high speed encrypted
interface. DDC Channel this is a 12C interface on DDC_SCL and
DDC_SDA. These signals connect to the VADDIS V
IC1102 is an SII9030 HDMI transmitter IC in essence which is the I2C bus master, The DDC channel is used
the chip takes the Digital Video and Audio information to read back information from the HDMI sync regarding
and sends the Data out in HDMI format. it’s Video and Audio capabilities and is also used for
HDCP encryption authentication.
REG1100 is used to generate a clean regulated 3V3
power supply to Pins 18 and 33 of the HDMI chip. +5V Power, the HDMI interface requires a 5V supply
capable of delivering around 50mA, the supply is
IC1100 –IC1101 are 3 state octal/line drivers these provided by REG 1101 which delivers the required
form a multiplex that switches between the 2 groups of current and will shut down in the event of a short circuit.
signals for the video data input stage of the SII9190
the multiplexer is control by the Signal from the Vaddis Hotplug. The HDMI `Hot plug’ signal HDPIN is a +5V to
V labelled as PROG/INT this will sit at logic 1 for signal the presence of equipment being connected, this
Progressive scan and logic 0 for interlaced. converted to 3v3 logic 1 as IC1100 is not +5V tolerant.
In interlaced mode the 8 bit Y/Cb/Cr video data on CEC. The CEC (Consumer Electronics Control) signal is
VIDP7-0 are passed to input port pins D15 – D8 of the a 1-wire bidirectional control signal. It connects to the
SII9190. Vaddis via an ESD protection circuit D1102 at the
moment this line is not used at present and is an
optional part of the HDMI specification.
In Progressive scan mode all 20 bits of the Video
data bus are used and get mapped as follow.
VIDP 19 -12 provide 8 msbits of Y data to pins D15-8
VIDP 11 -10 provide 2Isbits of Y data to pins D2-3
VIDP 9 - 2 provide 8 msbits of Cb/Cr data to pins D23 – 16
VIDP 1 – 0 provide 2 Isbits of Cb/Cr data to pins D7 - 6
Along with the VIDP video data lines we must also see
VSYNC – Vertical sync data

HSYNC – Horizontal sync
CLK27M_VID – 27Mhz video clock.
SPDIF – Digital audio data (Full surround)

MCLK_HDMI – Used to strobe HDMI dig audio
At the output of the HDMI chip we will see the

following signals at SKT100.
Comms and Final video output stage
The signals from the main board travel up to the

Comms board on connector CON902.
The Video signals simply travel via an A-C coupling

net before exiting the player via the RCA-phono
sockets at locations SKT902 and SKT903.
The RS232 interface is on 9 way “D” type CON900,

with IC900 providing the level translation and static
protection between the RS232 levels and the 3.3V
CMOS levels required by the VADDIS V, CON900
also supplies a +5V Status level when ever the unit is
not in standby this generated from a buffered version
of the AV_ENABLE signal as used within the SCART
output stage (0V in standby).
We have two remote input bus’s on this board, the first

can be seen to arrive at SK901 on a 3.5mm mono jack
signal received should be a 36Khz modulated RC5
signal, the RC5 data then travels to the front panel and
is fed to IR led that is sited just behind the front panel
IR Sensor, we use the sensor to demodulate the and
opto-isolate the signal due to the fact that the signal is
floating up from ground.
The 3.5mm socket at location SKT900 is used to

receive un-modulated RC5 the 0V representing a
space (equivalent to no-infra-red carrier), this input is
effectively wire-Ord with the front panel IR receiver on
IRRCV these take the form of a 5V/0V RC5 signal,
with 5V representing a mark (equivalent to a burst of
36Khz carrier on infrared) and 0V representing a mark
(space), the signal is simply inverted and wire-ord to
the display board Infra-red led via TR900.
SW2A
SDDFC30400 DGND VP5V
SKT1
BULGIN 1 TX1
SH1 PX0580 Small Toroidal Mains
NF L924TX
EMC Shield D1 R1 DZ2 R6
115V 22K BZX79C
C1 C3 FHLDR1 5 2KBP02 6K8
2A
2B
3N3 20mm HLDR 0W25 10V C29 0W25
2
NF MF DO-35 D5
N 250V 2 22UF MF
C5
CER AC_PRES*
3
115V 230V FS1 T315mA 63V
E L1 3 DZ3 YK
NF BZX79C
250U SW1
S504 3V3 1N4148
L 18-000-0019 6 C27 C28 C8 C31
DO-35
1
1A
1B
C2 C4 1000UF 1000UF 100N DO-35 22UF
115V VN13V5_F1
3N3 FHLDR2 63V 63V 100V TR2 63V
NF
250V 20mm HLDR YK YK MKS2 YK
CER 4
DZ1
FS2
T315mA L2
7
BZX79C DZ4 C30 DGND
BLACK
WHITE
GREY
S504
BLUE
2V7 BZX79C 22UF BC546B
SW2B DO-35 5V6 63V TO-92
NF DO-35
SDDFC30400 YK
R2
R3
VN19V
LK1 4K7
TR1 0W25
220R
MF
4
3
2
1
2
1
0W25 BC547B
0R0 0W25 MF TO-92
GREEN
GREY
DK GREY
GREY
GREY
LT GREY
BLUE
MF
C6 C7 VN35V6
100N 100N
100V 100V
MKS2 MKS2
CON1 CON2 CON3 CON4

MAINS SUPPLY WAGO WAGO WAGO
FOR EXT. AUDIO 3 6 256 256 256
D2 L3
SUPPLY TX
2 5 NOTE TRANSFORMER TX1 IS MOUNTED ON AGND
VP15V5
THE CHASSIS AND CONNECTED TO THE PSU
1 4 PCB BY CON2,3,4. TX1 IS SHOWN ABOVE FOR 33U 1.17A 8RHT2 LK2
CIRCUIT OPERATION C32 UF4003 C37 C41 C12
470pF DO-41 100UF 470UF 100N NF
MOLEX 1kV 50V 25V 100V
44472 DE YXF YK MKS2
DGND CON5
4
VP5V
R20 R21 C38 C42 C13 AGND 3
470R 470R 100UF 470UF 100N 2
L4
0W25 0W25 50V 25V 100V 1
D3 33U 1.17A 8RHT2 VP12V
MF MF YXF YK MKS2
VN15V5
Amp
DGND HD Pwr Con
UF4003
C9 C10 C11
DO-41
100N 100N 100N
100V 100V 100V
MKS2 MKS2 MKS2
TX2
CON6
DGND DGND Ferrite Switch Mode
L925TX TR6 8
VP5V
BD179 7
D4
4 TO-126 6
5
R12 VN9V_F2
41T 4
10K VP3V3
3
5V_NFB 0W25 5 UF4003 SPARE1 2
(NFB From PSU Outputs) MF TR5 C33 DO-41 R22 SPARE2 1
3V3_NFB
BD179 R23
VP5V TO-126 41T C39 C43
6 220UF 470R 0W25 470UF DGND AMP
33R 0W25 16V MF DZ5 25V CT
1 11 1N0 100V MF YXF BZX79C YK NF
R8 R11 R7 CER 5V1
1K0 9K1 6K8 R17 16T 22T DO-35
0W25 0W25 0W25 10R 12
MF 0W25 VN13V5_F1
MF MF 2
MF 9 CON7
C18 C19
16T 14T 100N 100N 32
5V_NFB VN19V
3 10 100V 100V 31
C14 C49 NFB (To Controller E/A) VN9V_F2
DZ6 C17 C40 MKS2 MKS2 30
100N 22N 3V3_NFB VN13V5_F1
BZX79C 100N 220UF 7 29
100V 100V 12V 100V 16V 28
MKS2 MKS2 VP3V3
R9 TR3 TR8 DO-35 MKS2 YXF 10T 27
PSU_CLK BC546B 8 26
VP3V3
TO-92 BC556B D7 25
L6
1K0 0W25 TO-92 VN35V6 VN35V6 VN35V6 24
VP3V3
SCR
MF VN35V6 DGND 23
VP5V
IC1 22
7
VP3V3
2 UC3843AN 6U8 2.1A 8RHT2 21
VCC
VFB 31DQ06 DO-201AD

DIP-8 DGND 20
C35 VP3V3
R19 C54 C20 C44 C22 19
C47 R13 C48 C51 R14 1000UF 100N 470UF 100N 18
22N VP3V3
22P 10K NF 16V 100V 25V 100V 17
100V 0W25 1N0 100V 10R 0W25 YXF MKS2 YK MKS2 SPARE3 16
100V C50 MKS2 1N0 100V
N150 MF MF SPARE4 15
CER R4 R24 CER
1 6 14
COMP OUT VP5V
13
4K7 0W25 33R 0W25 12
22N 100V VP5V
MF MF HS1B M1 11
MKS2
SW38-2 IRF640N DGND 10
VP5V
10.2C/W TO-220 9
R10 R5 PSU_CLK 8
D6 L7
DGND 8 3 7
VREF ISEN
AC_PRES* 6
VP3V3
1K0 0W25 C52 4K7 0W25 5
C15 MF C16 R15 MF 6U8 2.1A 8RHT2 4
330P 31DQ10 DO-201AD VP12V
100N 100N 10K 3
100V C34
100V 100V 0W25 R18 C53 C55 C21 C45 C23 2
N750
MKS2 MKS2 MF 1000UF 1000UF 100N 470UF 100N 1
VP15V5
GND
4 16V 16V 100V 25V 100V

RT/CT
10R 0W25 YXF YXF MKS2 YK MKS2
1N0 100V VN15V5
TR7 VN35V6 TR4 VN35V6 VN35V6 MF MOLEX
CER
5
BC556B BC546B C56 C36 52045

TO-92 R26 TO-92 4N7 1N0 AGND DGND
R29
68R 100V 100V
0W25 CER CER C25 DGND
MF 82K 0W25 100N
MF 100V
DGND MKS2
R25 R27 R28 R16 R30 R31
100R 2K7 22R 47K 0R22 10R
0W25 0W25 0W25 0W25 3W 0W25
L5
MF MF MF MF SPRX MF D8
VP12V
33U 1.17A 8RHT2
VN35V6 UF5406
DO-201AD C57 C24 R32 R33 C46 C26
470UF 100N 1K0 470UF 100N
NF 0W25
25V 100V 25V 100V
YXF MKS2 MF YK MKS2
FIX1 FIX3 FIX5
1 1 1
ITEM QTY PART No. DESCRIPTION NOTES
DGND
ITEM1 1 F006 Clip For SW Profile Heatsink Dia 3.5mm Dia 3.5mm Dia 3.5mm
DRAWING TITLE
ITEM2 1 F082 Sil Pad For TO-220 HS Insulator
FIX2 FIX4 FIX6
FD1 TOOL1 DV78 SERIES PSU
ITEM3 2 F022 Fuseholder Cover For 20mm Fuseholder FD2 TOOL2
Filename: L959_1.1.sch
1 1 1
ITEM4 1 L959PB Blank PCB DV78 PSU TOOL3
Notes: 04_E046 PG 22/04/04 Make CON1 fitted (used in DV29) 1.1
ITEM6 1 F044 Cable Tie 100MM X 2.5MM USED TO SECURE TRANSFORMER CABLES TO PCB NEAR CON1 TOOL4
A & R Cambridge Ltd. 03_E195 KAL 02/07/03 Production release 1.0
ITEM5 1 8M101 Earth Lead Assy 75MM SAFETY EARTH WIRE FROM IEC INLET SK1 TO METAL CHASSIS Dia 3.5mm Dia 3.5mm Dia 3.5mm Pembroke Avenue ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
ITEM7 2 HP007S Rivet Copper RIVETS TO SECURE IEC INLET TO PCB Cambridge CB5 9PB Contact Engineer: Kevin Lamb Contact Tel: (01223) 203200 Printed: 22-Apr-2004 Sheet 1 of 1 DRAWING NO. L959CT
DV29 DVD player PSU board L959AY issue 1.1.1
Designator Part Description

C1 2J410 Capacitor SM 0805 X7R Ceramic 10% 50V 100N
C5 2MA610 Capacitor Surface Mount Electrolytic 10UF 50V 6.3 X 4.5MM
C8 2L210 Capacitor SM 0805 NPO Ceramic 5% 100V 1N0
CON1 8K8616 Con 1.0MM Horiz FFC 16WAY 52807 Series
D1 3AS16W Diode Surface Mount Small Signal BAS16W SOT-23 Package
DISP1 B1014 Display DV88
IC1 5H6312 IC VFD Driver PT6312LQ SM LQFP-44 package
LED1 3D007 LED 3.1mm Green SLR-37MG3T
LED2 3D010 LED SM Red SML-010LT
LED5 3D006 LED 3mm Red/Green Tri-Colour L-93WEGW
R1 1M133 Resistor 0805 Surface Mount 0.125W 1% 330R
R8 1M310 Resistor 0805 Surface Mount 0.125W 1% 10K
R10 1M247 Resistor 0805 Surface Mount 0.125W 1% 4K7
RX1 B2109 IR Receiver Module Kodenshi KSM-902TM1N
SW1 A1511 Switch Tact Low Profile No Gnd Pin
TR2 4D10KN Digital Transistor MMUN2211LT1 SOT23 Package
TR3 4A849B Transistor BC849B SOT23 Package
TR5 4D10KP Digital Transistor MMUN2111LT1 SOT23 Package
L967C10
L971C10.Sch
PSUCLK POWER
AC_PRES*
AC_PRES* SHEET 10
L967C2
L967C4
L971C4.Sch NOTES ON PCB VARIANTS
L971C2.sch SCART_LEFT
AC_PRES* SCART_LEFT
GAIN_SCALING SCART_RIGHT
GAIN_SCALING GAIN_SCALING SCART_RIGHT
RESET*
RESET* RESET*
MD Part number L971AY L974AY L973AY
MD MD
MC
MC MC
ML_8740_0 Product DV29 DV79 DV75
ML_8740_0 ML_8740_0
ML_8740_1
ML_8740_1
ML_8740_2 Audio output channels 6 6 2
ML_8740_2
L967C3
DAC L&R AUX PSU fitted YES NO NO
FSEL0
L971C3.Sch
PSUCLK
SHEET 4 Precision parts on component video output YES NO NO
FSEL0 FSEL0 PSUCLK
FSEL1 ADAT_DAC0
FSEL1 FSEL1 ADAT_DAC0 ADAT_DAC0
PSUFS0 ABCLK_DAC0 Transformer on digital COAX output YES NO NO
PSUFS0 PSUFS0 ABCLK_DAC0 ABCLK_DAC0
PSUFS1 ALRCLK_DAC0
PSUFS1 PSUFS1 ALRCLK_DAC0 ALRCLK_DAC0
MCLK_DAC0 RS232 YES YES NO
MCLK_DAC0 MCLK_DAC0
ADAT0
ADAT0 ADAT0
ADAT1 MUTE_BUF*
ADAT1 ADAT1 MUTE_BUF* MUTE_BUF*
ADAT2
ADAT2 ADAT2
ABCLK
ABCLK ABCLK
ALRCLK
ALRCLK ALRCLK
SPDIF
SPDIF
SPDIF When updating the design, modify this schematic first.
MUTE* L967C5 The PCB is updated from this schematic.
MUTE* MUTE*
CLK27M_VADDIS MD
L971C5.Sch Also update the DV79 schematic and DV75 schematic,
CLK27M_VADDIS
MCLK_VADDIS
MCLK_VADDIS
CLK27M_VADDIS
MCLK_VADDIS
MC
MD
MC
and get the DV79 and DV75 BOMs from their own
schematics
ENABLE_AV
ENABLE_AV
RESET*
ML_8740_1
RESET* DAC LS&RS
ADAT_DAC1
ADAT_DAC1
ABCLK_DAC1
ADAT_DAC1 SHEET 5
ABCLK_DAC1 ABCLK_DAC1
ALRCLK_DAC1
ALRCLK_DAC1 ALRCLK_DAC1
MCLK_DAC1
MCLK_DAC1 MCLK_DAC1
CENTRE_OUT
SUB_OUT
VADDIS V CLOCKS
SHEET 2 SHEET 3 L967C6
L971C6.Sch
MD
MC
MD
MC DAC C & SUB
ML_8740_2
RESET*
RESET*
ADAT_DAC2
ADAT_DAC2
ADAT_DAC2
SHEET 6
ABCLK_DAC2
ABCLK_DAC2 ABCLK_DAC2
ALRCLK_DAC2
ALRCLK_DAC2 ALRCLK_DAC2 CENTRE_OUT
MCLK_DAC2
MCLK_DAC2 MCLK_DAC2 SUB_OUT
L967C11
L971C11.Sch
ADAT0
ADAT0
ADAT1
ADAT1
ADAT2
ADAT2
ABCLK_HDMI
ABCLK_HDMI ABCLK_HDMI
ALRCLK
ALRCLK
MCLK_HDMI
MCLK_HDMI MCLK_HDMI
HDMI
SPDIF
SHEET 11
CEC
CEC CEC
9190INT*
9190INT* 9190_INT*
PROG/INT*
PROG/INT* PROG/INT*
DDC_SDA
DDC_SDA DDC_SDA
DDC_SCL
DDC_SCL DDC_SCL
SDA
SDA SDA
SCL
SCL SCL
HDMI_RESET*
HDMI_RESET* HDMI_RESET*
VIDP[0..19]
VIDP[0..19] VIDP[0..19]
HSYNC*
HSYNC* HSYNC*
VSYNC*
VSYNC* VSYNC*
CLK_27M_VID L967C8
CLK_27M_VID CLK27M_VID HSYNCD*
L971C8.Sch
SCART_LEFT
SCART_RIGHT
16/9
16/9 16/9
ENABLE_AV
ENABLE_AV ENABLE_AV
SCART
L967C7
L971C7.Sch SHEET 8
SCART_COMPOSITE
SDA SCART_COMPOSITE SCART_COMPOSITE
SCART_RED
SCL SCART_RED SCART_RED
RESET* SCART_GREEN
RESET* SCART_GREEN SCART_GREEN
SCART_BLUE
SCART_BLUE SCART_BLUE
VIDP[0..19]
HSYNCD*
HSYNCD*
VSYNC*
CLK27M_VID
VIDEO ENCODER L967C9

L971C9.Sch
COMPOSITE
COMPOSITE COMPOSITE
Y
Y Y
U
SHEET 7 U
V
V
SVID_Y
U
V
SVID_Y SVID_Y
SVID_C
SVID_C SVID_C
COMMS, VIDEO OUT
SHEET 9
ENABLE_AV
IRRCV
IRRCV IRRCV
SERIAL_TX
SERIAL_TX SERIAL_TX
SERIAL_RX
SERIAL_RX SERIAL_RX
REM_BUS_P
REM_BUS_P REM_BUS_P
REM_BUS_N
REM_BUS_N REM_BUS_N
MUTE_RGB
MUTE_RGB MUTE_RGB
ITEM100 1 L971PB Blank PCB DV29 Main Board
DRAWING TITLE
DV29 MAIN BOARD TOP LEVEL
Filename: L971C1.Prj
Notes:
A & R Cambridge Ltd. 04_E121 PG 09-08-04 Production release 1.0

Pembroke Avenue ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
Cambridge CB5 9QR Contact Engineer: Peter Gaggs Contact Tel: (01223) 203270 Printed: 24-Aug-2004 Sheet 1 of 11 A2 DRAWING NO. L971C1
+3V3D
P271 L200 120R@100MHz
VDDP_A
FRONT PANEL RESET
+1V8D
+3V3D P273 L201 120R@100MHz
CON202 VDD_PLL
1
2 FPDOUT
3 XFPCLK IC201
4 XFPSEL
VCC
5 XFPDIN C207
6 REM_BUS_P PWR_ON_RESET* P239
REM_BUS_P RST
7 IRRCV 100N
GND
8 +5V_DISPLAY 16V
9 0603
10 LM809M3-2.63
11 SOT-23
C248 C208 C250 C210
12
13 DGND +1V8D +3V3D 100N 100N
14 REM_BUS_N -9V_OUT -13V5_OUT -19V_OUT 10UF 16V 10UF 16V
REM_BUS_N 50V 50V
15 +3V3D +3V3D 0603 0603
16 CONFIGURATION LINKS +3V3D YK YK
DV75 R203
MOLEX 4K7 DGND DGND
52806 DGND 0805
W10
M16
U11
U13
K16
U16
D12
V12
A18
A19
A20
A13
G16
A16
R16
E10
T11
E12
E15
T15
E13
L17
H5
K5
N5
U7
U5
R5
E5
E7
T7
T9
E9
L5
F5
P205 6CH* N3 E17
VDDADC
VDDP-A2
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDD_DAC
VDD_DAC
VDD_DAC
VDDP-A
VDDP-A
VDDA
NVMDA0 DAC_A_B/U
P4 F17
NVMDA1 DAC_B_R/V
P3 F18 VIDP[0..19]
NVMDA2 DAC_C_G/Y VIDP[0..19]
+3V3D SDRAM decoupling on bottom of board DV79/DV29 R211
R3
R4
NVMDA3 DAC_D_CVBS
G17
G18
NVMDA4 DAC_E_Y
4K7 P1 H17 +3V3D
NVMDA5 DAC_F_C
0805 P2 K17
NVMDA6 COSYNC
C256 C257 C258 C259 C260 C261 C262 N4 D16
NVMDA7 RSET
N1 D17 C204 C206
NVMR/B VREF
1N0 1N0 1N0 1N0 1N0 1N0 1N0 DGND L4
NVMCE
50V 50V 50V 50V 50V 50V 50V M3 K19 PV200 RP216A 1 8 100R VIDP0 PV223 100N 100N
NVMR/B1 VIDP_0
0603 0603 0603 0603 0603 0603 0603 L3 K20 PV201 RP216B 2 7 100R VIDP1 PV224 16V 16V
NVMCE1 VIDP_1
M1 L19 PV202 RP216C 3 6 100R VIDP2 PV225 0603 0603
NVMRE VIDP_2
DGND N2 L20 PV203 RP216D 4 5 100R VIDP3 PV226
NVMWP VIDP_3
M2 L18 PV204 RP217A 1 8 100R VIDP4 PV227 DGND
NVMWE VIDP_4
DGND L1 M19 PV205 RP217B 2 7 100R VIDP5 PV228
NVMALE VIDP_5
L2 M20 PV206 RP217C 3 6 100R VIDP6 PV229
NVMCLE VIDP_6
M4 M18 PV207 RP217D 4 5 100R VIDP7 PV230
NVMCD VIDP_7
M17 PV208 RP218A 1 8 100R VIDP8 PV231
VIDP_8
PCLK
RAMCKE
R202 22R 0603 U12
V11
PCLK
RAMCKE
VIDP_9
VIDP_10
N20
N19
PV209
PV210
RP218B
RP218C
2
3
7
6
100R
100R
VIDP9
VIDP10
PV232
PV233
FRONT PANEL
RAMWE* Y14 N18 PV211 RP218D 4 5 100R VIDP11 PV234 P200 FPDOUT
RAMWE VIDP_11
RAMCAS* W13 N17 PV212 RP219A 1 8 100R VIDP12 PV235
RAMCAS VIDP_12
RAMRAS* Y13 P20 PV213 RP219B 2 7 100R VIDP13 PV239 C200
RAMRAS VIDP_13
RAMCS* Y12 P19 PV214 RP219C 3 6 100R VIDP14 PV240
RAMCS VIDP_14
RAMDQM W14 P18 PV215 RP219D 4 5 100R VIDP15 PV241 47P
RAMDQM VIDP_15
RAMBA1
RAMBA0
Y11
W11
RAMBA1
RAMBA0
IC202 VIDP_16
VIDP_17
P17
R20
PV216
PV217
RP220A
RP220B
1
2
8
7
100R
100R
VIDP16
VIDP17
PV242
PV243
100V
0805
+3V3D RAMADD11 U10 R19 PV218 RP220C 3 6 100R VIDP18 PV244 IC200A 74HCT125D DGND
RAMADD11 VIDP_18
RAMADD10 W9 R18 PV219 RP220D 4 5 100R VIDP19 PV245 SO-14
RAMADD10 VIDP_19 P294 R218
RAMADD9 V10 2 3 P202 XFPDIN
RAMADD9
RAMADD8 U9 T19
RAMADD8 VCLK 100R
43
29
15
35
41
49
55
75
81
RAMADD7 V9 K18 R200 33R
3
9
RAMADD7 VCLKx2 PV220 PV236 CLK_27M_VID 0W125 0805
1
VDD
VDD
RAMADD6 U8
ZORAN VADDIS V R17 PV221 R201 100R PV237
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RAMADD6 VSYNC VSYNC*
RAMADD5 V8 T20 PV222 R205 100R PV238
RAMADD5 HSYNC HSYNC*
RAMADD4 W7 DGND
RAMADD4
R225
1K0
PR200
PR201
RAMCKE
PCLK
67
68
CKE
CLK
DQ0
DQ1
2
4
RAMDAT0
RAMDAT1
PR220
PR221
RAMADD3
RAMADD2
Y7
Y8
RAMADD3
RAMADD2 AMCLK
E19 DGND DIGITAL AUDIO
0W063 5 RAMDAT2 PR222 RAMADD1 W8 E20 P287 RP213A 1 8 56R AMCLK_OUT IC200B 74HCT125D
DQ2 RAMADD1 ALRCLKI
0603 PR202 RAMBA0 22 7 RAMDAT3 PR223 RAMADD0 Y9 F20 SO-14
BA0 DQ3 RAMADD0 ABCLKI P295 R254
NF PR203 RAMBA1 23 8 RAMDAT4 PR224 RAMDAT0 W18 F19 P288 RP213B 2 7 56R ALRCLK 5 6 P203 XFPCLK
PR253 BA1 DQ4 RAMDAT0 ALRCLKO ALRCLK
C217 IC203 DQ5
DQ6
10
11
RAMDAT5
RAMDAT6
PR225
PR226
RAMDAT1
RAMDAT2
Y18
W17
RAMDAT1
RAMDAT2
ABCLKO
AIN0
G19
C17
P289
RP213C 3 6 56R ABCLK ABCLK
100R
0W125 0805
4
100N PR204 RAMWE* 17 13 RAMDAT7 PR227 RAMDAT3 Y17 C16
WE DQ7 RAMDAT3 AIN1
16V PR205 RAMCAS* 18 74 RAMDAT8 PR228 RAMDAT4 W16 J17 P290 RP213D 4 5 56R ADAT0
CAS DQ8 RAMDAT4 AOUT0 ADAT0
0603 PR206 RAMRAS* 19 76 RAMDAT9 PR229 RAMDAT5 Y16 HS202 J19 P284 RP214C 3 6 100R ADAT1 DGND
RAS DQ9 RAMDAT5 AOUT1 ADAT1
NF PR207 RAMCS* 20 77 RAMDAT10 PR230 RAMDAT6 W15 H20 P285 RP214A 1 8 100R ADAT2
CS DQ10 RAMDAT6 AOUT2 ADAT2
DGND RAMADD11 21
A11 (NC)
SDRAM DQ11
DQ12
79
80
RAMDAT11
RAMDAT12
PR231
PR232 +3V3D
RAMDAT7
RAMDAT8
Y15
V14
RAMDAT7
RAMDAT8
AOUT3
AOUT4
H19
G20 IC200C 74HCT125D
PR208 RAMADD10 24 82 RAMDAT13 PR233 Near ATAPI conn RAMDAT9 U14 J20 P286 RP214B 2 7 100R SPDIF SO-14
A10/AP DQ13 RAMDAT9 SPDIF SPDIF R255
+3V3D SDRAM DECOUPLING PR209 RAMADD9 66
A9 DQ14
83 RAMDAT14 PR234 RAMDAT10 V15
RAMDAT10
9 8 P296 P204 XFPSEL
PR210 RAMADD8 65 85 RAMDAT15 PR235 RAMDAT11 V16 G4 FPDOUT
A8 DQ15 RAMDAT11 FPCDOUT 100R
PR211 RAMADD7 64 31 RAMDAT16 PR236 C203 C264 C251 RAMDAT12 V17 H4 FPDIN P291
A7 DQ16 RAMDAT12 FPCDIN
10
63 33 U17 H3 0W125 0805
PR212 RAMADD6 A6 DQ17 RAMDAT17 PR237 RAMDAT13 RAMDAT13 FPCCLK FPCLK P292
C212 C213 C214 C215 PR213 RAMADD5 62 IC MEM SDRAM 512KX32BITX4 7NS 34 RAMDAT18 PR238 100N 100N 100N RAMDAT14 V18 H1 FPSEL P293
A5 DQ18 RAMDAT14 FPCSTB
100N 100N 100N 100N PR214 RAMADD4 61 36 RAMDAT19 PR239 16V 16V 16V RAMDAT15 U18 H2 IRRCV DGND
A4 DQ19 RAMDAT15 IRRCV
16V 16V 16V 16V PR215 RAMADD3 60 37 RAMDAT20 PR240 0603 0603 0603 RAMDAT16 W6
A3 DQ20 RAMDAT16
0603 0603 0603 0603 PR216 RAMADD2 27 39 RAMDAT21 PR241 RAMDAT17 Y6 W19
A2 DQ21 RAMDAT17 MODRI
PR217 RAMADD1 26 40 RAMDAT22 PR242 DGND RAMDAT18 W5 3319B+T410-01 U20 +5VD
A1 DQ22 RAMDAT18 MODDCD
PR218 RAMADD0 25 42 RAMDAT23 PR243 RAMDAT19 Y5 20.9C/W V20
A0 DQ23 RAMDAT19 MODDSR
DGND
DQ24
DQ25
45
47
RAMDAT24
RAMDAT25
PR244
PR245 DRIVE RAMDAT20
RAMDAT21
W4
Y4
RAMDAT20
RAMDAT21
MODCTS
MODDTR
V19
U19 R234
48 RAMDAT26 PR246 RAMDAT22 Y3 Y20 4K7
DQ26 RAMDAT22 MODRTS
PR219 RAMDQM 16
71
DQM0 DQ27
50
51
RAMDAT27
RAMDAT28
PR247
PR248
CON203
1 XATRESET*
RAMDAT23
RAMDAT24
Y2
W2
RAMDAT23 MODRD
Y19
W20
DGND
EEPROM MEMORY 0W125
0805 IRRCV
28
59
DQM1
DQM2
DQ28
DQ29
53
54
RAMDAT29
RAMDAT30
PR249
PR250
2
3 ATDD7
+5VD RAMDAT25
RAMDAT26
W3
V4
RAMDAT24
RAMDAT25
MODTD
T3
SERIAL PORT 7
IC204A
+3V3D C205
IRRCV
DQM3 DQ30 RAMDAT26 DUPRD SERIAL_RX WP

56 RAMDAT31 PR251 4 ATDD8 RAMDAT27 U4 U3 1
DQ31 RAMDAT27 DUPTD SERIAL_TX A0
5 ATDD6 R226 R227 R228 RAMDAT28 V5 DGND 6 2 47P
RAMDAT28 SCL A1
address 6 ATDD9 RAMDAT29 V6 B13 5 3 R232 R233 P242 100V
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RAMDAT29 SPIDATI SDA A2

7 ATDD5 1K0 1K0 1K0 RAMDAT30 U6 C13 4K7 4K7 0805
VSS
VSS
VSS
VSS
RAMDAT30 SPIDATO
8 ATDD10 0W125 0W125 0W125 RAMDAT31 V7 D13 DGND 24LC08BT/SN DGND 0W125 0W125 DGND
RAMDAT31 SPICLK
9 ATDD4 0805 0805 0805 PNVMCE* Y1 SO-8 0805 0805
PNVMCE
44
58
72
86
84
78
52
46
38
32
12
6
10 ATDD11 PNVMR/B* W1 B17 SDA P201

PNVMR/B I2CDAT SDA
11 ATDD3 A17 SCL P282
I2CCLK SCL
data 12 ATDD12
address data 13 ATDD2 C9
P243 PWM
DGND 14 ATDD13 ATDD0 RP209D 4 5 33R D2 C15
P244 ATDD0 SERADC0
RAMDAT5 RP200A 1 8 56R FRAMDAT5 15 ATDD1 ATDD1 RP209C 3 6 33R C2 B16 DGND +3V3D
P245 ATDD1 SERADC1
RAMDAT6 RP200B 2 7 56R FRAMDAT6 16 ATDD14 ATDD2 RP209B 2 7 33R A1 D15 +3V3D
P246 ATDD2 SERADC2
RAMDAT11 RP200C 3 6 56R FRAMDAT11 17 ATDD0 ATDD3 RP209A 1 8 33R B2
P247 ATDD3
RAMDAT10 RP200D 4 5 56R FRAMDAT10 18 ATDD15 ATDD4 RP210D 4 5 33R D3 R204 CON201
P248 ATDD4
19 ATDD5 3 6 33R C3 10K 16
4
RP210C
RAMDAT9 RP201A 1 8 56R FRAMDAT9

20
21 ATDMARQ
ATDD6
ATDD7
RP210B 2
1
7
8
33R
33R
P249
P250
D4
C4
ATDD5
ATDD6
R237
4K7
RP215A
4K7
RP215B
4K7
RP215C
4K7
RP215D
4K7
0W125
0805
15
14
EJTAG DEBUG
RP210A ATDD7
RAMDAT8 RP201B 2 7 56R FRAMDAT8 22 ATDD8 RP211A 1 8 33R P251 A4 0W125 62mW 62mW 62mW 62mW 13
P252 ATDD8
RAMADD9 RP201C 3 6 56R FRAMADD9 23 ATDIOW* ATDD9 RP211B 2 7 33R B4 0805 1206 1206 1206 1206 12
ATDD9
5
RAMADD8 RP201D 4 5 56R FRAMADD8 24 ATDD10 RP211C 3 6 33R P253 A3 K3 EJTRST 11
P254 ATDD10 EJTRST
25 ATDIOR* ATDD11 RP211D 4 5 33R B3 K4 EJTDI 10
P255 ATDD11 EJTDI
26 ATDD12 RP212A 1 8 33R A2 K2 EJTDO 9
P256 ATDD12 EJTDO
RAMADD7 RP202A 1 8 56R FRAMADD7 27 ATIORDY ATDD13 RP212B 2 7 33R E4 K1 EJTMS 8
P257 ATDD13 EJTMS
RAMADD6 RP202B 2 7 56R FRAMADD6 28 ATDD14 RP212C 3 6 33R E3 J1 EJTCK PJ203 7
P258 ATDD14 EJTCK
RAMADD5 RP202C 3 6 56R FRAMADD5 29 ATDMACK* ATDD15 RP212D 4 5 33R F4 6
P259 ATDD15
RAMADD4 RP202D 4 5 56R FRAMADD4 30 ATDMARQ R238 82R 0805 B1 J4 PSUFS0 5
P260 ATDMARQ GPCIO6 PSUFS0
31 ATINTRQ ATDIOW* R241 22R 0805 C1 B18 PSUFS1 4
P261 ATIOW GPCIO7 PSUFS1
32 ATDIOR* R242 22R 0805 D1 C18 ENABLE_AV PJ205 3 Not Fitted
P262 ATIOR GPCIO8 ENABLE_AV
RAMADD3 RP203A 1 8 56R FRAMADD3 33 ATDA1 ATIORDY R239 82R 0805 F3 V1 16/9 2
P263 ATIORDY GPCIO9 16/9 PJ200 R251
RAMDAT31 RP203B 2 7 56R FRAMDAT31 34 ATDMACK* R243 22R 0805 E2 V2 9190INT* 1
P264 ATDMACK GPCIO10 9190INT*
RAMDAT30 RP203C 3 6 56R FRAMDAT30 35 ATDA0 ATINTRQ R240 82R 0805 E1 U2 FSEL1
P265 ATINTRQ GPCIO11 FSEL1 33R
RAMDAT29 RP203D 4 5 56R FRAMDAT29 36 ATDA2 ATDA0 R244 33R 0805 G3 U1 GAIN_SCALING
P266 ATDA0 GPCIO12 GAIN_SCALING 0W125
37 ATCS0* ATDA1 R245 33R 0805 F1 T1 ML_8740_2 HARWIN
P267 ATDA1 GPCIO13 ML_8740_2 0805
38 ATCS1* ATDA2 R246 33R 0805 F2 T2 MUTE* DGND M20-972
P268 ATDA2 GPCIO14 MUTE*
RAMDAT28 RP204A 1 8 56R FRAMDAT28 39 ATCS0* R247 33R 0805 G1 R1 ML_8740_1
P269 ATCS0 GPCIO15 ML_8740_1
RAMDAT27 RP204B 2 7 56R FRAMDAT27 Dubilier 40 ATCS1* R248 33R 0805 G2 R2 ML_8740_0
P270 ATCS1 GPCIO16 ML_8740_0
RAMDAT26 RP204C 3 6 56R FRAMDAT26 C3 XATRESET* R249 33R 0805 ATRESET* B11 MC
GPCIO17 MC NOTE: JTAG port is for software debug only.
RAMDAT25 RP204D 4 5 56R FRAMDAT25 DGND B7 C11 MD
HD0 GPCIO18 MD Boundary scan is not supported
DDC_SDA A7 C12 ATRESET*
DDC_SDA HD1 GPCIO19
R250 B8 V3 FSEL0
HD2 GPCIO20 FSEL0
RAMDAT24 RP205A 1 8 56R FRAMDAT24 RESET* A8
RESET* HD3
RAMDAT7 RP205B 2 7 56R FRAMDAT7 5K6 +3V3D B9 B12
HD4 GPAIO0
RAMBA0 RP205C 3 6 56R FRAMBA0 0W125 A9
HD5
RAMBA1 RP205D 4 5 56R FRAMBA1 0805 B10 DGND
HD6
+3V3D DGND HDMI_RESET* A10
HDMI_RESET* HD7
CEC CEC B5
HA0
ATE can use test pad to put in debug boot mode
RAMADD10 RP206A 1 8 56R FRAMADD10 DDC_SCL A5 +3V3D
2 7 56R
DDC_SCL
B6
HA1 Fit Link to boot from DEBUG UART
RAMADD0 RP206B FRAMADD0 MUTE_RGB MUTE_RGB HA2
37
47
RAMADD1 RP206C 3 6 56R FRAMADD1 PROG/INT* A6

PROG/INT* HA3
RAMADD2 RP206D 4 5 56R FRAMADD2 PF200 FRAMADD5 25 C6 R235 R236 R230 R231
VCCQ
VCC
A0 HWR
PF201 FRAMADD6 24 D6 4K7 4K7
A1 NOTE: Pin B9 is set HIGH to indicate HRD
PF202 FRAMADD7 23 D7 0W125 0W125 1K0 1K0
A2 that this version of hardware HCS
RAMDAT16 RP207A 1 8 56R FRAMDAT16 PF203 FRAMADD8 22 features the HSYNC delay circuit C7 0805 0805 0W125 0W125
A3 HIRQ
RAMDAT17 RP207B 2 7 56R FRAMDAT17 PF204 FRAMADD9 21 29 FRAMDAT31 PF216 (see sheet 11) C5 C10 0805 0805
A4 DQ0 HACK BOOTSEL0 P279
RAMDAT18
RAMDAT19
RP207C
RP207D
3
4
6
5
56R
56R
FRAMDAT18
FRAMDAT19
PF205
PF206
FRAMADD11
FRAMDAT8
20
19
A5 DQ1
31
33
FRAMDAT29
FRAMDAT27
PF217
PF218
D8
C8
HCS1 BOOTSEL1
D10
D11 P278 BOOT SELECT
PF207 FRAMDAT9 18
A6
A7 IC205 DQ2
DQ3
35
38
FRAMDAT25
FRAMDAT23
PF219
PF220
D5
HIRQ1
HACK1
BOOTSEL2
D14
CON200
1
TR200
MMUN2211LT1 IC204B IC200E
DQ4 TESTMODE
RAMDAT20 RP208A 1 8 56R FRAMDAT20 PF208 FRAMDAT5 8
A8
FLASH DQ5
DQ6
40
42
FRAMDAT21
FRAMDAT19
PF221
PF222
DGND
C14
XO PLLSEL
D9 P276
2 SOT-23 24LC08BT/SN
SO-8
+3V3D 74HCT125D
SO-14
+5VD
RAMDAT21 RP208B 2 7 56R FRAMDAT21 PF209 FRAMDAT6 7 44 FRAMDAT17 PF223 CLK27M_VADDIS A14 J2 HARWIN 8 14
A9 DQ7 CLK27M_VADDIS GCLKP PLLCFGP P277 VCC VCC
RAMDAT22 RP208C 3 6 56R FRAMDAT22 PF210 FRAMDAT7 6 B15 J3 M20-973
A10 R219 GCLKA PLLCFGA
RAMDAT23 RP208D 4 5 56R FRAMDAT23 PF211 FRAMBA0 5 PWR_ON_RESET* B14 RESET C218 C219
GNDDAC-SB
A11
GNDDAC-D
GNDDAC-D
GNDDAC-D
4 30
CLOCKS
GNDDAC-P
PF212 FRAMBA1 A12 DQ8 FRAMDAT30 PF224
0R0
GNDADC
GNDP-A2
PF213 FRAMADD10 3 32 FRAMDAT28 PF225 R220 R221 R229 100N 100N
R206 A13 DQ9 0W125
RAMADD11 PR252 FRAMADD11 PF214 FRAMADD0 2 34 FRAMDAT26 PF226 0R0 0R0 4 16V 7 16V
GNDA
GNDA
GNDC
GNDC
GNDC
GNDC
GNDC
GNDC
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
GNDP
A14 DQ10 0805 GND GND
PF215 FRAMADD1 1 36 FRAMDAT24 PF227 0W125 0W125 1K0 0603 0603
56R A15 DQ11 NF P275
39 FRAMDAT22 PF239 Audio master clock (input) 0805 0805 0W125
0W125 0805 DQ12
41 FRAMDAT20 PF240 Can be configured as an output for testing NF NF 0805 DGND DGND
DQ13
T5
T6
T8
J9
K9
L9
M10
M11
M12
E8
C19
B19
B20
C20
R224
T10
T12
T13
V13
T14
U15
T16
L10
K11
K12
J11
J12
J10
K10
L11
L12
E14
L16
W12
Y10
A11
A12
H16
A15
D20
M9
M5
PF228 FRAMADD2 48 43 FRAMDAT18 PF241 MCLK_VADDIS ZR36750
A16 DQ14 MCLK_VADDIS
PF229 FRAMDAT10 17 45 FRAMDAT16 PF242 BGA-316 IC200D
R207 A17 DQ15 0R0
RAMDAT4 FLASHA19 PF230 FRAMDAT11 16 DGND 74HCT125D
A18 P274 AMCLK_OUT R223 0W125
PF231 FLASHA19 15 SO-14
56R A19 0805
PF232 FRAMDAT3 10 12 11
0W125 0805 A20 0R0 Design note: Some Vaddis GPIO
PF233 FLASHA21 9
A21 0W125 initialise as o/p high, some as o/p
DGND low.
13
R252 12 0805
PNVMR/B* PF243 NF(AMD) PWR_ON_RESET* RP MUTE must use one that initialises
+3V3D PF234 FRAMADD4 11 NF as o/p low. Currently on pin T2
56R R210 WE
PF235 14 DGND
0W125 0805 WP
56R 26
PF236 PNVMCE* CE
0W125 28
PF237 FRAMADD3 OE
0805 +3V3D +3V3D Decoupling caps on bottom of board
R208 R222
GND
GND
RAMDAT3 NF(32Mb+) FRAMDAT3 PF238 13

VPP
56R 0R0
27
46
0W125 0805 0W125 C253 C252 C223 C225 C227 C229 C231 C232 C233 C234 C235 C236 C237 C238 C239 C240 C249 C241 C243 C246 C247
TE28F160
0805 NF
L967SW
R253 100UF 100UF 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 1N0 1N0 1N0 1N0
RAMDAT4 NF(AMD 16Mb) FLASHA21 TSOP-48
10V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 50V 50V 50V 50V
56R DGND YXF YXF 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
0W125 0805
R209 DGND DGND
RAMDAT12 NF (Intel 64Mb)
+1V8D
56R +3V3D FLASH DECOUPLING +3V3D +1V8D Decoupling caps on bottom of board
0W125 0805
C220 C209 C211 C216 C263 C254 C221 C222 C224 C226 C228 C230 C201 C202
100N C242 C244 C245 C255
16V 100N 100N 100N 1N0 100UF 100N 100N 100N 100N 100N 100N 100N 100N
0603 16V 16V 16V 50V 10V 16V 16V 16V 16V 16V 16V 16V 16V 1N0 1N0 1N0 1N0
0603 0603 0603 0603 YXF 0603 0603 0603 0603 0603 0603 0603 0603 50V 50V 50V 50V
Use these resistors to configure for
Intel/AMD 8Mbit, 16Mbit, 32Mbit or DGND 0603 0603 0603 0603
64Mbit devices DGND On bottom of board DGND VADDIS DECOUPLING
Intel 32Mbit is used for DV79 DGND
DRAWING TITLE
To enable Vaddis PLL for testing:
Make PLLCFGA low
DV29 MAIN VADDIS V
Isolate AMCLK from GCLKA
Link GCLKA to GCLKP Filename: L971C2.sch
Connect AMCLK_OUT to AMCLK
AMCLK is now an output and the Vaddis PLL is
enabled Notes:

Waterbeach
CLOCK GENERATOR
AUDIO CLOCK BUFFER R302
P325 MCLK_DAC0
REG300
75R 0603
+5VD LM1086CS-3.3
+3V3
+3V3PLL CLOCK DIVIDER R303
Audio master clock frequency for different sample
rates
P326 MCLK_DAC1
C302 C342 C303 C306 C311 C308
75R 0603 Fs Master clock frequency
IC301A
100N TO-263 100N 100UF 100N 100N 100N 1 FSEL1..0
16V 16V 10V 16V 16V 16V OE R304 44.1kHz 11.2896MHz (256 x Fs) 00
18 P318 P327
0603 0603 YXF 0603 0603 0603 Y0 MCLK_DAC2 48kHz 12.288MHz (256 x Fs) 01
DGND 2 16 P319
A0 Y1 75R 0603 88.2kHz 22.5792MHz (256 x Fs) 10
+3V3D 4 14 P320
A1 Y2 96kHz 24.576MHz (256 x Fs) 11
DGND DGND P360 6 12
A2 Y3 R305 176.4kHz 22.5792MHz (128 x Fs) 10
P356 P350 8 P323
C300 MUTE* A3 MUTE_BUF* 192kHz 24.576MHz (128 x Fs) 11
1K8 0603
74LVC244APW Base resistor for TR401 here to reduce noise on MUTE_BUF*
10
27MHz IC306B P357 TSSOP-20
R300 R308 R309 R310
12
27P 12 9 9 8
5
P343 P349 P358 P301
SD
CLK27M_VADDIS D Q MCLK_VADDIS
100V IC301B
VDD1
VDD3
VDD2
X300 75R 0603 100R 0603 47R 0603 75R 0603
0805 P345 11 IC307C 19
CLK OE
10
P348 R323 74LVC125AD 3 P300
C301 27MHz Y0
7 3 8 SO-14 17 5
RD
HC49 XTI MO1 Q A0 Y1
8 IC300 4 P341 15 7
XTO MO2 100R 0603 A1 Y2
SM8707E 74LVC74AD 13 9
R301 A2 Y3
13
DGND 27P VSOP-16 9 P340 S0-14 11
P302 AO1 A3
100V 14 10 P321
FSEL0 FSEL AO2 100R 0603 R307
0805 P342 74LVC244APW P329
R322 MCLK_HDMI
13 P359 DGND TSSOP-20
SO1 R306 75R 0603
15 P344 12 11 Spare clock buffer used to buffer mute control
SO2 47R 0603
16 IC307D
NC 100R
P346 1 SO-14 74LVC125AD
0603 FSEL1
13
VSS1
VSS3
VSS2
4 P347
2
ENABLE_AV
Ensures audio clock can be trurned off in standby mode
2
6
11
IC303A
SN74AHC1G00DBVR
DGND DBV-5
PSU CLOCK DIVIDER
P352
I2S BUFFER P351
P311 1 RP301A 8 P314 +3V3D P353 +3V3D
ALRCLK_DAC0
100R 1206 IC305A
IC302A 4
I0
10
1 IC304A IC304B 3
4
OE I1
18 2 RP301B 7 P315 2 5 12 9 P354 2 PSUCLK SHOULD BE 44.1kHz OR 48kHz
SD
SD
P334 Y0 ALRCLK_DAC1 D Q D Q I2
DGND 2 16 P312 100R 1206 1
ALRCLK A0 Y1 I3 R311 Fs PSUFS1 PSUFS0 PSUCLK
4 14 P313 3 11 15 5 P355
A1 Y2 CLK CLK I4 Y PSUCLK 44.1kHz 0 0 44.1kHz
6 12 14
A2 Y3 I5 100R 0603
8 3 RP301C 6 P316 6 8 13 6 48kHz 0 0 48kHz
RD
RD
A3 ALRCLK_DAC2 Q Q I6 Y 88.2kHz 0 1 44.1kHz
100R 1206 12
I7 96kHz 0 1 48kHz
DGND 74LVC244APW +3V3D 74LVC74AD +3V3D 74LVC74AD
13
TSSOP-20 S0-14 S0-14 PSUFS0 11 176.4kHz 1 0 44.1kHz
S0 192kHz 1 0 48kHz
PSUFS1 10
S1 others 1 1 OFF
9
S2
P362 7
PSUFS0 E
PSUFS1 P363
74HC151D
DGND SO-16
P305 1 RP300A 8 P308
ABCLK_DAC0
IC302B 100R 1206
19
OE
3
Y0
P335 DGND 17 5 P306 2 RP300B 7 P309
ABCLK A0 Y1 ABCLK_DAC1
15 7 100R 1206
A1 Y2
13
11
A2 Y3
9 SPDIF COAX OUTPUT
A3 P307 3 RP300C 6 P310 IC308B
ABCLK_DAC2
74LVC244APW 100R 1206 P322 R315
TSSOP-20 5 6
P303 R313 P317 750R 0603
74LVC125AD +3V3D
4
ABCLK_HDMI
SO-14
56R
0W125 0805
DGND
D300
P366 1 RP302A 8 P372 IC308A IC308C BAT54S
100R 1206
ADAT_DAC0
R314 R316
SOT-23 DV79, DV75
P324 2 3 P328 P330 9 8 P331
SPDIF C315
IC309A
100R 0603 750R 0603
1 74LVC125AD 74LVC125AD
1
OE
10
18 SO-14 SO-14
Y0 RP302C 6
P361 2 16 P371 3 P374 DGND 100N 0805 50V
ADAT0 A0 Y1 ADAT_DAC1 R321
P364 4 14 100R 1206 DGND DGND
ADAT1 A1 Y2
6 12 SKT300
A2 Y3 75R 0603
8 IC308D KUNMING
A3 C343 GOLD
P332 R317 P333 P337 P304
DGND 74LVC244APW 12 11 1 TX301 5 SPDIF_OUT
TSSOP-20 SPDIF_OP
750R 0603
74LVC125AD
1
13
SO-14 R318 R319 C321 100N 50V L301
0805
SCRN
IC309B DGND 120R 1K0 47P 1000R @ 100MHz
4
19 0W125 0W125 100V 4 8 SPDIF_GND
OE R312 0805 0805 0805
3 P368 P376 DLW31S
ADAT2 P365 17
A0
Y0
Y1
5
100R 0603
ADAT_DAC2 OPTICAL OUT NF DGND PCB Mount SMT
P336
15
13
A1 Y2
7
9
+5VD DGND DV29 7A29398
A2 Y3 C322 C323
11
A3 TX300 C316 R320
2
74LVC244APW NF NF 100P 10N

VCC
JFJ1001-010010 C304
DGND TSSOP-20 C314 100N 0R0 100V 50V
1 50V 0W125 0805 0603
I/P 100N 100UF 0805 0805 NF
10V
GND
IC306A 50V EMC_GND

4
2 5 0805 YXF DGND

SD
D Q
3
3
CLK
6 DGND
RD
Q
74LVC74AD
1
S0-14
DGND
2 3 5 6
IC307A IC307B
1
74LVC125AD 74LVC125AD +3V3D

SO-14 SO-14
C325 C326 C327 C328 C329 C330 C331 C332 C333 C334 C335 C336 C337 C338 C339 C340 C341
DGND
100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
DGND
+3V3D
IC307E IC301C IC302C IC309C IC304C IC305B IC308E IC306C

14 20 20 20 14 16 5 14 14
VCC VCC VCC VCC VCC VCC VCC VCC VCC
C305 C307 C317 C309 C310 C318 C312 C313 C319 C320 C324
ITEM300 1 E828AP Pad Damping 7.5x6x3MM Rubber Fit on one side of X300 (see assembly drawing)
100UF 100UF 100N 100N 100N 100N 100N 100N 100N 100N 100N
10V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V DRAWING TITLE
7 10 10 10 7 8 3 7 7
YXF YXF GND 0603 GND 0603 GND 0603 GND 0603 GND 0603 GND 0603 GND 0603 GND 0603 GND 0603 DV29 MAIN CLOCKS & SPDIF
74LVC125AD 74LVC244APW 74LVC244APW 74LVC244APW 74LVC74AD 74HC151D IC303B 74LVC125AD 74LVC74AD
SO-14 TSSOP-20 TSSOP-20 TSSOP-20 S0-14 SO-16 SN74AHC1G00DBVR SO-14 S0-14
DBV-5 Filename: L971C3.Sch
Notes:
DGND
Waterbeach
+12VA
Audio outputs are inverted so as to be compatible with
DV88. This is compenstaed for in software by setting a
OUTPUT BUFFER
Gain of -2.2 for HDCD, otherwise -1.1
register in the DAC to invert the signal Cheapo version could have bipolar op-amp, but without feedback round coupling cap D400
R420 BAT54S
SOT-23
11K
0W125
0805
FILTER
2nd order Bessel filter, Av=1 -12VA
P408 R400 R408 C434 R422
33P 1M0
C424 C426 R402 680R C430 100V 0W125
3K3 IC400B
2N2 3K3 0W125 680P 0805 0805
0W125 5 IC401B
47P 100V 0W125 0805 100V P414 R413 P423 C436
0805 7 6
100V FKP2 0805 FKP2 P424 R424 R425 P427 R428
6 7 LEFT_OUT
0805 10K
OPA2134UA 5
0W125 47R 47R 0R0 0W125
SO-8 OPA2134UA 100UF
0805 0W125 0W125 0805
+5VA DGND DGND SO-8 16V
C431 0805 0805
R401 R409 IC402B NONP
P409
C400 C406 C407 C408 DG413DY
C427 680R SO-16
3K3 680P
10UF 100N 100N 100N 2N2 0W125 R412 P422 7 R414
0W125 100V 6
35V 50V 50V 50V 100V 0805 47K
0805 FKP2
SGET 0805 0805 0805 FKP2 10K 0W125
R403 0W125 0805
0805
8
DGND DGND
3K3
DGND
0W125
0805
+3V3A +3V3_DAC0
L400 P431
GAIN_SCALING
GAIN_SCALING RLY400A
120R@100MHz C402 C414 1=HDCD gain, 0=normal R415
10K
10UF 100N DAC 0W125 DGND
R434
SCART_LEFT
35V 50V 0805 NEC
SGET 0805 1K0
EB2-5NU
0W125
DGND
0805
DGND
+5VD
LEFT
15
20
IC403
8
D404 RLY400C RLY500C RLY600C

AVDDR
DVDD
AVDD
AVDDL
NEC NEC NEC

BAS16 EB2-5NU EB2-5NU EB2-5NU SKT400
ALRCLK_DAC0 1 17 SOT-323 KUNMING GOLD
ALRCLK_DAC0 LRCKIN VOUTL+
ADAT_DAC0 2
ADAT_DAC0 DIN
ABCLK_DAC0 3 16
ABCLK_DAC0 BCKIN VOUTL-
MCLK_DAC0
MCLK_DAC0 5
SCLK
MUTING P437
12
VOUTR+
13 Base resistor on sheet 3 D401
VOUTR- BAT54S C438 C418 C439 C419
MD P400 26 TR401
MD MD/DM0 SOT-23
MC P401 27 MUTE_BUF*
MC MC/DM1 MUTE_BUF*
SCRN
ML_8740_0 P438 28 18 FMMT497 100P 100P 100P 100P
ML_8740_0 ML/I2S VMIDL 100V 100V 100V 100V
SOT-23
+3V3_DAC0 23 11 0805 0805 0805 0805
CSBIOW VMIDR P436
24
MODE R429 R431
4 DGND OUT_GND2 OUT_GND1
MODE8X R436
6
DIFFHW 0R0 C440 C444 0R0
25 DGND DGND
MUTEB C403 C415 C412 C404 C416 C413 100R 0805 1N0 1N0 0805
TR400
P435 0W125 100V 100V
RESET* P402 22 AC_PRES*
RESET* RSTB 10UF 100N 100N 10UF 100N 100N AC_PRES* 0805 0805 0805
21 BC849B
ZERO 35V 50V 100V 35V 50V 100V Base resistor on PSU SOT-23
SGET 0805 MKS2 SGET 0805 MKS2 C441 EMC_GND
RIGHT
AGNDR
AGNDL
DGND
DGND
AGND
DGND DGND
1N0
XWM8740EDS 100V
7
14
19
10
SSOP-28 0805
C442
DGND
+3V3_DAC0
R416
1N0
10K 100V
0W125 0805
0805 C443
NF
CON400
1
2 DGND 1N0 EMC_GND +12VA
100V
+12VA 0805
HARWIN
M20-973 D403
DGND NF C401 C409
R421 BAT54S
Useful for drop-out test 10UF 100N SOT-23
35V 50V 11K
+12VA
1
SGET 0805 0W125
R417 P428 2 0805
3
DGND C410
10K 100N
2nd order Bessel filter, Av=1 IC402A -12VA
0W125 50V
DG413DY
P415 R404 P417 R410 0805 0805 C435 R423
SO-16
33P 1M0
C425 C428 R406 680R C432 100V 0W125 P434
3K3 IC400A DGND
2N2 3K3 0W125 680P 0805 0805
0W125 3 IC401A
8
47P 100V 0W125 0805 100V P421 R418 P429 C437

0805 1 2
8
100V FKP2 0805 FKP2 P430 R426 R427 R430
2 1 RIGHT_OUT
0805 10K
OPA2134UA 3
0W125 47R 47R 0R0 0W125
4

0805 0W125 0W125 0805
4
DGND DGND SO-8 16V
C433 0805 0805
R405 R411 NONP
P416
C429 680R C411 R419

3K3 680P DGND
2N2 0W125 100N 47K
0W125 100V
100V 0805 50V 0W125
0805 FKP2
FKP2 0805 0805
R407
+12VA IC402E
13 DGND -12VA DGND
V+ 3K3
+5VA
C421 0W125
12
100N VL 0805 RLY400B
50V C423
0805 100N
50V IC402C IC402D DGND
0805 C405 C417 R435
5 DG413DY DG413DY DGND NEC
GND SCART_RIGHT
SO-16 SO-16 EB2-5NU
C422 10UF 100N 1K0
DGND 11 10 15 14
100N 35V 50V 0W125
50V SGET 0805 0805
0805 4
9
V-
16
-12VA DG413DY -12VA

SO-16 DGND
ITEM400 1 E828AP Pad Damping 7.5x6x3MM Rubber Fit on top of RLY400
DRAWING TITLE
DV29 MAIN DAC L & R AUDIO
Filename: L971C4.Sch
Notes:

Waterbeach
DV88. This is compenstaed for in software by setting a ALL PARTS ON THIS SHEET ARE NOT FITTED FOR DV75 +12VA
register in the DAC to invert the signal OUTPUT BUFFER
Gain of -1.1
Cheapo version could have bipolar op-amp, but without feedback round coupling cap D500
BAT54S
R516 SOT-23
11K
0W125
0805
FILTER
P507 R500 R508 C530 R518
33P 1M0 P518
C520 C522 R502 680R C526 100V 0W125
3K3 IC500B
2N2 3K3 0W125 680P 0805 0805
0W125 5 IC501B
47P 100V 0W125 0805 100V P513 R512 P514 C532
0805 7 6
100V FKP2 0805 FKP2 P515 R520 R521 R524
6 7 LS_OUT
0805 10K
OPA2134UA 5
0W125 47R 47R 0R0
0805 0W125 0W125 0805
C527 0805 0805
R501 R509 NONP
P508
C500 C506 C507 C508
C523 680R
3K3 680P
10UF 100N 100N 100N 2N2 0W125 R513
0W125 100V
35V 50V 50V 50V 100V 0805 47K
0805 FKP2
SGET 0805 0805 0805 FKP2 0W125
R503 0805
DGND DGND
3K3
DGND
0W125
0805
+3V3A +3V3_DAC1
L500
RLY500B
120R@100MHz C502 C514
10UF 100N DAC DGND

35V 50V NEC
SGET 0805 EB2-5NU
DGND
15
20
IC502
8
9
AVDDR
DVDD
AVDD
AVDDL
ALRCLK_DAC1 1 17
ADAT_DAC1 2
ADAT_DAC1 DIN
ABCLK_DAC1
ABCLK_DAC1 3
BCKIN VOUTL-
16
CENTRE SKT500
LEFT SURR
MCLK_DAC1 5 KUNMING GOLD
MCLK_DAC1 SCLK
12 CENTRE_OUT
VOUTR+ CENTRE_OUT
13
MD
MD 26
MD/DM0
VOUTR- From sheet 6 RIGHT SURR
MC 27 SUB_OUT
MC MC/DM1 SUB_OUT
ML_8740_1 P531 28 18
ML_8740_1 ML/I2S VMIDL C519
+3V3_DAC1 23
24
CSBIOW VMIDR
11 SUB C534
470P
C535
470P
C518
470P
470P 100V
0805
MODE
SCRN
4 0805 100V 100V 100V
MODE8X R525 0805 0805 R527
6 OUT_GND4 OUT_GND3
DIFFHW
25
MUTEB C503 C515 C512 C504 C516 C513 0R0 C536 C537 0R0
DGND DGND
0805 1N0 1N0 0805
RESET* 22
RESET* RSTB 10UF 100N 100N 10UF 100N 100N 100V 100V
21
ZERO 35V 50V 100V 35V 50V 100V 0805 0805
SGET 0805 MKS2 SGET 0805 MKS2
AGNDR
AGNDL
DGND EMC_GND
DGND
AGND
DGND
7
14
19
10
XWM8740EDS
SSOP-28
DGND
+12VA
+12VA
C501 C509 D501

R517 BAT54S
10UF 100N SOT-23
35V 50V 11K
+12VA
SGET 0805 0W125
0805
DGND C510
2nd order Bessel filter, Av=1 100N -12VA
50V
P520 R504 P521 R510 0805 C531 R519
33P 1M0 P530
C521 C524 R506 680R C528 100V 0W125
3K3 IC500A DGND
2N2 3K3 0W125 680P 0805 0805
0W125 3 IC501A
8
47P 100V 0W125 0805 100V P525 R514 P526 C533

0805 1 2
8
100V FKP2 0805 FKP2 P527 R522 R523 R526
2 1 RS_OUT
0805 10K
OPA2134UA 3
0W125 47R 47R 0R0 0W125
4

0805 0W125 0W125 0805
4
DGND DGND SO-8 16V
C529 0805 0805
R505 R511 NONP
P519
C525 680R C511 R515

3K3 680P DGND
2N2 0W125 100N 47K
0W125 100V
100V 0805 50V 0W125
0805 FKP2
FKP2 0805 0805
R507
DGND -12VA DGND
3K3
0W125
0805 RLY500A
DGND
DGND C505 C517 NEC
EB2-5NU
10UF 100N
35V 50V
SGET 0805
-12VA
DRAWING TITLE
DV29 MAIN DAC LS & RS AUDIO
Notes:

Waterbeach
+12VA
DV88. This is compenstaed for in software by setting a
register in the DAC to invert the signal
OUTPUT BUFFER
ALL PARTS ON THIS SHEET ARE NOT FITTED FOR DV75 Gain of -1.1
Cheapo version could have bipolar op-amp, but without feedback round coupling cap D600
R616 BAT54S
SOT-23
11K
0W125
0805
FILTER
P607 R600 R608 C630 R618
33P 1M0 P618
C620 C622 R602 680R C626 100V 0W125
3K3 IC600B
2N2 3K3 0W125 680P 0805 0805
0W125 5 IC601B
47P 100V 0W125 0805 100V P613 R612 P614 C632
0805 7 6 Connector on sheet 5
100V FKP2 0805 FKP2 P615 R620 R621 R624
6 7
0805 10K CENTRE_OUT
OPA2134UA 5
0W125 47R 47R 0R0 0W125
0805 0W125 0W125 0805
C627 0805 0805
R601 R609 NONP
P608
C600 C606 C607 C608
C623 680R
3K3 680P
10UF 100N 100N 100N 2N2 0W125 R613
0W125 100V
35V 50V 50V 50V 100V 0805 47K
0805 FKP2
SGET 0805 0805 0805 FKP2 0W125
R603 0805
DGND DGND
3K3
DGND
0W125
0805
+3V3A +3V3_DAC2
L600
RLY600B
120R@100MHz C602 C614
10UF 100N DAC DGND

35V 50V NEC
SGET 0805 EB2-5NU
DGND
15
20
IC602
8
9
AVDDR
DVDD
AVDD
AVDDL
ALRCLK_DAC2 1 17
ADAT_DAC2 2
ADAT_DAC2 DIN
ABCLK_DAC2 3 16
ABCLK_DAC2 BCKIN VOUTL-
MCLK_DAC2 5
MCLK_DAC2 SCLK
12
VOUTR+
13
VOUTR-
MD 26
MD MD/DM0
MC 27
MC MC/DM1
ML_8740_2 P631 28 18
ML_8740_2 ML/I2S VMIDL
+3V3_DAC2 23 11
CSBIOW VMIDR
24
MODE
4
MODE8X
6
DIFFHW
25
MUTEB C603 C615 C612 C604 C616 C613
RESET* 22
RESET* RSTB 10UF 100N 100N 10UF 100N 100N
21
ZERO 35V 50V 100V 35V 50V 100V
SGET 0805 MKS2 SGET 0805 MKS2
AGNDR
AGNDL
DGND
DGND
AGND
DGND
7
14
19
10
XWM8740EDS
SSOP-28
DGND
+12VA
+12VA
D601
C601 C609
R617 BAT54S
10UF 100N SOT-23
35V 50V 11K
+12VA
SGET 0805 0W125
0805
DGND C610
2nd order Bessel filter, Av=1 100N -12VA
50V
P620 R604 R610 0805 C631 R619
33P 1M0 P630
C621 C624 R606 680R C628 100V 0W125
3K3 IC600A DGND
2N2 3K3 0W125 680P 0805 0805
0W125 3 IC601A Connector on sheet 5
8
47P 100V 0W125 0805 100V P625 R614 P626 C633

0805 1 2
8
100V FKP2 0805 FKP2 P627 R622 R623 R626
2 1
0805 10K SUB_OUT
OPA2134UA 3
0W125 47R 47R 0R0 0W125
4

0805 0W125 0W125 0805
4
DGND DGND SO-8 16V
C629 0805 0805
R605 R611 NONP
P619
C625 680R C611 R615

3K3 680P DGND
2N2 0W125 100N 47K
0W125 100V
100V 0805 50V 0W125
0805 FKP2
FKP2 0805 0805
R607
DGND -12VA DGND
3K3
0W125
0805 RLY600A
DGND
DGND C605 C617 NEC
EB2-5NU
10UF 100N
35V 50V
SGET 0805
-12VA
DRAWING TITLE
DV29 MAIN DAC CENTRE & SUB
Notes:

Waterbeach
SCART_RIGHT
AUDIO
SCART_LEFT
C800 C801
47P 47P
100V 100V
0805 0805 R800
0R0
DGND
0W125
0805
SCART_BLUE
VIDEO SCART_GREEN
SCART_RED
SCART_COMPOSITE
SCART OUTPUT
C802 C803 C804 C805
47P 47P 47P 47P
100V 100V 100V 100V
0805 0805 0805 0805 SKT800
SCART_RIGHT1
DGND 2
SCART_LEFT 3
SCART_AGND 4
5
6
SCART_BLUE 7
0/6/12 8
9
SCART control signals 10
SCART_GREEN 11
ENABLE_AV: 0 in when standby mode, 1 when on 12
(3V3 levels) 13
(RGB_STAT is supposed to be >1V when driving 75R) 14
SCART_RED 15
16/9: 0 when 4:3 output, 1 when 16:9 output (3V3 RGB_STAT 16
levels) 17
18
0/6/12: 0V in standby, 6V when output is 16:9, 12V +12VD SCART_COMPOSITE 19
when output is 4:3 20
21
TR800
P812
MMUN2111LT1 CHARM
+5V_VID SOT-23 CW
R801
C813 R803
1K0 P816 +12VD
0W125 10N 100R
0805 TR801 50V 0W125
P811 D800 0603 0805
ENABLE_AV R807 C811
MMUN2211LT1
SOT-23 4K7 BAT54S
0W125 SOT-23
0805 1N0 100V 0805
DGND
C812
TR803
P815
CONTROL BC849B
DGND
1N0 100V 0805
SOT-23
R806 P817 R809 P818 R810

0/6/12
6K8 DGND EMC_GND
0W125 330R 330R
0805 R808 0W125 0W125 C806
10K 0805 0805
P814
0W125 100N
TR802 0805 50V
P810 0805
16/9
MMUN2211LT1 DGND
SOT-23
+5V_VID
DGND
D801
+5V_VID BAT54S
SOT-23
TR804
BC849B
SOT-23 DGND
P819 R812
RGB_STAT
R811 82R C807

1K0 0W125
0W125 0805 100N
0805 50V
0805
DGND DGND
DRAWING TITLE
DV29 MAIN SCART OUTPUT
Notes:

Waterbeach
DGND
M3 R/A PCB FIXING BRACKETS SH1000
ITEM1002 ITEM1003
C1008 1 ITEM1004 ITEM1005
DISPLAY BOARD SUPPLIES 4 1 4 1
100N 4 1 4 1
50V
0805
L1006
-19V P1024 L1009 P1007
3 2
3 2 EMC CAN 3 2
3 2
NF NOT FITTED NF
120R@100MHz 120R@100MHz -19V_OUT EMC Shield
DGND
C1006 P1034
100N EMC_GND
Place these near power input 50V FIX1009 FIX1010 FIX1000 FIX1001 FIX1004 FIX1006
0805
P1001 L1004 P1022 L1007 P1005
-9V 1 P1010 1 1 P1031 1 1 1
120R@100MHz 120R@100MHz -9V_OUT C1042 C1043 C1022 C1024 C1026 C1028
1N0 1N0 1N0 1N0 1N0 1N0

Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V
DGND 0603 0603 0603 0603 0603 0603
NF
DGND DGND DGND DGND DGND DGND
C1007
FIX1011 FIX1002 FIX1005 FIX1007 FIX1008
100N
50V 1 P1013 1 P1032 1 P1035 1 P1036 1 P1037
0805 To display board
P1012 L1005 P1023 L1008 P1006 C1013 C1023 C1027 C1029 C1032
-13V5
120R@100MHz 120R@100MHz -13V5_OUT 1N0 1N0 1N0 1N0 1N0

Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V Dia 3.5mm 50V
0603 0603 0603 0603 0603
NF NF
DGND DGND DGND DGND DGND
VADDIS +1.8V REGULATOR

TOOL1000 TOOL1001 TOOL1002 TOOL1003
4mm tooling holes
D1000
POWER IN
S1D
Fiducials
DO-214AC (SMA)
FD1000 FD1001 FD1002 FD1003
CON1001
1 -19V_IN
2 -9V_IN REG1003
3 -13V5_IN LM1086CS-ADJ
4 +3V3D TO-263 +1V8D
L1001 P1003 P1004
5 +3V3D_IN
6
70R@100MHz C1001 C1011
7
ADJ
8 C1002 R1000
9
10
100N
50V
100UF
25V 100N 120R
C1012
AUX PSU DV29 ONLY
11 0805 YK 50V 0W125 100UF
For DACs 0805 P1009 0805 25V C1045
12
YK FS1000
13 DGND L1011 +3V3A ACIN1
14 P1025
R1006 T750mA
15 1N0 DBR1000
33U C1018 R452 C1016
16 100V +15V5
17 Spare 1.17A 56R 0805
18 Spare 8RHT2 100UF 0W125 100N
19 +5VD_IN 10V 0805 50V
20 YXF C1050 0805
21 DGND ACIN2 W02G C1048 C1046
22 DGND 3300UF
23 FIX1003 470N
1N0 35V
24 100V 100V
3
CON1002 YK
25 PSUCLK 1 P1033 0805 MKS2
PSUCLK
26
27 AC_PRES* C1025 MOLEX SP1000
AC_PRES* 44472
28
29 +12VD_IN +5VD +5V_DISPLAY 1N0
L1000 L1010 Dia 3.5mm
1
30 +15V5_IN P1000 P1002 P1008 50V C1051 ACIN3
31 0603
70R@100MHz C1000 C1010
32 -15V5_IN DBR1001 DGND
120R@100MHz C1009 C1044
DGND 1N0
100N 100UF 100V 100N
MOLEX 50V 25V 100N 0805 50V C1049 C1047
52045 P1018 0805 YK 50V 0805 470N
W02G 3300UF
DGND DGND 0805 C1052 35V 100V
FS1001 MKS2
DGND ACIN4 YK
+12VD DGND
L1012 P1021 T750mA P1011
1N0 R452
100V
120R@100MHz C1030 C1031 0805 -15V5
100N 100UF
50V 25V
0805 YK
DGND
AUDIO DAC SUPPLY
HEATSINK ONLY FITTED ON
D1001 D1003
DV29
S1D S1D
DO-214AC (SMA) AUDIO SUPPLY REGULATORS DO-214AC (SMA)
FIT FOR DV79/75
REG1001
NF FOR DV29 REG1000 LM317T TO-220
+15V5 L1013 LM317T TO-220 +12VA +15V5 L1014 +5VA
L1002 R1008
70R@100MHz 33U 33U 22R

ADJ
ADJ
1.17A C1039 C1003 D1002 R1001 C1019 C1036 1.17A 0W25 C1040 C1004 D1004 R1002 C1020 C1037
Audio power rails come 8RHT2 8RHT2 MF
from AUX PSU for DV29 100UF 100N S1D 390R 220UF 100N 100UF 100N HS1000A S1D 330R 470UF 100N
50V 50V DO-214AC (SMA) 0W125 16V 100V 50V 50V 6043PB DO-214AC (SMA) 0W125 25V 100V
YXF 0805 0805 YXF MKS2 YXF 0805 23C/W 0805 YXF MKS2
R1009
10K C1014 C1033 R1004 C1015 C1034 R1007

0W125
0805 100UF 100N 3K3 100UF 100N 1K0
25V 100V 0W125 25V 100V 0W125
YK MKS2 0805 YK MKS2 0805
P1019
DGND DGND
Dummy loads to
stabilise switch C1017 C1035 R1005 Keep large footprint for C1020 C POL/RB12.5X25/5
mode PSU R1010 100N
when rails are 10K 100UF 100V 3K3
not used 0W125 25V MKS2 0W125
0805 C1041 C1005 YK 0805
100UF C1021
FIT FOR DV79/75 50V
100N
50V
D1006 R1003 C1038
NF FOR DV29 YXF 0805 S1D 390R 220UF 100N

ADJ
L1015 DO-214AC (SMA) 0W125 16V 100V

L1003 0805 YXF MKS2
70R@100MHz 33U
-15V5 REG1002 -12VA
1.17A LM337T
8RHT2 DRAWING TITLE
TO-220 Have made C1019 & C1021 footprints 12.5mm dia for flexibility
DV29 MAIN Power
Have made C1039, C1040 & C1041 12.5mm dia for flexibility D1005
Notes:
S1D
DO-214AC (SMA)
Waterbeach
REG1100
LM1086CS-3.3
+5VD TO-263
L1101
+3V3_HDMI 3V3_PVCC2
+3V3
C1100 C1116 120R@100MHz
C1101 C1117 C1104 C1122
100N 10UF
16V 50V 100N 100UF 100N 1N0
0603 YK 16V 10V 16V 50V
0603 YXF 0603 0603
DGND
DGND
+3V3D
L1100 L1102
3V3_PVCC1
120R@100MHz
120R@100MHz C1102 C1118 C1105 C1123
NF
Option to bypass reg 100N 100UF 100N 1N0
16V 10V 16V 50V
0603 YXF 0603 0603
DGND
+3V3D
L1103
3V3_AVCC
120R@100MHz
C1103 C1119 C1106 C1107
100N 100UF 100N 100N

16V 10V 16V 16V
0603 YXF 0603 0603
REG1102
BOTTOM BOTTOM
LM1086CS-ADJ DGND
+3V3D TO-263
VIDEO BUSES +1V8_HDMI
1. Progressive Mode: 10 Bit Y/C on 20 bit wide bus +3V3D
Vaddis V Output Function SiI9190 Input C1143 R1100 C1139 C1140 C1141 C1124 C1125
ADJ
Some decoupling
VIDP19..12 Y9..2 D15..8 100N 120R C1142 caps are on 100N 100N 100N 1N0 1N0 C1108 C1109 C1110 C1120
VIDP11..10 Y1..0 D3..2 50V 0W125 bottom of PCB 16V 16V 16V 50V 50V
VIDP9..2 C9..2 D23..16 0805 P1134 0805 100UF 0603 0603 0603 0603 0603 100N 100N 100N 100UF C1126
VIDP1..0 C1..0 D7..6 10V BOTTOM 16V 16V 16V 10V
R1101 YXF BOTTOM BOTTOM BOTTOM 0603 0603 0603 YXF
DGND
(C = multiplexed CbCr data) 56R +3V3D DGND 1N0 C1129 EMC_GND
BOTTOM BOTTOM
16
45
59
74
28
34
23
38
13
48
71
0W125 IC1102 DGND 50V R1117
4
2. Interlaced Mode: 8 Bit multiplexed YCbCr 0805 10N 100R
0603
PVCC1
PVCC2
AVCC
AVCC
IOVCC
IOVCC
IOVCC
CVCC18
CVCC18
CVCC18
CVCC18
CVCC18
Vaddis V Output Function SiI9190 Input R1105 50V
DGND P1133 0603 0603
VIDP7..0 YC7..0 D15..8 10K HDMI_RESET* 42 24 P1101 R1108 3V3_AVCC
0W125 HDMI_RESET* RESET# EXT_SWING
470R 0603
20
21
0805 P1132 9190_INT* 17
9190_INT* INT
36 TX2+ 1 SKT1100
SCREEN
SCREEN
TX2+
35 2
TX2-
41 TX2- 3 MOLEX
CI2CA
SCL 43 TX1+ 4 500254
SCL CSCL
DGND SDA 44 33 5
SDA CSDA TX1+
VIDP[0..19] 32 TX1- 6
VIDP[0..19] TX1-
VIDP9 49 TX0+ 7
D23
VIDP8 50 8
D22
VIDP7 51 30 TX0- 9
D21 TX0+
VIDP6 52 29 TXC+ 10
D20 TX0-
VIDP5 53 11
D19
1=Prog scan, 0=Interlaced IC1100A VIDP4 54 TXC- 12
P1130 D18
PROG/INT* 1 VIDP3 55 27 CEC_OUT 13
PROG/INT*
VIDP7 2
OE
Y0
18
16
P1114 RP1100A 1
RP1100B 2
8
7
100R
100R
HD15
HD14
P1118 VIDP2
HD15
56
57
D17
D16 HDMI TX TXC+
TXC-
26
DDC_SCL_OUT
14
15
A0 Y1 P1115 P1119 D15
VIDP6 4 14 P1116 RP1100C 3 6 100R HD13 P1120 HD14 58 DDC_SDA_OUT 16
A1 Y2 100R D14 P1100
+3V3D VIDP5 6 12 P1117 RP1100D 4 5 HD12 P1121 HD13 61
SII9030 18 +3V3D 17
SCREEN
SCREEN
A2 Y3 D13 HPD
VIDP4 8 HD12 62 +5V_HDMI 18
A3 D12 P1104
HD11 63 HPDIN 19
R1114 D11 TQFP-80 R1106 R1107
74LVC244APW HD10 64 20
10K D10 DSCL
TSSOP-20 HD9 65 19 HOTPLUG buffer
D9 DSDA
22
23
0805 IC1100B HD8 67 10K 10K
P1131 D8 P1102
19 VIDP1 68 HPD 0W125 0W125 DGND
OE D7 0805 TR1100 0805 TR1101
3 VIDP0 69
Y0 D6 C1130
TR1102 VIDP19 17 5 70
A0 Y1 D5 P1103 R1109
MMUN2211LT1 VIDP18 15 7 75
A1 Y2 D4 C1128 10N
SOT-23 VIDP17 13 9 VIDP11 76
VIDP16 11
A2 Y3
VIDP10 77
D3 DZ1100 1K0 C1127 50V
A3 D2 0W125 0603
78 MMUN2211LT1 MMUN2211LT1
74LVC244APW 79
D1
SOT-23 SOT-23 BZX84C 0805 1N0 DGND 1N0
D0 5V6 50V
DGND TSSOP-20 DGND 50V EMC_GND
IC1101A 80 SOT-23 0603 0603
DE
1 VSYNC* 2
OE 100R VSYNC* VSYNC
18 P1122 RP1101A 1 8 HD11 P1126 HSYNCD* 1 DGND
Y0 100R HSYNC Cable screen capacitively
VIDP3 2 16 P1123 RP1101B 2 7 HD10 P1127 +3V3D
A0 Y1 100R coupled to chassis to avoid
VIDP2 4 14 P1124 RP1101C 3 6 HD9 P1128 CLK27M_VID 66 +5VD
A1 Y2 100R CLK27M_VID IDCK P1136 connecting 0V to chassis via
VIDP1 6 12 P1125 RP1101D 4 5 HD8 P1129
A2 Y3 D1102 R1115 external equipment
VIDP0 8 MCLK_HDMI 6
A3 MCLK_HDMI MCLK R1102 R1103 27K
SPDIF 5
SPDIF SPDIF 0W063
74LVC244APW ABCLK_HDMI 12
TSSOP-20
ABCLK_HDMI
ALRCLK 11
SCK 2K2 2K2 0603 P1105 R1116 P1107 L1106 P1109
ALRCLK WS 0W063 0W063
IC1101B ADAT0 10
ADAT0 SD0 0603 0603 C1113 100R
19 ADAT1 9 120R@100MHz
OE ADAT1 SD1 0W063
3 ADAT2 8
Y0 ADAT2 SD2 P1135 27P 0603
VIDP15 17 5 7 BAT54S
A0 Y1 SD3 100V
VIDP14 15 7 SOT-23
A1 Y2 0805
VIDP13 13 9 To Vaddis DGND
A2 Y3
VIDP12 11 21 DGND
A3 RSVDL CEC
PGND1
PGND2
IOGND
IOGND
IOGND
74LVC244APW +5VD
AGND
AGND
AGND
CGND
CGND
CGND
CGND
CGND
EPAD
TSSOP-20 DGND
D1100 R1110
3
15
46
60
73
25
31
37
22
39
14
47
72
1K8
0603
P1106 R1112 P1108 L1104 P1110
C1131 100R
DGND 120R@100MHz
P1140 0W063
NF
27P 0603
BAT54S
+3V3D IC1103A IC1104A SOT-23 100V
P1137 R1104 0805
1 3 2 4 To Vaddis DGND
DSA Q0 1I0 1Y HSYNCD*
HSYNC* 2 4 3 P1139 75R 0603 DGND
HSYNC* DSB Q1 1I1 DDC_SCL
5 P1138
Q2
6 5 7 +5VD
Q3 2I0 2Y
10 6
Q4 2I1
CLK27M_VID 8 11
CP Q5 D1101 R1111
+3V3D 12 11 9
Q6 3I0 3Y 1K8
+3V3D 9 13 10
MR Q7 3I1 0603
74LV164D 14 12 P1111 R1113 P1112L1105 P1113
C1134 C1135 C1136 C1137 C1138 4I0 4Y
S0-14 13
4I1 C1132 100R
120R@100MHz
100N 100N 100N 100N 100N 0W063
PROG/INT* 1 NF
16V 16V 16V 16V 16V S 27P 0603
15 BAT54S REG1101
0603 0603 0603 0603 0603 EN 100V
SOT-23 L78L05ACD
74LVC157AD To Vaddis DGND 0805 +12VD SO-8 HDMI +5V Power Signal
Around video bus
DGND DGND S0-16 DGND 8 1
DDC_SDA +5
C1114 C1115 C1133
+3V3D HSYNC DELAY CIRCUIT
delays HSYNC* by 4 clocks in 100N 100N 100UF
2
3
6
7
progressive mode and 8 clocks in 16V 16V 25V
IC1100C IC1101C IC1103B IC1104B interlaced mode. This is to ensure 0603 0603 YK
20 20 14 16 HSYNC and VSYNC falling edges
VCC VCC VCC VCC are coincident as required by HDMI DGND
C1121 C1111 C1112 C1144 C1145 specification
100UF 100N 100N 100N 100N

10V 10 16V 10 16V 7 16V 8 16V
YXF GND 0603 GND 0603 GND 0603 GND 0603 DRAWING TITLE
74LVC244APW 74LVC244APW 74LV164D 74LVC157AD DV29 HDMI
TSSOP-20 TSSOP-20 S0-14 S0-16
DGND
Notes:

Waterbeach
ON SNAP-OFF PCB
+5VDA THESE PARTS NOT FITTED FOR DV75 FIX900 FIX901
1 1
C911 C902
100UF 100N
25V 50V
YK 0805 Dia 3.5mm Dia 3.5mm
DGNDA C921 1N0 EMC_GNDA

P907
C903 100N 50V +5VDA 100V 0805
16
C900 IC900 0805
+5VDA 100N 1 C922 1N0
RS232
VCC
50V C1+ P911
2
P903 0805 P905 V+
3 CON900
C1- C904 100N 50V DGNDA 100V 0805 EMC_GNDA
P908 4 6 P912 0805
R901 C901 C2+ V-
1
REMOTE IN 4K7 NF 100N P909 5
C2-
DGNDA 6
0W125 50V L902 120R@100MHz RX 2
UN-MODULATED RC5 0805 0805 STATIC PROTECTED 7
IRRCVA P904 TX_TTL P91011 14 P913 L903 120R@100MHz TX 3
T1IN T1OUT
8
SKT900 L900 TR900 10 7 +5VDA 4
P900 R900 P902 T2IN T2OUT L904
REM_IN1 120R@100MHz STATUS_OUT 9
MMUN2211LT1 RX_TTL P906 12 13 P914 232_GND 5
120R@100MHz 1K0 0W125 DZ900 R1OUT R1IN D900
KUNMING SOT-23 +5VDA
0805 R924 L905
GOLD 9 8 120R@100MHz
BZX84C 10K R2OUT R2IN BAT54S
L901 C912 C913
SCRN
REM_GND1 P901 5V6 DGNDA 0805 SOT-23 DGNDA C923 C924
GND
SOT-23 MCMURDO
120R@100MHz
C914 DGNDA 47P 47P 1N0 1N0 SD
C925 DGNDA 100V 100V 100V 100V
15
R904 MAX202ECSE +5VDA +5VDA 0805 0805 0805 0805
1N0 47P SO-16 DGNDA
47R DGNDA BUFFER
100V 100V
0W125 R902 R903 EMC_GNDA M3 R/A PCB FIXING BRACKETS
0805 0805 P921
0805 4K7 4K7
P915 0W125 0W125
P916 0805 0805
4
P920 R905
EMC_GNDA DGNDA P922 ITEM900
TR901 TR902
P919 47R
SKT901 ENABLE_AV_A
L906 P917 0W125
REMOTE_BUS 120R@100MHz MMUN2211LT1 MMUN2211LT1
0805
1
REMOTE BUS INPUT NC
REMOTE_BUS_GND
L907
120R@100MHz P918
SOT-23 SOT-23
KUNMING DGNDA DGNDA

HTJ C937 C938
100P 100P
100V 100V
0805 0805
EMC_GNDA
EMC_GNDA
4
VIDEO OUTPUTS
C939
R906
RGB MUTE CIRCUIT - NOT FITTED V_OUT
0R0 0805 C947
TR904 470UF 25V
R920
1
P934 FMMT497 YK 10P SKT902
1K0
SOT-23 C905
P923 R907
100V
0805
V_OUT_GND
KUNMING
COMPONENT - Cr ITEM902
0W125 NF
SCRN GOLD
0805 0R0 0805 C928 R919
100N 50V
VID_GND 0805
VID_GND
1N0
100V
EMC_GNDA COMPONENT - Cb 100R
0805 0805
4
ITEM901
TR905 C940 EMC_GNDA C957
R921 P935 R908
FMMT497 U_OUT
SOT-23
1K0 0R0 0805 C945
EMC_GND 470UF 25V 1N0
0W125
1
YK 10P VID_GND 100V
0805 C906 100V
C958 C915 C916 C917 C918 C919 C926 C920 C927 R909 0805
+5VD VID_GND 0805 U_OUT_GND
1N0 1N0 0R0 0805 C929

47P 47P 47P 47P 47P 47P 47P +5VDA 100N 50V
100V 100V 0805 1N0
100V 100V 100V 100V 100V 100V 100V
0805 0805 +5VDA TR906 VID_GND 100V
0805 0805 0805 0805 0805 0805 0805 R922 P936
CON901CON902 TR903 FMMT497 0805
1 22 BC849B SOT-23
P933 1K0 C941 C943
RGB_MUTE_A
P926 2 21 SOT-23 EMC_GNDA

SERIAL_TX 0W125 R910 R913 P924
3 20 Y_OUT SVID_Y_OUT
SERIAL_RX P927 4 19
0805
0R0 0805 0R0 0805
C948 S-VIDEO
5 18 VID_GND 470UF 25V C946 470UF 25V 10P
ENABLE_AV 10P 100V 0805 P925
P928 6 17 YK SKT903 YK Y SKT904 C
IRRCV
REM_BUS_N P929 7
8
16
15
R923
4K7
C907
R911
100V
0805
Y_OUT_GND
KUNMING
COMPONENT - Y C908
R914
SVID_Y_OUT_GND GNDY GNDC
REM_BUS_P P930
9 14 DGNDA 0W125 SCRN GOLD SCRN1 SCRN2
MUTE_RGB 0805 0R0 0805 C930 0R0 0805 C931 C932
Spare 10 13 Spare 100N 50V 100N 50V
11
12
12
11 U_A
VID_GND 0805
VID_GND
1N0
100V
EMC_GNDA COMPOSITE 0805
VID_GND
1N0
100V
HOSIDEN
TCS
U 0805 0805 1N0 100V
13 10
14 9 SVID_C_A
SVID_C C942 C944 R918 0805
15 8 EMC_GNDA EMC_GNDA 100R 0805
R912 R915
16 7 COMPOSITE_A COMPOSITE_OUT SVID_C_OUT
COMPOSITE
17 6 C955
0R0 0805 0R0 0805 C956
18 5 V_A 470UF 25V 10P 470UF 25V
V 10P
19 4 YK 100V 0805 YK
20 3 Y_A C909 C910 100V
Y R916 R917 0805
21 2 COMPOSITE_OUT_GND SVID_C_OUT_GND
22 1 SVID_Y_A
SVID_Y 0R0 0805 C935 0R0 0805 C936
100N 50V 100N 50V
0805 1N0 0805 1N0
100V 100V
C933 C934 C954 MOLEX MOLEX VID_GND VID_GND
C949 C950 C951 C952 C953 52806 52806 VID_GND 0805 0805
DGND
1N0 1N0 10P 10P 10P 10P 10P 10P EMC_GNDA EMC_GNDA
100V 100V 100V 100V 100V 100V 100V 100V
0805 0805 0805 0805 0805 0805 0805 0805
EMC_GND DGND
DRAWING TITLE
DV29 COMMS & VIDEO SNAP-OFF
Notes:

Waterbeach
+5V_VID
+5V_VID D700
C709 BAT54S SOT-23
100N
16V
+3V3D REG700 ENC2V5 0603 DGND
2 1 L700 P712 L702 DGND IC700A
+2V5 P700 P714 3
8
C700 C717 C702 P731 R726 P740
7 1
SD R700 C718 2U2 C720 R702 COMPOSITE
2U2 2
100N 100UF 100N 560R 6P8 SIMID1210-01 SIMID1210-01 6P8 560R 75R
ADP3333ARM-2.5 AD8062AR To Output board
0W063
4
16V MSOP-8 10V 16V Decouple each VDD,VAA & VDD_IO pin with 100n+10n close to pin 0W063 50V 50V 0W063 P728 SO-8
0603 YXF 0603 0603 0603 0603 0603 0603
DGND Av=2.15
R712 R718
DGND DGND
C703 C704 C705 C714 C715 C716 1K3 1K5 R727

DGND
0603 0603 SCART_COMPOSITE
100N 100N 100N 10N 10N 10N 75R
+3V3D
Digital Video Bus VIDP[0..19] 16V 16V 16V 50V 50V 50V 0W063
0603 0603 0603 0603 0603 0603 C706 C707 C708 0603
Interlace mode: C701 C713 +5V_VID D701
VIDP[0..7] = 8 bit Y,Cb,Cr multiplexed data (bit DGND 0.1% for DV29 100N 100N 100N BAT54S SOT-23
0 = lsb) 100N 10N 0.5% for DV79/DV75 16V 16V 16V
16V 50V R740 0603 0603 0603
ENC_VREF
Progressive scan mode: 0603 0603 NF
VIDP[0..9] = 10 bit multiplexed Cb,Cr data (bit 1K0 REF700 C736 DGND
0 = lsb) 0W125
DGND (1.225V) L701 P713 L703 IC700B
VIDP[10..19] = 10 bit Y data (bit 10 = lsb) 0805 100N P711 P715 5
R728
56
10
41
SOT-23 16V 7 P730
1
LM4041AIM3-1.2 0603 R701 C719 2U2 C721 R703 SVID_Y
2U2 6
VDD_IO
VDD
VDD
VAA
560R 6P8 SIMID1210-01 SIMID1210-01 6P8 560R 75R
VIDP[0..19] AD8062AR To Output board
VIDP[0..19] 0W063 50V 50V 0W063 0W063
DGND SO-8
P701 0603 0603 0603 0603 P729 0603
51 36
S0 COMP2
DGND 52 Av=2.15
S1 P702 R713 R719
VIDP0 53 45 DGND
S2 COMP1
VIDP1 54
S3 P707 1K3 1K5
VIDP2 55 46 DGND
S4 VREF 0603 0603
VIDP3 58
S5
VIDP4 59 IC703
S6
VIDP5 60 +5V_VID
S7
VIDP6 61 ADV7310KST
S8
VIDP7 62 LQFP-64 +5V_VID D702
S9 C710
44 ENC_COMPOSITE BAT54S SOT-23
DAC_A
HSYNCD* 50
HSYNCD* S_HSYNC 100N
VSYNC* 49 43 ENC_SVID_Y
VSYNC* S_VSYNC DAC_B 16V
+3V3D 48
S_BLANK P719 0603
42 ENC_SVID_C DGND
DAC_C
VIDP10 2 L704 L706 DGND IC701A
Y0 P718 P720 P722
VIDP11 3 39 ENC_Y/GREEN 3
8
Y1 DAC_D P733 R729
VIDP12 4 1
Y2 P717 R704 C722 2U2 C724 R706 SVID_C
VIDP13 5 38 ENC_U/BLUE 2U2 2
Y3 DAC_E 560R 6P8 SIMID1210-01 SIMID1210-01 6P8 560R 75R
VIDP14 6 AD8062AR To Output board
0W063
4
Y4 P716 0W063 50V 50V 0W063
VIDP15 7 37 ENC_V/RED SO-8
Y5 DAC_F 0603 0603 0603 0603 P732 0603
VIDP16 8
Y6
VIDP17 9 DGND Av=2.15
Y7 R714 R720
VIDP18 12 DGND
Y8
VIDP19 13
Y9 1K3 1K5
DGND
0603 0603
VIDP0 14
C0
VIDP1 15 ENC2V5
C1
VIDP2 16
C2
VIDP3 17
C3 R736
VIDP4 18 +5V_VID D703
C4 680R
VIDP5 26 BAT54S SOT-23
C5 0805
VIDP6 27
C6
VIDP7 28 PLL filter
C7 P706
VIDP8 29 0.1% FOR DV29
C8
VIDP9 30 ELSE 1% DGND
C9 P703 C730 C731
47 L705 L707 IC701B
RSET1 P721 P723
23 5
P_HSYNC P704 820P 3N9 P734 R730 P741
24 35 7
P_VSYNC RSET2 50V 50V R705 C723 2U2 C725 R707 Y
25 2U2 6
P_BLANK P705 0603 0603 560R 6P8 SIMID1210-01 SIMID1210-01 6P8 560R 150R
34 AD8062AR To Output board
EXT_LF 0603 50V 50V 0603 0603 0.1%
CLK27M_VID 32 SO-8
CLK27M_VID CLKINA 0.1% 0603 0603 0.1%
63 31 P735
CLKINB RTC_SCR_TR R741
Av=2.15
R715 R723
SDA DGND 21 DGND 0.1% FOR DV29 DGND
SDA SDA 150R
SCL 22 ELSE 1%
SCL SCL R738 R739 1K3 1K5 R731 0603 0.1%
+3V3D DGND
100R 100R 0603 0.1% 0603 0.1% SCART_GREEN
RESET* 33
RESET* RESET 0.1% 0.1% 75R 2 x 150R 0.1% IN PARALLEL FOR DV29
19
GND_IO
I2C 0W063
20 +5V_VID ELSE 1 x 75R 1%
DGND
DGND
AGND
ALSB 0603
P709 P710
+5V_VID D704
R737 R721 R722 C712 BAT54S SOT-23
64
57
11
40
390R NF DGND 2K94 2K94

0W063 0.1% 0.1% 100N
P708 0603 16V
0603 DGND
C711 DGND DGND L708 L710 DGND IC702A
100N NF P724 P726 3
8
16V 0.1% on DV29 1 P737 R732 P742
U
0603
Option to parallel terminate clock
1% on DV79/75 R708
560R
C726 2U2 2U2
6P8 SIMID1210-01 SIMID1210-01
C727
6P8
R709
560R
2
AD8062AR
150R
To Output board
0603 0.1%
4
DGND 0603 50V 50V 0603 SO-8
0.1% 0603 0603 0.1% P736 R742
DGND Av=2.15
R716 R724
0.1% FOR DV29 DGND
150R
ELSE 1%
1K3 1K5 R733 0603 0.1%
DGND
0603 0.1% 0603 0.1% SCART_BLUE
75R
+3V3D 0.1% FOR DV29, ELSE 1%
0W063
0603
C732 C733 C734 C735 +5V_VID D705
BAT54S SOT-23
100N 100N 100N 100N
16V 16V 16V 16V
0603 0603 0603 0603
DGND
Around video bus
DGND L709 L711 IC702B
P725 P727 5
P738 R734
7
R710 C728 2U2 C729 R711 V
2U2 6
560R 6P8 SIMID1210-01 SIMID1210-01 6P8 560R 150R
AD8062AR To Output board
0603 50V 50V 0603 0603 0.1%
SO-8
0.1% 0603 0603 0.1% P739 R743
Av=2.15
R717 R725
0.1% FOR DV29 DGND
150R
ELSE 1%
1K3 1K5 0603 0.1%
DGND
0603 0.1% 0603 0.1%
R735
0.1% FOR DV29, ELSE 1%
SCART_RED
75R
0W063
0603
+5VD L712 +5V_VID
C754
33U
1.17A
100UF
8RHT2
10V
YXF
DGND
Power for video buffers
DRAWING TITLE
DV29 VIDEO ENCODER
Notes:

Waterbeach
Cambridge CB5 9PB Contact Engineer: Peter Gaggs Contact Tel: (01223) 203270 Printed: 24-Aug-2004 Sheet 7 of 11 DRAWING NO. L971C7
DV29 DVD player Main board L971AY issue 1.0.2

C200 2L047 Capacitor SM 0805 NPO Ceramic 5% 100V 47P
C201 2JD410 Capacitor SM 0603 X7R Ceramic 10% 16V 100N
C241 2JC210 Capacitor SM 0603 X7R Ceramic 10% 50V 1N0
C248 2N610 Capacitor Radial Electrolytic Dia 5mm Pitch 5mm 10UF 50V
C252 2Z710B Capacitor Low Impedance Radial Electrolytic Dia 5mm Pitch 5mm 100UF 10V

C323 2JC310 Capacitor SM 0603 X7R Ceramic 10% 50V 10N
C400 2P610 Capacitor Radial Electrolytic Elna ROD 10UF 35V
C412 2KA410 Capacitor Boxed Polyester 5mm Pitch 5% 100VDC 100N

C426 2DA222 Capacitor Boxed Polypropylene 5mm Pitch 100V 5% 2N2
C430 2DA168 Capacitor Boxed Polypropylene 5mm Pitch 100V 5% 680P
C436 2V710 Capacitor Non-Polar Radial Electrolytic 100UF 16V

C718 2LA868 Capacitor SM 0603 NPO Ceramic 5% 50V 6P8

C730 2JC182 Capacitor SM 0603 X7R Ceramic 10% 50V 820P

C1019 2Z722A Capacitor Low Impedance Radial Electrolytic Dia 8mm Pitch 5mm 220UF 16V
C1021 2Z722A Capacitor Low Impedance Radial Electrolytic Dia 8mm Pitch 5mm 220UF 16V
C1039 2Z710D Capacitor Low Impedance Radial Electrolytic Dia 8mm Pitch 5mm 100UF 50V

C1048 2N833A Capacitor Radial Electrolytic Dia 16mm Pitch 7.5mm 3300UF 35V
C1049 2N833A Capacitor Radial Electrolytic Dia 16mm Pitch 7.5mm 3300UF 35V
CON200 8K6201 Con Single ROW Hdr 0.1IN Vertical 2WAY
CON201 8K6316 Con Hdr Dual ROW 0.1IN Vertical 16WAY
CON202 8K8516 Con 1.00MM Vertical FFC 16WAY 52806 Series
CON203 8KB40 Con Boxed Header 0.1IN Dual ROW 40WAY

CON400 8K6201 Con Single ROW Hdr 0.1IN Vertical 2WAY
CON900 8K9009M Con Dtype Horiz 9WAY Male With Boardlock
CON901 8K8022B Con 1.00MM Vertical FFC 22WAY 52806 Series
CON902 8K8022B Con 1.00MM Vertical FFC 22WAY 52806 Series
CON1001 8K8032 Con 1.25MM Vertical FFC 32WAY
CON1002 8K2304 Con Minifit HCS 4WAY
D300 3F54S Diode Schottky BAT54S SOT-23 Package
D1000 3BS1D Diode Surface Mount S1D
DBR1000 3BW02 Diode Bridge Rectifier W02G Plastic Package
DBR1001 3BW02 Diode Bridge Rectifier W02G Plastic Package
DZ900 3CW35V6 Zener Diode 0.25W Surface Mount BZX84C5V6 SOT-23 Package
DZ1100 3CW35V6 Zener Diode 0.25W Surface Mount BZX84C5V6 SOT-23 Package
FS1000 C3751 Fuse Littelfuse T750mA SM
FS1001 C3751 Fuse Littelfuse T750mA SM
HS202 F013 Heatsink BGA 3319 20.9 Deg C/W
HS1000 F007 Heatsink TO-220 6043PB 23 Degc/W Clip ON
IC200 5K74125T IC Quad Buffer 74HCT125D SMT
IC201 5H809263 IC Micro Reset LM809M3-2.63 SOT-23
IC202 5L36750 IC Vaddis V DVD ZR36750 BGA-316 Package
IC203 5H6432-7 IC Sdram 64Mbit K4S643232F-TC70
IC204 5G24LC08 IC Eeprom 24LC08BT/SN 8K SO-8 Package
IC205 L029AY Programmed Flash 28F160 For DV79 DVD Player
IC300 5A8707E IC Clock Generator SM8707E VSOP-16 Package
IC301 5KLVC244APW IC Octal 3 State Buffer74LVC244A TSSOP PHILIPS ONLY
IC303 5KA100 IC Single 2-INPUT Nand GATESN74AHC1G00DBVR DBV
IC304 5K74LVC74 IC Dual Flip-Flop 74LVC74AD SMT
IC305 5K151 IC 8-INPUT Mux 74HC151D SMT
IC306 5K74LVC74 IC Dual Flip-Flop 74LVC74AD SMT
IC307 5KLVC125 IC Quad Buffer 5V Tol 74LVC125AD SMT
IC308 5KLVC125 IC Quad Buffer 5V Tol 74LVC125AD SMT
IC400 5B2134 Opamp OPA2134UA SO-8 Package
IC402 5S413DY IC Quad Analogue Switch DG413DY SO-16 Package
IC403 5A8740 IC Audio DAC XWM8740EDS SSOP-28 Package

IC700 5B8062 Opamp AD8062AR SO-8 Package
IC703 5V7310 IC Video Encoder ADV7310KST LQFP-64 Package
IC900 5N202E IC RS232 Charge Pump Driver MAX202ECSE Static Protected
IC1102 5V9030 IC HDMI Transmitter SiI9030
IC1103 5KLV164 IC Shift Register 74LV164 SMT
IC1104 5KLVC157A IC Quad 2 Input Multiplexer 74LVC157A SMT
L200 7F007 Ferrite Bead SM0805 120R@100MHz
L301 7E101 Common Mode Choke 1000R@100MHz
L700 7BA822 Inductor SM SIMID1210 2U2
L712 7C033B Inductor 33UH 10% 1.17A A823LY-330K=R
L1000 7F003 Ferrite Bead Axial 100MHz/20 Degree C

R202 1N022 Resistor 0603 Surface Mount 0.063W 1% 22R
R219 1M000 Resistor 0805 Surface Mount 0.125W 1% 0R0
R225 1N210 Resistor 0603 Surface Mount 0.063W 1% 1K0

R422 1M510 Resistor 0805 Surface Mount 0.125W 1% 1M0

R705 1NA156 Resistor 0603 Surface Mount 0.032W 0.1% 560R
R715 1NA213 Resistor 0603 Surface Mount 0.032W 0.1% 1K3


R1008 1H022 Resistor Metal Film 0.25W 1% 22R
R1115 1N327 Resistor 0603 Surface Mount 0.063W 1% 27K
REF700 5D40411V2A Voltage Reference 1.225V 0.1% LM4041AIM3-1.2 SOT-23 Package
REG300 5D10863S IC Voltage Regulator +3.3V LM1086CS-3.3 TO-263 Package
REG700 5D33332V5 IC Voltage Regulator +2.5V ADP3333ARM-2.5 MSOP-8 Package
REG1000 5D317T IC Voltage Regulator ADJ LM317T TO-220 Package
REG1001 5D317T IC Voltage Regulator ADJ LM317T TO-220 Package
REG1002 5D337 IC Voltage Regulator Neg ADJ LM337T TO-220 Package
REG1100 5D10863S IC Voltage Regulator +3.3V LM1086CS-3.3 TO-263 Package
REG1101 5D78L05S IC Voltage Regulator +5V L78L05ACD SO-8 Package
REG1102 5D1086AS IC Voltage Regulator Adjustable LM1086CS-ADJ TO-263 Package
REG1003 5D1086AS IC Voltage Regulator Adjustable LM1086CS-ADJ TO-263 Package
RLY600 A216 Relay 2P2T 5V SM
RP200 1V056B Resistor Pack Surface Mount 4 Isolated Resistors 56R
RP215 1V247B Resistor Pack Surface Mount 4 Isolated Resistors 4K7

SH1000 E971MC Shield EMC DiVA DV79 Main PCB
SKT300 8D221 Phono Skt Single Gold
SKT400 8D225 Phono Skt 4-WAY Gold
SKT500 8D225 Phono Skt 4-WAY Gold
SKT800 8D300 Scart Socket PCB Horizontal
SKT900 8D221 Phono Skt Single Gold
SKT901 8D228 Con Jack 3.5mm Mono
SKT902 8D230 Phono Skt 2-WAY Horiz Gold
SKT903 8D230 Phono Skt 2-WAY Horiz Gold
SKT904 8D2272 Con Svhs Mini DIN Unscreened
SKT1100 8D500 HDMI PCB Header R/A SM
TR401 4AFMMT497 Transistor FMMT497 SOT23 Package
TX300 5T1001 SPDIF Optical TX Toslink JFJ1001
TX301 7A29398 Transformer Digital Audio TX 37211
X300 7X046 Crystal 27MHz HC49
SW6
R13 SDTM-610-NTR
10K
PLAY
0W125
0805
2
D1
P1 S3
R14
SW1 SW3 SW7 BAS16

10K
SDTM-610-NTR SDTM-610-NTR SDTM-610-NTR SOT-323
0W125
0805
NAV >| STOP
R15
2
D2
P6 S4
10K
0W125
DGND SW2 SW4 SW8 BAS16
0805
SDTM-610-NTR SDTM-610-NTR SDTM-610-NTR SOT-323
ON/STBY*_LED P11
<< |< LOAD +5VD
+5VD
2
D3 TR5
P10 S5 TR4
MMUN2111LT1
SW5 SW9 BAS16 BC849B SOT-23
SDTM-610-NTR SDTM-610-NTR SOT-323 SOT-23
P13 P14
PAUSE >> R4 R5 R6
220R
2
D4 0W125 180R 390R
P23 S6 0805 0W125 0W125
NF 0805 0805
IR/LED SNAP-OFF BOARD BAS16
SOT-323
P19 P21 P22
LED5
3mm POWER
K2
K3
K4
GRN RED BICOL
LED 3mm
REM5VIN DGND
LED3
3mm
GRN
NAV 1
CON2 CON3
1
+5VD
R3
NAV_K 2 2 NAV_OUT* P20 NAV_LED*
REM_OP 3 3 REM_IN
330R
L1 4 4
0W125
REM5V 5 5
0805
6 6 DGND P16
C16 C1 RX1 +5VD
2U2 100N P18
+5V
100UF 50V AMP AMP

6.3V 0805 CT CT R9
SM O/P R8 10K NF
GND
10K 0W125
0W125 0805
0805
REM_N_A
REM_P_A
REMGND KSM-902TM1N
FIX1 P17 TR3
C8 BC849B
1 LED2 SOT-23
R2
P31 TR2
P15 1N0 MMUN2211LT1
330R
Dia 3.5mm 100V SOT-23
5mm 0W125
0805 NF 0805
DISP1
FIX2 RED
C9 LED 5mm
1
SAMSUNG
SVV-07MS09 VFD
DGND
P24 1N0
Dia 3.5mm LED2 is underneath infra red receiver.
100V
The LED is lit by the remote bus signal,
0805 NF +5VD
S10
S11
S12
S13
S14
S15
G1
G2
G3
G4
G5
G6
G7
allowing the infra red receiver to
S1
S2
S3
S4
S5
S6
S7
S8
S9
F1
F1
F2
F2
demodulate the remote bus signal.
1
2
5
6
7
8
9
10
11
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
42
43
C2
100N
50V
G7
G6
G5
G4
G3
G2
G1
0805
S10
S11
S12
S13
S14
S15
S1
S2
S3
S4
S5
S6
S7
S8
S9
-13V5_F1 -9V_F2
DGND
FIX7 FIX8 FIX5 Pins 1-4 (SW1-4) are set

to read 0010, to be read
1 1 1 by display self test in Note that G1..7 are deliberately
P25 P27 P29 software and to identify reversed here, to be the same as
+5VD DGND
C10 C12 C14 FMJ build R11 previous design (software takes it into
P30 account)
G1
G2
G3
G4
Dia 3.2mm 1N0 Dia 3.2mm 1N0 Dia 3.5mm 1N0
100V 100V 100V 56K
CON1
0805 0805 0805 0W125
16
0805
NF NF NF 15 P2 DOUT
44
43
42
41
40
39
38
37
36
35
34
DGND DGND DGND 14 P3 CLK +5VD
FIX3 FIX4 13 P4 STB +5VD
LED1
LED2
LED3
LED4
GR1
GR2
GR3
GR4
VDD
GND
OSC
12 P5 DIN
1 P26 1 P28 11 REM_P R10 1 33 G5 DGND
SW1 GR5
10 P7 IRRCV 2 32 G6
C11 C13 3K3 SW2 GR6
9 +5VD 3 31 G7
1N0 Dia 3.5mm 1N0 0W125 SW3 SG16/GR7 C3
Dia 3.5mm 8 P8 DGND 4 IC1 30 S15
100V 100V 0805 SW4 SG15/GR8 100N
7 P9 5 PT6312LQ 29 S14
0805 0805 C5 DOUT SG14/GR9 50V
6 6 LQFP-44 28 S13
DIN SG13/GR10 0805
NF NF 5 7 27
10UF GND VEE
DGND DGND 4 8 26 S12
50V CLK SG12/GR11
3 P12 REM_N 9 25 S11 -19V
SM STB SG11
2 DGND 10 24 S10
K1 SG10
1 DGND K2 11 23 S9
K2 SG9
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
SG5/KS5
SG6/KS6
C6
VDD
SG7
SG8
MOLEX DGND
K3
K4
52807 10UF
DGND 50V
12
13
14
15
16
17
18
19
20
21
22
SM
-19V
K3
K4
S1
S2
S3
S4
S5
S6
S7
S8
C7 -9V_F2
10UF
50V K[2..4]
SM
+5VD
FD1 FD2
-13V5_F1
TOOL1 TOOL2 TOOL3 TOOL4 C4
100N
50V
0805
NOTE TO ENGINEERS: DGND
When creating BOM, import CSV into database then manually change quantity to 0.14 for ITEM4 (F238
tape)
This is the only way to ensure it appears as 0.14m on the BOM report
DRAWING TITLE
DV29 DISPLAY BOARD
ITEM5 1 E822AP PAD ADHESIVE SPACING - DIVA REMOTE SENSOR Cut in half & fit both pieces under RX1 as shown on assembly diagram
Filename: L972_1.1.Sch
ITEM1 1 L972PB BLANK PCB DV29 DISPLAY BOARD
Notes: 04_E140 PG 17-09-04 Change RX1 to KSM-902TM1N for better performance 1.1
ITEM2 1 F231 VFD CORNER LOCATOR NOT FITTED
ITEM3 1 F231 VFD CORNER LOCATOR NOT FITTED Pembroke Avenue ECO No. INITIALS DATE DESCRIPTION OF CHANGE ISSUE
Waterbeach
ITEM4 1 F238 Foam D/S ADH BK 3MM Thk 10MM Wide RA106 10M Reel 70mm x 2 layers of 10mm wide double sided tape under VFD Cambridge CB5 9QR Contact Engineer: Peter Gaggs Contact Tel: (01223) 203270 Printed: 17-Sep-2004 Sheet 1 of 1 A2 DRAWING NO. L972
DV29 DVD player Display board L972AY issue 1.1.0

C16 2MA710 Capacitor Surface Mount Electrolytic 100UF 6.3V 6.3 X 4.5MM
CON1 8K8616 Con 1.0MM Horiz FFC 16WAY 52807 Series
CON2 8K2506 Con CT Series Horiz 6WAY
CON3 8K2506 Con CT Series Horiz 6WAY
DISP1 B1014 Display DV88
IC1 5H6312 IC VFD Driver PT6312LQ SM LQFP-44 package
L1 7B822 Inductor Surface Mount 2U2
LED2 3D013 LED 5mm Red SLA-560LTT
LED5 3D006 LED 3mm Red/Green Tri-Colour L-93WEGW
RX1 B2109 IR Receiver Module Kodenshi KSM-902TM1N
SW1 A1505 Switch Tact SM
Transformer Specification for 115/230V 50/60Hz mains transformer.
Arcam Part Number L924TX
The transformer is extremely cost sensitive. It is to employ the most cost effective techniques to achieve the
specification.
The transformer output voltage will be regulated by a switch mode power supply.
The only essential specification is the fact that it must produce no acoustic noise either internally or by induced eddy 330MM
currents in steel chassis etc..
All other specifications are negotiable in the interest of allowing cost reduction. Even the use of a frame TX rather TOP VIEW
than a toroid is negotiable providing it is silent.
1. The transformer MUST be silent when loaded to Po +10% and when supplied from Vin = 270V r.m.s. SECONDARY
General Safety specification.
---------------------------------------------------
PRIMARIES
2. To standards BS415 / EN60065 - Class I / EN60742
3. Transformer to be used in equipment which will be sold worldwide and certified to CE, CB, UL and CSA
Standards. All materials etc to be adequate for worldwide safety approvals. SCREEN WIRE
Material Safety Specification GREEN/YELLOW

---------------------------------------------------
4. Winding Wire to be Grade 2 (130°C rating) to BS 60317-4 1995
5. Mylar Polyester Insulator Rated to 130°C
Electrical Specification
---------------------------------------------------
6. Transformer to have dual 115V primaries to allow parallel operation for 115V input and series operation with
Secondary Winding Voltage and Current Specs
230V input. assuming C=1360uF, f= 50Hz for Po = 22W
TX1
7. Transformer is required to provide a mains isolation barrier and provide a single secondary winding. Bridge Rectifier Vf diode = 1.1V per leg = 2.2V Total Small Toroidal Mains
L924TX
8. The secondary winding is to be full wave rectified and smoothed as shown in the below diagram.
Ideal TX assumed with 7Ohm series resistor in secondary to simulate regulation. GREY 1
9. The DC voltage so provided will be followed by a switch mode power supply which will provide a constant power
load.
(i.e. the current drawn by the load will increase as the DC output voltage falls- hence the capacitor ripple voltage will
be higher at low input voltage) 115V
5 RED
AC Supply Loaded Capacitor Capacitor Capacitor Load Resistor Secondary
10. The power drawn by the load has a maximum continuous rating (Po) of 22W. Voltage Secondary Peak Voltage Min Voltage Average to simulate Winding r.m.s.
WHITE 2
Pri in Series Voltage Vpk Vmin Voltage Load RL Current
11. Transformer input voltage range as follows: (V r.m.s.) (V r.m.s.) (Volt) (Volt) (Volt) (Ohm) (A r.m.s.) PRIMARY BLACK 3
37.3V SECONDARY
115V (85V to 132.5V) windings in parallel 170 23.2 26.9 23.7 25.3 28 1.3 6 RED
230V (170V to 265V) windings in series 230 37.3 46.0 43.7 44.8 88 0.86
115V
265 44.4 55.7 53.8 54.8 130 0.75
Note. Extended input voltage range 85V to 265V
BLUE 4
12. At minimum input voltage (170V AC) the minimum voltage on the capacitor must be > 22.5V with Po = 22W
7
13. At maximum input voltage and minimum load of 6W the max voltage on output capacitor must be < 63V.
14. The secondary voltages and r.m.s currents have been calculated and are tabulated against input voltage.
The model assumes the transformer regulation is made as poor as possible while meeting spec. GREEN/YELLOW
The equivalent series resistance of the windings transformed to the secondary is 7ohms under this condition. SCREEN WIRE
Rms figures for voltages and currents are true rms figures measured with the specified bridge rectifier, Capacitor
and load resistor connected to the transformer secondary.
In the case of the load regulation for lowest cost transformer being better than the worst case specification then the Voltage on Reservoir Capacitor
transformer voltages shall be modified so that the minimum 22.5V spec is met at 170V input and the output
voltages at 230V and 265V input voltage are lower than the specified voltages.
15. Temperature rise to be such that transformer is safe when operated in an enclosure with 50C maximum internal Vpk
temperature. Vaverage
Vmin
80mm dia max
16. Toroid to be fitted with interwinding screen. 10mS
Mechanical Specification
---------------------------------------------------
LEADS EXIT NEAR TOP
TEST CIRCUIT
40mm max
17. Primary wires self-ended and individually sleeved for colour coding, then sleeved together.
18. Secondary wires self-ended and individually sleeved, then sleeved together.
19. Wire type used on the terminations must be such that the wire may be bent with a miniumum bend radius of
10mm through an angle of 90degrees 10times without the wire fracturing. This will allow the wires to be dressed in Vf = 1.1V
+VOUT
production without risk of damage to terminations. per diode
20. All wire lengths are +20, -0 mm. All wires stripped 8 +/-2mm and tinned.
AC IN
21. Transformer to be marked with part number and issue number.
+ 1360uF
RL see above table.
22. Toroidal transformer will be attached to the chassis by a dished washer and bolt (no potting required). 63V
23. A frame transfomer meeting the above spec will be chassis mounted with flying leads and should have clamp
fitted to allow it to be screwed to chassis.
24. Toroidal transformer to be supplied with mounting kit consisting of metal dished washer and 2 neoprene or GND
similar washers.
DRAWING TITLE
DV78 TRANSFORMER 115/230V 03_E195 KAL 02-07-2003 Production Release 1.0
ARCAM
Filename: L924TX_1.0.sch 03_E086 KAL 21-03-2003 Corrected Wire Colours added notes re Clamp B.0
Notes: 03_E042 KAL 4-02-2003 Reduced Power Output Spec, Reduced Load Regulation Spec A.1
A & R Cambridge Ltd. 02_E336 KAL 4-12-2003 Prototype Release A.0

Waterbeach
Cambridge CB5 9PB Contact Engineer: Kevin Lamb Contact Tel: (01223) 203243 Printed: 7-Jul-2003 Sheet 1 of 1 A3 DRAWING NO. L924TX
WINDING DETAILS
NOTE.
TRANSFORMER IS TO BE USED ON SECONDARY SIDE OF MAINS WINDING TURNS WIRE DETAILS
No PER
CABLE
ID OD START
PIN #
END
PIN #
NOTES
ISOLATION BARRIER (I.E. THIS TRANSFORMER IS NOT REQUIRED

TO PROVIDE MAINS ISOLATION BARRIER) PRIMARY2 16 ENAMELLED COPPER WIRE 1 0.8mm 0.86mm 3 2 SPACE WINDING ACROSS WHOLE BOBBIN WIDTH
MAXIMUM VOLTAGE BETWEEN WINDINGS <60V SCREEN 2 INSULATED 2mil COPPER FOIL 1 SCREEN TO HAVE NO OVERLAP AT ENDS
VIEW FROM SIDE OF PART SECONDARY3 22 ENAMELLED COPPER WIRE 1 0.25mm 0.3mm 11 12 WIND ACROSS WHOLE BOBBIN WIDTH BETWEEN GAPS IN SEC4
SHOWING OUTER FOIL SCREEN SECONDARY4 14 ENAMELLED COPPER WIRE 1 0.66mm 0.72mm 9 10 SPACE WINDING ACROSS WHOLE BOBBIN WIDTH
SECONDARY5 10 ENAMELLED COPPER WIRE (BIFILAR) 2 0.66mm 0.72mm 7 8 WIND AS A BIFILAR PAIR ACROSS WHOLE BOBBIN WIDTH
6 to 8mm 10THOU COPPER
SHORTED TURN FOIL SCREEN TO BE
SECONDARY1 41 ENAMELLED COPPER WIRE 1 0.25mm 0.3mm 4 5
ELECTRICALLY CONNECTED TO CORE CLAMP
WIND SEC1 AND SEC2 AS A BIFILAR PAIR ACROSS
CONDUCTIVE ADHESIVE FOIL MAY BE USED
FOIL TO BE COVERED IN A LAYER OF MYLAR TAPE WHOLE BOBBIN WIDTH
SECONDARY2 41 ENAMELLED COPPER WIRE 1 0.25mm 0.3mm 5 6
OUTER SCREEN
SCREEN 1 INSULATED 2mil COPPER FOIL 1 SCREEN TO HAVE NO OVERLAP AT ENDS
SEE VIEW GIVING PIN

PRIMARY1 16 ENAMELLED COPPER WIRE 1 0.8mm 0.86mm 2 1 SPACE WINDING ACROSS WHOLE BOBBIN WIDTH
LENGTH DIMENSIONS
ELECTRICAL REPRESENTATION
TX2
Ferrite Switch Mode
L925TX WINDING ARRANGEMENT ON BOBBIN
4
VIEW FROM TOP OF PART
41T SECONDARY1
WITH PART INSTALLED IN PCB
PIN 1 TO BE MARKED 2 LAYERS MYLAR TAPE
5
PRIMARY2 1 FULL LAYER
1 12
SCREEN2
41T SECONDARY2 2 11
6 SECONDARY4 + SECONDARY3 WIND SECONDARY 4 FIRST THEN SECONDARY 3 IN THE GAPS
3 10
1 11 1.1 INCH SECONDARY5 1 FULL LAYER WIND AS BIFILAR PAIR
4 9
16T 22T SECONDARY3 SECONDARY1 + SECONDARY2 SEC1 AND 2 WOUND AS BIFILAR PAIR ACROSS FULL WIDTH
PRIMARY1
12 5 8
SCREEN1
2
6 7
9
PRIMARY1 1 FULL LAYER
PRIMARY2
16T 14T SECONDARY4
3 10 1.2 INCH
7
NOTE PIN NUMBERING CONVENTION MATERIALS
10T SECONDARY5
CORE PQ32/30 in PC44 MATERIAL (OR EQUIVALENT)
8
CORE TO BE GAPPED IN CENTRE LEG TO GIVE REQUIRED Lpri (GAP APPROX 0.4mm)
(Lpri = 450uH +/- 10% PRIMARY INDUCTANCE MEASURED FROM PIN 1 TO 3 )
PART NUMBER TDK PC44PQ32/30Z-12 (OR EQUIVALENT)
SCR
BOBBIN PART NUMBER TDK BPQ32/30-1112CP (OR EQUIVALENT)

CLAMP PART NUMBER TDK FPQ32/30-A (OR EQUIVALENT)
ARRANGEMENT OF INTERNAL FOIL SCREENS

WIRE ASSEMBLY DETAILS
1 PART TO BE MARKED WITH PART NUMBER / ISSUE NUMBER
2 INTERNAL SCREENS TO BE FULL WIDTH. CONNECTION TO SCREEN VIA SOLDER JOINT TO COPPER (SEE DIAGRAM)
VIEW FROM SIDE OF PART FOIL (2mil OR THINNER)

INSULATOR
SOLDER JOINT TO BE ARRANGED TO PRODUCE A LUMP IN THE CORE WINDOW
SOLDER JOINT TO MADE MADE TO CLEAN COPPER AND JOINT TO BE TAPED.
SHOWING PIN LENGTH DIMENSIONS FULL WINDING WIDTH

SOLDER JOINT TO BE MADE HALF WAY ALONG LENGTH OF THE FOIL
SCREEN TO BE HIGHEST POSSIBLE RESISTANCE FOIL FOR LOWEST LOSSES. (I.E. FOIL AS THIN AS POSSIBLE)
SCREEN TO BE MADE FROM MAXIMUM 0.05mm (2MIL) FOIL
SOLDER JOINT TO BE COVERED IN TAPE
JOINT MUST BE MADE TO CLEAN COPPER 3 WINDINGS WILL BE A TIGHT FIT ON BOBBIN. NOTES AND WINDING ARRANGEMENT SPECIFIED TO BE ADOPTED.
(I.E. NOT THROUGH MYLAR INSULATOR)
4 TRANSFORMER TO BE FITTED WITH AN OUTER COPPER SCREEN WRAPPED AROUND THE OUTSIDE OF THE
OF THE TRANSFORMER CORE AND CONTACTING THE METAL CORE CLAMP THUS FORMING A SHORTED TURN
TO LEAKAGE FLUX. SEE DIAGRAM
SCREEN TO BE 10THOU COPPER STRIP 6 to 8mm WIDE AND FITTED OVER THE JOIN OF THE CORE HALVES.
1 12
SCREEN TO BE COVERED IN A LAYER OF TAPE.
1 BUMP FROM SCREEN JOINT TO BE
2 11
ADJACENT TO CORE WINDOW
5 PIN 1 ON BOBBIN TO BE MARKED WITH WHITE PAINT (OR OTHERWISE)
TO MINIMISE LOSS OF WINDING HEIGHT 3 10
THIS MARKING TO BE USED TO ORIENTATE TX DURING WINDING PHASE TEST
6 100% PHASE TEST AND ISOLATION TEST TO BE CARRIED OUT ON ALL WINDINGS.
MATING FACE OF TX 2 MAXIMUM OVERLAP ON ENDS OF 4 9
SCREENS TO BE LESS THAN 1mm
7 REF. 5 8
TO MINIMISE CAPACITIVE COUPLING
PCB WHICH WOULD PRODUCE SHORTED 6 7 DRAWING TITLE
2.5 MAX
TURN FOR HIGH FREQUENCY CURRENTS DV78 450uH FLYBACK TX 03_E290 SLS 06-10-03 'VIEW FROM SIDE OF PART SHOWING PIN LENGTH DIMS' added. 1.1
3 SOLDER JOINTS TO BE MADE HALF WAY Filename: L925TX_1.1.Sch 02_E195 KAL 02-07-03 Production Release 1.0
ALONG LENGTH OF FOIL FOR REDUCED LOSSES
Notes: 02_E086 KAL 21-03-03 Changed Pri1,2 and Sec1,2 turns, Lpri & gap, Added outer screen B.0
A & R Cambridge Ltd. 02_E336 KAL 20-11-02 Prototype Release A.0

Waterbeach
Cambridge CB5 9PB Contact Engineer: Kevin Lamb Contact Tel: (01223) 203200 Printed: 8-Oct-2003 Sheet 1 of 1 DRAWING NO. L925TX
Transformer Specification for 100/115/230V 50/60Hz mains transformer (for audio)
Arcam Part Number L931TX
General Safety specification.

---------------------------------------------------
Ferrite core WURTH 74270062 (or
1. To standards BS415 / EN60065 - Class I / EN60742 220MM, +20, -0 equivelant).
Secondary wires pass through ferrite.
2. Transformer to be used in equipment which will be sold worldwide and certified to CE, CB, UL and CSA Standards. All Heatshrink tubing fitted over ferrite, but
materials etc to be adequate for worldwide safety approvals. TOP VIEW not firmly to cable, so that ferrite is free to
move along cable
Material Safety Specification
---------------------------------------------------
SECONDARIES 4 way MOLEX 39-01-3048
3. Winding Wire to be Grade 2 (130°C rating) to BS 60317-4 1995 or CONEXCON 6740-1040
FERRITE
4. Mylar Polyester Insulator Rated to 130°C
PRIMARIES
6 way MOLEX 39-01-2065
Electrical Specification or CONEXCON 6740-1060
---------------------------------------------------
5. Transformer to have dual 115V primaries to allow parallel operation for 100/115V input and series operation with 230V
input. 400MM, +20, -0
6. Transformer to have 2 secondary windings as shown in the adjacent diagram.
7. The output from the secondary windings are to be full wave rectified and smoothed as shown in the 'test circuit' 6 5 4 4 3
diagram. 3 2 1 2 1
8. Transformer input voltage range as follows: 6 way 4 way
115V: (85V to 132.5V) windings in parallel TEST CIRCUIT
230V: (170V to 265V) windings in series Pin-outs of Molex
Note. Extended input voltage range 85V to 265V

PRIMARY SECONDARY connectors, as viewed
looking down at the end the
General Instrument / Vishay +VOUT wires enter the connector
9. At minimum input voltage (170V AC with primaries in series) and maximum load of 120mA the minimum voltage on the
capacitor must be = (or >) 13.5V.
6 WAY CONN PIN 1 BROWN RED 4 WAY CONN PIN 2
10. Temperature rise to be such that transformer is safe when operated in an enclosure with 50C maximum internal
temperature. W02G 3300UF
115V ac
Mechanical Specification 6 WAY CONN PIN 4 WHITE ORANGE 4 WAY CONN PIN 1 120mA load
---------------------------------------------------
11. Primary windings connect to 6 way MOLEX connector 39-01-2065. Secondary 6 WAY CONN PIN 3 BLACK YELLOW 4 WAY CONN PIN 4
windings connect to 4 way molex connector 39-01-3048. CONEXCON alternatives are allowed. Use MOLEX pin
44476-3112.
MOLEX connectors have pin numbers indicated on them. 115V ac
6 WAY CONN PIN 6 BLUE GREEN 4 WAY CONN PIN 3 0V
12. Use 24 AWG wire with colours as shown. Primary wires are enclosed in a common
sleeve. Secondary wires are enclosed in a common sleeve. Use PVC sleeving.
120mA load
13. Transformer to be marked with Arcam part number and issue number.
14. Transformer is for Hi-Fi audio; Acoustic noise must be inaudible.

W02G 3300UF
15. Transformer to be supplied with mounting kit consisting of metal dished washer and 2 neoprene or similar washers.
-VOUT
Voltage on Reservoir Capacitor
+VOUT_min
65mm max
Minimum output voltage specified at:

Min input voltage
Max load
LEADS EXIT NEAR TOP
(see text)
40mm max
0V
-VOUT_min
DRAWING TITLE
DV29 AUDIO TRANSFORMER 04_E107 PG 21-07-04 Add 20mm to all lead lengths, ferrite free to move on cable 1.1
Filename: L931TX_1.1.sch 04_E087 PG 28-06-04 Production release. Add ferrite core to secondary cable 1.0
Notes: 04_E048 PG 27-04-04 Reduce specified output voltage to 13.5V at 120mA A.1
A & R Cambridge Ltd. 04_E034 PG 26-03-04 Prototype Release A.0

Waterbeach
Cambridge CB5 9QR Contact Engineer: Peter Gaggs Contact Tel: (01223) 203270 Printed: 21-Jul-2004 Sheet 1 of 1 A3 DRAWING NO. L931TX
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ARCAM
All parts can be ordered via spares@arcam.co.uk
Pembroke Ave, Waterbeach, Cambridge, CB5 9PB, ENGLAND

TEL: +44(0) 1223 203 200 FAX: +44(0) 1223 863 384

Service Manual: Arcam Arcam

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Service Manual: Arcam Arcam

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Service

DV29 DVD Player

Power Supply L959AY

Main Board L971AY

Display Board L972AY

The Infra red pick-up at location RXI receives RC5

The Vaddis V is powered by two separate supplies the

CON203 is an ATAPI interface on a 40 way IDE

The IR output from the Display board arrives as EEPROM

Interlaced video mode: VIDP0 to 7 provide Serial Port

Clocks and SPDIF stage. SPDIF Output

Nand gate IC303 is used to gate FSEL1 with

The external current setting resistors for the internal o O/6/12

The RGB status line (SCART pin 16) will be seen as 0v

VIDP 19 -12 provide 8 msbits of Y data to pins D15-8

VIDP 11 -10 provide 2Isbits of Y data to pins D2-3

VIDP 9 - 2 provide 8 msbits of Cb/Cr data to pins D23 – 16

VIDP 1 – 0 provide 2 Isbits of Cb/Cr data to pins D7 - 6

VSYNC – Vertical sync data

SPDIF – Digital audio data (Full surround)

At the output of the HDMI chip we will see the

The signals from the main board travel up to the

The Video signals simply travel via an A-C coupling

The RS232 interface is on 9 way “D” type CON900,

We have two remote input bus’s on this board, the first

The 3.5mm socket at location SKT900 is used to

CON1 CON2 CON3 CON4

VFB 31DQ06 DO-201AD

4 16V 16V 100V 25V 100V

BC556B BC546B C56 C36 52045

Designator Part Description

VIDEO ENCODER L967C9

ITEM100 1 L971PB Blank PCB DV29 Main Board

A & R Cambridge Ltd. 04_E121 PG 09-08-04 Production release 1.0

DQM3 DQ30 RAMDAT26 DUPRD SERIAL_RX WP

RAMDAT29 SPIDATI SDA A2

10 ATDD11 PNVMR/B* W1 B17 SDA P201

RAMDAT9 RP201A 1 8 56R FRAMDAT9

RAMADD1 RP206C 3 6 56R FRAMADD1 PROG/INT* A6

RAMDAT3 NF(32Mb+) FRAMDAT3 PF238 13

A & R Cambridge Ltd. 04_E121 PG 09-08-04 Production release 1.0

PSU CLOCK DIVIDER

74LVC244APW NF NF 100P 10N

IC306A 50V EMC_GND

2 5 0805 YXF DGND

74LVC125AD 74LVC125AD +3V3D

IC307E IC301C IC302C IC309C IC304C IC305B IC308E IC306C

D404 RLY400C RLY500C RLY600C

NEC NEC NEC

47P 100V 0W125 0805 100V P421 R418 P429 C437

SO-8 OPA2134UA 100UF

C429 680R C411 R419

-12VA DG413DY -12VA

ITEM400 1 E828AP Pad Damping 7.5x6x3MM Rubber Fit on top of RLY400

A & R Cambridge Ltd. 04_E121 PG 09-08-04 Production release 1.0

10UF 100N DAC DGND

C501 C509 D501

47P 100V 0W125 0805 100V P525 R514 P526 C533

SO-8 OPA2134UA 100UF

C525 680R C511 R515

ITEM500 1 E828AP Pad Damping 7.5x6x3MM Rubber Fit on top of RLY500

A & R Cambridge Ltd. 04_E121 PG 09-08-04 Production release 1.0

10UF 100N DAC DGND

!'4,1+352 623 !'4(2,/3,5+

!'4,1+352 623 7,-8'2%6*234

!'4,1+352 623 9-(0%6234