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Digital Logic Design - CS302 Fall 2006 Assignment 05
Digital Logic Design - CS302 Fall 2006 Assignment 05
Deadline
Uploading instructions
Please view the assignment submission process document provided to you by the
Virtual University to upload the assignment.
It should be clear that your assignment will not get any credit if:
Assignment
Instructions:
Write all the steps involved for solving the assignments. Marks will be deducted for
missing steps.
Equation and Circuit Diagrams should be clear. You can use any Drawing tool for
implementing Diagrams, prefer to copy and paste the gates diagrams from above if
you are drawing in MS Word.
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Question: 1
What do you understand by Edge-Triggered Flip Flops? What is the difference between J-
K and S-R Flip Flops? Also draw the logic symbols of Positive Edge-triggered and
Negative Edge-Triggered of S-R and J-K Flip Flops.
Question: 2
Note:
It is preferred that you should submit your assignment in Microsoft Word (.doc)
format.
Make sure that Diagrams are clear. You can use any drawing tool easy for you, you
can also scan and upload the assignment as image
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