Professional Documents
Culture Documents
Fundamentals
James Colotti
EMC Certified by NARTE
Staff Analog Design Engineer
Telephonics - Command Systems Division
Outline
♦ Introduction
- Importance of EMC
- Problems with non-compliance
♦ Concepts & Definitions
♦ Standards
- FCC, US Military, EU, RTCA
♦ Design Guidelines and Methodology
- EM Waves, Shielding
- Layout and Partitioning
- Power Distribution
- Power Conversion
- Signal Distribution
♦ Design Process
♦ References and Vendors
Revision 3 Copyright Telephonics 2003-2005 1
Introduction
Conducted Emissions
Frequency Quasi-Peak Limit Average Limit
(MHz) (dBuV) (dBuV)
0.15 – 0.5 79 66
Class A
0.5 - 30.0 73 60
0.15 – 0.5 66 to 56 * 56 to 46 *
Class B 0.5 – 5 56 46
5 - 30 60 50
Req’t Description
CE101 Conducted Emissions, Power Leads, 30 Hz to 10 kHz
CE102 Conducted Emissions, Power Leads, 10 kHz to 10 MHz
CE106 Conducted Emissions, Antenna Terminal, 10 kHz to 40 GHz
CS101 Conducted Susceptibility, Power Leads, 30 Hz to 50 kHz
CS103 Conducted Susceptibility, Antenna Port, Intermodulation, 15 kHz to 10 GHz
CS104 Conducted Susceptibility, Antenna Port, Rejection of Undesired Signals, 30 Hz to 20 GHz
CS105 Conducted Susceptibility, Antenna Port, Cross Modulation, 30 Hz to 20 GHz
CS109 Conducted Susceptibility, Structure Current, 60 Hz to 100 kHz
CS114 Conducted Susceptibility, Bulk Cable Injection, 10 kHz to 200 MHz
CS115 Conducted Susceptibility, Bulk Cable Injection, Impulse Excitation
CS116 Conducted Susceptibility, Dampened Sinusoidal Transients, Cables & Power Leads, 10 kHz to 100 MHz
RE101 Radiated Emissions, Magnetic Field, 30 Hz to 100 kHz
RE102 Radiated Emissions, Electric Field, 10 kHz to 18 GHz
RE103 Radiated Emissions, Antenna Spurious and Harmonic Outputs, 10 kHz to 40 GHz
RS101 Radiated Susceptibility, Magnetic Field, 30 Hz to 100 kHz
RS103 Radiated Susceptibility, Electric Field, 10 kHz to 40 GHz
RS105 Radiated Susceptibility, Transient Electromagnetic Field
Standard Description
λ
d>
2π
Far Field for a Point Source
H
4π • 10 −7
µ0 m = 120π = 377 Ω
ZW = =
ε0 1
• 10 −9
F
36π m
Impedance of Plain Wave
d/λ
Revision 3 Copyright Telephonics 2003-2005 20
Shielding
♦ Enclosure/Chassis
- Mechanical Structure
- Thermal Path
- Can form an overall shield (important EMC component)
- Can be used as “first” line of defense for Radiated
emission/susceptibility
♦ Some Applications Cannot Afford Overall Shield
- Rely of other means of controlling EMC
♦ Enclosure material
- Metal
- Plastic with conductive coating
(Conductive paint or vacuum deposition)
EInside
SEdB = 20 Log10
EOutside
SE = R + A + B ⇒ SE = R + A
Rp = 168 + 10 Log10 µσ rf
r
Plane Wave Reflective Loss
♦ r=12”
♦ µr = 1 (Aluminum), 180 (Cold Rolled Steel), 1 (Copper)
♦ σr = 0.6 (Aluminum), 0.17 (Cold Rolled Steel), 1 (Copper)
♦ Single Hole s
♦ Multiple Holes
λ λ s
d
If <d SE ≈ 0dB d If s < > d and <1
2 2 d
λ λ λ
If >d SE ≈ 20 Log10 SE ≈ 20Log10 − 10 Log10 n
2 2d 2d
where:
t = Material thickness
n = Number of Holes
s = edge to edge hole spacing
Notes:
1. d is the longest dimension of the hole.
2. Maximum SE is that of a solid barrier without aperture.
λc = 2w Cutoff wavelength
2
2π f
α= 1 − Absorption factor of WG below cutoff
w
λc fc
2π π
α= = For frequencies well below cutoff
t λc w
t/w Loss
t
A = 8.686αt = 27.3 Absorption loss 8 >200
w 6 164
4 109
2 55
Revision 3 Copyright Telephonics 2003-2005 28
Enclosure Seams
Courtesy of Tecknit
Air
Ventilation
Panels
EMC Switch
Shield
Shielded
Windows
Courtesy of Tecknit
Power Bus
Signals
Power Bus
Signals
Power Bus
Signals
♦ Layout is 3 Dimensional
- Component placement (X & Y)
- Signal and Power Routing (X & Y)
- PWB Stack Up (Z)
♦ Dedicate layer(s) to ground
- Forms reference planes for signals
- EMI Control (high speed, fast slew rate, critical analog/RF)
- Simpler impedance control
♦ Dedicate layer(s) to Supply Voltages
- In addition to dedicated ground layers
- Low ESL/ESR power distribution
High Speed Digital PWB High Speed Digital PWB Mixed Analog/RF/Digital PWB
• High Density • Moderate Density • Moderate Density
• Ten Layers • Six Layers • Ten Layers
• Two Micro-Strip • Two Micro-Strip • Two Micro-Strip Routing Layers
Routing Layers Routing Layers • Four Asymmetrical Strip-Line
• Four Asymmetrical • Two Buried Micro-Strip Routing Layers
Strip-Line Routing Routing Layers • Single Digital Supply Plane
Layers • Single Supply Plane • Analog supplies on inner layers
• Single Supply Plane • Two Sided - Routing Clearance Considerations
• Two Sided - Improved isolation
• Two Sided
IF Processing
RF Sections
Video
ADCs
FPGA &
Support
Logic
High Speed
Digital I/O
Metalized Plastic
Shield Examples
Courtesy of Mueller
Standard Controlled
PWM Transition
Time PWM
Fixed Spread
Frequency Spectrum
PWM PWM
PWM
Topology
Resonant
Mode
Topology
Distributed DC
AC/DC
System AC
Power Converter
♦
Power
DC/DC DC/DC DC/DC DC/DC
- One Primary Converter
Converter Converter Converter Converter
- Multiple Secondary
Converters at each load
- Typical Application:
Load Load Load Load
AC/DC
Power Converter
DC Power Supply (Multiple Voltages)
♦ Direct DC
System AC
Power
- One Primary Converter
Load Load Load Load for all loads
- Typical Application:
Home Computer
AC/DC
Power Converter Load(s)
System AC DC Power
Power (Multiple
Voltages)
♦ Separate Primary
- One AC/DC Converter per unit
AC/DC
Power Converter Load(s)
System AC DC Power
Power (Multiple - Typical Application:
Voltages)
RADAR System housed in
AC/DC
Load(s)
multiple units
Power Converter
System AC DC Power
Power (Multiple
Voltages)
Revision 3 Copyright Telephonics 2003-2005 47
Power Distribution Examples
Multiple Access
Beamforming
Equipment
(Distributed DC)
Courtesy of Dell
Personal Computer
(Direct DC Distribution)
Revision 3 Copyright Telephonics 2003-2005 48
Power Distribution Comparison
Load
Load Power Load
Architecture Ground Notes
Reg Effic Iso
Loops
Separate
x x + x
Primary
♦ Legend:
“+” Advantage
“-” Disadvantage
“x” Neutral
IS
Transfer Impedance
Ω
Vi = I s Z T l = (10 A) 0.0011 (2m ) = 22mV
m
Induced Voltage of 22 mV is well below
damage/upset threshold of most logic
families.
Both ends of shield Both ends of shield grounded Both shielded ends grounded
ungrounded with 3” loop (60 nH) with 1” loop (19 nH)
Both ends of shield Both ends of shield grounded Both shielded ends grounded
ungrounded with 3” loop (60 nH) with 1” loop (19 nH)
A(t)
Typical 50 MHz Clock Example
tw
1 1
f1 = = = 15.9MHz
πtW π (20ns )
2 1 2 1
Time f2 = = = 159 MHz
π t r + t f π (2ns + 2ns )
tr tf
• Shielding • Single vs. Multi Point • System functional • Micro-strip, stripline • Conversion Topology • Single Ended,
• Material Selection Ground allocation • Number of layers Linear, Resonant, Differential
• Gasketing • Chassis component • Separation of analog, • Ground layers PWM • Logic Family
• Covers bonding RF, digital and power • Separation of analog, • Connector Selection • Connector Selection
RF, digital and power Filter/Non-Filter Filter/Non-Filter
• Filter location/type • Filter location/type
• Cable harnessing
and shielding
• Signal Spectrum
Revision 3 Copyright Telephonics 2003-2005 62
Typical EMC Engineer’s Involvement
♦ Prepare EMC Section of Proposal Pre-Award
♦ Contract/SOW Review and Recommendations
♦ Interference Prediction Design
♦ Design Testing
♦ Interference Control Design
♦ Preparation of EMC Control Plan
♦ Subcontractor and Vendor EMC Control
♦ Internal Electrical and Mechanical Design Reviews
♦ EMC Design Reviews with the Customer
♦ Interference Testing of Critical Items
♦ Amend the EMC Control Plan, as Necessary
♦ Liaison with Manufacturing Manufacture
♦ In-Process Inspection During Manufacturing
♦ Preparation of EMC Test Plan/Procedure Test
♦ Performance of EMC Qualification Tests
♦ Redesign and Retest where Necessary
♦ Preparation and Submittal of EMC Test Report or Declaration
♦ www.Chomerics.com
♦ www.LairdTech.com
♦ www.Tecknit.com
♦ www.Spira-EMI.com
♦ www.WaveZero.com
♦ www.LeaderTechInc.com
♦ www.SunBankCorp.com
♦ www.TycoElectronics.com
♦ www.GHtech.com
♦ www.SpectrumControl.com
♦ www.Amphenol-Aerospace.com
♦ www.EMPconnectors.com
♦ www.Sabritec.com