Chapter 7 Electronic counters 7.1 Introduction Counting the occurrence of electrical events was a primary concem of electrical engineering, even in the era of vacuum tubes. ‘The first- generation electronic counters were designed using vacuum tubes; these were bulky, heavy and power hungry. The second- generation counters introduced in the early 1960s were considerably smaller owing to transistorised circuitry even though the basic specifications of the instruments remained more or less the same as for the vacuum tube versions. The availability of digital integrated circuits at the end of 1960s led to the birth of a third generation with better performance and features. With the introduction of LSI and VLSI components, a fourth generation of powerful counters has appeared in the market within the past 15 years. Very recently, related families of instruments, such as modulation domain analysers, have also been introduced into the industry, thus bringing unique methods for viewing complex modulated signals in the modulation domain. Basic concepts related to the electronic counters which can be used to measure frequency, time, phase, frequency ratio, ime interval average, etc., will be discussed in this chapter with special reference to accuracy and modes of operation. Further, some techniques for frequency measurements in the microwave region will be discussed with a brief introduction to modulation domain analysis. 7.2. Basic counter circuitry A counter can be divided into five basic blocks as shown in Figure 7.1. These are: ( input circuit, (ii) main gate, (iii) decimal counting unit and display, (iv) time base, and (v) control circuit248 Digital and analogue instrumentation oe] Toput circuitry Ar Main gate 1 Display Control Decimal | BeD cireuity [—___*] counting = ste Mu |e} Time base Crystal oscillator Figure 7.1 Block diagram of an electronic counter Input Output ‘Attenuator and Level Impedance Schmitt P| timiter |" [_controt_|"|_converter tigger aed Figure 7.2 Block diagram of the input circuitry 7.2.1 Input stage The input citcuit is for signal conditioning of the input analogue signal and conversion into a digital form. It consists of the following main stages as shown in Figure 7.2: an ac/dc. coupling circuit, an input attenuator stage, a voltage limiter for input protection, an impedance convertor with level adjustment, and a Schmitt trigger circuit. The a.c/d.c. block of the input stage takes care of coupling the input signal into the next stages with or without the d.c. component of the signal. The attenuator stage brings the signal level down to a safe level and the voltage limiter restricts the attenuated input signal to safe levels. The impedance converter and the level adjust circuits match the impedances while adjusting the level of the signal to appropriate values so that the trigger point may be shifted from positive to negative values via zero. The final stage, the Schmitt trigger circuit, converts the input signal to a digital value, An important property of this block is that it determines the sensitivity of the counter and also provides noise immunity. Figure 7.3(a) and (b) show the effect of the trigger window on counter operation. We can clearly see here that if the input signal amplitude to the Schmitt trigger stage is not sufficiently large (to cross the trigger window) the output pulses will not be produced (Figure 7.3(b)). As discussed later, the trigger window adjustment is very important to the correct operation of the counter and it can be used to minimise the fault counts generated due to noise and other situations,Electronic counters 249 a) ome { coy Figure 7.3 Trigger window: (a) correct operation; (b) incorrect setting of trigger levels 7.2.2. Main gate ‘The signal, conditioned by the input stage, is passed to the main gate, which is mostly a standard dual input logic gate, One input of the main gate receives the input signal to be counted and the other input receives the gate control signal. When the gate is tumed on the incoming pulses pass through the gate to the next stage, the decimal counting unit. Both the Schmitt trigger and main gate circuits have a frequency limit beyond which the input signal can no longer be followed completely. Therefore, these stages of a counter which can handle high frequencies are designed using high speed logic gates. Usually silicon bipolar transistor ECL circuits or GaAs circuits are used for main gate circuitry of high speed counters. 7.2.3 Decimal counting unit and display ‘The heart of a digital counter is the decimal counting unit (DCU), which typically consists of a number of counting units in a cascade. Each decade consists of several basic units: a decade counter, a memory, a decoder/display driver and the display. Figure 7.4(a) shows a representative block diagram of a DCU and a seven segment display. In the case of a three digit counter, the input signal that is received at the first counting decade increments the counter up to nine counts and at the tenth count a ‘catty’ is presented to the next decade. The second decade hence counts in tens and the third stage counts in hundreds, etc. The decade counter stages present the counted pulses in the BCD form and the values counted in these stages are transferred to the memories at the reception of a transfer pulse from the control unit, The BCD