21 de septiembre

HACER UN DECODIFICADOR

SUMADOR COMPLETO

-- GENREA LA SUMA ARITMENTICA DE 3 BITS DE ENTRADA

A B

COUT

CIN

ENTADAS SALIDAS

A B CIN COUT S

0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Entity adder is

Port (A : in std_logic_vector (1 down to 0 );

B: in std_logic_vector (1 down to 0 );

Carry: out std_logic;

Suma: out std_logic_vector (1 down to 0 ));

End adder;

Architecture behavioral of adder is

Signal result : std_logic_vector (2 downto 0);

begin

result <= (`o` & A) + (`o` & B);

suma <= result (1 downto 0);

carry <= result (2);

end behavioral;