Electronics ~ 2006-1 SetB 1 The value of © which gives the a critical in damping the given a circuit is sue a) 2F b) 4F ©) 8F d)4F A series RLC circuit resonates at 3 MHz and has 3-dB bandwidth of 10 kHz, The Q of the circuit at resonance * a) 30 by 300 c) 300 d) 3002 v2 The value of resistance R shown @ in the given figure is We S me ® a) 3.52 b) 252 312 4d) 459 At 3-dB frequencies, current in the series RLC circuit equal current at Tesonance multiplied by 1 1 1 1 a> b) )> ) V2 24 oR Aseries RLC circuit resonates at 1000 kHz. At frequency of 995 kHz, the circuit impedance is a) Resistive b) minimum ©) Inductive d) capacitive Ifeach stage had gain of 10dB and noise figure of 10dB, then the overall noise figure of two-stage cascade amplifier will be a) 10 b) 1.09 0) 1.0 4) 10.9 In Sigma delta ADC, high bit accuracy is achieved by a) Over sampling and noise shaping _b) Over sampling ©) Under sampling d) None of the above Let s(t) denote the delta function. The value of the integral poc(Zh is a)1 b)-4 00 % Indian Space Research Organisation Page 1 of 11Electronics - 2006-11 9 10. The z— transform of the signal In=~] 2,n=0 An= fr 1, In=2 0, otherwise, a) 242-27 427 b) 2" 42-2427 ©) 24227-27427 d) 242-2422 11 For the circuit shown in the given B figure, the voltage Vag is tv sy 30: PR tien + a)6V b)10V 0) 25V d)40v 12. The equivalent capacitance across ‘ab’ will be a Ome = > or ake Te: a) 0.2pF b) 0.4pF ©) 0.5pF do 13 . s, ‘The transfer function, 7(s) = —°— ig that ofa Sta a) Low-pass filter b) Noteh filter ©) High-pass filter 4) Band-pass filter EA | Indian Space Research Organisation | Pee 2 0F1Electronics - 2006-1 SetB 14 15 16 17 18 49 20 E A particular current is made up of two components: a10-A de anda sinusoidal current of peak value of 1.414 A. The average value of the resultant current is a) Zero b) 24.144 ©) 10A d) 14.14 By doubling the sampling frequency a) Quantisation noise decreases by 3B b) —__Quantisation noise density decreases by 3dB ©) Quantisation noise increases by 3dB 4) Quantisation noise density increases by 3dB The output voltage (vo) of the circuit shown in the given figure is fr e.sv } yj nI3v ow a) Zero b)5.7V c)6.9V d) 12.6V Assuming that only the X and Y logic inputs are available and their complements ¥ and Yare not available, what is the minimum number of two-input NAND gates requires to implement X ® Y? a2 b)3 4 as In the given network of AND % and OR gates f canbe written = 7 as: @) Xa Xt Xp eres Xa Xt Xone Ket KQX9 eevee Xn eeeeee Xm db) XoXs# Xt Xs ttn. Xn 0) Xt Xt Xo tenes Xe 9) Xa Xt Xaeeveee Km + KANG RG esos Xn Fessee + Xn Krat +Xq A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is a) 100 nsec b) 50 n sec c) 20 n sec d) 10 nsec The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash converter type (3) Dual slope converter type. The correct sequence in the increasing order of their conversion times is a) 1,2,3 b) 21,3 03,21 4) 34.2 Page 3 of 11