February 1996

NDS9936
Dual N-Channel Enhancement Mode Field Effect Transistor

General Description Features

These N-Channel enhancement mode power field effect 5A, 30V. RDS(ON) = 0.05Ω @ VGS = 10V.
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is High density cell design for extremely low RDS(ON).
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly High power and current handling capability in a widely used
suited for low voltage applications such as DC/DC conversion, surface mount package.
disk drive motor control, and other battery powered circuits Dual MOSFET in surface mount package.
where fast switching, low in-line power loss, and resistance to
transients are needed.

________________________________________________________________________________

5 4

6 3

7 2

8 1

Absolute Maximum Ratings T A = 25°C unless otherwise noted

Symbol Parameter NDS9936 Units
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ± 20 V
ID Drain Current - Continuous @ TA = 25°C (Note 1a) ± 5.0 A
- Continuous @ TA = 70°C (Note 1a) ± 4.0
- Pulsed @ TA = 25°C ± 40
PD Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS

RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W

RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

© 1997 Fairchild Semiconductor Corporation NDS9936.SAM

 Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 2 µA
TJ= 55°C 20 µA
IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.4 3 V
TJ=125°C 0.7 1.1 2.2
RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 5 A 0.044 0.05 Ω
TJ=125°C 0.066 0.1
VGS = 4.5 V, ID = 3.9 A 0.066 0.08
TJ=125°C 0.099 0.16
ID(on) On-State Drain Current VGS = 10 V, VDS = 10 V 40 A
VGS = 4.5 V, VDS = 10 V 20
gFS Forward Transconductance VDS = 10 V, ID = 3.5 A 3 8 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 15 V, VGS = 0 V, 525 pF
f = 1.0 MHz
Coss Output Capacitance 315 pF
Crss Reverse Transfer Capacitance 185 pF
SWITCHING CHARACTERISTICS (Note 2)
tD(ON) Turn - On Delay Time VDD = 15 V, ID = 1 A, 12 30 ns
tr Turn - On Rise Time VGS = 10 V, RGEN = 6 Ω 10 25 ns
tD(OFF) Turn - Off Delay Time 25 50 ns
tf Turn - Off Fall Time 10 50 ns
Qg Total Gate Charge VDS = 15 V, 17 35 nC
ID = 5 A, VGS = 10 V
Qgs Gate-Source Charge 1.5 nC
Qgd Gate-Drain Charge 3.7 nC

© 1993 Fairchild Semiconductor Corporation NDS9936.SAM

Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuos Drain-Source Diode Forward Current 1.7 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.7 A (Note 2) 0.78 1.2 V
trr Reverse Recovery Time VGS = 0V, IF = 5 A, dIF/dt = 100 A/µs 70 160 ns
Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by

design while RθCA is determined by the user's board design.

T J−TA T J−TA
PD (t ) = R θJ A(t )
= R θJ C+RθCA(t )
= I 2D (t ) × RDS(ON ) TJ

Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

a. 78oC/W when mounted on a 0.5 in2 pad of 2oz copper.

b. 125oC/W when mounted on a 0.02 in2 pad of 2oz copper.

c. 135oC/W when mounted on a 0.003 in2 pad of 2oz copper.

1a 1b 1c

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

NDS9936.SAM
 Typical Electrical Characteristics

18 2
VGS =10V 6.0 5.0 4.5
4.0 1.8 VGS = 3.5V

DRAIN-SOURCE ON-RESISTANCE
I D , DRAIN-SOURCE CURRENT (A)

R DS(on) , NORMALIZED
12 3.5 1.6
4.0

1.4
4.5
5.0
3.0
6 1.2 6.0

2.5 1 10

0 0.8
0 1 2 3 0 2 4 6 8 10
V DS , DRAIN-SOURCE VOLTAGE (V) I D , DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage

and Drain Current.

1.6 2.5
T (°C) 125
I D = 5A J
25
DRAIN-SOURCE ON-RESISTANCE

V GS = 10V
DRAIN-SOURCE ON-RESISTANCE

1.4 -55
2
R DS(ON) , NORMALIZED

V GS = 4.5 V
R DS(ON) , NORMALIZED

1.2

1.5 10V

1 4 .5V

10V
1
0.8 4 .5V

10V
0.6 0.5
-50 -25 0 25 50 75 100 125 150 0 2 4 6 8 10
TJ , JUNCTION TEMPERATURE (°C) I D , DRAIN CURRENT (A)

Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation with Drain

with Temperature. Current and Temperature.

10 1.2
GATE-SOURCE THRESHOLD VOLTAGE

V DS = 15V TJ = -55°C 25
125 V DS = V GS
1.1
8 I D = 250µA
ID , DRAIN CURRENT (A)

Vth , NORMALIZED

1
6

0.9

4
0.8

2
0.7

0 0.6
1 1.5 2 2.5 3 3.5 4 -50 -25 0 25 50 75 100 125 150
V GS , GATE TO SOURCE VOLTAGE (V) T J , JUNCTION TEMPERATURE (°C)

Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with

Temperature.

NDS9936.SAM
Typical Electrical Characteristics (continued)

1.15
DRAIN-SOURCE BREAKDOWN VOLTAGE

10
I D = 250µA V GS = 0V
5
1.1

IS , REVERSE DRAIN CURRENT (A)

2
BV DSS , NORMALIZED

TJ = 125°C
1
1.05
0.5
25°C
1 0.2
-55°C
0.1

0.95 0.05

0.02
0.9
-50 -25 0 25 50 75 100 125 150 0.01
0.2 0.4 0.6 0.8 1 1.2
TJ , JUNCTION TEMPERATURE (°C)
V SD , BODY DIODE FORWARD VOLTAGE (V)

Figure 7. Breakdown Voltage Variation with Figure 8. Body Diode Forward Voltage Variation
Temperature. with Current and Temperature.

1500 10

1000
I D = 5A
VGS , GATE-SOURCE VOLTAGE (V)

8 V DS = 15V
CAPACITANCE (pF)

500 C iss 6

300 4

200 C oss
f = 1 MHz 2
V GS = 0V
C rss
100 0
0.1 0.2 0.5 1 2 5 10 20 30 0 2 4 6 8 10 12 14 16
VDS , DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC)

Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics.

VDD t on t off
t d(on) tr t d(off) tf
V IN RL 90%
90%
D V OUT
VO U T
VGS 10% 10%
R GEN DUT INVERTED
G
90%

V IN 50% 50%
S
10%

PULSE W IDTH

Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms.

NDS9936.SAM
Typical Electrical Characteristics (continued)

12 30

T J = -55°C 1ms
10
, TRANSCONDUCTANCE (SIEMENS)

10
10m
s
3

I D , DRAIN CURRENT (A)

8 25°C 100m
s
1
6 125°C
0.3 10s
4 VGS = 10V
0.1
SINGLE PULSE
2 T A = 25°C
0.03
V DS = 1 0 V
FS
g

0 0.01
0 2 4 6 8 10 1 2 3 5 10 20 30
I D , DRAIN CURRENT (A) VDS , DRAIN-SOURCE VOLTAGE (V)

Figure 13. Transconductance Variation with Drain Figure 14. Maximum Safe Operating Area.
Current and Temperature.

0 .5 D = 0.5
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE

0 .2 0.2 R JA (t) = r(t) * R JA

θ θ
0 .1 0.1 R JA = See Note 1c
θ
0 .0 5 0.05

0.02 P(pk)
0 .0 2
0.01
t1
0 .0 1 Single Pulse t2
0 .0 0 5 TJ - T = P * R JA (t)
A θ
Duty Cycle, D = t 1 / t 2
0 .0 0 2

0 .0 0 1
0 .0001 0 .001 0 .0 1 0 .1 1 10 100 300
t 1 , TIME (sec)

Figure 15. Transient Thermal Response Curve.

Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.

NDS9936.SAM
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ HiSeC™ SuperSOT™-8

Bottomless™ ISOPLANAR™ SyncFET™
CoolFET™ MICROWIRE™ TinyLogic™
CROSSVOLT™ POP™ UHC™
E2CMOSTM PowerTrench  VCX™
FACT™ QFET™
FACT Quiet Series™ QS™
FAST Quiet Series™
FASTr™ SuperSOT™-3
GTO™ SuperSOT™-6
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. E