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Five Variable Maps

Five Variable Maps


d
Two methods:
1 1
1) 32 squares 1
This map for b
Think of two maps on top of each other e=0 0
a 1 1
1 1
c
d
0 1
One can circle squares: This map for 1 b
on either level, e=1 1
or between levels. a 1 1 1 1
c
2) Enter variables (letters) on the 16 square map
This is the same as putting a “1” on the e=0 map d
This is the same as putting a “1” on the e=1 map
e 1
Can circle e 1 e 1 1 1 1 b
e
Cannot circle e e a 1 1 1 1
c
Best for where “e” has simple relations:
“e” is in only a few squares
or “e” is in almost all the squares.

Printed; 11/02/04 Department of Electronics, Carleton University Slide 46


Modified; February 11, 2004 © John Knight Digital Circuits p. 91

Five Variable Maps Five Variable Maps

Five Variable Maps d d


Wrap Around 1 1 1 1
To circle between layers, the layers must have a “1” in the b b
same position on both layers. a 1 a
1
These are the squares which differ by only one input bit. e=0 c e=0 c
Use of variable entered maps d OK d
For complicated functions using the double map is usually 1 1
easier. b b
For many functions one of the variables has a simple a a 1 1
1 1
relationship. Then the variable entered map is simpler. c e=1 c
e=1

58.• PROBLEM d
Plot the variable entered map on the right on the 5-variable
map on its left. b
a
d
e=0 c
e 1
d 1 b
1 e
a 1
e
b c
a Variable entered map
c
e=1

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 46


Modified; February 11, 2004 © John Knight Digital Circuits p. 92
Five Variable Maps Five Variable Maps

Five Variable Maps


Method 1: Dual 4-Variable maps d

1 1
Terms for circles only on the
1 b
e=0 map are ANDed with e e=0
F = e(b·d) 0
a 1 1
1 1
Terms for circles only on the
e=1 map are ANDed with e c
+ acd + ab
d
Terms for circles on both maps
don’t mention e. 0 1
+ e(cd)
1 b
e=1 1
Method 2: Variable Entered Maps a 1 1 1 1
“1s” in circles containing e c
must also be in another circle 1 e 1 e
e or
containing e or all “1s”. 1
d
“1s” in circles containing e
must be in another circle 1 e or 1 e F = e(b·d) e 1
containing e or all “1s”. e 1 1 b
+ acd + ab
Terms for circles
e
+ e(cd) a 1 1 1 1
containing e are ANDed with e
c
Terms for circles
containing e are ANDed with e

Printed; 11/02/04 Department of Electronics, Carleton University Slide 47 onSlide63


Comment
Modified; February 11, 2004 © John Knight Digital Circuits p. 93

Five Variable Maps Five-Variable Maps

Five-Variable Maps
The “0” is specifically entered on one map, just to remind you that it is a “1” on the other map.
Normally “0” are left blank to reduce the clutter.

59.• PROBLEM
d
F = (abc + abd + cb)e + (abd + ac + adb)e
= (abc + cb)e + (ac + adb)e +abd b
Plot F on the 5 variable map on the right. a
d
Plot F on the variable entered map on the right. e=0 c

60.• PROBLEM (based on the last problem) d b


Circle the 5 variable map and reduce F to 12 letters. a

Circle the variable entered map and reduce F to 4 terms of 3 b c


letters each. a Variable entered map
c
e=1

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 47


Modified; February 11, 2004 © John Knight Digital Circuits p. 94
Five Variable Maps Five Variable Maps

Five Variable Maps


John’s solution Tom’s solution
Method 1: Dual maps
d d
d 1 d d 1 d d 1 d
e=0 1 d e=0 1 d 1 d
b e=0 b
1 1 a 1 a
1 1 1
c c
1 1 d d
e=1 0 1
1 1 1 1
d 1 e=1 0 1 0 1
b e=1 b
a d 1 a d 1
c c
Method 2: Variable entered
F = e(abd) + bd + e(abcd) F = e(abd) + bd + abcd

d
Tom says,
d/e 1 d/0 d/e 1 d/0
“The interaction of
e e/d e e/d b
d and e is too complex.
a Use dual maps.”
e/d 1 e/d 1
c
F = e(abd) + bd + e(abcd)

Printed; 11/02/04 Department of Electronics, Carleton University Slide 48


Modified; February 11, 2004 © John Knight Digital Circuits p. 95

Five Variable Maps Five Variable Maps With Don’t Cares

Five Variable Maps With Don’t Cares


Method 1: Dual 4-variable maps
The extension to 5 variables is straight forward. As before, “d” can be optionally circled like “1”.

Method 2: Variable entered maps


This is much harder.
Some new notation must be devised.
A “d” by itself in a square means a “d” in both the upper and lower levels.
If a “d” is on only one level, the value on the other level must be specified.
“d / e” means “d” on the top level and “1” on the lower (e=1) level.
“e / d” means “1” on the upper level, the e level, and “d” on the lower level.
One must also have “0 / d” and “d /0”
The result is very difficult to circle properly.
However it may be useful if e appears in a very simple way.

Method 3: Split-square maps


A third method for 5 variables would be to use a “/” if the
symbols differed between the levels.
d/1 1 d/0
1/ 0 1/d b
Thus 1/0, 0/1, d/0, d/1, 0/d and 1/d would be introduced.
You can judge if this is an improvement over Method 2. a 1/d 1
c
Method 3 map

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 48


Modified; February 11, 2004 © John Knight Digital Circuits p. 96
Multiple Output Maps Five Variable Maps

Multiple Output Maps


Two or more outputs
Same inputs
d d
Find the circuits for F and G
1 1 1
Need two maps 1 1 1 1
b 1 b
Need two circuits 1 1 1 1
a 1 1 a
Often one can share some gates 1 1
c
We optimized maps individually Map of F Map of G c
got one common gate abd.
size measures
29 letters (literals) a b
c c
37 gate inputs d d
11 gates b a
c u=abd c
d d
a F 3 letters a G
b
d d b
d a d a
b b
d c
1 1 1
a a
1 1 1 b c
b 1 1 b c
1 1 d
1 1
a 1 1 a 1
F = a·c·d+bcd 1 G=b·c·d+acd
c +u+abd+abc c +u+abc+acd
13 letters 13 letters

Printed; 11/02/04 Department of Electronics, Carleton University Slide 49


Modified; February 11, 2004 © John Knight Digital Circuits p. 97

Multiple Output Maps Five Variable Maps With Don’t Cares

Circuit With Two Outputs


Multiple Outputs
The change between multiple outputs and single outputs
With multiple outputs, one can often find common gates that can be used for both outputs.
Often these common gates are not optimum for either individual circuit, but are optimum for the whole circuit.
In the example
• In this slide the circuits were optimized individually with a half-hearted effort to find common terms.
• In the next slide, common terms were agressively sought out.
Circuit complexity
There are several ways to estimate the size of the circuit. The same measures also estimate power dissipation
which is now likely to be more important than size.
• Inverters are not usually counted in the gate count. This is because most will be absorbed when one
does a AND/OR to NAND/NOR conversion.
• The number of gates.
• The number of gate inputs. This admits that multi-input gates are larger.
• The number of letters on the right hand side of the expressions. This is easy to do, and is usually
considered the best estimate.
Note these are relative estimates; used for estimating if one circuit bigger than another. An exact estimate is
usually not needed since modern logic is quite inexpensive. It is like estimating the cost of something as $10.00
and quibbiling whether it was really $9.98.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 49


Modified; February 11, 2004 © John Knight Digital Circuits p. 98
Multiple Output Maps Multiple Outputs, Finding Common Terms

Multiple Outputs, Finding Common Terms


d d
Try to share terms 1 1 1
• Identify common squares on both maps 1 1 1 1 1
b b
• Circle common terms 1 1 1 1
a 1 1 a
even if the individual maps 1 1
allow larger circles c c
• Check, sometimes this doesn’t help. Map of F Map of G
• Here changed 3-input AND to 4-input
and removed another 3-input.
a v=a·b·c·d 11 gate inputs
size measures b
Prev This c
d
slide slide a
b w=abcd
29 29 letters (literals) c
37 33 gate inputs d
9 gates a u=abd G
11
d b
F
a a
d b c
c d d
1 a 1 1 a
b b
1 1 1 c 1 1 c
b b
1 1 F =v+w+u 1 1 G=v+w+u
a 1 1 a 1 1
+abc+abcabc +acd+ab·c
acd
c c
11 gate inputs 11 gate inputs

Printed; 11/02/04 Department of Electronics, Carleton University Slide 50


Modified; February 11, 2004 © John Knight Digital Circuits p. 99

Multiple Output Maps Multiple Outputs

Multiple Outputs
Collecting the u+v+w terms would reduce the number of letters and gate inputs, but will increase the number of
gates. However the total logic is clearly reduced.
F = abc + abc + x (7 letters, 9 inputs, 3 gates)
G = acd + ab·c + x (7 letters, 9 inputs, 3 gates)
x = a·b·c·d + abcd + abd (11 letters, 14 inputs, 4 gates))
Total: 25 letters, 10 gates, 32 gate inputs
61.• PROBLEM
Find the Σ of Π expressions with minimal YZ
Z YZ
Z
logic for the two-output circuit E,F. WX 00 01 11 10 WX 00 01 11 10
W E 00 d 00
X 1
Soln has 5 gates. Y
Z
F 01 1 d X
01 1 1 1
X
11 d 1 1 11 d d 1
If it does not have to be pure Σ of Π, it can be W
10 1 d 1 d
W 10

done in 5 two-input gates, or, with factoring, Y Y


E F
4 gates.
62.• PROBLEM
Find the minimum circuit with the three outputs defined by the maps below. This is a hard problem. You should
read over the example for the 7-segment display drivers before attempting it. .
Z Z Z
YZ YZ YZ
WX 00 01 11 10 WX 00 01 11 10 WX 00 01 11 10
00 1 1 00 1 00 1 1
01 1 1 01 1 01 1 1 1 1
X X
11 d 11 1 1 11 1 1 1
W 10 W W
1 1 1 10 1 1 1 d 10 1 1 d
Y Y Y
E= F= G=

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 50


Modified; February 11, 2004 © John Knight Digital Circuits p. 100
Multiple Output Maps 7-Segment Display Driver,

7-Segment Display Driver,


YZ YZ
WX 00 01 11 10 WX 00 01 11 10
00 0000 0001 0011 0010 b a 00
Z a

LOGIC
01 0100 0101 0111 0110 f
f b
01
11 1100 1101 1111 1110 Y g g
e 11
10 1000 1001 1011 1010 X d
BCD Digits in binary W c e c 10
Design this d Decimal digits displayed
logic
Design Driver Logic
4 inputs, 7 outputs
7 maps, each with 6 don’t cares
Generate Maps
Choose segment “a”
find all the squares
where “a” is lit.
Repeat for “b”, “c”, . . .
Digits with “a” lit Digits with “b” lit Digits with “c” lit

Digits with “d” lit Digits with “e” lit Digits with “f” lit Digits with “g” lit

Printed; 11/02/04 Department of Electronics, Carleton University Slide 51


Modified; February 11, 2004 © John Knight Digital Circuits p. 101

Multiple Output Maps Seven-Segment Display Driver

Seven-Segment Display Driver


Design Example
The slide above, shows the bars in a seven segment display such as is used in many automotive dashboard
displays, or other bright displays1. All the digits from 0 through nine can be shown by lighting the proper bars.
Design a circuit which takes a binary-coded-decimal (BCD) digit in on leads W,X,Y and Z and sends out the
proper signals to light the 7-segment display on leads a, b, c, d, e, f, and g. Binary-coded decimal (BCD) digits
only go from 0 to 9. The other numbers, 10 through 15 will never be received as inputs. Utilize this fact in your
solution.
63.• PROBLEM YZ
WX\
The digits on the right have a revised form for 1, 7, 6 and 9.
Derive the equations for the display drivers. Keep the same notation for all items that
do not change.
Minimize the equations for multiple outputs, as is done in the next few pages. If you Revised display
have new terms, the letters H, Q, S, T, U and V have not been used.

1. The bright light-emitting diode displays use 7-segments as shown. The dimmer watch and control panel displays are usually
liquid crystal and have more complex driver logic.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 51


Modified; February 11, 2004 © John Knight Digital Circuits p. 102
Multiple Output Maps 7-Segment Display Driver,

Maps for 7-Segment Display Driver

Z Z Z
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
Digits with “a” lit X X X
d d d d d d d d d d d d
W W W
Transfer lit segment maps 1 1 d d 1 1 d d 1 1 d d
to Karnaugh maps a Y b Y c Y
Z Z Z Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y
Minimization
Look for isolated “1”s with no neighbors.
Expand circles to include “d”
Look for isolated pairs of “1”s with no neighbors.
These will always have to be circled individually.
Z Z Z Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Printed; 11/02/04 Department of Electronics, Carleton University Slide 52


Modified; February 11, 2004 © John Knight Digital Circuits p. 103

Multiple Output Maps BCD Display

BCD Display
Typical Minimization Procedure
This should work fairly well as as a general procedure, but a clever person may find more efficient
procedures for certain problems.
Z Z Z Z
1. Locate isolated “1”s.
1 1 1 1 1 1 1 1
These are “1”s in a square 1 1 1 1 1 1 1 1 1 1
that cannot be grouped with d d
X
d X X
d d d d
X
W W W W
any other square except 1 d d 1 d 1 1 1 1 d d
possibly a “d” squares. d Y e Y f Y g Y
Isolated Isolated
2. Circle these isolated “1”s pair
and expand the circle to include any “d”s.
3. Locate isolated pairs of “1”s in which
neither “1” can be paired with another any other square.
4. Circle this pair and expand the circle to include any “d”s.

Solution to Prob 62.• See also prob 74.• .


L=YZ+WX·Y+WXZ
E=W· Y+L F=WYZ+L G=WX+Z+XY
Z Z Z
YZ YZ YZ
WX 00 01 11 10 WX 00 01 11 10 WX 00 01 11 10
00 1 1 00 1 00 1 1 20 letters, 27 gate inputs, 11 gates
01 1 1 01 1 01 1 1 1 1
X X X
11 d 11 1 1 11 1 1 1
W 10 W W
1 1 1 10 1 1 1 d 10 1 1 d
Y Y Y

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 52


Modified; February 11, 2004 © John Knight Digital Circuits p. 104
Multiple Output Maps Maps for 7-Segment Display Driver ,

Maps for 7-Segment Display Driver ,

Minimization Example: f needs only one AND gate


Look for half-map circles (one letter terms) for three circles
These do not require an AND gate. W f
X
Hence they can always be circled Y
without loss of potential gate sharing. Z

On maps “b” and “c”, Z Z Z


circle W is redundant
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
X X X
d d d d d d d d d d d d
W W W
1 1 d d 1 1 d d 1 1 d d
a Y b Y c Y
Z Z Z Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

The green (light) circles are repeats of half-map circles.


A common error is to add the dashed circle W to the “b” map
and on the “c” map.
They are not needed.

Printed; 11/02/04 Department of Electronics, Carleton University Slide 53


Modified; February 11, 2004 © John Knight Digital Circuits p. 105

Multiple Output Maps BCD Display

Maps for 7-Segment Display Driver


Minimization (continued)
Circles that cover half the map
These are representend by a single letter and are particularly good.
Since they only contain a single letter, they do not need an AND gate. The input can feed directly into
the OR gate.
There is no advantage to sharing these terms between maps because there is no hardware to share.

5. Locate all circles which, with “d”s if needed, cover half of a map.
There are some ten of them in this example.
6. It is easy to overdo this step Two of these circles cover no “1”s that are not covered
by other circles. The only new squares they cover contain “d’s and hence are useless.
Remove such circles. The “b” and “c” maps have such useless circles.

Z Z Z
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
X X X
W
d d d d d d d d d d d d
W W
1 1 d d 1 1 d d 1 1 d d
a Y b Y c Y
Z Z Z Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
W
d d d d W
d d d d W
d d d d W
d d d d
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 53


Modified; February 11, 2004 © John Knight Digital Circuits p. 106
Multiple Output Maps Maps for 7-Segment Display Driver,

Maps for 7-Segment Display Driver ,


One partner squares. Z Z Z
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
X X X
W
d d d d d d d d d d d d
W W
1 1 d d 1 1 d d 1 1 d d
a Y b Y c Y
Z Z Z Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Squares with only one partner: (See arrows )


“d”s don't count as partners.
Single circle if: 1 1 1 1
• Square is isolated on another map.
• Square has a different single partner 1 1
on another map, and 1 1 1 1 1 1
both partners join other circles. G H G H
Else circle both partners. 3 AND gates 4 AND gates
They are unlikely to be shareable. There is no example in
the BCD display maps.
Expand circles to include “d”s; lighter (blue) circles.

Printed; 11/02/04 Department of Electronics, Carleton University Slide 54


Modified; February 11, 2004 © John Knight Digital Circuits p. 107

Multiple Output Maps BCD Display

Display Driver, One Partner Squares


Minimization (continued)
Squares that have one partner
These squares can be encircled with one and only one other square.
“d”s don’t count as a partner.
There are two cases, depending on what is at the same position on the other maps
The square matches an isolated square on another map Z
Z
Map “a” has such a square. It can be given a single circle 1 1 1
1 1 1
or a double square circle. 1 1
X 1 1
d d d d X
Looking at map “d” one sees it has to have a single W
1 1 d d W
d d d d
circle. It can do double duty if this term, WXYZ, a Y
1 d d
d Y
is given a single circle on each map.(
Z Z
The pair matches another single partner square.
1 1 1 1
Map “e” has such a square. WXYZ has one possible partner.
1 1
On all the other maps where WXYZ =1, it has the same d d d d
X
d d d d
X
W W
partner (maps d and g), or is covered already (maps f and c). 1 d d 1 d d
This means it is not a likely candidate for a single circle. e Y e Y
Circle both partners.
Z Z
Then expand to cover the “d”s. 1 1 1 1
Map “g” has such a square. W ·XYZ has one possible partner. 1 1 1 1 1 1
X X
The partner works on map “d”, and “b” has another partner. W
d d d d W
d d d d
1 1 d d 1 1 d d
Circle both partners and expand the circle to cover the “d”s. g Y g Y
There is no example in the BCD display where such term should
have only a single circle.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 54


Modified; February 11, 2004 © John Knight Digital Circuits p. 108
Multiple Output Maps Maps for 7-Segment Display Driver,

Maps for 7-Segment Display Driver,


Final fill in 1 1 1 1 1 1 1 1 1 1
Uncovered bits identified as “1” 1 1 1 1 1 1 1 1
X X X
Add terms to cover them W
d d d d d d d d d d d d
W W
1 1 d d 1 1 d d 1 1 d d
3 new AND terms needed
a Y b Y c Y
Z
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Z Z Z
L
1 1 1 1 1 1 1 1 1 1
One new term is unique XY 1 1 1 1 1 1 1 1
X X X
The others (K, L) are reused. W
d d d d d d d d d d d d
W W
1 1 d d 1 1 d d 1 1 d d
a Y b Y c Y
K
Z Z Z Z
K L
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1
X X X X
d d d d d d d d d d d d d d d d
W W W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Printed; 11/02/04 Department of Electronics, Carleton University Slide 55


Modified; February 11, 2004 © John Knight Digital Circuits p. 109

Multiple Output Maps BCD Display

Display Driver, Final Fill In


Minimization (continued)
Squares that are left
These squares have little chance of sharing by circling a smaller than optimum circle.
However keep your eyes open.
Example: Assume one did not do maps a, b and c, only d, e, f, and g.
Then one would do a two square circle for d, e and f
Z Z Z Z
1 1 1 1 1 1 1 1
If only 4 maps were optimized 1 1 1 1 1 1 1 1 1 1
X X X X
W
d d d d d d d d W
d d d d W
d d d d
W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

For all seven maps, the largest circles appear to be optimum.


However another circling, using smaller circles
R
might still be optimum.
K Z Z Z
64.• P ROBLEM 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
Reducing the size of L to L=XYZ d d d d
X X X
W W
d d d d W
d d d d
and adding reusable term R makes L 1 1 d d 1 1 d d 1 1 d d
all multi-letter terms reusable. a Y b Y c Y
L L N
Z Z Z Z
Find the number of letters, gate
1 1 1 1 1 1 1 1
inputs and gates. 1 1 1 1 1 1 1
1 1 1
X X X X
d d d d d d d d W
d d d d W
d d d d
W W
1 d d 1 d d 1 1 d d 1 1 d d
d Y e Y f Y g Y

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 55


Modified; February 11, 2004 © John Knight Digital Circuits p. 110
Multiple Output Maps Maps for 7-Segment Display Driver,

Maps for 7-Segment Display Driver,

Form Equations
Z Z Z
Label AND terms with letters
K 1 K 1 X 1 X Y 1 Z
If one term covers square
N J L J 1 1 1 X
replace “1” by letter X X X
d d d d d d d d d d d d
If several terms cover square W W W
1 1 d d 1 1 d d 1 1 d d
leave as “1”.
a Y b Y c Y

Z Z Z Z
K M 1 K 1 L M 1
N P P 1 X X X 1 1 P
X X X X
d d d d d d d d d d d d d d d d
W W W W
K d d K d d 1 W d d W W d d
d Y e Y f Y g Y

J = YZ M = XY a=J+W+K+N e=K+P
K = X·Z N = XYZ b=J+L+X f=L+W+X
L = Y·Z P = YZ c=Z+Y+X g = W + M + P + XY
d=N+M+P+K
Only term not reused.
Size measures
37 letters (literals)
Using: c=f+Z d=e+N+M
14 gates
38 gate inputs 35 letters 14 gates 36 gate inputs

Printed; 11/02/04 Department of Electronics, Carleton University Slide 56


Modified; February 11, 2004 © John Knight Digital Circuits p. 111

Multiple Output Maps Display Drivers, Forming Equations

Display Drivers, Forming Equations


One way of forming equations is to put a letter like J,K L ... in the square covered by a circle.
The one can write the OR inputs for the equation of the map by writing down the letters.
To avoid confusion, leave a 1 in squares which are covered by several circles.
All letters must appear at least once, or the circle they represent is redundant.
Terms which have only one input like X, do not require a special letter, and we give them the name of
the input variable.

It is very hard to find the optimal circling in a problem of this size.


These maps show a solution which is suboptimal, but you will probably have
difficulty improving without comparing answers.
Z Z Z
Q 1 M 1 X 1 X Y Y J
N J L J 1 X 1 X
X X X
W W W
1 W 1 X Y Y
a Y b Y c Y
Z Z Z Z
Q M 1 Q P Q M 1
N P P X X X X 1 1 P
X X X X
W W W W
Q Q 1 W 1 W
d Y e Y f Y g Y
The equations. a= J + W+ Q+ M
J = YZ N = XYZ 14+24 literals = 38
b=J+L+X 14 gates
L = Y·Z P = YZ
c=J+Y+X 16 and gate inputs + 23 or = 39
M = XY Q = X·Y·Z d = N+ M+ P + Q
e=Q+P
f = Q+ W+ X
g = W + M + P + X·Y

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 56


Modified; February 11, 2004 © John Knight Digital Circuits p. 112
Factoring and Multiplying Out Two canonical forms

Factoring and Multiplying Out


a
Two canonical forms c b
These form can represent any Boolean function. a
e
a
c
Sum of Products (Σ of Π) e
a
d b
abc + ae + ace + abd + . . .
NAND-NAND logic
Product of Sum (Π of Σ) Dual of Σ of Π
NAND
(a+b+c)(a+e)(a+c+e)(a+b+d)( . . .
NOR-NOR logic
Factoring Σ of Π
transforms Σ of Π → Π of Σ
(NAND-NAND)
ab + cad → (a + c)(b + a + d)
Multiplying out
transforms Π of Σ → Σ of Π
(a + c)(b + a + d) → ab + cad
a
Three Methods of factoring b
c
a
1. Use the 2nd distributive law e
a
x + ab = (x + a)(x + b) e c NOR Π of Σ
a
d b (NOR-NOR)
2. Take the dual, multiply out and take the dual again.
3. Plot F on a map and use DeMorgan’s Law

Printed; 11/02/04 Department of Electronics, Carleton University Slide 57


Modified; February 11, 2004 © John Knight Digital Circuits p. 113

Factoring and Multiplying Out Display Drivers, Forming Equations

Factoring and Multiplying Out

Why factor?
Often the factored form is about the same complexity as the Σ of Π form, but sometimes it can be much simpler.
Example where the factored form has half the letters and just over half the gate inputs.
a ·c·d + a·b·c + abc + acd = (a + c)(b + d)( a + c)

Three methods of factoring


Using (D2)
This is the straightforward way, unfortunately it uses the “unfamiliar” distributive law which makes the algebra
harder for many people.
Using duality and (D1)
This is algebraically just as difficult as the previous method. However using the more familiar (D1) makes it
easier for most people.
Using Karnaugh maps
This is quite easy, but is more complex for over five input variables.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 57


Modified; February 11, 2004 © John Knight Digital Circuits p. 114
Factoring and Multiplying Out Method 1: Factoring Using (D2) YZ + U =

Method 1: Factoring Using (D2) YZ + U = (Y + U)(Z + U)


Example
Get extended (D2)
ABC + X
Use (D2) ABC + X
= (A + X)(B + X)(C + X)
(AB + X) (C + X)
Use (D2) again
(A + X)(B + X)(C + X) Review
Consensus Rules
Example
bx + xy + yb
BC + AD
Use (D2) again = bx + yb
(BC + A) (BC + D)
(b + x)(x + y)(y + b)
Use (D2) again, twice
(B + A) (C + A)(B + D) (C + D) = (b + x)(y + b)

Can reduce further using Consensus (C2)


Example
BC + BD (C + B)(B + D) (C + D)
= (B + C)(C + D) (D + B)
(BC + B) (BC + D) = (C + B)(D + B)

(B + B) (C + B)(B + D) (C + D) Get the Swap Rule


1 (C + B)(B + D) (C + D) BC + BD = (B + C)(B + D)

Printed; 11/02/04 Department of Electronics, Carleton University Slide 58


Modified; February 11, 2004 © John Knight Digital Circuits p. 115

Factoring and Multiplying Out Factoring Using (D2)

Factoring Using (D2)


Review of the thorems that will be used.
The extended (D2) The dual is the extended (D1)
ABC + X = (A + X)(B + X)(C + X) (A + B + C)X = AX + BX + CX
Consensus The dual Consensus
bx + xy + yb = bx + yb (b + x)(x + y)(y + b) = (b + x)(y + b)
Swap rule (Sw) The dual of the Swap rule
BC + BD = (B + C)(B + D) (B + C)(B + D) = BC + BD

65.• PROBLEM
What can you say about the dual of the Swap rule?
If you can’t say anything, substitute X for W and X for W.
66.• PROBLEM
Factor AB + BC + CA

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 58


Modified; February 11, 2004 © John Knight Digital Circuits p. 116
Factoring and Multiplying Out Method 1: Factoring Using (D2) YZ + U =

Using D2 alone always works, but long!


Shortcut method: Review of Rules
(a) Look for common variables and use (D1) Simplify (S)
xy + x = x
xa + xbc = x(a + bc) (b + x)(b) = b
(b) Look for complemented variables and use (Sw) Reduction (R)
xa + xbc = (x + a)(x + bc) xy + x = y + x
(c) Do simplifications as soon as possible (b + x)(b)=(b + x)
xa + a = a, x + xy = x + y
Distributive (D2)
(d) Then use (D2)
u + yz =
Example: (u + y)(u + z)
Find common variables
ABC + BCD + BF Choose B over C Extended Distributive (D2)
commute Use (D1) with B u + xyz =
(u + x)(u + y)(u + z)
BAC + B(CD + F) Find complimented variables
Use (Sw) with B Swap (Sw)

(B + CD + F)(B + AC) by + bz = (b + y)(b + z)


commute Ready to use (D2)
This can be reduced
(B + F + CD)(B + AC)
Use (D2) twice (B + C)(B + F + C)
= (B + C)(F + C)
(B + F + C)(B + F + D)(B + A)(B + C) see page below
If one expanded using (D2) alone, get
(B + A)(F + A + B)(F + A + C)(F + A + D)(B + F + C)(B + F + D)(B + C)(F + C) ugh!
Printed; 11/02/04 Department of Electronics, Carleton University Slide 59
Modified; February 11, 2004 © John Knight Digital Circuits p. 117

Factoring and Multiplying Out Shortcuts for Factoring

Shortcuts for Factoring


Reason for choosing B over C
There are two common factors B and C.
If one factors out C first get C(AB + BD) + BF
Then one can only use (Sw) on part of the expression to give C(A + B)(B + D) +BF
This requires about 6 applications of (D2) to get the final result.

Details of the extra reduction


(B + C)(B + F + C)
= C +B(B + F) (D2) (c + x)(c + y) = c + xy
= C + BB + BF (D1)
= (C + B)(C + F) (D2)
The long expression using (D2) alone, except for simplifications
ABC + BCD + BF
= (A + BCD)(B + BCD)(C + BCD) + BF (D2)
= (A + BCD)(B + CD)(C) + BF (Simplification) xy + x = y + x, z + uz = z
= (BF + A + BCD)(BF + B + CD)(BF + C) (extended D2)
= (BF + A + BCD)(F + B + CD)(BF + C) (Simplification) xy + x = y + x
= (B + A + BCD)(F + A + BCD) (F + B + C)(F + B + D) (B + C)(F + C) Use (D2) three times
= (B + A)(F + A + BCD) (F + B + C)(F + B + D) (B + C)(F + C) (Simplification) z + uz = z
= (B + A)(F + A + B)(F + A + C) (F + A + D) (F + B + C)(F + B + D) (B + C)(F + C) (extended D2)
After completing the simplification, you can see why we like the short cuts.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 59


Modified; February 11, 2004 © John Knight Digital Circuits p. 118
Factoring and Multiplying Out Shortcuts for Factoring

Factoring Examples Using Shortcut Methods


Factor WXY + W·XZ + WYZ + WYZ
Associative law
WXY + WYZ + W·XZ + WYZ
(D1) used twice
W(XY + YZ) + W(XZ + YZ)
Swap: w(a) + w(b) = (w + b)(w + a)
[W +(XZ + YZ)][W +(XY + YZ)]
Swap D1 Swap on left; (D1) on right

[(W +(Z +Y)(Z + X)][W +Y(X + Z)]


Finally we have to use (D2).
D2 D2
(W + Z + Y)(W + Z + X) (W + Y)(W + X + Z)

Factor AB·D + ACD + A·C + ABD


(D1) on both sides
A(B·D + CD) + A(C + BD)
swap
[A + (C + BD)][A + (B·D + CD)]
(D2) on left; swap on right
[A + (C + B)(C + D)][A + (B + D)(C + D)] (D2) on left; (D2) on right
[A + (C + B)][A + (C + D)][A + (B + D)][A + (C + D)]
Clean up brackets
(A + C + B)(A + C + D)(A + B + D)(A + C + D)

67.• PROBLEM:
Factor AC + ABD + ABE + A·CDE Five factors, four have 3 letters, one has 2.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 59


Modified; February 11, 2004 © John Knight Digital Circuits p. 119

Factoring and Multiplying Out Shortcuts for Factoring

Example of Multiplying Out

(A + B)(C + D)(F + G + H) All letters are different, no simplification possible


Use (D1)
= (AC + AD + BC + BD)(F + G + H)
rewrite
(AC + AD + BC + BD) · F
= + (AC + AD + BC + BD) · G
+ (AC + AD + BC + BD) · H
Use (D1)
ACF + ADF + BCF + BDF
= + ACG + ADG + BCG + BDG
+ ACH + ADH + BCH + BDH

With all the letters different, there is no way to simplify.


The expressions get long rapidly.
Using (D1) always works, it is easy on the brain, but hard on the pencil.
Also the simplifications must be done by other means.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 60


Modified; February 11, 2004 © John Knight Digital Circuits p. 120
Factoring and Multiplying Out Multiplying Out

Multiplying Out
Needed to change Π of Σ to Σ of Π
( - - - )( - - - )( - - - ) → ( ) + ( ) + ( )
Multiplying out is the dual operation of factoring.
Multiplying Out Uses (D1)
Example:
(B + F + C)(B + C)(B + F + D)(B + A)
x +xy = x Use D1 twice
0 0 BCD
= (BB + BC + FB + FC + CB + C)(BB + BA + FB + FA + DB + DA) D

Use D1 ACF
= (FB + C)(BA + FB + FA + DB + DA) BF
B
x +xy = x F A
0
= FBBA + FBFB + FBFA + FBDB + FBDA ABC
ACD C
+ CBA + CFB + CFA + CDB + CDA)
BCD
Put letters in order D
= BF + ABC + ACF + BCD + ACD
Use map F
= BF + ABC + BCD B
A
ABC
ACD C

Printed; 11/02/04 Department of Electronics, Carleton University Slide 60


Modified; February 11, 2004 © John Knight Digital Circuits p. 121

Factoring and Multiplying Out Shortcuts for Factoring

Example of Multiplying Out

(A + D)(A + C + D)(A + B)(A + B + C)(A + C + D)


Arrange terms to ready to use Swap
= (A + D)(A + B) · (A + C + D )(A + C + D) · (A + B + C)
Use Swap twice
= (AB + A·D) · [A (C + D) + A(C + D )] · (A + B + C)
Use (D1)
= {AB [A (C + D) + A(C + D )] + A·D)[A (C + D) + A(C + D )]} · (A + B + C)
Use (D1)
= {AB(C + D) + A·D(C + D)} · (A + B + C)
xy + x = x
= {AB·C + ABD + A·D·C + A·D)} · (A + B + C)
Use (D1)
{AB·C + ABD + A·D)} · A AB·C + ABD +
= + {AB·C + ABD + A·D)} · B = + A·DB
+ {AB·C + ABD + A·D)} · C ABDC + A·DC D A · C ·D
xy + x = x
ABD
Collect terms
= AB·C + ABD + ABD + ACD B
Check on map A
that there is no AB·C
more simplification ABD C

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 60


Modified; February 11, 2004 © John Knight Digital Circuits p. 122
Factoring and Multiplying Out Multiplying Out

Using D1 alone eventually works, but long!


Shortcut method: Review of Rules
(a) Look for common variables and use (D2) Simplify (S)
xy + x = x
(x + a)(x + b) = x + bc (b + x)(b) = b
(b) Look for complemented variables and use (Sw) Reduction (R)
(x + a)(x + bc) = xa + xbc xy + x = y + x
(c) Do simplifications as soon as possible (b + x)(b)=(b + x)
xa + a = a, x + xy = x + y
Distributive (D2)
(d) Then use (D1)
u + yz =
(e) Loop back and try again until done. (u + y)(u + z)
Extended Distributive (D2)
Example: u + xyz =
(B + F + C)(B + C)(B + F + D)(B + A) (u + x)(u + y)(u + z)
Find common variables
= (B + F + C)(B + F + D) · (B + A)(B + C) Swap (Sw)
Use (D2) twice by + bz = (b + y)(b + z)
= (B + F + CD) · (B + AC)
Use (Sw) with B
= BAC + B(F + CD)
Finally use (D1)
= ABC + BF + BCD
Go back and look at Slide 60

Printed; 11/02/04 Department of Electronics, Carleton University Slide 61


Modified; February 11, 2004 © John Knight Digital Circuits p. 123

Factoring and Multiplying Out Shortcuts for Factoring

Multiplying Out
68.• PROBLEM
Multiply out. Remember to check for obvious simplifications before starting.
(W + Y + Z)(X + Y + Z)(W + X)(W + Z)(X + Y + Z)(W + X + Z)
69.• PROBLEM
Multiply out to get four terms of three letters each. The answer should be very symmetric on an AB\CD
Karnaugh map.
(B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 61


Modified; February 11, 2004 © John Knight Digital Circuits p. 124
Factoring and Multiplying Out Multiplying Out, Short Cut Method

Multiplying Out, Short Cut Method

Example:
(A + C + D)(B + D)(A + B + C)(C + D)(A + B + D)
(x)(x+y) = x Always check for obvious simplifications
= (A + C + D)(B + D)(A + B + C)(C + D)(A + B + D)
Rearrange to use (D2) and Swap
= (A + C + D)(A + C + B)(B + D)(C + D)
Use (D2) and Swap
(A + C + BD) (CD + BD)
x +xy = x

(A + C + BD) · CD ACD + CD + BCD


= 0 Use (D1)
=
+ (A + C + BD) · BD + ABD + CBD + BDBD

Collect terms
= CD + ABD + BCD CD
Check map for further D
BCD
simplifications
= CD + ABD + BC
ABD B
A

Printed; 11/02/04 Department of Electronics, Carleton University Slide 62


Modified; February 11, 2004 © John Knight Digital Circuits p. 125

Factoring and Multiplying Out Multiplying Out, Short Cuts

Multiplying Out, Short Cuts


Simplify before you start
You always want to look for (x + ... + y )( x + y) =(x + y)
Reduction and consensus are much harder to spot. Here
(A + C + D)(C + D)
= [C + (A + D)(D)] Using (D2)
= [C + AD]
= (C + A)(C + D)
Further (C + A)(A + B + C) = (C + A)
Hence the expression could be reduced before starting to
(B + D)(C + D)(A + C)
However, it is sometimes easier just to use (D2) and Swap.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 62


Modified; February 11, 2004 © John Knight Digital Circuits p. 126
Factoring and Multiplying Out Method 2: Factoring Using Duality

Method 2: Factoring Using Duality


Recall Factoring Methods:
1. Use (D1)
Includes short cuts where one looks for (D2) and Swap first.
2. Use Duality to change factoring to the easier multiplying out.
3. Use Karnaugh Maps and DeMorgan’s Law.

Factoring Using Duality


Steps: Multiply Out Details
(1) The expression to factor is Σ of Π (A + B)(B + C)(A + C + D)
Example: AB + BC + ACD (D2)
= (B + AC)(A + C + D)
(2) Take its dual to get Π of Σ. (D1)
(A + B)(B + C)(A + C + D) = BA + BC + BD +
ACA + ACC + ACD
(3) Multiply out the dual to get Σ of Π again
BA + BC + BD + AC = BA + BC + BD + AC
(3a) The dual identity is
(A + B)(B + C)(A + C + D) = BA + BC + BD + AC
Multiplying out is based on (D1).
(4) Taking the dual back gives a valid identity
Easier than factoring based on (D2).
with the desired Π of Σ.
AB + BC + ACD = (B + A)(B + C)(B + D)(A + C) Algebra of one is the
dual of the other

Printed; 11/02/04 Department of Electronics, Carleton University Slide 63


Modified; February 11, 2004 © John Knight Digital Circuits p. 127

Factoring and Multiplying Out Changing Factoring into Multiplying Out

Changing Factoring into Multiplying Out


Factoring a Σ of Π is Coverted to Multiplying Out its Dual
We take a factoring problem which is confusing, because factoring is based on (D2). This law is not a normal
algebraic law and is harder to work with.
In the dual space, the dual expression is already factored. The problem is transformed into multiplying out,
which is based on the first distributive law (D1). (D1) is more familiar, and hence multiplying out is usually
easier than factoring.
Multiplying out in the dual space does not give the answer. One take the dual of the answer. This will then be
the factored form of the original expression.
70.• PROBLEM
Show that
F = A·B·C ·D + ABCD +ABCD + ABCD
takes only 8 letters or 12 gate inputs in factored form.

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 63


Modified; February 11, 2004 © John Knight Digital Circuits p. 128
Factoring and Multiplying Out Factoring Using Duality

Factoring Using Duality


Example:
A ·BD + AB ·D + ABC + AC (-25% if you say these are equal)
Take dual
(A + B + D)(A + B + D)(A + B + C)(A + C)
Rearrange to use (D2)
= (A + B + D)(A + B + C)(A + B + D)(A + C)
Use (D2)
= [A + (B + D)(B + C)] [A + (B + D)C]
Use Swap
equal

= A (B + D)C) + A(B + D)(B + C) equal


Use Swap
= A (B + D)C) + A(B ·C + BD)
Use (D1)
= A·BC + A ·DC + AB ·C + ABD A·BC D

= A ·BC + A ·DC + AB ·C + ABD


OK Check on map ABD
B
A
Take dual
C A ·DC
(A + B + C)(A + D + C)(B + C)(A + B + D) AB ·C

Printed; 11/02/04 Department of Electronics, Carleton University Slide 64


Modified; February 11, 2004 © John Knight Digital Circuits p. 129

Factoring and Multiplying Out Factoring In the Dual Space

Factoring In the Dual Space


Example

A ·BC + ACD + ABC + BCD To Factor


Take the dual
(A + B + C)(A + C + D)(A + B + C)(B + C + D) Note the excess of C and C
rearrange for (D2)
= (C + B + A)(C + B + A)(C + A + D)(C + B + D)
Use (D2)
= [C + (B + A)(B + A)] · [(C + (A + D)(B + D)]
Use Swap
= C(A + D)(B + D) + C(B + A)(B + A)
Use Swap
= C(AB + D) + C(BA + BA)
Use (D1) CD
D
= CAB + CD + C ·BA + CBA
OK Check on map for
ABC
more simplifications B
Take the dual A ABC
(C + A + B)(C + D)(C + B + A)(C + B + A) C
AB·C

71.• PROBLEM
Factor EF ·D + ECD + E ·C + EFD

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 64


Modified; February 11, 2004 © John Knight Digital Circuits p. 130
Factoring and Multiplying Out Method 3: Factoring Using Karnaugh

Method 3: Factoring Using Karnaugh Maps


D
Steps:
1 1 Map of F
(1) Given F = ( Σ of Π expression)
1 B
F = A·BC + AD + ABC + BCD 1 1 1
A
(2) Plot it on a map. 1 1
C
D
(3) Make a map for F,
It has “1” where F had “0” 1 1 Map of F
1 1 1 B
(4) Circle the F map 1
A 1 1
C D
(5) Write out the equation for F
1 1 Map of F
F = C ·D + ABC + AB ·D + A·B ·C
1 1 1 B
1
(6) Invert F using DeMorgan’s law A 1 1
to get F as Π of Σ
C
F = (C + D)(A + B + C)(A + B + D)(A + B + C)

Printed; 11/02/04 Department of Electronics, Carleton University Slide 65


Modified; February 11, 2004 © John Knight Digital Circuits p. 131

Factoring and Multiplying Out Method 3: Factoring Using Karnaugh

Method 3: Factoring Using Karnaugh Maps


• This method is probably the easiest, and least error prone, for up to 4 variables. Above 4, it gets hard.
• It is very easy to incorporate don’t cares with this method.
72.• PROBLEM
Factor EF ·D + ECD + E ·C + EFD
Using a Karnaugh map and compare your answer with that from Problem 71.•
73.• PROBLEM
Factor ACD + BD + ABC + CD + ABD
Use a Karnaugh map and obtain the minimum Π of Σ expression.
74.• PROBLEM
Show that Prob 62.• has a slightly simpler solution if you find the Π of Σ expression.
Solution:
to Prob 74.•
Z Z Z
Maps from Prob 62.• YZ
WX 00 01 11 10
YZ
WX 00 01 11 10
YZ
WX 00 01 11 10
00 1 1 00 1 1 00 1 1
Z Z Z
YZ YZ YZ 01 1 1 01 1 01 1 1 1 1
WX 00 01 11 10 WX 00 01 11 10 WX 00 01 11 10 X X X
00 1 1 00 1 00 1 1 11 d 11 1 1 11 1 1 1
W 10 W 10 W
01 1 1 01 1 01 1 1 1 1 1 1 1 1 1 1 d 10 1 1 d
X X
11 d 11 1 1 11 1 1 1 Y Y Y
W W 10 W E=YZ+Q+P
10 1 1 1 1 1 1 d 10 1 1 d F=W ·Z+Q G=X·Z+M
Y Y Y M=WXY ·Z P=WY
E= Q=M+XYZ
F= G=
E=(Y+Z)Q ·P F=(W+Z)Q G=(X+Z)M
Σ of Π solution had 20 letters, 27 gate inputs, and 11 gates.
20 letters, 23 gate inputs, 10 gates

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 65


Modified; February 11, 2004 © John Knight Digital Circuits p. 132
Factoring and Multiplying Out Method 3: Factoring Using Karnaugh

Product of Sum Karnaugh Maps


Simplify the Π of Σ expression
F = (A + B + C)(A + C + D)(B + C + D)(B + D)(A + C + D)
D
(1) Find Inverse with DeMorgan. 1 1 1 Map of F
F = ABC + AC·D + BCD + B ·D + AC·D 1 1 B
1 1
(2) Make a map for F A 1 1 1
(3) Simplify the F map C

D
(4) Write out the equation for F
1 1 1 Map of F
F = BC + AB ·C + ABD + B ·D 1 1 B
1 1
A 1 1 1
(5) Invert F using DeMorgan’s law
to get simplified F C

F = (B + C)(A + B + C)(A + B + D)(B + D)

The Σ of Π map for F


Can be used as a Π of Σ map for F

Printed; 11/02/04 Department of Electronics, Carleton University Slide 66


Modified; February 11, 2004 © John Knight Digital Circuits p. 133

Factoring and Multiplying Out Method 3: Factoring Using Karnaugh

Product of Sum Maps

Constructing an AND of ORs map True Π of Σ map


a a a a
bc 0 1 bc 0 1 bc 0 1
bc 0 1
00 0 1 00 1 1 00 0 0 00 0 0
01 0 1 01 1 1 c
01 1 1 c 01 0 1
1 1 1 0 1 1 c
11 11 11 11 1 0
b 10 1 0 b 10 0 0 b 10
10 1 1 0 0
F=a+b F=a+b F=c F = (a + b)(a + b)c
Product map
The “0”s are the important thing in Π of Σ maps.
When one ANDs the three maps, the product map will have a “0” where any of the sum terms have a “0”.
The other squares have “1”s.
a
bc 0 1
If one multiplies out F = (a + b)(a + b)c, one gets F= abc + abc. 00 0 0
Which has exactly the same map except now one thinks about the 01 0 1 c
11 1 0 a
“1”s instead of the “0”s. b bc 0 1
10 0 0 00 1 1
Thus the map of F is not quite the Π of Σ map for F. Σ of Π map of F 01 1 0 c
However it can be used as that map. 11 0 1
Further using DeMorgan’s theorem on the map of F, is far easier b 10 1 1
than twisting ones mind around the Π of Σ maps such as the one above.
Σ of Π map of F
75.• PROBLEM
Multiply out to get three terms of 2 of three letters, and one of two letters. Use a Karnaugh map.
(B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 66


Modified; February 11, 2004 © John Knight Digital Circuits p. 134
Method 3: Factoring Using Karnaugh

Printed; 11/02/04 Department of Electronics, Carleton University Slide 67


Modified; February 11, 2004 © John Knight Digital Circuits p. 135

Method 3: Factoring Using Karnaugh

Solution problem 75
F = (B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)
F = BC + ABC + AC + ABC + A CD

D D
1 1 1 1
1 1 1 1 B B
1 1 1 1
A 1 A 1 1 1
F C F C

F = B D + AB C + A B C

76.• PROBLEM (ACTUALLY SOLN TO 75)


Multiply out to get four terms of three letters each. Use a Karnaugh map.
(B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Department of Electronics, Carleton University Comment on Slide 63


Modified; February 11, 2004 © John Knight Digital Circuits p. 136

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