Reg No. Name
FIFTH SEMESTER B.TECH DEGREE EXAMINATION MODEL TEST
QUESTION PAPER, NOVEMBER 2017
CS 305: Microprocessor and Microcontrollers
Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions. Each carries 3 marks
Define macro and subroutine with example
Explain the use of following 8086 signals
a. HOLD, and HLDA
b, DEN and BHE
Explain the procedure for generating physical address and generate the physical
address eorresponds to the segment address 105SH and offset address 555SH
Explain the indexed addressing and based index addressing modes of 8086 with
PART B
Answer uny Two questions. Each carries 9 marks
4. Draw the maximum mode circuit connections of 8086
'b. Write an 8086 programme to find factorial of a number using procedure
a. Write an 8086 assembly language programme to convert ASCII to decimal
conversion using macro,
b. Draw the minimum mode of $086 bus timing for a memory read and write
operations
7. What are the different addressing modes available in 8086
PARTC
Answer all questions. Each carries 3 marks
8. Explain the different types of interrupts in 808616. Draw and explain the architecture of 8051
17.
a. Briefly explain the interrupt structure of 8051
b. Write an assembly language program to compute x to the power n where both
x and n are 8- bit numbers given by the user and the result should not be more
than 16 bits using 8051
18
a, Explain the different addressing modes of 8051
b. Write an assembly language program to count the number of Os and Is in an 8-
bit number using 8051
19. Explain the different types of instructions available in 8051
20. Write a note on Programmable Interval Timer.
9. Discuss about fixed addressing and variable port addressing in i/o interfacing with
8086.
10. What are the registers available in DMA controller? Mention its use
11. Explain the use of keyboard / display controller- 8279
PART D
Answer any Two questions. Each carries 9 marks
12. What do you meant by an interrupt and how an interrupt is handled in 8086
13.
a. Write about memory mapped i/o and isolated i/o.
b. Interface Two 16X8 ROM and Two 32X8 RAM with 8086. Select the starting
address of EPROM suitably. The RAM address must start at 00000H.
14. Briefly explain the architecture of programmable input-output (8255)
PART E
Answer any four questions. Each carries 10 marks
15.
a, Write about Microcontrollers and its types. (4 marks)
b. Discuss the factors to be considered while selecting microcontrollers.
c. Mention the applications of Microcontrollers.16.
17.
19.
20.
‘Draw and explain the architecture of 8051
a. Briefly explain the interrupt structure of 8051
b. Write an assembly language program to compute x to the power n where both
x and n are 8- bit numbers given by the user and the result should not be more
than 16 bits using 8051
a, Explain the different addressing modes of 8051
b. Write an assembly language program to count the number of Os and Is in an 8-
bit number using 8051
Explain the different types of instructions available in 8051
Write a note on Programmable Interval Timer.
Answer Key
PART A
1. Macro and Subroutine 3 marks)
A macro call isan instruction to replace the macro name with its body, whereas
subroutine call is an instruction to transfer the program’s control to the subroutine’s
definition with all parameters, if required.
‘A macro call results in macro expansion, whereas subroutine call results in execution,
Macro expansion increases the size of the program but subroutine execution doesn't
affect the size of the program
Macro expansion doesn’t affect the execution speed of the program much in comparison
to subroutines affect the execution speed of the program
a. HOLD: Input signal to the processor form the bus masters as a request to grant the
control of the bus. Usually used by the DMA controller to get the control ofthe bus.
HILDA: Is an Acknowledgment signal from the processor for HOLD —_(1.Smarks)
b. DEN (Data Enable): Output signal ftom the processor used as out put enable forthe
transceivers and
‘BHE (Bus High Enable): It is used to enable data onto the most significant half of data
bus, Di-Dis. 8-bit device connected to upper half of the data bus use BHE (Active Low)
signal. Itis multiplexed with status signal Sr. (5 mark)