VND830

Double channel high-side driver

Features

Type RDS(on) IOUT VCC

VND830 60mΩ(1) 6A(1) 36V

( s )
ct
1. Per each channel.

■ CMOS compatible inputs

SO-16L
d u
■ Open Drain status outputs
r o
■ On-state open load detection Description
e P
■ Off-state open load detection
l e t
The VND830 is a double channel high-side driver
■ Shorted load protection
s o
designed in| STMicroelectronics VIPower M0-3
Technology. The VND830 is intended for driving
■
■
Undervoltage and overvoltage shutdown
Loss of ground protection
O bany type of multiple load with one side connected
to ground.
■ Very low standby current
) - The Active VCC pin voltage clamp protects the
■ Reverse battery protection(a)

c t(s device against low energy spikes (see ISO7637

transient compatibility table). Active current

d u limitation combined with thermal shutdown and

automatic restart protects the device against

r o overload. The device detects the open load

e P condition in both the on and off-state.

let
In the off-state the device detects if the output is
shorted to VCC. The device automatically turns off

o
a. See Application schematic on page 16

s
in the case where the ground pin becomes
disconnected.

Ob
Table 1. Device summary
Order codes
Package
Tube Tape and reel
SO-16L VND830 VND83013TR

December 2008 Rev 3 1/27

www.st.com 27
 Contents VND830

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
)
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

( s
3
ct
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
u
3.1
d
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
o
3.1.1
3.1.2 P r
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
3.2
e t e
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

o l
3.3
3.4 b s
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5
- O
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 19

(s )
4
t
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
c
4.1
u
SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
d
r o
5
P
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

e
l e t
5.1
5.2
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-16L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

s o
O6b Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27
 VND830 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10.
Table 11.
s )
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
(
ct
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14.
d u
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 15.
Table 16. r o
SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

e P
l e t
s o
O b
) -
c t (s
d u
r o
e P
l e t
s o
O b

3/27
 List of figures VND830

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10.
Figure 11.
s )
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
(
ct
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. ILIM vs TCASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14.
d u
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15.
Figure 16. r o
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. P
On-state resistance vs TCASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
e
Figure 18.
Figure 19.
l e t
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20.
Figure 21.
s o
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22.
Figure 23. O b
Open load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24.
) -
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

(s
Figure 25. Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26.
Figure 27.
c t
Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28.
d u
Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29.
Figure 30. r o
Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of a quad channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 31. P
SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
e
Figure 32.

l
Figure 33.
e t
SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

s o
O b

4/27
 VND830 Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

Vcc

Vcc OVERVOLTAGE
CLAMP

UNDERVOLTAGE

GND CLAMP 1

OUTPUT1
INPUT1 DRIVER 1

STATUS1
CLAMP 2

( s )
ct
CURRENT LIMITER 1 DRIVER 2
LOGIC
OVERTEMP. 1 OUTPUT2
OPEN LOAD ON 1

INPUT2

d u
CURRENT LIMITER 2

STATUS2
OPEN LOAD OFF 1

r o
OPEN LOAD ON 2

e P OPEN LOAD OFF 2

t
OVERTEMP. 2

o l e
b s
Figure 2. Configuration diagram (top view)
- O
(s )
cVt CC 1 16 VCC
u N.C.
od
OUTPUT 1

Pr
GND OUTPUT 1

ete
INPUT 1 OUTPUT 1

ol
STATUS 1 OUTPUT 2

b s STATUS 2 OUTPUT 2

O INPUT 2
VCC 8 9
OUTPUT 2
VCC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input

Floating X X X X
Through 10KΩ
To ground X
resistor

5/27
 Electrical specifications VND830

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.

Table 3. Absolute maximum ratings

( s )
ct
Symbol Parameter Value Unit

du
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage

r o - 0.3 V
- IGND DC reverse ground pin current
P - 200 mA

ete
IOUT DC output current Internally limited A

ol
- IOUT Reverse DC output current -6 A
IIN
ISTAT
DC input current
DC Status current
b s +/- 10
+/- 10
mA
mA

- O
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
- INPUT
(s ) 4000 V
VESD
- STATUS
c t 4000 V
- OUTPUT

d
- VCC u 5000 V

o
5000 V

P
EMAX r
Maximum switching energy
(L = 1.8mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 9A)
102 mJ

e t e Ptot Power dissipation (per island) at Tlead = 25°C 8.3 W

o l Tj Junction operating temperature Internally limited °C

b s Tc Case operating temperature - 40 to 150

O Tstg Storage temperature - 55 to 150 °C

6/27
 VND830 Electrical specifications

2.2 Thermal data

Table 4. Thermal data (per island)
Symbol Parameter Value Unit

Rthj-lead Thermal resistance junction-lead 15 °C/W

Rthj-amb Thermal resistance junction-ambient 65(1) 48(2) °C/W
2
1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.

2.3 Electrical characteristics

( s )
Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless
u ct
otherwise stated.
o d
Figure 3. Current and voltage conventions
P r
e
let
IS

IIN1
s o VF1 (*)
VCC
INPUT 1 b VCC

-O
VIN1 ISTAT1 IOUT1

(s)
STATUS 1 OUTPUT 1
VSTAT1 IIN2 VOUT1

c t INPUT 2 IOUT2
u
VIN2 ISTAT2

od
OUTPUT 2
VOUT2
STATUS 2

Pr
GND
VSTAT2

ete
IGND

o l
b s
Note: VFn = VCCn - VOUTn during reverse battery condition.

7/27
Electrical specifications VND830

Table 5. Power output

Symbol Parameter Test conditions Min. Typ. Max. Unit

Operating supply
VCC 5.5 13 36 V
voltage
VUSD Undervoltage shutdown 3 4 5.5 V
VOV Overvoltage shutdown 36 V
IOUT = 2A; Tj = 25°C 60 mΩ
RON On-state resistance
IOUT = 2A; VCC > 8V 120 mΩ
Off-state; VCC = 13V;
VIN = VOUT = 0V 12 40 µA

( s )
ct
Off-state; VCC = 13V;
IS Supply current VIN = VOUT = 0V;
Tj = 25°C
d u 12 25 µA

ro
On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
e P 5 7 mA
IL(off1) Off-state output current VIN = VOUT = 0V
l e t 0 50 µA
IL(off2)
s o
Off-state output current VIN = 0V; VOUT = 3.5V -75 0 µA

IL(off3) Off-state output current

O b
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
5 µA

IL(off4) Off-state output current

) -VIN = VOUT = 0V; VCC = 13V;
3 µA

(s
Tj =25°C

c t
Table 6.
u
Protections
d
Symbol
r o Parameter Test conditions Min. Typ. Max. Unit

e P
TTSD Shutdown temperature 150 175 200 °C

let
TR Reset temperature 135 °C

s o Thyst Thermal hysteresis

Status delay in overload
7 15 °C

Ob tSDL
conditions
Tj > TTSD

VCC = 13V 6 9
20

15
µs

A
Ilim Current limitation
5.5V < VCC < 36V 15 A
Turn-off output clamp VCC - VCC - VCC -
Vdemag IOUT = 2A; L = 6mH V
voltage 41 48 55

Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.

8/27
VND830 Electrical specifications

Table 7. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

VF Forward on voltage - IOUT = 1.3A; Tj = 150°C 0.6 V

Table 8. Switching (VCC = 13V; Tj = 25°C)

Symbol Parameter Test conditions Min. Typ. Max. Unit

RL = 13Ω from VIN rising edge

td(on) Turn-on delay time 30 µs
to VOUT = 1.3V (see Figure 5)
RL = 13Ω from VIN falling edge
to VOUT = 11.7V
td(off) Turn-off delay time
(see Figure 5)
30

( s ) µs

dVOUT/dt(on) Turn-on voltage slope

RL = 13Ω from VOUT = 1.3V to
VOUT = 10.4V (see Figure 5)
u
See
Figure 10 ct V/µs

RL = 13Ω from VOUT = 11.7V

o d See

Pr
dVOUT/dt(off) Turn-off voltage slope V/µs
to VOUT = 1.3V (see Figure 5) Figure 12

Table 9. Logic inputs

e t e
Symbol Parameter

s ol
Test conditions Min. Typ. Max. Unit

VIL
IIL
Input low level
Low level input current
O b VIN = 1.25V 1
1.25 V
µA
VIH Input high level
) - 3.25 V
IIH

c t (s
High level input current VIN = 3.25V 10 µA
VI(hyst)
u
Input hysteresis voltage 0.5 V

od
IIN = 1mA 6 6.8 8 V
VICL Input clamp voltage

P r IIN = -1mA - 0.7 V

e
let
Table 10. Status pin

s o Symbol Parameter Test conditions Min. Typ. Max. Unit

Ob VSTAT
ILSTAT
Status low output voltage
Status leakage current
ISTAT = 1.6mA
Normal operation; VSTAT = 5V
0.5
10
V
µA
CSTAT Status pin Input capacitance Normal operation; VSTAT = 5V 100 pF
ISTAT = 1mA 6 6.8 8 V
VSCL Status clamp voltage
ISTAT = - 1mA - 0.7 V

9/27
Electrical specifications VND830

Table 11. Open load detection

Symbol Parameter Test conditions Min. Typ. Max. Unit

IOL Open load on-state detection threshold VIN = 5V 50 100 200 mA

tDOL(on) Open load on-state detection delay IOUT = 0A 200 µs
Open load off-state voltage detection
VOL VIN = 0V 1.5 2.5 3.5 V
threshold
tDOL(off) Open load detection delay at turn-off 1000 µs

Figure 4. Status timings

OPEN LOAD STATUS TIMING (with external pull-up) OVER TEMP STATUS TIMING

( s )
ct
VOUT > VOL IOUT < IOL
Tj > TTSD
VINn
VINn

d u
r o
VSTATn
VSTATn

e P
let
tSDL tSDL
tDOL(off)
tDOL(on)

s o
O b
Figure 5. Switching characteristics
) -
VOUT

t ( s
c
du
90%
80%

r o dVOUT/dt(on) dVOUT/dt(off)

e P tr 10% tf

l e t ISENSE
t

s o 90%

Ob
t
tDSENSE
INPUT
td(on) td(off)

10/27
 VND830 Electrical specifications

Table 12. Truth table

Conditions Input Output Status

L L H
Normal operation
H H H
L L H
Current limitation H X (Tj < TTSD) H
H X (Tj > TTSD) L
L L H
Overtemperature
H L L
L L X
Undervoltage
H L X

( s )
ct
L L H
Overvoltage
H
L
L
H
d u H
L
Output voltage > VOL
H H
r o H

Output current < IOL

L L

e P H
H

l e t H L

s o
Table 13. Electrical transient requirements
O b
)-
ISO T/R Test level
7637/1
Test pulse I

t ( s II III IV Delays and impedance

- 25V(1) c - 50V(1) - 75V(1) - 100V(1)

du
1 2ms, 10Ω
(1)
2 + 25V + 50V(1) + 75V(1) + 100V(1) 0.2ms, 10Ω
3a
r o - 25V(1) - 50V(1) - 100V(1) - 150V(1) 0.1µs, 50Ω

e 3b P + 25V (1)
+ 50V (1)
+ 75V (1)
+ 100V (1)
0.1µs, 50Ω

e t - 4V(1) - 5V(1) - 6V(1) - 7V(1)

ol
4 100ms, 0.01Ω
5 + 26.5V(1) + 46.5V(2) + 66.5V(2) + 86.5V(2) 400ms, 2Ω

b s 1. All functions of the device are performed as designed after exposure to disturbance.

O 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.

11/27
Electrical specifications VND830

Figure 6. Waveforms

NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUSn

UNDERVOLTAGE
VCC VUSDhyst
VUSD
INPUTn

( s )
ct
LOAD VOLTAGEn
STATUS undefined

d u
r o
VCC<VOV
OVERVOLTAGE
VCC > VOV
e P
VCC
l e t
INPUTn
s o
LOAD VOLTAGEn
STATUSn
O b
) -
(s
OPEN LOAD with external pull-up

INPUTn
c t
u VOUT > VOL

od
LOAD VOLTAGEn
VOL

P r
STATUSn

e te OPEN LOAD without external pull-up

o l INPUTn

bs
LOAD VOLTAGEn
STATUSn
O OVERTEMPERATURE
Tj TTSD
TR

INPUTn
LOAD CURRENTn
STATUSn

12/27
VND830 Electrical specifications

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

IL(off1) (uA) Iih (uA)
2.5 5

2.25 4.5
Off state Vin=3.25V
2 Vcc=36V 4
Vin=Vout=0V
1.75 3.5

1.5 3

1.25 2.5

1 2

0.75

0.5
1.5

( s )
ct
0.25 0.5

0 0

du
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C ) Tc (°C )

r o
Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope

e P
Vicl (V)

e t
dVout/dt(on) (V/ms)

ol
8 800

7.8
700
7.6

7.4
Iin=1mA

b s 600
Vcc=13V
Rl=6.5Ohm

7.2
O 500

)-
7 400

t(s
6.8
300
6.6
200
6.4

6.2
u c 100

o d 0
-50 -25 0 25

P r 50 75
Tc (°C )
100 125 150 175 -50 -25 0 25 50 75
Tc (ºC )
100 125 150 175

t e
Figure 11. Overvoltage shutdown
e
Figure 12. Turn-off voltage slope

o l
Vov (V) dVout/dt(off) (V/ms)

b s 50

48
600

550
Vcc=13V

O 46

44

42
500

450
Rl=6.5Ohm

40 400

38
350
36
300
34
250
32

30 200
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C ) Tc (ºC )

13/27
 Electrical specifications VND830

Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC

Ilim (A) Ron (mOhm)
20 120
Tc=150°C
18 110
Vcc=13V 100
16
90
14
80
12 70

10 60
Tc=25°C
8 50

40
6 Tc=- 40°C
30
4
20
Iout=5A
2 10

0
-50 -25 0 25 50 75 100 125 150 175
0
5 10 15 20 25 30 35

( s )
40

ct
Tc (°C ) Vcc (V)

Figure 15. Input high level Figure 16. Input hysteresis voltage
d u
Vih (V) Vhyst (V)

r o
P
3.6 1.5

1.4
3.4

3.2
1.3

e t e
3
1.2

o
1.1l
bs
2.8 1

0.9

-O
2.6
0.8
2.4

)
0.7

s
2.2
0.6

2
-50 -25 0 25 50 75 100

c 125
t
150( 175
0.5
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )

d u Tc (°C )

Figure 17. On-state resistance vs Tcase

r o Figure 18. Input low level
Ron (mOhm)

e P Vil (V)
160

e t 2.6

ol
140 2.4
Iout=2A
Vcc=8V; 13V & 36V

s
120 2.2

O b 100

80
2

1.8

60 1.6

40 1.4

20 1.2

0 1
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C ) Tc (°C )

14/27
VND830 Electrical specifications

Figure 19. Status leakage current Figure 20. Status low output voltage
Ilstat (uA) Vstat (V)
0.05 0.8

0.7
0.04 Istat=1.6mA
0.6
Vstat=5V
0.5
0.03

0.4

0.02
0.3

0.2
0.01
0.1

0
-50 -25 0 25 50 75 100 125 150 175
0
-50 -25 0 25 50 75 100 125 150

( s )
175

ct
Tc (°C ) Tc (°C )

Figure 21. Status clamp voltage Figure 22. Open load on-state detection
d u
threshold
r o
Vscl (V)
8
Iol (mA)
150

e P
7.8

7.6
Istat=1mA
140

130

l e t Vcc=13V
Vin=5V
7.4

o
120

bs
7.2 110

7 100

-O
6.8 90

)
6.6 80

6.4

6.2

t ( s 70

60

uc
6 50
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175

o d
Tc (°C ) Tc (°C )

P
Figure 23. Open load off-state voltage r
e
detection threshold
t e
o lVol (V)
5

bs
4.5
Vin=0V
4

O 3.5

2.5

1.5

0.5

0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )

15/27
Application information VND830

3 Application information

Figure 24. Application schematic

+5V +5V

+5V
VCC

Rprot STATUS1

Dld

µC Rprot INPUT1

( s )
ct
OUTPUT1

Rprot STATUS2

d u
r o
Rprot INPUT2

e P
l
GND
e t OUTPUT2

s o
O b
VGND
RGND
DGND

) -
c t (s
d u
3.1
r o
GND protection network against reverse battery
P
This section provides two solutions for implementing a ground protection network against
e
l e t
reverse battery.

o
bs
3.1.1 Solution 1: a resistor in the ground line (RGND only)

O This can be used with any type of load.

The following show how to dimension the RGND resistor:
1. RGND ≤600mV / 2 (IS(on)max)
2. RGND ≥ ( - VCC) / ( - IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = ( - VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.

16/27
 VND830 Application information

Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.

3.1.2 Solution 2: a diode (DGND) in the ground line

A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in

(
with the device ground. This shift will not vary if more than one HSD shares the same
s )
the input threshold and the status output values if the microprocessor ground is not common

u ct
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum

d
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
o
unconnected.

P r
3.2 Load dump protection
e t e
o l
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the

b s
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.

- O
3.3 MCU I/O protection
(s )
c t
d u
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to

o
prevent the µC I/O pins from latching up.
r
e P
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC

l e t
I/Os:

s o - VCCpeak / Ilatchup ≤Rprot ≤(VOHµC - VIH - VGND) / IIHmax

O b Example
For the following conditions:
VCCpeak = - 100V
Ilatchup ≥ 20mA
VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤65kΩ.
Recommended values are:
Rprot = 10kΩ

17/27
 Application information VND830

3.4 Open load detection in off-state

Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1) no false open load indication when load is connected: in this case we have to avoid VOUT
to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2) no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
( s )
ct
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.

d u
Figure 25. Open load detection in off-state
r o
V batt.

e P VPU

V CC
l e t
o
bs
R PU

DRIVER

-O
INP UT + IL(off2)
LOGIC

(s)
OUT
+

c t -
R

u
S TATUS

od
V OL
RL

P r G ROUND

e te
o l
b s
O

18/27
VND830 Application information

3.5 Maximum demagnetization energy (VCC = 13.5V)

Figure 26. Maximum turn-off current versus load inductance

ILM A X (A )
100

10
( s )
u ct
o
A
d
Pr
B
C

1
e t e
0,1 1
sol 10 100

O b L(mH)

) -
t(s
A = single pulse at TJstart = 150ºC
c
u
B= repetitive pulse at TJstart = 100ºC
d
r o
C= repetitive pulse at TJstart = 125ºC

e P
l e t
o VIN, IL

bs
Demagnetization Demagnetization Demagnetization

O
t

Note: Values are generated with RL = 0Ω.

In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.

19/27
Package and PCB thermal data VND830

4 Package and PCB thermal data

4.1 SO-16L thermal data

Figure 27. SO-16L PC board

( s )
u ct
o d
Note:
P r
Layout condition of Rth and Zth measurements (PCB FR4 area = 41mm x 48mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5cm2, 6cm2).

e t e
o l
Figure 28. Rthj-amb Vs PCB copper area in open box free air condition

RTH j-amb (°C/W) b s

70
- O
65
(s )
c t
60
du
55 r o
e P
l e t 50

o
bs
45

O 40
0 1 2 3 4 5 6 7
PCB Cu heatsink area (cm^2)

20/27
 VND830 Package and PCB thermal data

Figure 29. Thermal impedance junction ambient single pulse

ZTH (°C/W)
1000

0.5 cm2
100
6 cm2

10

( s )
1
u ct
o d
P r
0.1
e t e
0.0001 0.001 0.01 0.1 1
o l 10 100 1000

s
Time (s)
b
- O
(s )
Equation 1: pulse calculation formula

c t
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where δ = tp ⁄ T
d u
r o
e P
Figure 30. Thermal fitting model of a quad channel HSD in SO-16L

l e t Tj_1
s o C1 C2 C3 C4 C5 C6

O b Pd1
R1 R2 R3 R4 R5 R6

Tj_2 C1 C2

R1 R2

Pd2

T_amb

21/27
 Package and PCB thermal data VND830

Table 14. Thermal parameters

Area / island (cm2) Footprint 6

R1 (°C/W) 0.15
R2 (°C/W) 0.8
R3 (°C/W) 2.2
R4 (°C/W) 12
R5 (°C/W) 15
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0006
C2 (W.s/°C) 2.1E-03

( s )
ct
C3 (W.s/°C) 1.5E-02
C4 (W.s/°C) 0.14
d u
C5 (W.s/°C)
r
1
o
C6 (W.s/°C)

e P 3 5

l e t
so
O b
) -
c t (s
d u
r o
e P
l e t
s o
O b

22/27
 VND830 Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

Figure 31. SO-16L package dimensions

( s )
u ct
o d
P r
e t e
o l
b s
- O
(s )
c t
d u
r o
e P
l e t
s o
O b

23/27
 Package and packing information VND830

Table 15. SO-16L mechanical data

mm.
DIM.
Min. Typ. Max.

A 2.65

a1 0.1 0.2

a2 2.45

b 0.35 0.49

b1 0.23 0.32

C 0.5
( s )
c1 45° (typ.)

uct
D 10.1

o d 10.5

Pr
E 10.0 10.65

e t e
1.27

ol
e3 8.89

bs
F 7.4 7.6

-O
L 0.5 1.27

(s)
M 0.75

ct
S 8° (max.)

d u
r o
e P
l e t
s o
O b

24/27
 VND830 Package and packing information

5.2 SO-16L packing information

Figure 32. SO-16L tube shipment (no suffix)

Base Q.ty 50
Bulk Q.ty 1000
C
Tube length (± 0.5) 532
B
A 3.5
B 13.8
C (± 0.1) 0.6

All dimensions are in mm.

A

( s )
Figure 33. SO-16L tape and reel shipment (suffix “TR”)

u ct
Reel dimensions

o d
P rBase Q.ty 1000

e
Bulk Q.ty 1000

l e t A (max)
B (min)
330
1.5

s o C (± 0.2)
F
13
20.2

O b G (+ 2 / -0)
N (min)
16.4
60

-
T (max) 22.4

(s )
Tape dimensions
c t
d u
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width

r o W 16

P
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12

e te
Hole Diameter
Hole Diameter
D (± 0.1/-0)
D1 (min)
1.5
1.5

o l Hole Position F (± 0.05) 7.5

s
Compartment Depth K (max) 6.5

b
Hole Spacing P1 (± 0.1) 2

O All dimensions are in mm. End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

25/27
 Revision history VND830

6 Revision history

Table 16. Document revision history

Date Revision Changes

09-Sep-2004 1 Initial release.

Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and n.c. pins insertion (page 2).
4 cm2 Cu condition insertion in thermal data table (page 3).
03-May-2006 2
VCC - output diode section update (page 4).
Protections note insertion (page 4).
( s )
ct
Revision history table insertion (page 19).
Disclaimers update (page 20).
Document reformatted and restructured.
d u
04-Dec-2008 3
r
Added contents, list of tables and figures. o
Added ECOPACK® packages information.

e P
l e t
s o
O b
) -
c t (s
du
r o
e P
l e t
s o
O b

26/27
 VND830

Please Read Carefully:

( s )
u ct
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the

time, without notice.

o d
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any

All ST products are sold pursuant to ST’s terms and conditions of sale.
P r
t e
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

e
o l
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products

b s
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

- O
(s )
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED

c t
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

d u
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING

r o
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,

P
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
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e t e
o l
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any

s
liability of ST.

b
O ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

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27/27