Third Revised Edition - 2008 iste les (aan (es — Publications Pune™MOSFET RAM cell - Dynomie RAM cell - ROM organization - PROM - EPROM - EEPROM - EAPROM + Programmable logic devices - Programmable Logic Array (PLA) - Programmable Arroy Logie (PAL). Field Programmable Gate Arrays (FPGA). Table of Contents : Chapter-1 Number Systems / (1-4}to (1-78) Chapter-2 Boolean Algebra and Switching Functions 2-4)io 2-72) Chapter-3 Logic Gales (3-4)t0 (3 -98) Chapter-4 Combinational Circuits (4-1) to (@- 142) Chapter-5 Flip-Flops 5 -1)10 (6-36) Chapter -6 Counters (8-1) 10 (6-28) Chapter-7_Anaiysis and Design of Clocked Sequential Circuits (-1)0(7-74) Chapter-8 Registers (8-1) 10 (6-38) Chapter-9 Asynchronous Sequential Circuits {91} to (9 - 38} Chapter 10 Hazards u (10-4) to (10-6) Chapter -11_Memory Devices (44 - 4) to (1434) Appendix-A Algorithmic State Machines (ASM) {A= 4} to (4-68) Appendix -B Typical Digital ICs (8-4) to(8-4) Appendix -C Data Sheets For Commonly Used Digital ICs (C-1}t0(C-39) Chapterwise University Questions with Answers (P-1)t0(P- 68) Best of Technical Publications As per Revised Syllabus of Anna University - 2006 Course Semester-III [ECE] P= Electrical Machines Bakshi | © Data Structures Puntambekar | [© Digital Electronics Godse | -@ Environmental Science and Engineering Bagad | | © Electronic Circuits - 1 Godse, Bakebii } )ia Digital Electronics ISBN 9788184314113 Al ights reserved with Techni¢al Publications. No part af this book should be reproduced in any form, Electronic, Mechanical, Photocopy or any information storage and retrieval system without prior permission in wating, from Technical Publications, Pune, Published by : ‘Technical Publications Pune® #1, Amit Residency, 412, Shaniwor Peth, Pune - 411 030, India, Printer : Ades D1Pioter Seno. 10/3,Sishoged Png = 411 041