module memory(

address,
data_in,
data_out,
chip_en,
clk
);

input [3:0] address;

input [7:0] data_in;
output[7:0] data_out;
input chip_en, clk;

reg [7:0] data_out ;

reg [7:0] mem [0:255];

always @ ( clk or address or data_in or chip_en)

if (chip_en == 1) mem[address] = data_in;

else
//always @ ( clk or chip_en or address)
//if ( chip_en ==0)
data_out = mem[address];
//else
//data_out = 0;

endmodule