;******************************************************************************

; This file is a basic template for assembly code for a PIC18F4550. Copy *

; this file into your project directory and modify or add to it as needed. *

; *

; The PIC18FXXXX architecture allows two interrupt configurations. This *

; template code is written for priority interrupt levels and the IPEN bit *

; in the RCON register must be set to enable priority levels. If IPEN is *

; left in its default zero state, only the interrupt vector at 0x008 will *

; be used and the WREG_TEMP, BSR_TEMP and STATUS_TEMP variables will not *

; be needed. *

; *

; Refer to the MPASM User's Guide for additional information on the *

; features of the assembler. *

; *

; Refer to the PIC18FXX50/XX55 Data Sheet for additional *

; information on the architecture and instruction set. *

; *

;******************************************************************************

; *

; Filename: PlantillaASM *

; Date: 12/01/11 *

; File Version: 1.0 *

; *

; Author: Ing. Alejandro Vicente Lugo Silva *

; Company: Acad. Computación ICE - ESIME Zac. *

; *
;******************************************************************************

; *

; Files required: P18F4550.INC *

; *

;******************************************************************************

LIST P=18F4550, F=INHX32 ;directive to define processor

#include <P18F4550.INC> ;processor specific variable definitions

;******************************************************************************

;Configuration bits

CONFIG PLLDIV = 5 ;(20 MHz crystal on PICDEM FS USB board)

CONFIG CPUDIV = OSC1_PLL2

CONFIG USBDIV = 2 ;Clock source from 96MHz PLL/2

CONFIG FOSC = HSPLL_HS

CONFIG FCMEN = OFF

CONFIG IESO = OFF

CONFIG PWRT = OFF

CONFIG BOR = ON

CONFIG BORV =3

CONFIG VREGEN = ON ;USB Voltage Regulator

config WDT = OFF

config WDTPS = 32768

config MCLRE = ON

config LPT1OSC = OFF

 config PBADEN = OFF ;NOTE: modifying this value here won't have an effect

;on the application. See the top of the

main() function.

;By default the RB4 I/O pin is used to

detect if the

;firmware should enter the bootloader or

the main application

;firmware after a reset. In order to do

this, it needs to

;configure RB4 as a digital input, thereby

changing it from

;the reset value according to this

configuration bit.

config CCP2MX = ON

config STVREN = ON

config LVP = OFF

config ICPRT = OFF ; Dedicated In-Circuit Debug/Programming

config XINST = OFF ; Extended Instruction Set

config CP0 = OFF

config CP1 = OFF

config CP2 = OFF

config CP3 = OFF

config CPB = OFF

config CPD = OFF

config WRT0 = OFF

config WRT1 = OFF

config WRT2 = OFF

config WRT3 = OFF

 config WRTB = OFF ; Boot Block Write Protection

config WRTC = OFF

config WRTD = OFF

config EBTR0 = OFF

config EBTR1 = OFF

config EBTR2 = OFF

config EBTR3 = OFF

config EBTRB = OFF

;******************************************************************************

;Variable definitions

; These variables are only needed if low priority interrupts are used.

; More variables may be needed to store other special function registers used

; in the interrupt routines.

;******************************************************************************

;Reset vector

; This code will start executing when a reset occurs.

RESET_VECTOR ORG 0

goto Main ;go to start of main code

;******************************************************************************

ORG 0X0008

GOTO INTERRUPCION
;******************************************************************************

;Start of main program

; The main program code is placed here.

ORG 0x1000

Main ; *** main code goes here **

CALL CONFIGPTOS

CICLO GOTO CICLO

; end of main

;******************************************************************************

; Start of subrutines

;******************************************************************************

CONFIGPTOS MOVLW 0X0F

MOVWF ADCON1

MOVLW 0X07

MOVWF CMCON

MOVLW 0X00

MOVWF TRISD

MOVLW 0X07

MOVWF T0CON

MOVLW 0XA4

MOVWF TMR0H

MOVLW 0X15

MOVWF TMR0L

BCF INTCON,TMR0IF
 BSF T0CON,TMR0ON

BSF INTCON,TMR0IE

BSF INTCON,GIE

RETURN

INTERRUPCION

ORG 0X2000

MOVLW 0XA4

MOVWF TMR0H

MOVLW 0X15

MOVWF TMR0L

BTG PORTD,0

BCF INTCON,TMR0IF

RETFIE

;******************************************************************************

;End of program

END